Chip sorting method, computer equipment, chip sorting system and storage medium

Abstract

The invention discloses a chip sorting method, computer equipment, a chip sorting system and a storage medium, and relates to the technical field of chip sorting, the method comprises the following steps: obtaining photoelectric properties and position information of each crystal grain in a target wafer, defining a BIN value of each crystal grain according to the photoelectric properties and the position information, and generating a point measurement grade according to the BIN value and the position information; acquiring position information of the missed common crystal grains during photoelectric detection, defining BIN values of the missed common crystal grains, and updating the point measurement grade to form an AOI grade; dividing a wafer area, updating the BIN value of a common crystal grain in the wafer area according to the yield of the crystal grain, and updating the AOI grade according to the new BIN value to form a sorting grade; scanning the target wafer to generate a scanning graph, converting the sorting grade into a virtual wafer graph, and performing fusion processing on crystal grains in the scanning graph and crystal grains in the virtual wafer graph to generate a combined grade; and sorting the target wafer according to the combination grade. According to the invention, the number of crystal grains needing to be picked can be reduced, and the output of normal crystal grains is increased.

Description

Technical Field

[0001] The present invention relates to the field of chip sorting technology, and in particular to a chip sorting method, computer equipment, a chip sorting system and a storage medium. Background Art

[0002] In the field of LED chip manufacturing, with the continuous improvement of production technology, the 4-inch wafers produced have produced a qualitative leap, the overall yield has been greatly improved and the product size has become smaller and smaller.

[0003] According to the conventional sorting method, qualified grains need to be distributed on different blue films according to the same certain properties. The grains to be sorted occupy the vast majority, resulting in excessive sorting pressure.

[0004] In order to reduce the sorting pressure, the reverse picking method is now adopted, that is, the unqualified grains of the wafer are sorted onto the blue film, and the qualified grains are retained to complete the sorting process and directly ship. However, the existing reverse picking sorting method has the following problems: (1) Since the CCD recognition rate of the full-test machine and the sorting machine is much lower than that of the appearance inspection machine, some unqualified dies cannot be identified during the sorting operation, and the sorting machine will not pick them up, resulting in the omission of unqualified dies after sorting, which flow to the customer end and cause customer complaints; (2) When sorting grains, there is a problem of shrinkage of the blue film after it is punctured, resulting in a difference between the actual position of the grains during sorting and the position of the first bonding, so that there is a deviation and misalignment in the selected grains during sorting, which increases the alarm of the sorting machine; (3) The appearance inspection machine may mistakenly identify some of the white board grains used for position comparison as unqualified grains, so that the white board grains are picked up. However, the sorting machine frequently alarms when picking up the white board grains, increasing the number of grains that need to be picked up and reducing the output of qualified grains. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a chip sorting method, computer equipment, chip sorting system and storage medium, which can improve the sorting accuracy, reduce the number of grains to be picked, and increase the output of normal grains.

[0006] In order to solve the above technical problems, the present invention provides a chip sorting method, including: driving a full-test machine to perform photoelectric detection on a target wafer to obtain the photoelectric performance and position information of each grain in the target wafer, defining the BIN value of each grain according to the photoelectric performance and position information, and generating a point measurement file according to the BIN value and position information, wherein the grains include ordinary grains and whiteboard grains; driving an appearance inspection machine to perform appearance inspection on the target wafer to obtain the position information of ordinary grains omitted during the photoelectric detection and define the BIN value of the omitted ordinary grains, and generating a point measurement file according to the BIN value of the omitted ordinary grains. The target wafer is divided into at least one wafer area, and the BIN value of the common grains in the wafer area is updated according to the grain yield of the wafer area, and the AOI file is updated according to the new BIN value to form a sorting file; the sorting machine is driven to scan the target wafer to generate a scan image, and the sorting file is converted into a virtual wafer image, and the grains in the scan image are merged with the grains in the virtual wafer image according to the position information of the whiteboard grains to generate a combined file; the sorting machine is driven to sort the target wafer according to the combined file.

[0007] As an improvement of the above scheme, the step of defining the BIN value of each grain according to the photoelectric performance and position information includes: dividing the grains into ordinary grains and whiteboard grains according to the position information; setting the BIN value of the whiteboard grains to a maximum BIN value, and the maximum BIN value is greater than a preset reference BIN value; setting a BIN value for the ordinary grain according to the photoelectric performance, and the BIN value of the ordinary grain is less than the maximum BIN value.

[0008] As an improvement of the above solution, the step of defining the BIN value of the omitted common grains includes: setting the BIN value of the omitted common grains as an initial BIN value, wherein the initial BIN value is greater than a preset reference BIN value.

[0009] As an improvement of the above scheme, the step of updating the BIN value of ordinary grains in the wafer area according to the grain yield of the wafer area includes: judging whether the grain yield of the wafer area is greater than a preset yield; when it is judged to be yes, updating the BIN value of ordinary grains whose BIN value in the AOI file is less than or equal to a preset reference BIN value to a first BIN value, and updating the BIN value of ordinary grains whose BIN value in the AOI file is greater than the reference BIN value to a second BIN value, wherein the first BIN value is greater than the reference BIN value and the second BIN value is less than the reference BIN value; when it is judged to be no, maintaining the BIN value of ordinary grains in the wafer area.

[0010] As an improvement of the above-mentioned scheme, the step of fusing the grains in the scan image with the grains in the virtual wafer image according to the position information of the whiteboard grains to generate a combined file includes: matching the grains in the scan image with the grains in the virtual wafer image one by one according to the position information of the whiteboard grains; using the grains that cannot be matched in the virtual wafer image as filling grains, and filling the filling grains into the corresponding positions of the scan image; generating a combined file according to the coordinates and BIN values ​​of each grain in the scan image.

[0011] As an improvement of the above solution, during the sorting process of the target wafer, the real-time spacing between the white board grains is regularly calculated, and the sorting machine is driven to perform position compensation processing according to the real-time spacing.

[0012] As an improvement of the above solution, during the sorting process of the target wafer, if two consecutive picking deviations occur when sorting the filling grains, the sorting machine is driven to perform position compensation processing.

[0013] Correspondingly, the present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the steps of the above-mentioned chip sorting method when executing the computer program.

[0014] Correspondingly, the present invention also provides a chip sorting system, which includes: the above-mentioned computer equipment; a full testing machine for performing photoelectric property detection on the target wafer; an appearance inspection machine for performing appearance detection on the target wafer; a sorting machine for scanning the target wafer to generate a scan image and performing sorting processing on the target wafer.

[0015] Correspondingly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of the above-mentioned chip sorting method when executed by a processor.

[0016] The implementation of the present invention has the following beneficial effects: In view of the situation that the whiteboard grains are identified as unqualified grains by the full-test machine and are difficult to sort and select, the present invention uses the fixed position property of the whiteboard grains to accurately output their position coordinates and assign specific BIN values; In view of the limited resolution of the CCD of the full-test machine, the present invention uses the appearance inspection machine to locate the grains, outputs the position coordinates of the common grains that are missed by the full-test machine but recognized by the appearance inspection machine, and assigns them fixed BIN values; For the grains that are not recognized by the sorting machine but have coordinate data in the sorting file, the present invention performs virtual filling, and the sorting machine performs a picking action on the filling grains of the virtual filling; In view of the situation that the blue film pierces the shrink film and the position of the grain is offset, the present invention performs position compensation processing on the target wafer by regularly positioning and calculating the real-time spacing between the white plate grains and / or real-time monitoring the offset of the filling grains. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a flow chart of an embodiment of the chip sorting method of the present invention; Figure 2 is a schematic diagram of the structure of the target wafer; Figure 3 is another structural schematic diagram of the target wafer; Figure 4 It is a schematic diagram of the structure of an embodiment of the chip sorting system of the present invention. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. It is hereby stated that the directional terms such as up, down, left, right, front, back, inside, outside, etc. that appear or will appear in the text of the present invention are only based on the accompanying drawings of the present invention, and are not specific limitations of the present invention.

[0019] See also Figure 1 , Figure 1 The embodiment flow chart of the chip sorting method of the present invention is shown, which comprises: S101, driving the full-test machine to perform photoelectric detection on the target wafer to obtain the photoelectric performance and position information of each grain in the target wafer, defining the BIN value of each grain according to the photoelectric performance and position information, and generating a point test file according to the BIN value and position information; like Figure 2 As shown, the dies include common dies E and whiteboard dies Q, wherein the whiteboard dies Q are arranged at specific positions of the target wafer, and the other dies except the specific positions are common dies E.

[0020] When the target wafer is undergoing photoelectric property inspection, the full test machine will first confirm the origin of the wafer, then calculate the position of the ordinary grain based on the origin and test its photoelectric property; at the same time, since the whiteboard grain is set at a fixed position on the target wafer, its distance from the center position of the target wafer is fixed, so once the origin is confirmed, the position coordinates of the whiteboard grain can be compared, and thus the position information of the whiteboard grain can also be calculated through the origin.

[0021] Accordingly, the steps of defining the BIN value of each die according to the optoelectronic performance and position information include: (1) Divide the grains into common grains and whiteboard grains according to the position information; Since the whiteboard die is set at a specific position of the target wafer, the die can be divided into common die and whiteboard die according to the position information.

[0022] (2) Set the BIN value of the whiteboard grain to the maximum BIN value; In the prior art, the full test machine will identify the whiteboard grains as unqualified grains according to the photoelectric performance of the whiteboard grains. In the present invention, the BIN value of the whiteboard grains is specially set without considering their photoelectric performance.

[0023] In this embodiment, the BIN value of the whiteboard grain is set to the maximum BIN value; wherein, the reference BIN value is set to 150BIN, and the maximum BIN value is set to 170BIN, but this is not a limitation, as long as the maximum BIN value is greater than the preset reference BIN value.

[0024] (3) Set BIN values ​​for common grains based on optoelectronic performance; In the present invention, the BIN value of common grains can be defined according to existing classification rules, wherein different BIN values ​​represent different optoelectronic properties; accordingly, the BIN value of common grains in the present invention is less than the maximum BIN value.

[0025] Therefore, in order to solve the problem that whiteboard grains are identified as unqualified grains by the full-test machine and are difficult to sort and select, the present invention utilizes the fixed position property of whiteboard grains to accurately output their position coordinates and assign specific BIN values ​​(i.e., 170BIN).

[0026] S102, driving the appearance inspection machine to perform appearance inspection on the target wafer to obtain the position information of the common grains missed during the photoelectric inspection and define the BIN value of the missed common grains, and updating the point measurement file according to the BIN value and position information of the missed common grains to form an AOI file; For the grains that are not identified and missed by the full test machine, the present invention can simultaneously locate the grains during the appearance inspection, thereby aligning and combining the detected AOI data with the data in the point test file, and then filling in the gaps in the grains that were missed during the photoelectric inspection.

[0027] Accordingly, the present invention sets the BIN value of the omitted common grains to the initial BIN value; wherein the initial BIN value is set to 156BIN, but this is not a limitation, as long as the initial BIN value is greater than the preset reference BIN value. Therefore, in this embodiment, the grains that do not exist during the photoelectric detection but are recognized by the appearance detection machine can be defined as 156BIN.

[0028] In the prior art, when the appearance inspection machine performs appearance inspection on the target wafer, since the whiteboard die has no BIN value set, the whiteboard die will be mistakenly identified as an ordinary die, so the BIN value of the whiteboard die will also be defined as 156BIN. Different from the prior art, the present invention uses the BIN value recorded in the spot test file (i.e., 170BIN) for the whiteboard die, and combines it with the BIN value of other ordinary die to finally output the AOI file.

[0029] Therefore, in view of the limited CCD resolution of the full-test machine, the appearance inspection machine locates the grains, outputs the position coordinates of the common grains that are missed by the full-test machine but recognized by the appearance inspection machine, and assigns a fixed BIN value (i.e., 156BIN).

[0030] S103, dividing the target wafer into at least one wafer area, updating the BIN value of the common grains in the wafer area according to the grain yield of the wafer area, and updating the AOI file according to the new BIN value to form a sorting file; In this embodiment, the target wafer is divided into four wafer regions. Specifically, the target wafer can be divided into four parts according to the center position of the target wafer, and then the four wafer regions are processed respectively.

[0031] Accordingly, the step of updating the BIN value of the common die in the wafer area according to the die yield of the wafer area includes: (1) Determine whether the grain yield of the wafer area is greater than the preset yield; In this embodiment, the preset yield rate is preferably 70%, but it is not limited thereto and can be set according to actual conditions.

[0032] (2) When the judgment is yes, the BIN value of the common grain whose BIN value in the AOI file is less than or equal to the preset reference BIN value is updated to the first BIN value, and the BIN value of the common grain whose BIN value in the AOI file is greater than the reference BIN value is updated to the second BIN value; In this embodiment, the first BIN value is set to 154BIN and the second BIN value is set to 147BIN, but this is not a limitation, as long as the first BIN value is greater than the reference BIN value and the second BIN value is less than the reference BIN value.

[0033] For example, when the die yield rate of wafer area A is greater than 70%, ordinary die with BIN value ≤ 150BIN (qualified die) in the AOI file will be converted to 154BIN, and ordinary die with BIN value > 150BIN (unqualified die) in the AOI file will be converted to 147BIN. Correspondingly, the BIN value of the whiteboard die remains at 170BIN, and the conversion action is not performed.

[0034] (3) When the judgment is no, the BIN value of the ordinary die in the wafer area is maintained.

[0035] For example, when the grain yield rate of wafer area B is ≤70%, it means that there are not many qualified grains in wafer area B, and the existing sorting method can be maintained without performing the reverse sorting method.

[0036] S104, driving the sorting machine to scan the target wafer to generate a scanned image, converting the sorted file into a virtual wafer image, and fusing the grains in the scanned image with the grains in the virtual wafer image according to the position information of the whiteboard grains to generate a combined file; After the sorting machine operates on the target wafer, the sorting machine scans the target wafer to obtain a scan image and / or a scan file, and the scan file is used to record the position information of each grain in the target wafer.

[0037] Accordingly, the step of fusing the grains in the scanned image with the grains in the virtual wafer image according to the position information of the grains in the whiteboard to generate a combined file includes: (1) According to the position information of the whiteboard grains, the grains in the scanned image are matched one by one with the grains in the virtual wafer image; The virtual wafer image and the sorting file are point-to-point combined according to the position information of the whiteboard grains, and the grains in the scanned image and the corresponding grain positions in the virtual wafer image are matched one by one.

[0038] (2) The unmatched grains in the virtual wafer image are used as filling grains, and the filling grains are filled into the corresponding positions of the scan image; The position coordinates of the extra grains in the virtual wafer image are automatically filled in the corresponding positions.

[0039] (3) Generate a combined file based on the coordinates and BIN values ​​of each grain in the scanned image.

[0040] S105, driving the sorting machine to sort the target wafer according to the combined level.

[0041] Furthermore, during the sorting process of the target wafer, if two consecutive picking deviations occur when sorting the filling grains, the sorting machine is driven to perform position compensation processing.

[0042] During the sorting operation, the real-time spacing between the white board grains is regularly located and calculated, and the sorting machine is driven to perform position compensation processing according to the real-time spacing.

[0043] like Figure 3 As shown, in general, the theoretical spacing of the short sides of the whiteboard grains is X, and the theoretical spacing of the long sides is Y, while the calculated actual short side spacing of the whiteboard grains is X1, and the actual long side spacing is Y1. Specifically: X1=(c1 / d1+e1 / f1+c2 / d2+e2 / f2) / 4) Y1=(a1 / b1+a2 / b2 / 2) in: c1 is the distance between the whiteboard grain Q1 and the whiteboard grain Q2; d1 is the number of common grain rows between whiteboard grain Q1 and whiteboard grain Q2; e1 is the distance between the whiteboard grain Q2 and the whiteboard grain Q3; f1 is the number of common grain rows between whiteboard grain Q2 and whiteboard grain Q3; c2 is the distance between the whiteboard grain Q3 and the whiteboard grain Q4; d2 is the number of common grain rows between whiteboard grain Q3 and whiteboard grain Q4; e2 is the distance between whiteboard grain Q4 and whiteboard grain Q5; f2 is the number of common grain rows between whiteboard grain Q4 and whiteboard grain Q5; a1 is the distance between the whiteboard grain Q3 and the whiteboard grain Q6; b1 is the number of common grain rows between whiteboard grain Q3 and whiteboard grain Q6; a2 is the distance between the whiteboard grain Q3 and the whiteboard grain Q7; b2 is the number of common grain rows between the white board grain Q3 and the white board grain Q7.

[0044] When the difference between the calculated actual short side spacing X1 of the whiteboard grains and the theoretical short side spacing X of the whiteboard grains exceeds the preset short side threshold, the sorting machine needs to be driven to perform position compensation processing; Similarly, when the difference between the calculated actual long side spacing Y1 of the whiteboard grains and the theoretical long side spacing Y of the whiteboard grains exceeds the preset long side threshold, the sorting machine needs to be driven to perform position compensation processing.

[0045] Accordingly, the X-axis compensation value is: + / -(X1-X), and the Y-axis compensation value is: + / -(Y1-Y).

[0046] In addition, if two consecutive picking offset alarms occur when picking the extra filling die in the virtual wafer image, the sorting machine will also make appropriate position compensation.

[0047] Therefore, for the grains that are not recognized by the sorting machine but have coordinate data in the sorting file, all of them are virtually filled in, and the sorting machine must perform picking actions for the virtually filled grains to further avoid deviation.

[0048] From the above, it can be seen that the chip sorting method of the present invention can effectively avoid the situation where unqualified grains cannot be identified due to the fact that the CCD recognition rate of the full test machine and the sorting machine is much lower than that of the appearance inspection machine, and the sorting machine does not pick them up and misses them and flows to the client, causing customer complaints; to a certain extent, it reduces the picking alarms caused by the blue film piercing the shrink film and the position displacement of the grains during grain sorting, solves the problem of frequent alarms when the machine needs to pick white board grains, reduces the number of grains that need to be picked, and increases the output of normal grains.

[0049] Accordingly, the present invention also discloses a computer device, including a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the steps of the above chip sorting method when executing the computer program. At the same time, the present invention also discloses a computer-readable storage medium, wherein the computer program is stored thereon, wherein the steps of the above chip sorting method are implemented when the computer program is executed by the processor.

[0050] like Figure 4 As shown, the chip sorting system 100 of the present invention comprises: A computer device 1, comprising a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the steps of the above chip sorting method when executing the computer program; Full test machine 2, used for performing photoelectric property detection on the target wafer; Appearance inspection machine 3, used for performing appearance inspection on the target wafer; The sorting machine 4 is used to scan the target wafer to generate a scan image and perform sorting processing on the target wafer.

[0051] The full testing machine 2 , the appearance testing machine 3 and the sorting machine 4 are respectively connected to the computer device 1 .

[0052] During operation, the computer device 1 drives the full-test machine 2 to perform photoelectric inspection on the target wafer to obtain the photoelectric performance and position information of each grain in the target wafer, defines the BIN value of each grain according to the photoelectric performance and position information, and generates a point measurement file according to the BIN value and position information; then, the computer device 1 drives the appearance inspection machine 3 to perform appearance inspection on the target wafer to obtain the position information of common grains omitted during the photoelectric inspection and defines the BIN value of the omitted common grains, and updates the point measurement file according to the BIN value and position information of the omitted common grains to form an AOI file; then , the computer device 1 divides the target wafer into at least one wafer area, updates the BIN value of the common grains in the wafer area according to the grain yield of the wafer area, and updates the AOI file according to the new BIN value to form a sorting file; then, the computer device 1 drives the sorting machine 4 to scan the target wafer to generate a scan image, converts the sorting file into a virtual wafer image, and merges the grains in the scan image with the grains in the virtual wafer image according to the position information of the whiteboard grains to generate a combined file; finally, the computer device 1 drives the sorting machine 4 to sort the target wafer according to the combined file.

[0053] Therefore, the chip sorting system 100 of the present invention can automatically determine the fixed position of the whiteboard grain by fixing the BIN value of the whiteboard grain, combining the output document with the card control of a certain yield, synchronously sorting and scanning the physical image file, supplementing the virtual grain coordinates to execute the sorting action, and at the same time sorting a sorting method to make positioning compensation.

[0054] The above is a preferred embodiment of the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A chip sorting method, characterized in that: include: Driving the full-test machine to perform photoelectric detection on the target wafer to obtain the photoelectric performance and position information of each grain in the target wafer, defining the BIN value of each grain according to the photoelectric performance and position information, and generating a point test file according to the BIN value and position information, wherein the grains include ordinary grains and whiteboard grains; Driving the appearance inspection machine to perform appearance inspection on the target wafer to obtain the position information of the common grains missed during the photoelectric inspection and define the BIN values ​​of the missed common grains, and updating the point measurement file according to the BIN values ​​and position information of the missed common grains to form an AOI file; Divide the target wafer into at least one wafer area, update the BIN value of common grains in the wafer area according to the grain yield of the wafer area, and update the AOI file according to the new BIN value to form a sorting file; Driving a sorting machine to scan the target wafer to generate a scanned image, converting the sorted file into a virtual wafer image, and fusing the grains in the scanned image with the grains in the virtual wafer image according to the position information of the whiteboard grains to generate a combined file; The sorting machine is driven according to the combined gear to perform sorting processing on the target wafer.

2. The chip sorting method according to claim 1, characterized in that: The step of defining the BIN value of each grain according to the photoelectric performance and position information includes: Dividing the grains into common grains and whiteboard grains according to the position information; Setting the BIN value of the whiteboard grain to a maximum BIN value, wherein the maximum BIN value is greater than a preset reference BIN value; A BIN value is set for the common grain according to the photoelectric performance, and the BIN value of the common grain is less than the maximum BIN value.

3. The chip sorting method according to claim 1, characterized in that: The step of defining the BIN value of the omitted common grains comprises: The BIN value of the omitted common grain is set as an initial BIN value, and the initial BIN value is greater than a preset reference BIN value.

4. The chip sorting method according to claim 1, characterized in that: The step of updating the BIN value of the common grains in the wafer area according to the grain yield of the wafer area comprises: Determining whether the grain yield of the wafer area is greater than a preset yield; When the judgment is yes, the BIN value of the common grain whose BIN value in the AOI file is less than or equal to the preset reference BIN value is updated to a first BIN value, and the BIN value of the common grain whose BIN value in the AOI file is greater than the reference BIN value is updated to a second BIN value, wherein the first BIN value is greater than the reference BIN value and the second BIN value is less than the reference BIN value; When the judgment is no, the BIN value of the common die in the wafer area is maintained.

5. The chip sorting method according to claim 1, characterized in that: The step of fusing the grains in the scanned image with the grains in the virtual wafer image according to the position information of the grains on the whiteboard to generate a combined file comprises: According to the position information of the whiteboard grains, the grains in the scanned image are matched one by one with the grains in the virtual wafer image; Using the unmatched grains in the virtual wafer image as filling grains, and filling the filling grains into corresponding positions in the scan image; A combined file is generated according to the coordinates and BIN values ​​of each grain in the scanned image.

6. The chip sorting method according to claim 1, characterized in that: During the sorting process of the target wafer, the real-time spacing between the white board grains is calculated regularly, and the sorting machine is driven to perform position compensation processing according to the real-time spacing.

7. The chip sorting method according to claim 6, characterized in that: During the process of sorting the target wafer, if two consecutive picking deviations occur when sorting the filling grains, the sorting machine is driven to perform position compensation processing.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the chip sorting method according to any one of claims 1 to 7 are implemented.

9. A chip sorting system, characterized in that: include: The computer device of claim 8; Full test machine, used to perform photoelectric property inspection on target wafers; An appearance inspection machine, used for performing appearance inspection on the target wafer; The sorting machine is used to scan the target wafer to generate a scan image and perform a sorting process on the target wafer.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the chip sorting method according to any one of claims 1 to 7 are implemented.

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