Board-level embedded resistor preparation method based on hole plugging technology

Abstract

The invention discloses a board-level embedded resistor preparation method based on a plug hole technology, and belongs to the field of electronic component integration. Comprising the following steps: 1) performing hole processing on a PCB substrate to form a hole channel matched with a resistor pattern; 2) carrying out pretreatment on the PCB substrate with the pore channels, wherein the pretreatment comprises mechanical polishing and brushing, chemical pore conditioning and two-fluid treatment which are carried out in sequence; (3) filling the hole channels of the pre-treated substrate with the resistance paste; 4) curing; 5) carrying out surface treatment to remove redundant resistance paste on the surface; and 6) preparing electrodes at two ends of the resistor. The two-fluid technology is adopted to further treat the hole wall, fine grinding particles are blown into the hole through compressed air and high-speed water flow to be ground, the roughness of the hole wall is reduced, and compared with a conventional cleaning method, the two-fluid technology can permeate into the deeper hole and is particularly suitable for small hole diameters and complex hole shapes, and the cleaning efficiency is improved. The problem that the resistance is unstable due to the uneven hole wall can be effectively solved, and the precision and stability of the resistance are guaranteed.

Description

Technical Field

[0001] The invention belongs to the field of electronic component integration, and in particular relates to a method for preparing an embedded resistor based on a plugging hole technology. Background Art

[0002] As electronic products develop towards miniaturization and integration, the space occupation and cost issues of traditional surface mount resistors on printed circuit boards (PCBs) have gradually emerged, especially in high-frequency and high-density circuit designs, where traditional resistor devices occupy a lot of space and interfere with signals. Traditional resistors not only occupy most of the PCB area, but also may cause signal distortion and circuit instability due to the presence of pads and contact points. Therefore, the integration of resistor components, reducing their space occupation, and reducing manufacturing costs have become urgent needs in PCB design.

[0003] At present, embedded resistors are prepared in the inner layer of PCB by chemical plating, electroplating, screen printing and inkjet printing. Patent CN118430919A prepares embedded resistors with stable and uniform resistance in the inner layer of PCB by electroplating Ni-Cr alloy on copper foil and combining lamination and etching processes. Patent CN114783712A forms a Ni-PC ternary alloy film on the inner layer of printed circuit board through the deposition technology of chemically doped carbon materials. By adjusting the composition, temperature and deposition time of the chemical plating solution, the resistance value can be accurately controlled, solving the problem of small and unstable resistance of traditional metal resistor materials. Patent CN103694796A uses optimized resistor ink and inkjet printing to successfully prepare thick film embedded resistors in the inner layer of PCB. The above patents all integrate resistor materials into the inner layer of PCB. Although the integration of circuits has been improved to a certain extent, they also face some challenges. First, these integration methods often occupy a large amount of inner layer area, affecting the layout and functional realization of other circuit components; second, the process flow of these methods has certain incompatibility, which makes it difficult for resistor integration to be seamlessly connected with existing manufacturing processes in practical applications. Therefore, how to improve the process compatibility of resistor integration technology and reduce the inner layer area occupation is still the focus and difficulty of current technical research. Summary of the invention

[0004] The purpose of the present invention is to propose a method for preparing board-level embedded resistors based on plugging technology in response to the problems existing in the background technology. The present invention uses two-fluid technology to further process the hole wall, and blows fine abrasive particles into the hole for grinding through compressed air and high-speed water flow to reduce the roughness of the hole wall. Compared with conventional cleaning methods, the two-fluid technology can penetrate deeper into the hole, and is particularly suitable for small pore diameters (such as less than 150 microns) and complex hole shapes. It can effectively solve the unstable resistance caused by uneven hole walls and ensure the accuracy and stability of the resistor.

[0005] To achieve the above purpose, the technical solution adopted by the present invention is as follows:

[0006] A method for preparing a board-level embedded resistor based on via plugging technology comprises the following steps:

[0007] Step 1. Prepare resistor paste;

[0008] Step 2: Use mechanical drilling to process holes on the PCB substrate to form holes that match the resistor pattern;

[0009] Step 3. Pre-treating the PCB substrate with holes obtained in step 2, the pre-treatment includes mechanical grinding, chemical hole finishing and two-fluid treatment in sequence to ensure that the hole wall is flat and has no obvious rough area;

[0010] Step 4. Filling the resistor paste into the pores of the substrate pre-treated in step 3;

[0011] Step 5. Curing the PCB substrate filled with the resistor paste obtained in step 4;

[0012] Step 6. Perform surface treatment on the PCB substrate after curing in step 5 to remove excess resistance paste on the surface and ensure that the surface of the circuit board is flat;

[0013] Step 7. Prepare electrodes at both ends of the resistor to complete the production of the PCB substrate.

[0014] Furthermore, the resistor paste in step 1 includes a conductive filler and a polymer, wherein the mass percentage of the conductive filler is 0.5wt% to 30wt%, and the mass percentage of the polymer is 70wt% to 99.5wt%. The conductive filler is one or more of polyaniline, carbon black, graphite, metal particles, carbon nanotubes, and graphene to ensure good electrical conductivity and stability; the polymer is one or more of polymers with good mechanical strength and thermal stability such as polyethylene (PE), polypropylene (PP), polystyrene (PS), polyvinyl chloride (PVC), polyester (PET), polyurethane (PU), polytetrafluoroethylene (PTEE), polyamide (PA), polyoxymethylene (POM), polyurea (PUA), epoxy resin (EP), phenolic resin (PF), polylactic acid (PLA), and bisphenol A diglycidyl ether (BADGE).

[0015] Furthermore, the process of preparing the resistor paste in step 1 is: mixing the conductive filler and the high molecular polymer in a ratio of "0.5wt% to 30wt% of the conductive filler and 70wt% to 99.5wt% of the high molecular polymer", adding a curing agent and stirring evenly to obtain the resistor paste.

[0016] Furthermore, the PCB substrate in step 2 is an epoxy glass cloth substrate FR-4, acrylonitrile-butadiene-styrene plastic ABS, polycarbonate plastic PC, polyimide resin plastic PI, polyethylene terephthalate plastic PET, polytetrafluoroethylene plastic PTFE, etc., which has good mechanical strength and thermal stability.

[0017] Furthermore, the process of the two-fluid treatment in step 3 is as follows: placing the chemically shaped substrate into the two-fluid device, spraying nitrogen and polishing liquid at an angle of 30 to 50° through a two-fluid nozzle (Φ0.5mm), keeping the distance between the nozzle and the substrate at 10 to 20mm, spraying for 10 to 30 seconds, and washing and drying after completion to obtain the substrate after the two-fluid treatment. Preferably, the flow rate of the nitrogen is 400 to 500 L / min, and the flow rate of the polishing liquid is 0.5 to 0.7 L / min.

[0018] Furthermore, the polishing liquid is prepared by selecting one of aluminum oxide, silica sand, and silicon nitride with a diameter of 0.5 μm to 10 μm as abrasive particles, one of polyvinyl alcohol and fatty acid ester as a surfactant, and deionized water as a solvent, and mixing them in a mass ratio of abrasive particles: solvent: surfactant = 1: (5 to 20): (0.5 to 2), and preparing the polishing liquid by high-speed shear dispersion. Preferably, the rotation speed of the high-speed shear dispersion is 2000 to 3500 rpm, and the time is 15 to 30 minutes.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] 1. The present invention adopts two-fluid technology to further process the hole wall. Fine abrasive particles are blown into the hole by compressed air and high-speed water flow for grinding, thereby reducing the roughness of the hole wall. Compared with conventional cleaning methods, the two-fluid technology can penetrate deeper into the hole, and is particularly suitable for small pore sizes (such as less than 150 microns) and complex hole shapes. It can effectively solve the unstable resistance caused by uneven hole walls and ensure the accuracy and stability of the resistance.

[0021] 2. The present invention uses improved plugging technology to fill the resistor paste into the hole of the PCB to form a three-dimensional embedded resistor, realizing the integration of the resistor element and the PCB, which not only effectively reduces the PCB area occupation, but also reduces the manufacturing cost, and achieves compatibility with the conventional PCB manufacturing process. It is suitable for the design of high-density interconnection and multi-layer circuit boards and has good application prospects. At the same time, compared with the method of embedding the resistor in the inner layer plane, it can effectively reduce the influence of etching, film stripping, browning and other chemicals on the resistor layer, and reduce the resistance error caused by these factors.

[0022] 3. The present invention adopts low-cost resistor paste and optimizes the process flow, which reduces the use space and assembly cost of traditional resistor elements, reduces production costs, and makes production more efficient and economical. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A flow chart of a method for preparing a board-level embedded resistor based on via plugging technology provided by the present invention;

[0024] Figure 2 This is a resistance diagram of the buried resistor prepared in Example 1;

[0025] Figure 3 This is a resistance diagram of the buried resistor prepared in Example 2;

[0026] Figure 4 This is the resistance value diagram of the buried resistor prepared in Example 3. DETAILED DESCRIPTION

[0027] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0028] Example 1

[0029] This embodiment provides a method for preparing a board-level embedded resistor based on a plugging technique, wherein a commercially available graphite conductive adhesive is used as a resistor slurry to prepare an embedded resistor, and the method comprises the following steps:

[0030] Step 1. Prepare resistor paste;

[0031] Commercially available graphite conductive glue is used as resistor slurry;

[0032] Step 2. Use mechanical drilling to process holes on the FR-4 substrate to form holes that match the resistor pattern; wherein the drilling diameter is 1 mm, the drill speed is 50,000 rpm (50Krpm), the feed speed is 1.5 m / min, and the retract speed is 25 m / min;

[0033] Step 3. The PCB substrate with holes obtained in step 2 is pre-treated, and the pre-treatment includes mechanical brushing, chemical hole finishing and two-fluid treatment in sequence to ensure that the hole wall is flat and there is no obvious rough area; wherein the process of the two-fluid treatment is: select aluminum oxide with a diameter of 1 μm as abrasive particles, polyvinyl alcohol as a surfactant, and deionized water as a solvent, and mix them in a mass ratio of abrasive particles: solvent: surfactant = 1:10:1, and prepare a polishing liquid by high-speed shear dispersion, the speed of high-speed shear dispersion is 2000 rpm, and the time is 30 minutes; put the substrate after chemical hole finishing into a two-fluid device, and spray nitrogen and polishing liquid at an angle of 45° through a two-fluid nozzle (nozzle diameter Φ0.5mm), keep the distance between the nozzle and the substrate at 10mm, spray for 10 seconds, and wash and dry after completion to obtain a substrate after two-fluid treatment, wherein the flow rate of nitrogen is 460L / min, and the flow rate of the polishing liquid is 0.5L / min;

[0034] Step 4. Use a scraper to fill the graphite conductive glue into the holes of the substrate pre-treated in step 3, and check whether there is any missing filling;

[0035] Step 5. Place the substrate filled with the resistor paste obtained in step 4 into an oven and cure at 125 degrees Celsius for 30 minutes;

[0036] Step 6. After curing is completed, use a grinder to grind the raised resistors flat;

[0037] Step 7. Prepare silver electrodes at both ends of the resistor.

[0038] Example 2

[0039] Compared with Example 1, this embodiment is different in that carbon black-bisphenol A diglycidyl ether is used as the resistor paste, and the remaining steps are exactly the same as those of Example 1. The preparation process of the carbon black-bisphenol A diglycidyl ether resistor paste is as follows: weigh the raw materials according to the mass ratio of carbon black: bisphenol A diglycidyl ether resin = 1:5, put them in a beaker, and mechanically stir them at a speed of 2000 rpm for 30 minutes under heating in a 40°C water bath. After the carbon black and bisphenol A diglycidyl ether resin are evenly mixed, add T31 curing agent to the carbon black and resin mixed paste according to the mass ratio of T31 curing agent: bisphenol A diglycidyl ether resin = 1:2, keep the water bath at 40°C and the speed of 2000 rpm, and continue stirring for 15 minutes to obtain the carbon black-bisphenol A diglycidyl ether resistor paste.

[0040] Example 3

[0041] The present embodiment is different from the first embodiment in that 15 wt % polyaniline-bisphenol A diglycidyl ether is used as the resistor paste, and the remaining steps are exactly the same as those of the first embodiment.

[0042] The resistance diagram of the embedded resistor prepared in Examples 1, 2, and 3 is shown in the figure Figure 2 , 3 As shown in Figure 4, it can be seen from the figure that the resistance values ​​of the embedded resistors obtained by the three resistor pastes are in the range of hundreds of ohms, thousands of ohms, and megaohms, which can basically cover resistors in all resistance ranges. The resistance errors of the three embedded resistors are 4.9%, 9.5%, and 15.5%, respectively, showing good resistance stability. The resistance accuracy is within 20%, indicating that the present invention can meet the requirements of general circuit applications for resistance accuracy within 20%.

[0043] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a board-level embedded resistor based on via plugging technology, characterized in that: The following steps are involved: Step 1. Prepare resistor paste; Step 2. Process holes on the PCB substrate to form channels that match the resistor pattern; Step 3. Pre-treating the PCB substrate with holes obtained in step 2, wherein the pre-treatment includes mechanical grinding, chemical hole shaping and two-fluid treatment in sequence; Step 4. Filling the resistor paste into the pores of the substrate pre-treated in step 3; Step 5. Curing the PCB substrate filled with the resistor paste obtained in step 4; Step 6. Performing surface treatment on the PCB substrate after curing in step 5 to remove excess resistance paste on the surface; Step 7. Prepare electrodes at both ends of the resistor.

2. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 1, characterized in that: The resistor paste in step 1 includes a conductive filler and a high molecular polymer, wherein the mass percentage of the conductive filler is 0.5wt% to 30wt%, and the mass percentage of the high molecular polymer is 70wt% to 99.5wt%.

3. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 2, characterized in that: The conductive filler is one or more of polyaniline, carbon black, graphite, metal particles, carbon nanotubes, and graphene, and the high molecular polymer is one or more of polyethylene, polypropylene, polystyrene, polyvinyl chloride, polyester, polyurethane, polytetrafluoroethylene, polyamide, polyformaldehyde, polyurea, epoxy resin, phenolic resin, polylactic acid, and bisphenol A diglycidyl ether.

4. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 2, characterized in that: Step 1 The preparation process of the resistor paste is: the conductive filler and the high molecular polymer are mixed in a ratio of "0.5wt% to 30wt% of the conductive filler and 70wt% to 99.5wt% of the high molecular polymer", and a curing agent is added and stirred evenly to obtain the resistor paste.

5. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 1, characterized in that: The PCB substrate in step 2 is an epoxy glass cloth substrate FR-4, acrylonitrile butadiene styrene plastic ABS, polycarbonate plastic PC, polyimide resin plastic PI, polyethylene terephthalate plastic PET or polytetrafluoroethylene plastic PTFE.

6. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 1, characterized in that: The process of the two-fluid treatment described in step 3 is: place the substrate after chemical hole finishing into the two-fluid equipment, spray nitrogen and polishing liquid at an angle of 30 to 50 degrees through the two-fluid nozzle, keep the distance between the nozzle and the substrate at 10 to 20 mm, spray for 10 to 30 seconds, and after completion, clean and dry to obtain the substrate after two-fluid treatment.

7. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 6, characterized in that: The flow rate of the nitrogen is 400-500 L / min, and the flow rate of the polishing liquid is 0.5-0.7 L / min.

8. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 6, characterized in that: The preparation process of the polishing liquid is as follows: select one of aluminum oxide, silica sand, and silicon nitride with a diameter of 0.5μm to 10μm as abrasive particles, one of polyvinyl alcohol and fatty acid ester as a surfactant, and deionized water as a solvent, mix them in a mass ratio of abrasive particles: solvent: surfactant = 1: (5-20): (0.5-2), and prepare it by high-speed shear dispersion.

9. The method for preparing a board-level embedded resistor based on via plugging technology according to claim 8, characterized in that: The high-speed shearing dispersion has a rotation speed of 2000 to 3500 rpm and a time of 15 to 30 minutes.

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