Radio frequency power amplification circuit realized based on low-voltage CMOS (Complementary Metal Oxide Semiconductor) process

Abstract

The invention provides a radio frequency power amplification circuit realized based on a low-voltage CMOS (Complementary Metal Oxide Semiconductor) process, which enables a low-voltage CMOS device not to be limited by the application of a high-power radio frequency power amplifier, can avoid the breakdown risk and is low in cost. Comprising a signal amplification output module and an anti-breakdown module. The signal amplification output module is connected with the signal input end RFIN and the signal output end RFOUT and is used for performing power amplification on a radio frequency signal input by the signal input end RFIN and outputting the radio frequency signal through the signal output end RFOUT; the signal amplification output module comprises MOS (Metal Oxide Semiconductor) tubes M1 and M2, and a cascode structure is formed through the MOS tubes M1 and M2; the signal input end RFIN is connected with the grid electrode of the MOS tube M2, and the signal output end RFOUT is connected with the drain electrode end of the MOS tube M1; and the anti-breakdown module is connected with the level input end IN and the signal amplification output module, and is used for carrying out anti-breakdown protection on the signal amplification output module according to a level signal of the level input end IN.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency power amplifiers, and particularly to a radio frequency power amplification circuit implemented based on a low-voltage CMOS process. Background Art

[0002] Radio frequency power amplifiers (i.e., PAs) are widely used in the field of wireless communication, such as mobile phones, Wi-Fi, IoT, etc. Their main function is to amplify and transmit radio frequency signals. In order to transmit wireless signals farther, the output power of the radio frequency power amplifier may reach the watt (W) level. For example, when the PA output power is 1W, under the bias of a 5V power supply voltage and a 50Ω load, the radio frequency voltage swing will reach 10V. And a high voltage swing requires that the process devices can withstand it. Especially for CMOS devices, it is very easy to have breakdown failure, resulting in reliability problems, which in turn affect the high-power output operation of the radio frequency power amplifier. Generally, the shorter the gate length of a CMOS device, the higher its cut-off frequency Ft, but the lower the breakdown voltage it can withstand. And the device with a higher breakdown voltage often has a smaller cut-off frequency, which limits its application in high-frequency applications. Therefore, there is a contradiction that is difficult to reconcile between the cut-off frequency and the breakdown voltage, that is, the low-voltage CMOS process devices are relatively limited in the application of high-power radio frequency power amplifiers. Existing technologies often use the power combination method to achieve high-power output, and the bias voltage is first given by a step-down module to provide a low-voltage power supply. However, power combination requires a transformer to be implemented, which will increase the chip area greatly, and at the same time, it will pose high requirements for the design of the transformer, the cost will also increase, and it is difficult to obtain high-Q inductors or transformers for the high-loss substrates of the CMOS process. In addition, the power consumption of the added step-down module also affects the efficiency of the overall system to a certain extent. Summary of the Invention

[0003] In view of the above problems, the present invention provides a radio frequency power amplification circuit implemented based on a low-voltage CMOS process, which can enable low-voltage CMOS devices to no longer be limited by the application of high-power radio frequency power amplifiers, can avoid breakdown risks, and has low costs.

[0004] The present invention adopts the following technical solutions. A radio frequency power amplification circuit implemented based on a low-voltage CMOS process includes a signal amplification and output module and an anti-breakdown module. Among them,

[0005] The signal amplification and output module is connected to both the signal input terminal RFIN and the signal output terminal RFOUT, and is used to amplify the radio frequency signal input from the signal input terminal RFIN and output it through the signal output terminal RFOUT.

[0006] The signal amplification and output module includes MOS transistors M1 and M2, and a cascode structure is formed by MOS transistors M1 and M2; the signal input terminal RFIN is connected to the gate of the MOS transistor M2, and the signal output terminal RFOUT is connected to the drain terminal of the MOS transistor M1;

[0007] The anti-breakdown module is connected to both the level input terminal IN and the signal amplification and output module, and is used to perform anti-breakdown protection on the signal amplification and output module according to the level signal of the level input terminal IN;

[0008] When the level input terminal IN is a low-level signal, the MOS transistor M2 is turned off, and the voltage at the gate terminal of the MOS transistor M1 is divided and then output;

[0009] When the level input terminal IN is a high-level signal, the bias voltage generated by the anti-breakdown module is output to the gate terminal of the MOS transistor M1 and then output.

[0010] Further, the signal amplification and output module further includes coupling capacitors CB1, CB2, an output capacitor C1, and a choke inductor L1; the drain of the MOS transistor M1 is connected to one end of the output capacitor C1 and one end of the choke inductor L1, the other end of the choke inductor L1 is connected to the power supply VDD, and the other end of the output capacitor C1 is connected to the signal output terminal RFOUT; the gate of the MOS transistor M1 is grounded after being connected to the coupling capacitor CB2, the source of the MOS transistor M1 is connected to the drain of the MOS transistor M2, the source of the MOS transistor M2 is grounded, the gate of the MOS transistor M2 is connected to one end of the coupling capacitor CB1, and the other end of the coupling capacitor CB1 is connected to the signal input terminal RFIN;

[0011] Further, both the MOS transistors M1 and M2 are 3.3V CMOS devices; the channel widths of the MOS transistors M1 and M2 are 8 mm to 10 mm;

[0012] Further, the anti-breakdown module includes inverters INV1 and INV2, MOS transistors M3, M4, and M5, resistors RB1 to RB3, voltage-dividing resistors RBF1 and RBF2, and current sources IB1 and IB2. The input terminal of the inverter INV1 is connected to the level input terminal IN. The output terminal of the inverter INV1 is connected to the input terminal of the inverter INV2 and the gate of the MOS transistor M4. The source of the MOS transistor M4 is grounded. The output terminal of the inverter INV2 is connected to the drain of the MOS transistor M4, the gate of the MOS transistor M3, one end of the resistor RB1, one end of the current source IB1, the gate of the MOS transistor M5, and the drain of the MOS transistor M5. The other end of the resistor RB1 is connected to the gate of the MOS transistor M2. The sources of the MOS transistors M3 and M5 are both grounded. The drain of the MOS transistor M5 is connected to one end of the current source IB1. The drain of the MOS transistor M3 is connected to one end of the resistor RB3. The other end of the resistor RB3 is connected to one end of the resistor RB2 and one end of the current source IB2. The other ends of the current sources IB1 and IB2 are connected together and then connected to the power supply VDD. The other end of the resistor RB2 is connected to one end of the voltage-dividing resistors RBF1 and RBF2 and the gate of the MOS transistor M1. The other end of the voltage-dividing resistor RBF2 is grounded. The other end of the voltage-dividing resistor RBF1 is connected to one end of the choke inductor L1, one end of the output capacitor C1, and the drain of the MOS transistor M1.

[0013] The beneficial effect of the present invention is that according to the level signal of the level input terminal IN, the anti-breakdown module can protect the signal amplification and output module from breakdown. Furthermore, the signal amplification and output module can amplify the radio frequency signal input by the signal input terminal RFIN and reliably output it through the signal output terminal RFOUT, so as to realize that low-voltage CMOS devices can be directly applied to high-voltage and high-power radio frequency power amplifiers, with the characteristics of low leakage and low cost, and having good economic value in use. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is the structural block diagram of the present invention;

[0015] Figure 2 is the circuit schematic diagram of the present invention;

[0016] Figure 3 is the curve diagram of the drain-source current change of the MOS transistor M1 of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0017] As Figure 1 、 Figure 2 shown, a radio frequency power amplifier circuit implemented based on a low-voltage CMOS process of the present invention includes a signal amplification and output module 1 and an anti-breakdown module 2. Among them,

[0018] A signal amplification and output module 1, which is connected to both a signal input end RFIN and a signal output end RFOUT, is used to amplify the power of the radio frequency signal input from the signal input end RFIN and output it through the signal output end RFOUT;

[0019] The signal amplification and output module 1 includes MOS transistors M1 and M2, and a cascode structure is formed by connecting through the MOS transistors M1 and M2, that is, it is connected to a 5V power supply in the form of a cascode; the signal input end RFIN is connected to the gate of the MOS transistor M2, and the signal output end RFOUT is connected to the drain end of the MOS transistor M1;

[0020] A breakdown protection module 2, which is connected to both a level input end IN and the signal amplification and output module, is used to perform breakdown protection on the signal amplification and output module 1 according to the level signal of the level input end IN;

[0021] When the level input end IN is a low-level signal, the MOS transistor M2 is turned off, and the voltage at the gate end of the MOS transistor M1 is divided and then output;

[0022] When the level input end IN is a high-level signal, the bias voltage generated by the breakdown protection module 2 is output to the gate end of the MOS transistor M1 and then output.

[0023] The signal amplification and output module 1 further includes coupling capacitors CB1, CB2, an output capacitor C1, and a choke inductor L1; the radio frequency signal input from the signal input end RFIN is coupled into the gate of the MOS transistor M2 through the coupling capacitor CB1; the drain of the MOS transistor M1 is connected to one end of the output capacitor C1 and one end of the choke inductor L1, the other end of the choke inductor L1 is connected to the power supply VDD (5V), and the other end of the output capacitor C1 is connected to the signal output end RFOUT; the gate of the MOS transistor M1 is grounded after being connected to the coupling capacitor CB2, the source of the MOS transistor M1 is connected to the drain of the MOS transistor M2, the source of the MOS transistor M2 is grounded, the gate of the MOS transistor M2 is connected to one end of the coupling capacitor CB1, and the other end of the coupling capacitor CB1 is connected to the signal input end RFIN; both the MOS transistors M1 and M2 are 3.3V CMOS devices; the channel widths of the MOS transistors M1 and M2 are 10mm.

[0024] The anti-breakdown module 2 includes inverters INV1 and INV2, MOS transistors M3, M4, M5, resistors RB1 to RB3, voltage-dividing resistors RBF1 and RBF2, and current sources IB1 and IB2. The input terminal of inverter INV1 is connected to the level input terminal IN. The output terminal of inverter INV1 is connected to the input terminal of inverter INV2 and the gate of MOS transistor M4. The source of MOS transistor M4 is grounded. The output terminal of inverter INV2 is connected to the drain of MOS transistor M4, the gate of MOS transistor M3, one end of resistor RB1, one end of current source IB1, the gate of MOS transistor M5, and the drain of MOS transistor M5. The other end of resistor RB1 is connected to the gate of MOS transistor M2. The sources of MOS transistors M3 and M5 are both grounded. The drain of MOS transistor M5 is connected to one end of current source IB1. The drain of MOS transistor M3 is connected to one end of resistor RB3. The other end of resistor RB3 is connected to one end of resistor RB2 and one end of current source IB2. The other ends of current sources IB1 and IB2 are connected and then connected to the power supply VDD. The other end of resistor RB2 is connected to one end of voltage-dividing resistors RBF1 and RBF2 and the gate of MOS transistor M1. The other end of voltage-dividing resistor RBF2 is grounded. The other end of voltage-dividing resistor RBF1 is connected to one end of choke inductor L1, one end of output capacitor C1, and the drain of MOS transistor M1.

[0025] Without adding the existing step-down module and power synthesis transformer, the present invention can achieve high-power output of the high-frequency power amplifier. Specifically, the working principle of the present invention is that when the radio frequency power amplifier is in the off state, that is, when the level input terminal IN is a low-level signal, then the current sources IB1 and IB2 are turned off and there is no output current. At this time, the gate of MOS transistor M3 is low and MOS transistor M3 is turned off. At the same time, MOS transistor M4 is turned on and the pull-down voltage VG is low, so that the gate of MOS transistor M2 is low and MOS transistor M2 is turned off. In order to withstand the 5V power supply VDD, if the gate of MOS transistor M1 is also pulled low, the voltage difference between the gate and the drain of MOS transistor M1 will be 5V, which will inevitably affect the working time of MOS transistor M1 and cause the circuit to fail. Then, after a certain voltage division is formed by the voltage-dividing resistors RBF1 and RBF2 and then given to the gate of MOS transistor M1, the voltage differences between the gate and the drain and between the drain and the source of MOS transistor M1 are reduced, so as to ensure that the use of MOS transistor M1 is within the normal working range and not damaged. With such a configuration, in the off state, except for the branch formed by the voltage-dividing resistors RBF1 and RBF2 having a leakage situation, almost no leakage occurs in other branches, and the voltage-dividing resistors RBF1 and RBF2 can be designed with a very large resistance value, dozens of MΩ, so as to reduce the leakage.

[0026] When the radio frequency power amplifier is in the power amplification state, that is, when the level input terminal IN is a high-level signal, the current sources IB1 and IB2 provide bias currents, the MOS transistor M4 is turned off, and the MOS transistor M3 is turned on. At this time, the voltage value of the pull-down voltage VG is determined by the current source IB1 and the MOS transistor M5. By adjusting the magnitude of the current source IB1, the quiescent operating point can be adjusted. Since the resistance value of the voltage-dividing resistor RBF2 is very large, almost all the current of the current source IB2 will flow through the resistor RB3, forming a certain bias voltage to be applied to the MOS transistor M1, thereby establishing a normal operating point voltage. Assume that this operating point voltage is set to 4V. When a radio frequency signal is input to the signal input terminal RFIN, the resistors RB1, RB2, and the voltage-dividing resistors RBF1, RBF2 can be regarded as high impedance for the radio frequency signal, and the radio frequency signal will not be fed through these resistors. The function of the coupling capacitor CB2 is to stabilize the gate voltage of the MOS transistor M1.

[0027] In the present invention, by adjusting the size of the coupling capacitor CB2 and the output matching, the drain current-voltage waveforms of the MOS transistors M1 and M2 are made as non-overlapping as possible, and the MOS transistors M1 and M2 divide the output voltage swing as evenly as possible, thereby realizing applications at high voltage and high power.

[0028] Since the overlap of the drain current-voltage waveforms of the MOS device will have a certain impact on the body current (i.e., the body current I_body) of the MOS device, thereby changing the state of the MOS device and affecting the reliability; the body current of the MOS device, under different drain-source current Ids conditions, changes with the drain-source voltage difference VDS as Figure 3 shown. When the body current I_body of the MOS device changes violently with the drain-source voltage difference VDS, the reliability of the MOS device will be affected. In the design, if there is no overlapping region between the drain-source current Ids and the drain-source voltage VDS of the MOS device during power amplification, that is, there is no situation where both the high drain-source current Ids and the high drain-source voltage difference VDS occur, then the MOS device can better withstand high voltage and low current;

[0029] Figure 3 where the ordinate is the body current (i.e., the body current I_body) of the MOS transistor M1, and the abscissa is the drain-source voltage difference VDS of the MOS transistor M1. From Figure 3As can be seen from the change curve, if the drain-source current Ids flowing through MOS transistor M1 is relatively large, for example, dozens of mA, then the body current I_body of MOS transistor M1 will change significantly with the increase of the drain-source voltage difference VDS, thus limiting the use of MOS transistor M1 under high VDS conditions; while when the drain-source current Ids flowing through MOS transistor M1 is relatively small, for example, in the μA range, then MOS transistor M1 can withstand a higher VDS voltage. It can be seen from the figure that this 3.3V CMOS device can support up to 11V without significant leakage.

[0030] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and without departing from the spirit or basic characteristics of the present invention, the present invention can be implemented in other specific forms. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention. Any reference signs in the claims should not be construed as limiting the claimed rights.

[0031] In addition, it should be understood that although this specification is described in terms of embodiments, not every embodiment only contains an independent technical solution. This narrative manner of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A radio frequency power amplifier circuit implemented based on a low voltage CMOS process, characterized in that: It includes a signal amplification output module and an anti-breakdown module; wherein, The signal amplification and output module is connected to the signal input terminal RFIN and the signal output terminal RFOUT, and is used to amplify the power of the radio frequency signal input by the signal input terminal RFIN and output it through the signal output terminal RFOUT; The signal amplification output module includes MOS tubes M1 and M2, and a common source and common gate structure is formed by the MOS tubes M1 and M2; the signal input terminal RFIN is connected to the gate of the MOS tube M2, and the signal output terminal RFOUT is connected to the drain terminal of the MOS tube M1; The anti-breakdown module is connected to both the level input terminal IN and the signal amplification output module, and is used to perform anti-breakdown protection on the signal amplification output module according to the level signal of the level input terminal IN; When the level input terminal IN is a low level signal, the MOS tube M2 is turned off, and the gate terminal voltage of the MOS tube M1 is divided and then output; When the level input terminal IN is a high level signal, the bias voltage generated by the anti-breakdown module is output to the gate terminal of the MOS tube M1 and then output.

2. The radio frequency power amplifier circuit implemented based on low voltage CMOS process according to claim 1, characterized in that: The signal amplification output module also includes coupling capacitors CB1, CB2, an output capacitor C1, and a choke inductor L1; the drain of the MOS tube M1 is connected to one end of the output capacitor C1 and one end of the choke inductor L1, the other end of the choke inductor L1 is connected to the power supply VDD, and the other end of the output capacitor C1 is connected to the signal output terminal RFOUT; the gate of the MOS tube M1 is grounded after being connected to the coupling capacitor CB2, the source of the MOS tube M1 is connected to the drain of the MOS tube M2, the source of the MOS tube M2 is grounded, the gate of the MOS tube M2 is connected to one end of the coupling capacitor CB1, and the other end of the coupling capacitor CB1 is connected to the signal input terminal RFIN.

3. The radio frequency power amplifier circuit implemented based on low voltage CMOS process according to claim 1, characterized in that: The MOS tubes M1 and M2 are both 3.3V CMOS devices; the channel width of the MOS tubes M1 and M2 is 8mm-10mm.

4. The radio frequency power amplifier circuit implemented based on low voltage CMOS process according to claim 2, characterized in that: The anti-breakdown module includes inverters INV1, INV2, MOS tubes M3, M4, M5, resistors RB1-RB3, voltage-dividing resistors RBF1, RBF2, and current sources IB1, IB2; the input end of the inverter INV1 is connected to the level input end IN, the output end of the inverter INV1 is connected to the input end of the inverter INV2 and the gate of the MOS tube M4, the source of the MOS tube M4 is grounded, the output end of the inverter INV2 is connected to the drain of the MOS tube M4, the gate of the MOS tube M3, one end of the resistor RB1, one end of the current source IB1, the gate of the MOS tube M5, and the drain of the MOS tube M5, the other end of the resistor RB1 is connected to the gate of the MOS tube M2, and the drain of the MOS tube M5 is grounded. The sources of the MOS tubes M3 and M5 are both grounded, the drain of the MOS tube M5 is connected to one end of the current source IB1, the drain of the MOS tube M3 is connected to one end of the resistor RB3, the other end of the resistor RB3 is connected to one end of the resistor RB2 and one end of the current source IB2, the other ends of the current sources IB1 and IB2 are connected and then connected to the power supply VDD, the other end of the resistor RB2 is connected to one end of the voltage-dividing resistors RBF1 and RBF2 and the gate of the MOS tube M1, the other end of the voltage-dividing resistor RBF2 is grounded, and the other end of the voltage-dividing resistor RBF1 is connected to one end of the choke inductor L1, one end of the output capacitor C1, and the drain of the MOS tube M1.

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