System, device and method for determining test result according to multiple output voltages

Abstract

A system, a device and a method for determining a test result according to a plurality of output voltages of a universal serial bus (USB) interface are provided, after a pull-up element conforming to a universal serial bus specification is arranged in a test fixture, whether the test fixture outputs a voltage signal to enter the USB interface of a device to be tested is controlled, and the output voltage corresponding to the USB interface is read; according to the technical means of reading the output voltage and generating the corresponding test result according to the read output voltage, the USB interface of the computing equipment which does not support boundary scanning can be tested under the condition that an operation system is not started, and the technical effect of improving the test efficiency is achieved.

Description

Technical Field

[0001] A universal serial bus interface test system, device and method, in particular a system, device and method for determining test results according to multiple output voltages of a universal serial bus interface. Background Art

[0002] Currently, during the production process of computing devices such as servers and desktop computers, there are two test schemes for the Universal Serial Bus (USB) 2.0 interface (also represented as the USB interface in the present invention). The first is the test scheme using boundary scan, and the second is the test scheme using functional test.

[0003] In the first test scheme, it is not necessary to enter the operating system. The corresponding test data can be directly pushed to the pins of the USB interface to be tested through the boundary scan test method, and the connection of the USB interface is judged according to the consistency of data transmission and reception.

[0004] In fact, the first test scheme is only applicable to the device to be tested that supports IEEE 1149.1 or 1149.6. For the device to be tested that cannot use the first test scheme, only the second test scheme can be used, that is, the test is carried out through the functions of handshake or data push. More specifically, in the second test scheme, it is usually necessary to execute computer software in the operating system, so that the computer software transmits and receives handshake signals and transmits and receives data through the USB interface of the device to be tested by calling the application programming interface (API) to confirm the function of the USB interface.

[0005] However, in the second test scheme (functional test scheme), it is necessary to start the operating system of the device to be tested to complete the test of the USB interface. Therefore, during the test, it is necessary to experience the waiting time of starting up, resulting in low test efficiency.

[0006] In summary, it can be seen that there has long been a problem in the prior art that computing devices that do not support boundary scan need to start the operating system to test the USB interface. Therefore, it is necessary to propose improved technical means to solve this problem. Summary of the Invention

[0007] In view of the problem in the prior art that computing devices that do not support boundary scan need to start the operating system to test the USB interface, the present invention discloses a system, device and method for determining test results according to multiple output voltages of a universal serial bus interface, wherein:

[0008] The system for determining test results based on multiple output voltages of a universal serial bus interface disclosed by the present invention at least includes: a control device and a test fixture connected to the control device. The test fixture further includes: a connection interface for connecting to the control device; a pull-up circuit which further includes a first pull-up element and a second pull-up element; a voltage output element connected to the pull-up element and the second pull-up element; a third pull-up element connected to the first pull-up element, the voltage output element, and the USB interface; a fourth pull-up element connected to the second pull-up element, the voltage output element, and the USB interface; a signal reading element connected to the third pull-up element, the fourth pull-up element, and the USB interface; a test control element connected to the voltage output element, the signal reading element, and the connection interface, configured to receive a test signal transmitted by the control device through the connection interface, and control the voltage output element to output or not output a voltage signal according to the test signal, and configured to obtain the output voltage of the USB interface read by the signal reading element when the voltage output element outputs and does not output a voltage signal to generate acquisition data, and transmit the acquisition data to the control device through the connection interface, so that the control device generates a test determination result of the device under test based on the acquisition data.

[0009] The device for determining test results based on multiple output voltages of a universal serial bus interface disclosed by the present invention at least includes: a pull-up circuit including a first pull-up element and a second pull-up element; a voltage output element connected to the first pull-up element and the second pull-up element; a third pull-up element connected to the first pull-up element, the voltage output element, and the USB interface; a fourth pull-up element connected to the second pull-up element, the voltage output element, and the USB interface; a signal reading element connected to the third pull-up element, the fourth pull-up element, and the USB interface; a test control element connected to the voltage output element and the signal reading element, configured to control the voltage output element to output or not output a voltage signal, and configured to obtain the output voltage of the USB interface read by the signal reading element when the voltage output element outputs and does not output a voltage signal to generate acquisition data, and generate a test result based on the acquisition data.

[0010] The method for determining test results based on multiple output voltages of a universal serial bus (USB) interface disclosed by the present invention at least includes the following steps: Connect a test fixture to the USB interface of a device under test. The test fixture includes a first pull-up element, a second pull-up element, a voltage output element, a third pull-up element, a fourth pull-up element, a signal reading element, and a test control element. The test control element is connected to the voltage output element and the signal reading element. The voltage output element is connected to the first pull-up element, the second pull-up element, the third pull-up element, and the fourth pull-up element. The signal reading element is connected to the device under test, the third pull-up element, and the fourth pull-up element. The first pull-up element is connected to the third pull-up element. The second pull-up element is connected to the fourth pull-up element. The third pull-up element and the fourth pull-up element are connected to the device under test. The test fixture controls the voltage output element not to output a voltage signal and obtains a first output voltage through the signal reading element. The first output voltage is the output voltage of the USB interface when the voltage output element does not output a voltage signal. The test fixture controls the voltage output element to output a voltage signal and obtains a second output voltage through the signal reading element. The second output voltage is the output voltage of the USB interface when the voltage output element outputs a voltage signal. The test fixture generates acquisition data including the first output voltage and the second output voltage and outputs a test result corresponding to the acquisition data.

[0011] The system, device, and method disclosed by the present invention are as described above. The difference from the prior art is that after setting pull-up elements conforming to the USB specification in the test fixture, the present invention controls whether the test fixture outputs a voltage signal into the USB interface of the device under test, reads the corresponding output voltage of the USB interface, and generates a corresponding test result based on the read output voltage, thereby solving the problems existing in the prior art and achieving the technical effect of increasing the test efficiency. Description of the Drawings

[0012] Figure 1 It is a system architecture diagram for determining test results based on multiple output voltages of a USB interface proposed by the present invention.

[0013] Figure 2 It is another system architecture diagram for determining test results based on multiple output voltages of a USB interface proposed by the present invention.

[0014] Figure 3 It is a method flowchart for determining test results based on multiple output voltages of a USB interface proposed by the present invention.

[0015] Description of the Reference Numerals:

[0016] 100, 101: Test Fixture

[0017] 120: Pull-up Circuit

[0018] 121: Output Power Supply

[0019] 125: First pull-up element

[0020] 127: Second pull-up element

[0021] 130: Voltage output element

[0022] 151: Third pull-up element

[0023] 153: Fourth pull-up element

[0024] 160: Signal reading element

[0025] 161: First signal receiving pin

[0026] 162: Second signal receiving pin

[0027] 170: Connection interface

[0028] 180: Test control element

[0029] 200: Control device

[0030] 400: Device under test

[0031] 410: USB interface

[0032] 411: First data transmission pin

[0033] 412: Second data transmission pin

[0034] 413: Interface resistance

[0035] Step 310: Connect the test fixture to the USB interface of the device under test. The test fixture includes a voltage output element and a signal reading element

[0036] Step 320: The test fixture controls the voltage output element not to output a voltage signal, and obtains the first output voltage of the USB interface through the signal reading element

[0037] Step 330: The test fixture controls the voltage output element to output a voltage signal, and obtains the second output voltage of the USB interface through the signal reading element

[0038] Step 350: The test fixture generates acquisition data based on the first output voltage and the second output voltage

[0039] Step 360: The test fixture outputs a test result corresponding to the acquisition data Detailed implementation method

[0040] The features and implementation manners of the present invention will be described in detail below in conjunction with the accompanying drawings and embodiments. The content is sufficient to enable any person skilled in the art to easily and fully understand the technical means applied by the present invention to solve technical problems and implement them accordingly, thereby achieving the effects achievable by the present invention.

[0041] The present invention can use a test fixture to complete the test of the USB interface of the device under test without entering the operating system for functional testing. Generally speaking, when the test fixture tests the USB interface of the device under test, it can usually be connected to a control device and test the USB interface of the device under test according to the test signals generated by the control device. However, the present invention is not limited thereto. In some embodiments, the test fixture can also independently complete the test of the USB interface of the device under test. Among them, the control device is usually a computing device.

[0042] The device for implementing the present invention can be a computing device. The computing device mentioned in the present invention includes, but is not limited to, one or more processing modules, one or more memory modules, and a bus connecting different hardware components (including memory modules and processing modules), etc. Through the multiple hardware components included, the computing device can load and execute an operating system to make the operating system run on the computing device, and can also execute software or programs. The computing device also includes a housing, and the above-mentioned various hardware components are arranged inside the housing.

[0043] The bus of the computing device mentioned in the present invention can include one or more types, such as buses of types including data bus, address bus, control bus, expansion bus, and / or local bus, etc. The bus of the computing device includes, but is not limited to, Industry Standard Architecture (ISA) bus, Peripheral Component Interconnect (PCI) bus, Video Electronics Standards Association (VESA) local bus, and serial Universal Serial Bus (USB), Peripheral Component Interconnect Express (PCI-E / PCIe) bus, etc.

[0044] The processing module of the computing device proposed by the present invention is coupled to the bus. The processing module includes a register group or register space, which can be entirely set on the processing chip of the processing module, or all or part of it can be set outside the processing chip and coupled to the processing chip via dedicated electrical connections and / or via the bus. The processing module can be a central processing unit, a microprocessor, or any suitable processing element. If the computing device is a multi-processor device, that is, the computing device includes multiple processing modules, the processing modules included in the computing device are all the same or similar and are coupled and communicate via the bus. In some embodiments, the processing module can interpret a computer instruction or a series of multiple computer instructions to perform specific operations or operations, such as mathematical operations, logical operations, data comparison, copying / moving data, etc., so as to drive other hardware components in the computing device or run the operating system or execute various programs and / or modules. The computer instructions can be assembly language instructions, instruction set architecture instructions, machine instructions, machine-related instructions, micro-instructions, firmware instructions, or source code or object code written in any combination of one or more programming languages, and the computer instructions can be completely executed on a single computing device, partially executed on a single computing device, partially executed on one computing device and partially executed on another connected computing device. Among them, the above-mentioned programming languages include object-oriented programming languages, such as Common Lisp, Python, C++, Objective-C, Smalltalk, Delphi, Java, Swift, C#, Perl, Ruby, etc., and conventional procedural programming languages, such as the C language or other similar programming languages.

[0045] The computing device usually also includes one or more chipsets. The processing module of the computing device can be coupled to the chipset or electrically connected to the chipset via the bus. The chipset is composed of one or more integrated circuits (ICs), including a memory controller and a peripheral input / output (I / O) controller, etc. That is to say, the memory controller and the peripheral input / output controller can be included in one integrated circuit, or can be implemented using two or more integrated circuits. The chipset usually provides input / output and memory management functions, as well as provides multiple general-purpose and / or dedicated registers, timers, etc. Among them, the above-mentioned general-purpose and / or dedicated registers and timers can be accessed or used by one or more processing modules coupled or electrically connected to the chipset. In some embodiments, the chipset may also be part of the processing module.

[0046] The processing module of the computing device can also access data stored in the memory module and the mass storage area installed on the computing device through the memory controller. The above-mentioned memory module includes any type of volatile memory and / or non-volatile (non-volatile memory, NVRAM) memory, such as static random access memory (Static Random Access Memory, SRAM), dynamic random access memory (Dynamic Random Access Memory, DRAM), read-only memory (Read-Only Memory, ROM), flash memory (Flash memory), etc. The above-mentioned mass storage area can include any type of storage device or storage medium, such as a hard disk, an optical disc, a flash drive, a memory card, a solid state disk (Solid State Disk, SSD), or any other storage device, etc. That is to say, the memory controller can access data in static random access memory, dynamic random access memory, flash memory, hard disk, optical disc, flash drive, memory card, and solid state disk.

[0047] The processing module of the computing device can also be connected and communicate with peripheral devices or interfaces such as peripheral output devices, peripheral input devices, communication interfaces, various data or signal receiving devices, etc. via a peripheral input / output bus through a peripheral input / output controller. The peripheral input device can be any type of input device, such as a keyboard, mouse, trackball, touchpad, joystick, etc. The peripheral output device can be any type of output device, such as a display, printer, etc. The peripheral input device and the peripheral output device can also be the same device, such as a touch screen, etc. The communication interface can include a wireless communication interface and / or a wired communication interface. The wireless communication interface can include interfaces that support wireless local area networks (such as Wi-Fi, Zigbee, etc.), Bluetooth, infrared, near-field communication (NFC), 3G / 4G / 5G / 6G, etc. mobile communication networks (cellular networks), or other wireless data transmission protocols. The wired communication interface can be an Ethernet device, DSL modem, cable modem, asynchronous transfer mode (ATM) device, or fiber optic communication interface and / or component, etc. The data or signal receiving device can include a GPS receiver or a physiological signal receiver. The physiological signals received by the physiological signal receiver include but are not limited to heartbeat, blood oxygen, etc. The processing module can periodically poll various peripheral devices and interfaces, enabling the computing device to perform data input and output through various peripheral devices and interfaces and also communicate with another computing device having the hardware components described above.

[0048] First, take Figure 1 the system architecture diagram of the system for determining test results based on multiple output voltages of a universal serial bus interface proposed in the present invention to illustrate the system implementing the present invention. As Figure 1 shown, the system of the present invention is included in the test fixture 100 and includes a pull-up circuit 120, a voltage output element 130, a third pull-up element 151, a fourth pull-up element 153, a signal reading element 160, and a test control element 180. Among them, the test control element 180 can be connected to the voltage output element 130 and the signal reading element 160. The voltage output element 130 can be connected to the pull-up circuit 120, the third pull-up element 151, the fourth pull-up element 153, and the test control element 180. The signal reading element 160 can be connected to the third pull-up element 151, the fourth pull-up element 153, and the device under test 400. The pull-up circuit 120 can be connected to the voltage output element 130, the third pull-up element 151, and the fourth pull-up element 153.

[0049] The pull-up circuit 120 can maintain the stability of the level of the pin of the voltage output component 130 that outputs a voltage signal when the voltage output component 130 does not output a voltage signal. In some embodiments, the pull-up circuit 120 may include a first pull-up component 125, a second pull-up component 127, and may also include an additional output power supply 121. Among them, the output power supply 121 can be connected to the first pull-up component 125 and the second pull-up component 127. The first pull-up component 125 can be connected to the voltage output component 130 and a third pull-up component 151. The second pull-up component 127 can be connected to the voltage output component 130 and a fourth pull-up component 153.

[0050] For example, when the first pull-up component 125 and the second pull-up component 127 are passive components, the pull-up circuit 120 generally may include an output power supply 121. For example, the first pull-up component 125 and the second pull-up component 127 can be resistors that comply with the USB specification, and the pull-up circuit 120 can include an output power supply 121 that can output a voltage of 3.3 volts (but the present invention is not limited thereto). When the pull-up component 125 and the second pull-up component 127 are active components, the pull-up circuit 120 may not include an output power supply 121. For example, the first pull-up component 125 and the second pull-up component 127 can be power output components that can output a stable voltage, etc. However, the pull-up component 120 of the present invention is not limited to the above.

[0051] The voltage output component 130 can receive the control signal transmitted by the test control component 180, and can select to output or not output a voltage signal on the pin connected to the pull-up circuit 120 (the first pull-up component 125) and the third pull-up component 151 according to the received control signal. Generally speaking, the voltage output component 130 can be a power chip or a functional circuit that meets the voltage output capability.

[0052] The third pull-up component 151 and the fourth pull-up component 153 can be resistors that comply with the USB specification.

[0053] The signal reading component 160 can read the output voltage of the USB interface 410 of the device under test 400. Generally speaking, the signal reading component 160 is usually an analog-to-digital converter (ADC), or can be a functional circuit or chip that includes analog and digital, but the present invention is not limited thereto.

[0054] More specifically, when the voltage output component 130 does not output a voltage signal, the signal reading component 160 can read the output voltages of the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 of the USB interface 410 of the device under test 400 in the normal, open circuit, short circuit with each other, and short circuit with ground conditions through the first signal receiving pin 161 and the second signal receiving pin 162 respectively connected to the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 of the USB interface 410 of the device under test 400. When the voltage output component 130 outputs a voltage signal, the signal reading component 160 can also read the output voltages of the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 of the USB interface 410 of the device under test 400 in the normal, open circuit, short circuit with each other, and short circuit with ground conditions respectively.

[0055] The test control component 180 can generate a control signal to control the voltage output component 130 to output or not output a voltage signal, and can also obtain the output voltage of the USB interface 410 of the device under test 400 read by the signal reading component 160 when controlling the voltage output component 130 to output and not output a voltage signal, and can generate acquisition data including each output voltage obtained by the signal reading component 160. Generally speaking, the test control component 180 is usually a logic component such as a Complex Programmable Logic Device (CPLD) or a Field Programmable Gate Array (FPGA), but the present invention is not limited thereto.

[0056] The test control component 180 can also generate a test result based on the generated acquisition data. More specifically, the test control component 180 can generate a test determination result of the device under test 400 based on whether the output voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 of the device under test 400 in the normal, open circuit, short circuit with each other, and short circuit with ground conditions when the voltage output component 130 outputs and does not output a voltage signal recorded in the acquisition data match the expected voltages.

[0057] Generally speaking, the test control component 180 can be based on the resistance value (R pd ) of the interface resistance 413 in the USB interface 410 of the device under test 400, the resistance value (R pula ) of the first pull-up component 125, the resistance value (R pu2a ) of the third pull-up component 151, and the input voltage (V cc)Calculate the expected voltage of the first data transmission pin (D+) 411 under normal circumstances when the voltage output component 130 does not output a voltage signal. It can also be based on the resistance value (R pd ) of the interface resistor 413, the resistance value (R pu2a ) of the third pull-up component 151, and the input voltage (V cc ) provided by the pull-up circuit 120 to calculate the expected voltage of the first data transmission pin (D+) 411 under normal circumstances when the voltage output component 130 outputs a voltage signal. It can also be based on the resistance value (R pd ) of the interface resistor 413, the resistance value (R pulb ) of the second pull-up component 127, the resistance value (R pu2b ) of the fourth pull-up component 153, and the input voltage (V cc ) provided by the pull-up circuit 120 to calculate the expected voltage of the second data transmission pin (D-) 412 under normal circumstances when the voltage output component 130 does not output a voltage signal. It can also be based on the resistance value (R pd ) of the interface resistor 413, the resistance value (R pu2b ) of the fourth pull-up component 153, and the input voltage (V cc ) provided by the pull-up circuit 120 to calculate the expected voltage of the second data transmission pin (D-) 412 under normal circumstances when the voltage output component 130 outputs a voltage signal. It can also be based on the resistance value (R pd ) of the interface resistor 413, the resistance value (R pula ) of the first pull-up component 125, the resistance value (R pulb ) of the second pull-up component 127, the resistance value (R pu2a ) of the third pull-up component 151, the resistance value (R pu2b ) of the fourth pull-up component 153, and the input voltage (V cc ) provided by the pull-up circuit 120 to calculate the expected voltage of the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 under the condition of short circuit with each other when the voltage output component 130 outputs and does not output a voltage signal. In addition, the test control component 180 can also set the expected voltage of the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 under the conditions of open circuit and short circuit with the ground (GND) when the voltage output component 130 outputs and does not output a voltage signal.

[0058] For example, the test control component 180 can generate the expected voltage of various situations as shown in the following table:

[0059]

[0060]

[0061] That is to say, the test control element 180 can first calculate the resistance value (R pd ) of the interface resistance 413 in the USB interface 410 of the device under test 400, divide it by the sum of the resistance values of the interface resistance 413, the first pull-up element 125 and the third pull-up element 151 (R pula +R pu2a +R pd ) to obtain the quotient, and then calculate the product of the obtained quotient and the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the first data transmission pin (D+) 411 under normal circumstances when the voltage output element 130 does not output a voltage signal; the test control element 180 can also set the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the first data transmission pin (D+) 411 in the case of an open circuit when the voltage output element 130 does not output a voltage signal; the test control element 180 can also set the expected voltage of the first data transmission pin (D+) 411 in the case of a short circuit to ground (GND) to 0 when the voltage output element 130 does not output a voltage signal; the test control element 180 can also first calculate the resistance value (R pd ) of the interface resistance 413, divide it by the sum of the resistance values of the interface resistance 413, the second pull-up element 127 and the fourth pull-up element 153 (R pulb +R pu2b +R pd ) to obtain the quotient, and then calculate the product of the obtained quotient and the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the second data transmission pin (D-) 412 under normal circumstances when the voltage output element 130 does not output a voltage signal; the test control element 180 can also set the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the second data transmission pin (D-) 412 in the case of an open circuit when the voltage output element 130 does not output a voltage signal; the test control element 180 can also set the expected voltage of the second data transmission pin (D-) 412 in the case of a short circuit to ground (GND) to 0 when the voltage output element 130 does not output a voltage signal; the test control element 180 can also first calculate the resistance value of the pull-up element equivalent circuit formed by the series connection of the first pull-up element 125 and the third pull-up element 151 (R pula +R pu2a ) and the series connection of the second pull-up element 127 and the fourth pull-up element 153 (R pulb +R pu2b ) in parallel (R pua =(R pula +R pu2a )*(R pulb +Rpu2b ) / ((R pula + R pu2a ) + (R pulb + R pu2b ))) Then calculate the input voltage (V cc ) provided by the pull-up circuit 120 and the resistance value of the parallel connection of the two interface resistors 413 (i.e., R pd / 2) divided by the resistance value of the parallel connection of the equivalent circuit of the pull-up element and the two interface resistors 413 ((R pd / 2) / (R pua + (R pd / 2))) as the expected voltage when the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 are short-circuited to each other in the case where the voltage output element 130 does not output a voltage signal; the test control element 180 can first calculate the resistance value (R pd ) of the interface resistor 413 divided by the sum of the resistance values of the interface resistor 413 and the third pull-up element 151 (R pd + R pu2a ) to generate a quotient, and then calculate the product of the generated quotient and the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the first data transmission pin (D+) 411 under normal circumstances when the voltage output element 130 outputs a voltage signal; the test control element 180 can also set the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the first data transmission pin (D+) 411 in the case of an open circuit when the voltage output element 130 does not output a voltage signal; the test control element 180 can also set the expected voltage of the first data transmission pin (D+) 411 to 0 when it is short-circuited to the ground (GND) when the voltage output element 130 outputs a voltage signal; the test control element 180 can also calculate the resistance value (R pd ) of the interface resistor 413 divided by the sum of the resistance values of the interface resistor 413 and the fourth pull-up element 153 (R pd + R pu2b ) to generate a quotient, and then calculate the product of the generated quotient and the input voltage (V cc ) provided by the pull-up circuit 120 as the expected voltage of the second data transmission pin (D-) 412 under normal circumstances when the voltage output element 130 outputs a voltage signal; the test control element 180 can also set the input voltage (V cc) is the expected voltage when the second data transmission pin (D-) 412 is open - circuited when the voltage output component 130 outputs a voltage signal; the test control component 180 can also set the expected voltage when the second data transmission pin (D-) 412 is short - circuited to ground when the voltage output component 130 outputs a voltage signal to 0; the test control component 180 can also calculate the resistance value of the equivalent circuit after the resistance values of the third pull - up component 151 and the fourth pull - up component 153 are in parallel (R pub =(R pu2a *R pu2b ) / (R pu2a +R pu2b )) and the resistance value in parallel with the two interface resistors 413 (i.e., R pd / 2) of the sum (i.e., R pub +R pd / 2), and then calculate the input voltage (V cc ) provided by the pull - up circuit 120 and the resistance value in parallel with the two interface resistors 413 (R pd / 2) divided by the product of the above - mentioned resistance value sum (R pub +R pd / 2) as the expected voltage when the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 are short - circuited to each other when the voltage output component 130 outputs a voltage signal; the test control component 180 can also set the voltage of the voltage signal output by the voltage output component 130 to the expected voltage of the first data transmission pin (D+) 411 and the second data transmission pin (D-) 412 when the voltage output component 130 outputs a voltage signal.

[0062] Continue to use Figure 2 Another system architecture diagram of a system for determining test results based on multiple output voltages of a universal serial bus interface proposed by the present invention to illustrate another system for implementing the present invention. As Figure 2 shown, the system of the present invention is included in the test fixture 101, and includes a pull - up circuit 120, a voltage output component 130, a third pull - up component 151, a fourth pull - up component 153, a signal reading component 160, a connection interface 170, and a test control component 180. Among them, the pull - up circuit 120, the voltage output component 130, the third pull - up component 151, the fourth pull - up component 153, the signal reading component 160 are Figure 1 the same as those above and will not be elaborated further.

[0063] The connection interface 170 is connected to the test control element 180 and can also be connected to the control device 200. The connection interface 170 can receive the test signal transmitted by the control device 200 and can also transmit the test result generated by the test control element 180 to the control device 200. Generally speaking, the connection interface 170 is an interface that supports the Joint Test Action Group (JTAG), but the present invention is not limited thereto. For example, the connection interface 170 can also be a Serial Peripheral Interface (SPI), an Inter-Integrated Circuit (I2C) interface, etc. Among them, the control device 200 can be a computer, an industrial control host, a test host, etc., and the present invention is not limited to the above either.

[0064] The test control element 180 can receive the test signal received by the control device 200 through the connection interface 170, and can generate a control signal according to the received test signal to control the voltage output element 130 to output a voltage signal or not output a voltage signal.

[0065] The test control element 180 can also obtain the output voltage of the USB interface 410 of the device under test 400 read by the signal reading element 160 when the voltage output element 130 outputs and does not output a voltage signal respectively, and can generate acquisition data including each output voltage obtained by the signal reading element 160.

[0066] The test control element 180 can also generate a test result including the generated acquisition data, and can transmit the generated test result to the control device 200 through the connection interface 170, so that the control device 200 can perform the same judgment as the test control element 180 in Figure 1 That is, according to whether the output voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 of the device under test 400 when the voltage output element 130 outputs and does not output a voltage signal in the normal, open circuit, short circuit to each other, and short circuit to ground conditions match the expected voltage to generate a test determination result of the device under test 400.

[0067] Next, an embodiment is used to explain the operation system and method of the present invention, and please refer to Figure 3 The method flow chart for determining the test result according to the multiple output voltages of the universal serial bus interface proposed by the present invention.

[0068] First, a tester or an automatic test device (not shown in the figure) can connect the test fixture 100 to the device under test 400 through the USB interface 410 of the device under test 400 (step 310).

[0069] After the test fixture 100 is connected to the device under test 400, the test control element 180 of the test fixture 100 can control the voltage output element 130 of the test fixture 100 not to output a voltage signal, and the test control element 180 can obtain the first output voltage of the USB interface 410 of the device under test 400 through the signal reading element 160 of the test fixture 100 (step 320). In this embodiment, if the test fixture 100 is as Figure 1 shown, the test control element 180 can generate a control signal according to a predetermined test program after determining that the test fixture 100 is connected to the device under test 400 and transmit the generated control signal to the voltage output element 130, so that the voltage output element 130 does not output a voltage signal, and the first output voltage of the USB interface 410 of the device under test 400 obtained by the signal reading element 160 can be read by the signal reading element 160; and if the test fixture 100 is as Figure 2 shown, after the connection interface 170 receives the test signal generated by the control device 200, the test control element 180 can generate a corresponding control signal according to the received test signal and can transmit the generated control signal to the voltage output element 130, so that the voltage output element 130 does not output a voltage signal, and the test control element 180 can read the first output voltage of the USB interface 410 of the device under test 400 obtained by the signal reading element 160 by the signal reading element 160. Among them, the first output voltage obtained by the signal reading element 160 includes the output voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 in the cases of normal, open circuit, short circuit to each other, and short circuit to ground.

[0070] Similarly, after the test fixture 100 is connected to the device under test 400, the test control element 180 of the test fixture 100 can control the voltage output element 130 of the test fixture 100 to output a voltage signal, and the test control element 180 can obtain the second output voltage of the USB interface 410 of the device under test 400 through the signal reading element 160 of the test fixture 100 (step 330). The same as above, if the test fixture 100 is as Figure 1As shown, after determining that the test fixture 100 is connected to the device under test 400, the test control element 180 can generate a control signal according to a predetermined test procedure and transmit the generated control signal to the voltage output element 130, so that the voltage output element 130 outputs a voltage signal, and the second output voltage of the USB interface 410 of the device under test 400 obtained by the signal reading element 160 can be read by the signal reading element 160; and if the test fixture 100 is as Figure 2 As shown, after the connection interface 170 of the test control element 180 of the test fixture 100 receives the test signal generated by the control device 200, it can generate a corresponding control signal according to the received test signal and can transmit the generated control signal to the voltage output element 130, so that the voltage output element 130 outputs a voltage signal on the pin connected to the third pull-up element 151, and the test control element 180 can read the second output voltage of the USB interface 410 of the device under test 400 obtained by the signal reading element 160 by the signal reading element 160. Among them, the second output voltage obtained by the signal reading element 160 includes the output voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 under normal, open circuit, short circuit to each other, and short circuit to ground conditions.

[0071] It should be noted that in the present invention, the steps of the test control element 180 of the test fixture 100 controlling the voltage output element 130 of the test fixture 100 not to output a voltage signal and obtaining the first output voltage through the signal reading element 160 of the test fixture 100 (step 320) and the test control element 180 controlling the voltage output element 130 to output a voltage signal and obtaining the second output voltage through the signal reading element 160 (step 330) do not have a sequential relationship. That is to say, the test control element 180 can also first control the voltage output element 130 to output a voltage signal and obtain the second output voltage through the signal reading element 160 (step 330), and then control the voltage output element 130 not to output a voltage signal and obtain the first output voltage through the signal reading element 160 (step 320).

[0072] After the test control element 180 of the test fixture 100 controls the voltage output element 130 of the test fixture 100 not to output a voltage signal and obtains the first output voltage through the signal reading element 160 of the test fixture 100 (step 320) and controls the voltage output element 130 to output a voltage signal and obtains the second output voltage through the signal reading element 160 (step 330), the test control element 180 can generate acquisition data according to the obtained first output voltage and second output voltage (step 350), and can output a test result corresponding to the generated acquisition data (step 360). In this embodiment, if the test fixture 100 is as Figure 1As shown, the test control element 180 can read, calculate, or set the expected voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 of the device under test 400 in the normal, open circuit, short - circuited with each other, and short - circuited to ground conditions when the voltage output element 130 outputs and does not output a voltage signal. And it can generate corresponding test results and output the test results based on whether the output voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 recorded in the acquired data in the normal, open circuit, short - circuited with each other, and short - circuited to ground conditions when the voltage output element 130 outputs and does not output a voltage signal match the expected voltages. And if the test fixture 100 is as Figure 2 As shown, the test control element 180 can generate a test result including the acquired data generated, and can transmit the generated test result to the control device 200 through the connection interface 170. After receiving the test result transmitted by the test fixture 100, the control device 200 can read, calculate, or set the expected voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 of the device under test 400 in the normal, open circuit, short - circuited with each other, and short - circuited to ground conditions when the voltage output element 130 outputs and does not output a voltage signal, and can generate a test determination result of the device under test 400 based on whether the output voltages of the first data transmission pin 411 and the second data transmission pin 412 of the USB interface 410 recorded in the acquired data included in the received test data in the normal, open circuit, short - circuited with each other, and short - circuited to ground conditions when the voltage output element 130 outputs and does not output a voltage signal match the expected voltages.

[0073] In this way, through the present invention, it is possible to complete the test of the USB interface of the device under test under the condition of starting the operating system, shortening the time spent on the test.

[0074] In summary, it can be seen that the difference between the present invention and the prior art lies in that after setting a pull - up element conforming to the USB specification in the test fixture, controlling whether the test fixture outputs a voltage signal into the USB interface of the device under test and reading the corresponding output voltage of the USB interface, and generating corresponding test results based on the read output voltage. Through this technical means, it is possible to solve the problem in the prior art that a computing device that does not support boundary scan needs to start the operating system to test the USB interface, and thus achieve the technical effect of increasing the test efficiency.

[0075] Furthermore, the method for determining the test result according to the multiple output voltages of the USB interface of the present invention can be implemented in hardware, software, or a combination of hardware and software, and can also be implemented in a computer system in a centralized manner or in a distributed manner where different elements are distributed in several interconnected computer systems.

[0076] Although the embodiments disclosed in the present invention are as above, the content described is not intended to directly limit the patent protection scope of the present invention. Any person skilled in the art in the technical field to which the present invention pertains, without departing from the spirit and scope disclosed by the present invention, making some modifications and refinements in the form and details of the implementation of the present invention, all fall within the patent protection scope of the present invention. The patent protection scope of the present invention shall still be subject to the scope defined by the appended claims.

Claims

1. A system for determining test results based on multiple output voltages of a Universal Serial Bus (USB) interface, used to test the USB interface on a device under test. The system at least includes: A control device; and A test fixture, connected to the control device, and further includes: A connection interface, connected to the control device; A pull-up circuit, which further includes a first pull-up element and a second pull-up element; A voltage output element, connected to the first pull-up element and the second pull-up element; A third pull-up element, connected to the first pull-up element, the voltage output element, and the USB interface; A fourth pull-up element, connected to the second pull-up element, the voltage output element, and the USB interface; A signal reading element, connected to the third pull-up element, the fourth pull-up element, and the USB interface; And A test control element, connected to the voltage output element, the signal reading element, and the connection interface, used to receive a test signal transmitted by the control device through the connection interface, and control the voltage output element to output or not output a voltage signal according to the test signal, and used to obtain the output voltage of the USB interface when the voltage output element outputs and does not output a voltage signal by the signal reading element to generate acquisition data, and transmit the acquisition data to the control device through the connection interface, so that the control device generates a test determination result of the device under test according to the acquisition data.

2. The system for determining test results based on multiple output voltages of a USB interface according to claim 1, wherein the control device generates the test determination result of the device under test according to whether the voltage values of the first data transmission pin and the second data transmission pin of the USB interface recorded in the acquisition data match the expected voltages when the voltage output element outputs and does not output a voltage signal under normal, open circuit, short circuit with each other, and short circuit to ground conditions.

3. The system for determining test results based on multiple output voltages of a USB interface according to claim 2, wherein the test control element calculates the expected voltages of the first data transmission pin and the second data transmission pin under normal and short circuit with each other conditions when the voltage output element does not output a voltage signal according to the interface resistance in the USB interface, the resistance values of the first pull-up element, the second pull-up element, the third pull-up element, and the fourth pull-up element, and the input voltage, and sets the expected voltages of the first data transmission pin and the second data transmission pin under open circuit and short circuit to ground conditions when the voltage output element does not output a voltage signal to be the input voltage and 0 respectively, and sets the expected voltages of the first data transmission pin and the second data transmission pin when the voltage output element outputs a voltage signal to be the voltage value of the voltage signal.

4. The system for determining test results based on multiple output voltages of a USB interface according to claim 1, wherein the third pull-up element and the fourth pull-up element are 15-ohm resistors, the input voltage is 3.3 volts, and the voltage of the voltage signal is 3.3 volts.

5. A device for determining test results based on multiple output voltages of a universal serial bus interface, connected to a device under test for testing the universal serial bus interface on the device under test. The device at least includes: A pull-up circuit, including a first pull-up element and a second pull-up element; A voltage output element, connected to the first pull-up element and the second pull-up element; A third pull-up element, connected to the first pull-up element, the voltage output element, and the universal serial bus interface; A fourth pull-up element, connected to the second pull-up element, the voltage output element, and the universal serial bus interface; A signal reading element, connected to the third pull-up element, the fourth pull-up element, and the universal serial bus interface; And A test control element, connected to the voltage output element and the signal reading element, for controlling the voltage output element to output or not output a voltage signal, and for obtaining the output voltage of the universal serial bus interface read by the signal reading element when the voltage output element outputs and does not output a voltage signal to generate acquisition data, and generating a test result based on the acquisition data.

6. The system for determining test results based on multiple output voltages of a universal serial bus interface according to claim 5, wherein the test control element generates a test result based on whether the voltage values of the first data transmission pin and the second data transmission pin of the universal serial bus interface recorded in the acquisition data match the expected voltages in the cases of normal, open circuit, short circuit to each other, and short circuit to ground when the voltage output element outputs and does not output a voltage signal.

7. A method for determining test results based on multiple output voltages of a universal serial bus interface, the method at least including the following steps: Connect a test fixture to the universal serial bus interface of the device under test. The test fixture includes a first pull-up element, a second pull-up element, a voltage output element, a third pull-up element, a fourth pull-up element, a signal reading element, and a test control element. The test control element is connected to the voltage output element and the signal reading element. The voltage output element is connected to the first pull-up element, the second pull-up element, the third pull-up element, and the fourth pull-up element. The signal reading element is connected to the device under test, the third pull-up element, and the fourth pull-up element. The first pull-up element is connected to the third pull-up element. The second pull-up element is connected to the fourth pull-up element. The third pull-up element and the fourth pull-up element are connected to the device under test; The test fixture controls the voltage output element not to output a voltage signal, and obtains a first output voltage through the signal reading element. The first output voltage is the output voltage of the universal serial bus interface when the voltage output element does not output a voltage signal; The test fixture controls the voltage output element to output a voltage signal, and obtains a second output voltage through the signal reading element. The second output voltage is the output voltage of the universal serial bus interface when the voltage output element outputs a voltage signal; And The test fixture generates acquisition data including the first output voltage and the second output voltage, and outputs a test result corresponding to the acquisition data.

8. The method for determining a test result based on multiple output voltages of a universal serial bus interface according to claim 7, wherein the step of the test fixture outputting the test result corresponding to the collected data is that the test fixture generates and outputs the test result based on whether the voltage values of the first data transmission pin and the second data transmission pin of the universal serial bus interface recorded in the collected data are consistent with the expected voltages when the voltage output component outputs and does not output a voltage signal in the cases of normal, open circuit, short circuit with each other, and short circuit to ground.

9. The method for determining a test result based on multiple output voltages of a universal serial bus interface according to claim 7, wherein after the step of the test fixture outputting the test result corresponding to the collected data, the method further includes a control device receiving the test result including the collected data, and generating a test determination result of the device under test based on whether the voltage values of the first data transmission pin and the second data transmission pin of the universal serial bus interface recorded in the collected data are consistent with the expected voltages when the voltage output component outputs and does not output a voltage signal in the cases of normal, open circuit, short circuit with each other, and short circuit to ground.

10. The method for determining a test result based on multiple output voltages of a universal serial bus interface according to claim 8, wherein the step of the test device determining whether the voltages of the first data transmission pin and the second data transmission pin of the universal serial bus interface recorded in the collected data are consistent with the expected voltages when the voltage output component outputs and does not output a voltage signal in the cases of normal, open circuit, short circuit with each other, and short circuit to ground includes the test device calculating the expected voltages of the first data transmission pin in the cases of normal and short circuit with each other when the voltage output component does not output a voltage signal based on the interface resistance in the universal serial bus interface, the resistance values of the first pull-up element or the second pull-up element, the third pull-up element or the fourth pull-up element, and the input voltage, setting the input voltage and 0 as the expected voltages of the first data transmission pin and the second data transmission pin in the cases of open circuit and short circuit to ground when the voltage output component does not output a voltage signal, and setting the voltage of the voltage signal as the expected voltages of the first data transmission pin and the second data transmission pin when the voltage output component outputs a voltage signal.

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