LDO reference voltage switching starting circuit and device

Abstract

The invention provides an LDO reference voltage switching starting circuit and device. The LDO reference voltage switching starting circuit comprises a reference voltage generation module, a switching module, a band-gap reference module, a comparison amplification module, a feedback module and a voltage output module. Wherein the reference voltage generation module generates a reference voltage; the band-gap reference module provides a reference voltage and a preparation signal; when the preparation signal is a non-ready signal, the switching module transmits the reference voltage to the comparison amplification module; when the preparation signal is switched to the ready signal, the switching module transmits the reference voltage to the comparison amplification module; the comparison amplification module compares the feedback voltage with a reference voltage or a reference voltage; the voltage output module outputs a target output voltage; the feedback module generates feedback voltage and transmits the feedback voltage to the comparison amplification module. According to the LDO reference voltage switching starting circuit, the situation that a linear voltage stabilizer cannot work due to the fact that band-gap reference is generated slowly is avoided, and it is guaranteed that the linear voltage stabilizer can work normally at the beginning and normal operation of a chip is guaranteed.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a LDO reference voltage switching start-up circuit and device. Background Art

[0002] With the continuous improvement of chip integration and the continuous increase in functional complexity, in the key link of the chip power supply architecture, LDO (low dropout linear regulator) plays a vital role in the power supply of subsequent circuits. Its core function is to ensure that the linear regulator can obtain a stable and accurate reference voltage, and then efficiently and stably convert the input higher voltage into a lower voltage that meets specific requirements, providing reliable power supply for subsequent circuits in the chip. In practical applications, the power supply part inside the chip often encounters the tricky situation that the voltage generation speed of the bandgap reference is slower than the voltage generation of the linear regulator. Because the bandgap reference is a key module that provides a stable reference voltage that is not affected by temperature for the LDO, once its voltage output lags, it will directly lead to the inability to provide the required voltage to the linear regulator in time, making it difficult for the linear regulator to start normally and maintain a stable working state, which will cause the chip to fail to work properly.

[0003] Most existing technical means use a bandgap reference module to directly provide a reference voltage for a linear regulator. Under normal circumstances, this traditional mode can barely maintain the operation of the power supply system, but if the reference voltage is generated slowly, the linear regulator will not be able to start working smoothly, and the subsequent circuit power supply links will also not work properly, which will eventually have a negative impact on the performance and reliability of the chip. Summary of the invention

[0004] The present invention aims to provide an LDO reference voltage switching startup circuit and device to solve the above technical problems, avoid the linear regulator from failing to work due to slow reference voltage generation, ensure that the linear regulator can work normally from the beginning, and ensure the normal operation of the chip.

[0005] In order to solve the above technical problems, the present invention provides an LDO reference voltage switching startup circuit, including a reference voltage generation module, a switching module, a bandgap reference module, a comparison amplification module, a feedback module and a voltage output module; wherein:

[0006] The reference voltage generating module is used to generate a reference voltage;

[0007] The bandgap reference module is used to provide a reference voltage and a preparation signal;

[0008] The switching module is used to obtain a reference voltage, a reference voltage and a ready signal; when the ready signal is an unready signal, the switching module transmits the reference voltage to the comparison and amplification module; when the ready signal switches to a ready signal, the switching module transmits the reference voltage to the comparison and amplification module. The switching module transmits the reference voltage to the comparison and amplification module;

[0009] The comparison and amplification module is used to obtain a feedback voltage and compare the feedback voltage with the reference voltage or the reference voltage to obtain a target output voltage;

[0010] The voltage output module is used to output the target output voltage;

[0011] The feedback module is used to generate a feedback voltage according to the target output voltage and transmit it to the comparison and amplification module.

[0012] In the above solution, a reference voltage generation module is used to generate a reference voltage, providing a voltage that does not require a period of time to stabilize for the linear voltage regulator, so that the linear voltage regulator can immediately enter normal operation; the switching module is used for switching control. When the ready signal is an unready signal, the switching module transmits the reference voltage to the comparison and amplification module; if the ready signal switches to a ready signal, at this time the bandgap reference module prepares a reference voltage that can make the linear voltage regulator work normally, and the switching module transmits the reference voltage to the comparison and amplification module; the comparison and amplification module compares and amplifies the reference voltage or the reference voltage with the feedback voltage, and outputs the target output voltage through the voltage output module; after the target output voltage changes, the feedback module can make corresponding adjustments to maintain the stability of the target output voltage; using the reference voltage instead of the temporarily unstable reference voltage to avoid the slow generation of the reference voltage resulting in the inoperability of the linear voltage regulator, ensuring that the linear voltage regulator can work normally from the beginning and guaranteeing the normal operation of the chip.

[0013] Further, the reference voltage generation module includes a first external power supply, a first resistor and a first NMOS transistor, where:

[0014] The first external power supply is electrically connected to one end of the first resistor;

[0015] The other end of the first resistor is electrically connected to the drain of the first NMOS transistor;

[0016] The source of the first NMOS transistor is grounded, the gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor, and the gate of the first NMOS transistor is electrically connected to the switching module.

[0017] In the above solution, by selecting appropriate first resistor and first NMOS transistor and combining with a first external power supply to generate a reference voltage approximately equal to the reference voltage value that can enable the linear voltage regulator to work properly, the linear voltage regulator can enter the normal working state from the very beginning.

[0018] Further, the switching module includes an inverter, a second NMOS transistor, and a third NMOS transistor, where:

[0019] The input end of the inverter receives the preparation signal, and the output end of the inverter is electrically connected to the gate of the second NMOS transistor;

[0020] The source of the second NMOS transistor is electrically connected to the gate of the first NMOS transistor; the drain of the second NMOS transistor is electrically connected to the drain of the third NMOS transistor, and the drain of the second NMOS transistor is electrically connected to the first input end of the comparison and amplification module;

[0021] The gate of the third NMOS transistor receives the preparation signal, and the source of the third NMOS transistor receives the reference voltage;

[0022] The input end of the inverter receives the preparation signal. When the preparation signal is an unready signal, the unready signal turns on the second NMOS transistor through the inverter, and the unready signal turns off the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the second NMOS transistor; when the preparation signal switches to the ready signal, the ready signal turns off the second NMOS transistor through the inverter, and the ready signal turns on the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the third NMOS transistor.

[0023] In the above solution, when the preparation signal is an unready signal, at this time, the reference voltage of the bandgap reference module cannot enable the linear voltage regulator to work properly. This is because the power supply and the reference voltage cannot be generated simultaneously, resulting in the inability to provide a stable power supply with less influence from process corners and temperature for the linear voltage regulator. Therefore, the unready signal turns off the third NMOS transistor to prevent the unstable reference voltage from affecting the linear voltage regulator at this time, and by selecting appropriate first resistor and first NMOS transistor and combining with a first external power supply to generate a reference voltage approximately equal to the reference voltage value that can enable the linear voltage regulator to work properly, the unready signal turns on the second NMOS transistor through the inverter, so that the linear voltage regulator can work properly; when the preparation signal is a ready signal, at this time, the reference voltage of the bandgap reference module can enable the linear voltage regulator to work properly. At this time, the bandgap reference module generates a stable reference voltage independent of temperature. The ready signal turns off the second NMOS transistor through the inverter and turns on the third NMOS transistor at the same time, so as to connect the stable reference voltage into the linear voltage regulator, enabling the linear voltage regulator to work properly.

[0024] Further, the comparison and amplification module includes an error amplifier and a fourth NMOS transistor, where:

[0025] The non-inverting input terminal of the error amplifier is electrically connected to the drain of the third NMOS transistor; the inverting input terminal of the error amplifier is electrically connected to the output terminal of the feedback module; the output terminal of the error amplifier is electrically connected to the gate of the fourth NMOS transistor; the source of the fourth NMOS transistor is electrically connected to a second external power supply, the drain of the fourth NMOS transistor is electrically connected to the input terminal of the feedback module, and the drain of the fourth NMOS transistor is electrically connected to the voltage output module.

[0026] In the above solution, the reference voltage or the reference voltage is connected to the non-inverting input terminal of the error amplifier, compared and amplified with the feedback voltage, and then the target output voltage is output through the fourth NMOS transistor; after the target output voltage changes, the error amplifier can also make corresponding adjustments to maintain the stability of the target output voltage.

[0027] Further, the feedback module includes a second resistor and a third resistor, where:

[0028] One end of the second resistor serves as the input terminal of the feedback module and is electrically connected to the drain of the fourth NMOS transistor, and the other end of the second resistor serves as the output terminal of the feedback module and is electrically connected to one end of the third resistor;

[0029] The other end of the third resistor is grounded.

[0030] In the above solution, the target output voltage is divided by the second resistor and the third resistor in the feedback module to generate a feedback voltage, which is connected to the comparison and amplification module.

[0031] The present invention provides a control method for an LDO reference voltage switching startup circuit, which is applied to an LDO reference voltage switching startup circuit as described above. The control method includes the following steps:

[0032] Generate a reference voltage based on the reference voltage generation module;

[0033] Generate a reference voltage and a ready signal based on the bandgap reference module;

[0034] If the ready signal is an unready signal, control the switching module to transmit the reference voltage to the comparison and amplification module; if the ready signal switches to a ready signal, control the switching module to transmit the reference voltage to the comparison and amplification module;

[0035] Obtain a feedback voltage based on the comparison and amplification module and compare the feedback voltage with the reference voltage or the reference voltage to obtain a target output voltage, so that the voltage output module outputs the target output voltage;

[0036] Wherein, the feedback voltage is generated by the feedback module according to the target output voltage.

[0037] The control method of the LDO reference voltage switching startup circuit provided by the above solution is simple. In practical applications, only the control switching module needs to be switched according to the ready signal and the reference voltage, ensuring that the linear regulator is connected to a stable reference voltage at the beginning and operates normally. After a period of time, when the bandgap reference module generates a reference voltage that is independent of temperature and stable, the control switching module is switched to connect the linear regulator to the reference voltage and continue to operate normally.

[0038] Further, the reference voltage is generated based on a reference voltage generation module, wherein:

[0039] The reference voltage generation module includes a first external power supply, a first resistor, and a first NMOS transistor;

[0040] The first external power supply is electrically connected to one end of the first resistor;

[0041] The other end of the first resistor is electrically connected to the drain of the first NMOS transistor;

[0042] The source of the first NMOS transistor is grounded, the gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor, and the gate of the first NMOS transistor is electrically connected to the switching module.

[0043] In the above solution, by selecting appropriate the first resistor and the first NMOS transistor to jointly generate a reference voltage approximately equal to the reference voltage value that can enable the linear regulator to operate normally with the first external power supply, the linear regulator can enter the normal operating state from the very beginning.

[0044] Further, if the ready signal is an unready signal, the control switching module transmits the reference voltage to the comparison and amplification module; if the ready signal switches to a ready signal, the control switching module transmits the reference voltage to the comparison and amplification module, wherein:

[0045] The switching module includes: an inverter, a second NMOS transistor, and a third NMOS transistor;

[0046] The input end of the inverter receives the ready signal, and the output end of the inverter is electrically connected to the gate of the second NMOS transistor;

[0047] The source of the second NMOS transistor is electrically connected to the gate of the first NMOS transistor; the drain of the second NMOS transistor is electrically connected to the drain of the third NMOS transistor, and the drain of the second NMOS transistor is electrically connected to the first input end of the comparison and amplification module;

[0048] The gate of the third NMOS transistor receives the preparation signal, and the source of the third NMOS transistor receives the reference voltage;

[0049] The input terminal of the inverter receives the preparation signal. When the preparation signal is an unready signal, the unready signal turns on the second NMOS transistor through the inverter, and the unready signal turns off the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the second NMOS transistor; When the preparation signal switches to the ready signal, the ready signal turns off the second NMOS transistor through the inverter, and the ready signal turns on the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the third NMOS transistor.

[0050] In the above solution, when the preparation signal is an unready signal, the reference voltage of the bandgap reference module cannot make the linear regulator work properly at this time, because the power supply and the reference voltage cannot be generated simultaneously, resulting in the inability to provide a stable power supply with less influence from process corners and temperature for the linear regulator. Therefore, the unready signal turns off the third NMOS transistor to prevent the reference voltage at this time from affecting the linear regulator, and a reference voltage approximately equal to the reference voltage value that can make the linear regulator work properly is generated jointly by selecting appropriate first resistor and first NMOS transistor and the first external power supply. The unready signal turns on the second NMOS transistor through the inverter, so that the linear regulator can work properly; When the preparation signal is a ready signal, the reference voltage of the bandgap reference module can make the linear regulator work properly at this time. The bandgap reference module generates a stable reference voltage independent of temperature. The ready signal turns off the second NMOS transistor through the inverter, and at the same time turns on the third NMOS transistor, so as to connect the stable reference voltage into the linear regulator, making the linear regulator work properly.

[0051] Further, the input terminal of the inverter receives the preparation signal. When the preparation signal is an unready signal, the unready signal turns on the second NMOS transistor through the inverter, and the unready signal turns off the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the second NMOS transistor; When the preparation signal switches to the ready signal, the ready signal turns off the second NMOS transistor through the inverter, and the ready signal turns on the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the third NMOS transistor. Specifically:

[0052] A reference voltage VGS approximately equal to the reference voltage that can make the linear regulator work properly is generated by the first external power supply, the first resistor and the first NMOS transistor M1 , according to the formula:

[0053]

[0054] Wherein, VGS M1 represents the reference voltage generated by the reference voltage generation module and is also the gate voltage of the first NMOS transistor, L M1 represents the length of the first NMOS transistor, μ MN1 represents the carrier mobility of the first NMOS transistor, C oxM1 represents the gate oxide capacitance per unit area of the first NMOS transistor, W M1 represents the width of the first NMOS transistor, R1 represents the resistance value of the first resistor, V th represents the threshold voltage of the first NMOS transistor. When the VGS of the first NMOS transistor M1 is higher than the threshold voltage, the first NMOS transistor is turned on; when the VGS of the first NMOS transistor M1 is lower than the threshold voltage, the first NMOS transistor is turned off; VDD represents the first external power supply voltage.

[0055] In the above solution, the reference voltage VGS obtained according to the formula M1 is approximately equal to the reference voltage value that can make the linear voltage regulator work normally; multiple variables in this formula, such as L M1 , W M1 , R1, etc., can be flexibly adjusted according to different requirements of the actual circuit design; when designing circuits with different specifications or special functions, the value of VGS M1 can be accurately controlled by changing the values of these variables; moreover, the calculation relationship described by this formula is not limited to a certain specific type of circuit; whether in analog circuits, such as linear voltage regulation circuits and amplification circuits, or in some digital circuits containing MOS transistor control logic, as long as it involves a circuit with a bandgap reference module and analyzes and calculates the gate-source voltage of the MOS transistor, this formula can be applied, providing a unified theoretical calculation model for circuits with different functions and different complexities. When designing various circuits, key parameters can be determined based on the same principle, reducing the learning and design costs and having wide applicability.

[0056] Further, the comparison and amplification module obtains a feedback voltage and compares the feedback voltage with the reference voltage or the reference voltage to obtain a target output voltage, so that the voltage output module outputs the target output voltage, where:

[0057] The comparison and amplification module includes: an error amplifier and a fourth NMOS transistor;

[0058] The non-inverting input terminal of the error amplifier is electrically connected to the drain of the third NMOS transistor; the inverting input terminal of the error amplifier is electrically connected to the output terminal of the feedback module; the output terminal of the error amplifier is electrically connected to the gate of the fourth NMOS transistor; the source of the fourth NMOS transistor is electrically connected to a second external power supply, the drain of the fourth NMOS transistor is electrically connected to the input terminal of the feedback module, and the drain of the fourth NMOS transistor is electrically connected to the voltage output module.

[0059] In the above solution, the reference voltage or the reference voltage is connected to the non-inverting input terminal of the error amplifier, compared and amplified with the feedback voltage, and then the target output voltage is output through the fourth NMOS transistor; after the target output voltage changes, the error amplifier can also make corresponding adjustments to maintain the stability of the target output voltage. Description of the Drawings

[0060] Figure 1 It is a structural diagram of an LDO reference voltage switching startup circuit provided by an embodiment of the present invention;

[0061] Figure 2 It is a circuit structural diagram of an LDO reference voltage switching startup circuit provided by an embodiment of the present invention;

[0062] Figure 3 It is a schematic flowchart of a control method of an LDO reference voltage switching startup circuit provided by an embodiment of the present invention. Detailed Embodiments

[0063] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0064] This embodiment provides an LDO reference voltage switching startup circuit, and its architecture is specifically shown in Figure 1 , including:

[0065] A reference voltage generation module for generating a reference voltage;

[0066] A bandgap reference module for providing a reference voltage and a ready signal;

[0067] A switching module for obtaining a reference voltage, a reference voltage, and a ready signal; when the ready signal is an unready signal, the switching module transmits the reference voltage to the comparison and amplification module; when the ready signal switches to a ready signal, the switching module transmits the reference voltage to the comparison and amplification module;

[0068] A comparison and amplification module, configured to obtain a feedback voltage, compare the feedback voltage with the reference voltage or the reference potential, and obtain a target output voltage;

[0069] A voltage output module, configured to output the target output voltage;

[0070] A feedback module, configured to generate a feedback voltage according to the target output voltage and transmit the feedback voltage to the comparison and amplification module.

[0071] An LDO reference voltage switching startup circuit provided in this embodiment uses a reference voltage generation module to generate a reference voltage, providing a voltage for the linear voltage regulator that does not require a period of time to stabilize, so that the linear voltage regulator can immediately enter normal operation; uses the switching module for switching control. When the ready signal is an unready signal, the switching module transmits the reference voltage to the comparison and amplification module; if the ready signal switches to the ready signal, at this time the bandgap reference module has prepared a reference voltage that can enable the linear voltage regulator to work normally, and the switching module transmits the reference voltage to the comparison and amplification module; uses the comparison and amplification module to compare and amplify the reference voltage or the reference voltage with the feedback voltage, and outputs the target output voltage through the voltage output module; after the target output voltage changes, the feedback module can make corresponding adjustments to maintain the stability of the target output voltage; uses the reference voltage to replace the temporarily unstable reference voltage, avoiding the slow generation of the reference voltage resulting in the inability of the linear voltage regulator to work, ensuring that the linear voltage regulator can work normally from the beginning, guaranteeing the normal operation of the chip; and whether the reference voltage is generated before or after the voltage of the linear voltage regulator, it can make the linear voltage regulator circuit work normally, improving the feasibility of the chip.

[0072] Please refer to Figure 2 , which is the circuit structure diagram of an LDO reference voltage switching startup circuit provided in this embodiment. The reference voltage generation module includes a first external power supply, a first resistor, and a first NMOS transistor, where:

[0073] The first external power supply is electrically connected to one end of the first resistor;

[0074] The other end of the first resistor is electrically connected to the drain of the first NMOS transistor;

[0075] The source of the first NMOS transistor is grounded, the gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor, and the gate of the first NMOS transistor is electrically connected to the switching module.

[0076] In this embodiment, by selecting appropriate first resistor and first NMOS transistor and a first external power supply to jointly generate a reference voltage approximately equal to the reference voltage value that enables the linear voltage regulator to work properly, the linear voltage regulator can enter the normal working state from the very beginning.

[0077] Further, the switching module includes an inverter, a second NMOS transistor, and a third NMOS transistor, where:

[0078] The input end of the inverter receives the preparation signal, and the output end of the inverter is electrically connected to the gate of the second NMOS transistor;

[0079] The source of the second NMOS transistor is electrically connected to the gate of the first NMOS transistor; the drain of the second NMOS transistor is electrically connected to the drain of the third NMOS transistor, and the drain of the second NMOS transistor is electrically connected to the first input end of the comparison and amplification module;

[0080] The gate of the third NMOS transistor receives the preparation signal, and the source of the third NMOS transistor receives the reference voltage;

[0081] The input end of the inverter receives the preparation signal. When the preparation signal is an unready signal, the unready signal turns on the second NMOS transistor through the inverter, and the unready signal turns off the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the second NMOS transistor; when the preparation signal switches to the ready signal, the ready signal turns off the second NMOS transistor through the inverter, and the ready signal turns on the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the third NMOS transistor.

[0082] In this embodiment, when the preparation signal is an unready signal, the reference voltage of the bandgap reference module cannot make the linear voltage regulator work properly at this time, because the power supply and the reference voltage cannot be generated simultaneously, resulting in the inability to provide a stable power supply for the linear voltage regulator that is less affected by process corners and temperature. Therefore, the unready signal turns off the third NMOS transistor to prevent the reference voltage at this time from affecting the linear voltage regulator, and by selecting appropriate first resistor and first NMOS transistor and a first external power supply to jointly generate a reference voltage approximately equal to the reference voltage value that enables the linear voltage regulator to work properly, the unready signal turns on the second NMOS transistor through the inverter, so that the linear voltage regulator can work properly; when the preparation signal is a ready signal, the reference voltage of the bandgap reference module can make the linear voltage regulator work properly at this time, and the bandgap reference module generates a stable reference voltage independent of temperature. The ready signal turns off the second NMOS transistor through the inverter and turns on the third NMOS transistor at the same time, so as to connect the stable reference voltage into the linear voltage regulator, so that the linear voltage regulator can work properly.

[0083] Further, the comparison and amplification module includes an error amplifier and a fourth NMOS transistor, where:

[0084] The non-inverting input terminal of the error amplifier is electrically connected to the drain of the third NMOS transistor; the inverting input terminal of the error amplifier is electrically connected to the output terminal of the feedback module; the output terminal of the error amplifier is electrically connected to the gate of the fourth NMOS transistor; the source of the fourth NMOS transistor is electrically connected to a second external power supply, the drain of the fourth NMOS transistor is electrically connected to the input terminal of the feedback module, and the drain of the fourth NMOS transistor is electrically connected to the voltage output module.

[0085] In this embodiment, the reference voltage or the reference voltage is connected to the non-inverting input terminal of the error amplifier, compared and amplified with the feedback voltage, and then the target output voltage is output through the fourth NMOS transistor; after the target output voltage changes, the error amplifier can also make corresponding adjustments to maintain the stability of the target output voltage.

[0086] Further, the feedback module includes a second resistor and a third resistor, where:

[0087] One end of the second resistor serves as the input terminal of the feedback module and is electrically connected to the drain of the fourth NMOS transistor, and the other end of the second resistor serves as the output terminal of the feedback module and is electrically connected to one end of the third resistor;

[0088] The other end of the third resistor is grounded.

[0089] In this embodiment, the target output voltage is divided by the second resistor and the third resistor in the feedback module to generate a feedback voltage, which is connected to the comparison and amplification module.

[0090] Please refer to Figure 3 , which is a control method for an LDO reference voltage switching startup circuit provided in this embodiment, and is applied to the above-mentioned LDO reference voltage switching startup circuit. The control method includes the following steps:

[0091] Generate a reference voltage based on the reference voltage generation module;

[0092] Generate a reference voltage and a ready signal based on the bandgap reference module;

[0093] If the ready signal is an unready signal, control the switching module to transmit the reference voltage to the comparison and amplification module; if the ready signal switches to a ready signal, control the switching module to transmit the reference voltage to the comparison and amplification module;

[0094] The feedback voltage is obtained based on a comparison and amplification module, and the feedback voltage is compared with the reference voltage or the reference potential to obtain a target output voltage, so that a voltage output module outputs the target output voltage;

[0095] Wherein: the feedback voltage is generated by the feedback module according to the target output voltage.

[0096] The control method of the LDO reference voltage switching startup circuit provided in this embodiment is simple. In practical applications, only the control switching module needs to be switched according to the ready signal and the reference voltage, so as to ensure that the linear voltage regulator accesses a stable reference voltage at the beginning and operates normally; after a period of time, after the bandgap reference module generates a reference voltage that is independent of temperature and stable, the control switching module is switched to make the linear voltage regulator access the reference voltage and continue to operate normally.

[0097] Further, the reference voltage is generated based on a reference voltage generation module, wherein:

[0098] The reference voltage generation module includes a first external power supply, a first resistor, and a first NMOS transistor;

[0099] The first external power supply is electrically connected to one end of the first resistor;

[0100] The other end of the first resistor is electrically connected to the drain of the first NMOS transistor;

[0101] The source of the first NMOS transistor is grounded, the gate of the first NMOS transistor is electrically connected to the drain of the first NMOS transistor, and the gate of the first NMOS transistor is electrically connected to the switching module.

[0102] In this embodiment, by selecting appropriate the first resistor and the first NMOS transistor to jointly generate a reference voltage approximately equal to a reference voltage value that can enable the linear voltage regulator to operate normally with the first external power supply, the linear voltage regulator can enter the normal operating state from the very beginning.

[0103] Further, if the ready signal is an unready signal, the control switching module transmits the reference voltage to the comparison and amplification module; if the ready signal is switched to a ready signal, the control switching module transmits the reference potential to the comparison and amplification module, wherein:

[0104] The switching module includes: an inverter, a second NMOS transistor, and a third NMOS transistor;

[0105] The input end of the inverter receives the ready signal, and the output end of the inverter is electrically connected to the gate of the second NMOS transistor;

[0106] The source of the second NMOS transistor is electrically connected to the gate of the first NMOS transistor; the drain of the second NMOS transistor is electrically connected to the drain of the third NMOS transistor, and the drain of the second NMOS transistor is electrically connected to the first input terminal of the comparison and amplification module;

[0107] The gate of the third NMOS transistor receives the preparation signal, and the source of the third NMOS transistor receives the reference voltage;

[0108] The input terminal of the inverter receives the preparation signal. When the preparation signal is an unready signal, the unready signal turns on the second NMOS transistor through the inverter, and the unready signal turns off the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the second NMOS transistor; when the preparation signal switches to a ready signal, the ready signal turns off the second NMOS transistor through the inverter, and the ready signal turns on the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the third NMOS transistor.

[0109] In this embodiment, when the preparation signal is an unready signal, the reference voltage of the bandgap reference module cannot make the linear voltage regulator work properly at this time, because the power supply and the reference voltage cannot be generated simultaneously, resulting in the inability to provide a stable power supply with less influence from process corners and temperature for the linear voltage regulator. Therefore, the unready signal turns off the third NMOS transistor to prevent the reference voltage at this time from affecting the linear voltage regulator, and a reference voltage approximately equal to the reference voltage value that can make the linear voltage regulator work properly is jointly generated by selecting appropriate first resistor and first NMOS transistor and the first external power supply. The unready signal turns on the second NMOS transistor through the inverter, so that the linear voltage regulator can work properly; when the preparation signal is a ready signal, the reference voltage of the bandgap reference module can make the linear voltage regulator work properly at this time, and the bandgap reference module generates a stable reference voltage independent of temperature. The ready signal turns off the second NMOS transistor through the inverter and turns on the third NMOS transistor at the same time, so as to connect the stable reference voltage into the linear voltage regulator, making the linear voltage regulator work properly.

[0110] Further, the input terminal of the inverter receives the preparation signal. When the preparation signal is an unready signal, the unready signal turns on the second NMOS transistor through the inverter, and the unready signal turns off the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the second NMOS transistor; when the preparation signal switches to a ready signal, the ready signal turns off the second NMOS transistor through the inverter, and the ready signal turns on the third NMOS transistor, so as to transmit the reference voltage to the comparison and amplification module through the third NMOS transistor. Specifically:

[0111] The first external power supply, the first resistor and the first NMOS transistor generate a reference voltage VGS which is close to the reference voltage value that enables the linear regulator to work normally. M1 , according to the formula:

[0112]

[0113] Where VGS M1 represents the reference voltage generated by the reference voltage generation module, which is also the gate voltage of the first NMOS tube, L M1 represents the length of the first NMOS tube, μ MN1 represents the carrier mobility of the first NMOS tube, C oxM1 represents the capacitance per unit area of ​​the gate oxide layer of the first NMOS tube, W M1 represents the width of the first NMOS tube, R1 represents the resistance value of the first resistor, V th represents the threshold voltage of the first NMOS tube. When the VGS of the first NMOS tube M1 When the VGS of the first NMOS tube is higher than the threshold voltage, the first NMOS tube is turned on; M1 If the voltage is lower than the threshold voltage, the first NMOS tube is turned off; VDD represents the first external power supply voltage.

[0114] In this embodiment, the reference voltage VGS is obtained according to the formula M1 Approximates the reference voltage value that allows the linear regulator to work properly; multiple variables in this formula, such as L M1 , W M1 , R1, etc., can be flexibly adjusted according to the different needs of actual circuit design; when designing circuits with different specifications or special functions, VGS can be accurately controlled by changing the values ​​of these variables. M1 result; and the calculation relationship described by the formula is not limited to a specific type of circuit; whether in analog circuits, such as linear voltage regulator circuits, amplifier circuits, or in some digital circuits containing MOS tube control logic, as long as it involves a circuit with a bandgap reference module and analyzes and calculates the gate-source voltage of the MOS tube, this formula can be applied, providing a unified theoretical calculation model for circuits with different functions and different complexities. When designing various circuits, key parameters can be determined based on the same principle, reducing learning and design costs, and having wide applicability.

[0115] Furthermore, the comparison-based amplification module obtains a feedback voltage and compares the feedback voltage with the reference voltage or the base voltage to obtain a target output voltage, so that the voltage output module outputs the target output voltage, wherein:

[0116] The comparison and amplification module includes: an error amplifier and a fourth NMOS transistor;

[0117] The non-inverting input terminal of the error amplifier is electrically connected to the drain of the third NMOS transistor; the inverting input terminal of the error amplifier is electrically connected to the output terminal of the feedback module; the output terminal of the error amplifier is electrically connected to the gate of the fourth NMOS transistor; the source of the fourth NMOS transistor is electrically connected to a second external power supply, the drain of the fourth NMOS transistor is electrically connected to the input terminal of the feedback module, and the drain of the fourth NMOS transistor is electrically connected to the voltage output module.

[0118] In this embodiment, the reference voltage or the benchmark voltage is connected to the non-inverting input terminal of the error amplifier, compared and amplified with the feedback voltage, and then the target output voltage is output through the fourth NMOS transistor; after the target output voltage changes, the error amplifier can also make corresponding adjustments to maintain the stability of the target output voltage.

[0119] This embodiment improves the situation where the reference voltage in the integrated circuit has not been generated, resulting in the abnormal operation of the linear voltage regulator. The improved LDO reference voltage switching and startup circuit can first provide a reference voltage with low accuracy inside the linear voltage regulator when the reference voltage has not been generated, and when the reference voltage is ready, the reference voltage is connected to the linear voltage regulator circuit through the switching module; this embodiment also provides a control method for the LDO reference voltage switching and startup circuit, which can control the switching of the switching module to ensure that the linear voltage regulator accesses a stable reference voltage at the beginning and operates normally; after a period of time, after the bandgap reference module generates a reference voltage that is independent of temperature and stable, the switching module is switched to make the linear voltage regulator access the reference voltage and continue to operate normally; this embodiment can also make the application scenario of the linear voltage regulator more extensive. Whether the bandgap reference module in the integrated chip is ready before the voltage regulator module or afterwards, the linear voltage regulator circuit can operate normally, improving the feasibility of the chip.

[0120] The above is the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements are also regarded as the protection scope of the present invention.

Claims

1. A LDO reference voltage switching startup circuit, characterized in that: It includes a reference voltage generation module, a switching module, a bandgap reference module, a comparison amplification module, a feedback module and a voltage output module; wherein: The reference voltage generating module is used to generate a reference voltage; The bandgap reference module is used to provide a reference voltage and a preparation signal; The switching module is used to obtain a reference voltage, a base voltage and a ready signal; if the ready signal is a not-ready signal, the switching module transmits the reference voltage to the comparison and amplification module; if the ready signal switches to a ready signal, the switching module transmits the base voltage to the comparison and amplification module; The comparison and amplification module is used to obtain a feedback voltage and compare the feedback voltage with the reference voltage or the base voltage to obtain a target output voltage; The voltage output module is used to output a target output voltage; The feedback module is used to generate a feedback voltage according to a target output voltage and transmit the feedback voltage to the comparison and amplification module.

2. The LDO reference voltage switching startup circuit according to claim 1, characterized in that: The reference voltage generation module includes a first external power supply, a first resistor and a first NMOS tube, wherein: The first external power source is electrically connected to one end of the first resistor; The other end of the first resistor is electrically connected to the drain of the first NMOS tube; The source of the first NMOS tube is grounded, the gate of the first NMOS tube is electrically connected to the drain of the first NMOS tube, and the gate of the first NMOS tube is electrically connected to the switching module.

3. The LDO reference voltage switching startup circuit according to claim 2, characterized in that: The switching module includes an inverter, a second NMOS tube and a third NMOS tube, wherein: The inverter input terminal receives the preparation signal, and the inverter output terminal is electrically connected to the gate of the second NMOS tube; The source of the second NMOS tube is electrically connected to the gate of the first NMOS tube; the drain of the second NMOS tube is electrically connected to the drain of the third NMOS tube, and the drain of the second NMOS tube is electrically connected to the first input terminal of the comparison amplifier module; The gate of the third NMOS tube receives the preparation signal, and the source of the third NMOS tube receives the reference voltage; The inverter input terminal receives the ready signal. If the ready signal is a not ready signal, the not ready signal turns on the second NMOS tube through the inverter, and the not ready signal turns off the third NMOS tube, thereby transmitting the reference voltage to the comparison amplification module through the second NMOS tube; if the ready signal switches to a ready signal, the ready signal turns off the second NMOS tube through the inverter, and the ready signal turns on the third NMOS tube, thereby transmitting the reference voltage to the comparison amplification module through the third NMOS tube.

4. The LDO reference voltage switching startup circuit according to claim 3, characterized in that: The comparison and amplification module includes an error amplifier and a fourth NMOS tube, wherein: The non-inverting input terminal of the error amplifier is electrically connected to the drain of the third NMOS tube; the reverse input terminal of the error amplifier is electrically connected to the output terminal of the feedback module; the output terminal of the error amplifier is electrically connected to the gate of the fourth NMOS tube; the source of the fourth NMOS tube is electrically connected to the second external power supply, the drain of the fourth NMOS tube is electrically connected to the input terminal of the feedback module, and the drain of the fourth NMOS tube is electrically connected to the voltage output module.

5. The LDO reference voltage switching startup circuit according to claim 4, characterized in that: The feedback module includes a second resistor and a third resistor, wherein: One end of the second resistor serves as the input end of the feedback module and is electrically connected to the drain of the fourth NMOS tube, and the other end of the second resistor serves as the output end of the feedback module and is electrically connected to one end of the third resistor; The other end of the third resistor is grounded.

6. A control method for an LDO reference voltage switching startup circuit, characterized in that: Applied to an LDO reference voltage switching startup circuit as claimed in any one of claims 1 to 5, the control method comprises the following steps: Generate a reference voltage based on a reference voltage generation module; Generate reference voltage and prepare signal based on bandgap reference module; If the ready signal is a not-ready signal, the control switching module transmits the reference voltage to the comparison amplification module; if the ready signal switches to a ready signal, the control switching module transmits the reference voltage to the comparison amplification module; Obtaining a feedback voltage based on a comparison and amplification module and comparing the feedback voltage with the reference voltage or the base voltage to obtain a target output voltage, so as to enable a voltage output module to output the target output voltage; Wherein: the feedback voltage is generated by the feedback module according to the target output voltage.

7. The control method of the LDO reference voltage switching startup circuit according to claim 6, characterized in that: The reference voltage is generated based on the reference voltage generating module, wherein: The reference voltage generation module includes a first external power supply, a first resistor and a first NMOS tube; The first external power source is electrically connected to one end of the first resistor; The other end of the first resistor is electrically connected to the drain of the first NMOS tube; The source of the first NMOS tube is grounded, the gate of the first NMOS tube is electrically connected to the drain of the first NMOS tube, and the gate of the first NMOS tube is electrically connected to the switching module.

8. The control method of the LDO reference voltage switching startup circuit according to claim 7, characterized in that: If the ready signal is a not-ready signal, the control switching module transmits the reference voltage to the comparison amplification module; If the preparation signal switches to the ready signal, the control switching module transmits the reference voltage to the comparison amplifier module, wherein: The switching module includes: an inverter, a second NMOS tube and a third NMOS tube; The inverter input terminal receives the preparation signal, and the inverter output terminal is electrically connected to the gate of the second NMOS tube; The source of the second NMOS tube is electrically connected to the gate of the first NMOS tube; the drain of the second NMOS tube is electrically connected to the drain of the third NMOS tube, and the drain of the second NMOS tube is electrically connected to the first input terminal of the comparison amplifier module; The gate of the third NMOS tube receives the preparation signal, and the source of the third NMOS tube receives the reference voltage; The inverter input terminal receives the ready signal. If the ready signal is a not ready signal, the not ready signal turns on the second NMOS tube through the inverter, and the not ready signal turns off the third NMOS tube, thereby transmitting the reference voltage to the comparison amplification module through the second NMOS tube; if the ready signal switches to a ready signal, the ready signal turns off the second NMOS tube through the inverter, and the ready signal turns on the third NMOS tube, thereby transmitting the reference voltage to the comparison amplification module through the third NMOS tube.

9. The control method of the LDO reference voltage switching startup circuit according to claim 8, characterized in that: The inverter input terminal receives the ready signal. If the ready signal is a not-ready signal, the not-ready signal turns on the second NMOS tube through the inverter, and the not-ready signal turns off the third NMOS tube, thereby transmitting the reference voltage to the comparison amplification module through the second NMOS tube; if the ready signal switches to a ready signal, the ready signal turns off the second NMOS tube through the inverter, and the ready signal turns on the third NMOS tube, thereby transmitting the reference voltage to the comparison amplification module through the third NMOS tube, specifically: The first external power source, the first resistor and the first NMOS transistor generate a reference voltage VGS which is close to the reference voltage value that allows the linear regulator to work normally. M1 , according to the formula: Where VGS M1 represents the reference voltage generated by the reference voltage generation module, which is also the gate voltage of the first NMOS tube, L M1 represents the length of the first NMOS tube, μ MN1 represents the carrier mobility of the first NMOS tube, C oxM1 represents the capacitance per unit area of ​​the gate oxide layer of the first NMOS tube, W M1 represents the width of the first NMOS tube, R1 represents the resistance value of the first resistor, V th represents the threshold voltage of the first NMOS tube. When the VGS of the first NMOS tube M1 When the VGS of the first NMOS tube is higher than the threshold voltage, the first NMOS tube is turned on; M1 If the voltage is lower than the threshold voltage, the first NMOS tube is turned off; VDD represents the first external power supply voltage.

10. The control method of the LDO reference voltage switching startup circuit according to claim 8, characterized in that: The comparison-based amplification module obtains a feedback voltage and compares the feedback voltage with the reference voltage or the base voltage to obtain a target output voltage, so that the voltage output module outputs the target output voltage, wherein: The comparison and amplification module includes: an error amplifier and a fourth NMOS tube; The non-inverting input terminal of the error amplifier is electrically connected to the drain of the third NMOS tube; the reverse input terminal of the error amplifier is electrically connected to the output terminal of the feedback module; the output terminal of the error amplifier is electrically connected to the gate of the fourth NMOS tube; the source of the fourth NMOS tube is electrically connected to the second external power supply, the drain of the fourth NMOS tube is electrically connected to the input terminal of the feedback module, and the drain of the fourth NMOS tube is electrically connected to the voltage output module.

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