Internal polycrystal series-connection high-brightness LED (light-emitting diode) lamp structure

By adopting three types of chips and dynamic current distribution technology in the multi-chip series LED lamp structure, the problems of uneven light source mixing, insufficient thermal management, and inaccurate current distribution in the existing technology are solved, and efficient and stable LED lamp performance is achieved.

CN120176067APending Publication Date: 2025-06-20SUZHOU HONGBRIGHT OPTOELECTRONIC CO LTD
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Patent Information

Application Number
CN202510289769.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-12
Publication Date
2025-06-20

AI Technical Summary

Technical Problem

The existing multi-chip series LED lamp structure has shortcomings in light source mixing, thermal management, current distribution and dynamic response capabilities, resulting in uneven optical performance, poor thermal management, inaccurate current distribution and degradation of system performance.

Method used

The internal polycrystalline series-connected high-bright LED lamp structure is adopted, and the three types of wafers are interlaced through the design of brackets, lamp cups, circuit boards and heat dissipation structures. The light source mixing, thermal management and current distribution are optimized by combining dynamic current distribution technology between groups and within groups, thermoelectric coupling feedback modules and fast drive control modules.

Benefits of technology

It significantly improves the consistency of the mixing effect and optical performance of the light source, improves the thermal management performance, achieves high-precision current distribution and dynamic response capabilities, and improves the overall efficiency and stability of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of LED lamps, and discloses an internal polycrystal series connection high-brightness LED lamp structure which comprises a support, a lamp cup is installed at the top of the support, a circuit board is installed in the middle of the lamp cup, a plurality of wafer group structures are connected in series in the middle of the circuit board, and a heat dissipation structure is installed at the bottom of the support. Each wafer group structure comprises a first wafer, a second wafer and a third wafer, the first wafer, the second wafer and the third wafer are connected in series, the heat dissipation structure comprises a through hole formed in the middle of the support and a heat conduction plate attached to the bottom of the circuit board, and heat dissipation fins are further installed at the bottom of the heat conduction plate. The bottom of the support is provided with a plurality of groups of mutually vertical air channels. The technical effect of uniformly mixing light sources at different positions is achieved by adopting the technical scheme that the three kinds of wafers are arranged in a staggered mode and combining the inter-group and intra-group dynamic current distribution, the defect of local deviation of optical performance is overcome, and the consistency and the mixing effect of the light sources are remarkably improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of LED lamps, and specifically to the structure of an internally multi-crystal series high-brightness LED lamp. Background Art

[0002] With the development of LED technology, the multi-chip series structure has gradually become popular in the application of high-brightness light sources. This structure improves the overall brightness and luminous efficiency by connecting multiple light-emitting chips in series. However, the design schemes of the existing technologies are usually based on traditional fixed arrangement methods, that is, different types of chips are concentrated. Although this structure has certain convenience in manufacturing and design, there are obvious limitations in light source output and system performance.

[0003] In terms of optical performance, in the existing technologies, the superposition efficiency of the optical outputs of various chips is low. The concentrated arrangement method is prone to cause color unevenness in local areas, especially when multiple wavelength light sources are involved, and the mixing effect is poor. This problem is particularly prominent in scenarios that require high-quality optical output.

[0004] In terms of thermal management performance, during the operation of the multi-chip series structure, the thermal performance differences between chips are large. Most of the existing systems adopt fixed power distribution schemes and cannot respond to the changes in the operating temperature of the chips in real time. The thermal runaway phenomenon causes some chips to be overloaded and overheat and fail, seriously affecting the stability and lifespan of the system.

[0005] In terms of electrical performance, the current distribution method in the existing technologies is usually mainly single-loop control, which can only achieve rough adjustment of the overall circuit. Due to the differences in the forward voltages of the chips, it is difficult to maintain a balanced power distribution, and the system efficiency and luminous consistency are restricted.

[0006] In addition, the response speed of the drive control system is often insufficient. Traditional drive modules have significant delays in dynamic adjustment and signal generation. When the operating load changes or the environmental conditions fluctuate, it is difficult to achieve rapid optimization adjustment of system parameters, resulting in a further decline in overall performance. Summary of the Invention

[0007] Aiming at the deficiencies of the existing technologies, the present invention provides a structure of an internally multi-crystal series high-brightness LED lamp, which solves the problems of uneven light source mixing, insufficient thermal management performance, inaccurate current distribution, and weak dynamic response ability in the existing multi-chip series structure.

[0008] To achieve the above purposes, the present invention is realized through the following technical solutions: A structure of an internally multi-crystal series high-brightness LED lamp, including a bracket, a lamp cup is installed at the top of the bracket, a circuit board is installed in the middle of the lamp cup, a plurality of chip group structures are connected in series in the middle of the circuit board, and a heat dissipation structure is installed at the bottom of the bracket; Each of the wafer group structures includes a first wafer, a second wafer, and a third wafer, and the first wafer, the second wafer, and the third wafer are connected in series with each other.

[0009] Through the above technical solution, multiple wafers can be driven simultaneously to superimpose the light effects output by them, thereby improving the overall luminous efficiency and brightness.

[0010] Preferably, the heat dissipation structure includes a through hole opened in the middle of the bracket and a heat conducting plate attached to the bottom of the circuit board. A heat sink fin is further installed at the bottom of the heat conducting plate, and multiple groups of mutually perpendicular air ducts are opened at the bottom of the bracket.

[0011] Through the above technical solution, it is ensured that better heat dissipation can be achieved during the operation of the LED lamp.

[0012] Preferably, in each wafer group structure, the placement positions of the first wafer, the second wafer, and the third wafer are all different.

[0013] Through the above technical solution, through this staggered arrangement method, the uniformity of light source mixing can be effectively improved, and the problem of local heat accumulation caused by the aggregation of the same type of wafers can be reduced.

[0014] The control system of the internal multi-crystal series high-brightness LED lamp structure includes: A multi-wafer series structure, which is composed of multiple groups of wafers. Each group of wafers contains at least three different types of wafers, and various wafers are arranged in a staggered manner in multiple groups of wafers to improve the light source mixing uniformity and thermal management performance; A data acquisition module, which is used to collect the forward voltage, total current, and temperature data of each group of wafers in the multi-wafer series structure, and perform grouped processing on the data; A control core module, which is connected to the data acquisition module and is used to perform inter-group power distribution and intra-group current optimization based on the voltage, total current, and temperature data; A dynamic current distribution module, which is connected to the control core module and is used to dynamically adjust the drive current of each group and each type of wafer according to the results of inter-group power distribution and intra-group current optimization; A thermoelectric coupling feedback module, which is used to monitor the wafer temperature in real time and adjust the power distribution ratio of each group of wafers based on the temperature rise control logic; A drive control module, which is connected to the dynamic current distribution module and the thermoelectric coupling feedback module, and is used to generate corresponding PWM signals and constant current output signals according to the drive current to drive each type of wafer in the multi-wafer series structure.

[0015] Through the above technical solution, precise control of the multi-wafer series structure is achieved through modular design, thereby optimizing power distribution, improving optical uniformity, and enhancing thermal management performance.

[0016] Preferably, the wafers in the multi-wafer series structure are arranged in the following staggered manner: The first wafer is arranged at the first position of the first group, the second position of the second group, and the third position of the third group; the third wafer is arranged at the second position of the first group, the third position of the second group, and the first position of the third group; the second wafer is arranged at the third position of the first group, the first position of the second group, and the second position of the third group.

[0017] Through the above technical solution, the uniformity of light source mixing is effectively improved by the staggered arrangement method, and the problem of local heat accumulation caused by the aggregation of the same type of wafers is reduced, thereby improving the optical performance and thermal management ability of the overall system.

[0018] Preferably, the data acquisition module includes: A multi-channel voltage sensor for collecting the forward voltage of each type of wafer and calculating the total voltage of each group of wafers; A current sensor for collecting the total current of the multi-wafer series structure; A temperature sensor for collecting the real-time temperature of each type of wafer and calculating the average temperature of each group of wafers through grouping logic.

[0019] Through the above technical solution, this module ensures that the operating parameters of the multi-wafer series structure can be accurately collected and supports high-precision data grouping processing, providing basic data for the optimization calculation of the subsequent control core module and improving the real-time performance and accuracy of system control.

[0020] Preferably, the control core module performs the following steps: Based on the voltage and power of each group of wafers provided by the data acquisition module, calculate the target power distribution ratio of each group; Based on the forward voltage and temperature data of each type of wafer, calculate the current distribution ratio of each type of wafer; Transmit the calculation result to the dynamic current distribution module to achieve optimized control of the drive current.

[0021] Through the above technical solution, through the prediction function of the temperature rise trend, the power distribution can be adjusted in advance, further improving the stability of system operation.

[0022] Preferably, the dynamic current distribution module includes: An inter-group current distribution unit for calculating the target current of each group of wafers according to the target power distribution ratio of each group of wafers; An intra-group current distribution unit for calculating the target current of each type of wafer within the group based on the forward voltage and target power of each type of wafer; an output control unit for transmitting the calculated target current to the drive control module.

[0023] Through the above technical solution, the dynamic current distribution module ensures that each group and each type of wafer can obtain appropriate current, which not only meets the lighting requirements but also avoids overheating, improving the accuracy of power distribution and the reliability of the system.

[0024] Preferably, the thermoelectric coupling feedback module operates based on the following logic: When the average temperature of a certain group of wafers exceeds the set threshold, the target power distribution ratio of this group of wafers is reduced to decrease its power output; When the temperature of a certain type of wafer exceeds the safe range within the group, the power output of this wafer is preferentially reduced to adjust the power distribution ratio within the group; The input of the dynamic current distribution module is updated through the power adjustment results fed back in real time.

[0025] Through the above technical solution, by monitoring the temperature in real time and dynamically adjusting the power output, the thermoelectric positive feedback effect is effectively suppressed, preventing the temperature rise from getting out of control. At the same time, through the temperature rise prediction function, it is possible to intervene in the adjustment in advance, further ensuring the safety and long-term stability of the system operation.

[0026] Preferably, the drive control module includes: A PWM signal generation unit for generating multi-channel PWM signals according to the target current ratio provided by the dynamic current distribution module; A constant current drive unit for converting the target current into a stable DC output according to the PWM signal; An abnormality detection unit for detecting the output current and wafer temperature in real time, and automatically adjusting or cutting off the drive signal when an abnormal state is detected.

[0027] Through the above technical solution, the drive control module is responsible for executing the distribution result of the dynamic current distribution module, and accurately drives the multi-wafer series structure through PWM signals and constant current output. Its abnormality detection function can timely detect and respond to operating abnormalities, improving the operating reliability of the system. At the same time, the multi-mode operation function increases the flexibility of the system and is applicable to different application scenarios.

[0028] The present invention provides an internal multi-crystal series high-brightness LED lamp structure, which has the following beneficial effects: 1. The present invention adopts the technical solution of arranging three types of wafers in an interleaved manner and combining the inter-group and intra-group dynamic current distribution, achieving the technical effect of uniformly mixing light sources at different positions. Compared with the problem of uneven light color distribution caused by the concentrated arrangement of wafers in the prior art, it solves the deficiency of local deviation in optical performance, significantly improving the consistency and mixing effect of the light source.

[0029] 2. Through the thermoelectric coupling feedback module, the present invention combines real-time temperature monitoring and power dynamic adjustment technologies, achieving the technical effects of effectively suppressing thermoelectric positive feedback and reducing the temperature rise of the wafer. Compared with the existing solutions that simply rely on fixed power control, it overcomes the deficiencies of slow response in temperature rise control and easy overheating of the system, ensuring the safety and reliability of the system operation.

[0030] 3. The present invention adopts a dynamic current distribution technology with double-layer optimization between groups and within groups, combines real-time power and temperature data, and realizes high-precision current regulation for the multi-wafer series structure. Compared with the existing solutions that can only achieve single-loop current balance, it solves the problem of uneven power distribution in complex multi-group wafers, significantly improving the efficiency and stability of the overall system.

[0031] 4. Through the fast signal generation and feedback mechanism of the drive control module, the present invention combines multi-channel PWM signal regulation technology, achieving the technical effect of quickly responding to changes in wafer current and power. Compared with the existing solutions with lagging adjustment and inflexible drive signals, it overcomes the defect of insufficient dynamic adjustment ability, enabling the system to quickly adapt to changes in the operating environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a perspective view of the present invention; Figure 2 is an exploded schematic view of the structural part of the present invention; Figure 3 is a general structural schematic view of the control system in the present invention; Figure 4 is a schematic diagram of the algorithm flow of the control core module in the present invention; Figure 5 is a logic schematic diagram of the dynamic current distribution module in the present invention; Figure 6 is a schematic diagram of the working process of the thermoelectric coupling feedback module in the present invention; Figure 7 is a working logic schematic diagram of the drive control module in the present invention.

[0033] Among them, 1. Bracket; 2. Lamp cup; 3. Circuit board; 4. Wafer 1; 5. Wafer 2; 6. Wafer 3; 7. Through hole; 8. Heat conducting plate; 9. Heat dissipation fin; 10. Air duct. DETAILED DESCRIPTION OF THE INVENTION

[0034] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the specification of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts belong to the scope of protection of the present invention.

[0035] Embodiment: Please refer to the attached Figure 1 - attached Figure 2 As shown in the figure, the present invention provides an internal polycrystalline series high-brightness LED lamp structure, including a bracket 1. A lamp cup 2 is installed at the top of the bracket 1. A circuit board 3 is installed in the middle of the lamp cup 2. A plurality of wafer group structures are connected in series in the middle of the circuit board 3. Each wafer group structure includes a wafer one 4, a wafer two 5, and a wafer three 6, and the wafer one 4, the wafer two 5, and the wafer three 6 are connected in series with each other. In each wafer group structure, the placement positions of the wafer one 4, the wafer two 5, and the wafer three 6 are all different. Preferably, there are three groups of wafer group structures, which are arranged in a staggered manner. Among them, the wafer one 4 is arranged at the first position of the first group, the second position of the second group, and the third position of the third group; Please refer to the attached Figure 1 As shown in the figure, the wafer two 5 is arranged at the second position of the first group, the third position of the second group, and the first position of the third group; the wafer three 6 is arranged at the third position of the first group, the first position of the second group, and the second position of the third group.

[0036] Through the above arrangement method, the uniformity of power distribution is effectively improved, the light source mixing effect is significantly enhanced, and the negative impact of the thermal effect is reduced.

[0037] Please refer to the attached Figure 2 As shown in the figure, a heat dissipation structure is installed at the bottom of the bracket 1. The heat dissipation structure includes a through hole 7 opened in the middle of the bracket 1 and a heat conduction plate 8 attached to the bottom of the circuit board 3. A heat dissipation fin 9 is also installed at the bottom of the heat conduction plate 8. Multiple groups of mutually perpendicular air ducts 10 are opened at the bottom of the bracket 1. During installation, thermal grease is applied between the heat conduction plate 8 and the circuit board 3, and then the circuit board 3 is tightly attached to the heat conduction plate 8 for installation. The heat generated when the circuit board 3 works is transmitted through the heat conduction plate 8 and then dispersed through the heat dissipation fin 9, and then the surrounding flowing air is received through the air ducts 10 to discharge the heat generated when the circuit board 3 works.

[0038] Please refer to the attached Figure 3 - attached Figure 7 As shown in the figure, the present invention also provides a control system for an internal polycrystalline series high-brightness LED lamp structure. This system solves the problems of uneven current distribution and thermal effect feedback in the series LED lamp structure through a dynamic current distribution and thermoelectric coupling feedback mechanism, thereby improving the luminous efficiency and stability of the system and extending the service life of the lamp.

[0039] The system includes the following modules: Multi-chip series structure: It contains three different types of chips, arranged in the way of chip one at positions 1, 5, 9; chip two at positions 2, 6, 7; and chip three at positions 3, 4, 8.

[0040] Data acquisition module: It collects the forward voltage, current and temperature information of each group of chips in real time, and supports multi-channel parallel sampling and grouped signal processing.

[0041] Control core module: It processes the collected data in groups, runs dynamic current distribution and thermoelectric coupling feedback algorithms to achieve optimized control within and between groups.

[0042] Dynamic current distribution module: It adjusts the current distribution between and within groups according to the grouped voltage and power distribution ratio to ensure power balance for each group of chips.

[0043] Thermoelectric coupling feedback module: It monitors the temperature rise of each group of chips in real time, and adjusts the power distribution through feedback to avoid local overheating and thermal runaway.

[0044] Drive control module: It generates multi-channel PWM signals and constant current output signals according to the distribution results to accurately drive each group of chips.

[0045] Through the arrangement of chip one at position 4, chip two at position 5, and chip three at position 6, the light source mixing effect and thermal management performance of the multi-chip structure are optimized. By dividing different types of chips into three groups and arranging them in a staggered manner in the overall structure, a more uniform power distribution, thermal management and light source mixing effect are achieved. The following is a detailed description in combination with the specific structure and technical implementation method.

[0046] In this embodiment, the multi-chip series structure is composed of three different types of chips, denoted as chip one, chip three and chip two respectively. The forward voltages V1, V2, V3 and optical output characteristics of these chips are different. To optimize the performance, these chips are divided into three groups, and each group contains one chip one, one chip two and one chip three. The three groups of chips form an overall structure in series.

[0047] Generally, the arrangement position of each type of chip follows the following rules (taking the nine-square grid as the position reference point): Chip one is arranged at positions 1, 5, 9; chip two is arranged at positions 2, 6, 7; chip three is arranged at positions 3, 4, 8.

[0048] This staggered arrangement ensures the uniform distribution of the three types of chips in space, reducing the phenomenon of power concentration or optical concentration in a single area.

[0049] Specifically, the grouping method of the three groups of chips is as follows (taking the nine-square grid as the position reference point): The first group of wafers: includes wafer one (position 1), wafer two (position 2), and wafer three (position 3). The second group of wafers: includes wafer one (position 5), wafer two (position 6), and wafer three (position 4). The third group of wafers: includes wafer one (position 9), wafer two (position 7), and wafer three (position 8).

[0050] Each group of wafers forms a sub-circuit in series, and the three groups form an overall circuit in series again.

[0051] In the multi-wafer series structure, the total voltage V total and the total power P total are calculated as follows: V total = V 组1 + V 组2 + V 组3 P total = I·V total Where: V total is the total voltage of the overall series structure; I is the total current of the system; V 组i = V1 + V2 + V3 is the total voltage of the i-th group; P total is the total power of the system.

[0052] The current I 组i within each group is equal to the total current, but the power P 组i in different groups is different due to the difference in the forward voltage of the wafers: P 组i = I·V 组i Generally, there are differences in the optical output characteristics (such as wavelength range or light intensity distribution) of the three types of wafers. Through staggered arrangement and in-group mixing, uniformization of optical output can be achieved spatially. The light output L total of the three groups of wafers is expressed as: Where: L i,k is the light output of the k-th type of wafer in the i-th group.

[0053] In one implementation, by adjusting the physical spacing or angle between wafers within the group, the optical mixing effect can be further optimized, making the light output of different wavelengths more evenly superimposed.

[0054] The performance of the interleaved layout wafer group structure in thermal management has been significantly optimized. The distribution of the three groups of wafers reduces the aggregation of the same type of wafers in a local area, thus slowing down the heat accumulation phenomenon.

[0055] Specifically, the average temperature rise of the three groups of wafers can be expressed as: Where: is the average temperature of the i-th group; T k is the temperature of each wafer.

[0056] In one implementation, the power P of the three groups of wafers can be dynamically adjusted through a thermoelectric coupling feedback module 组i to keep the temperature T of each group of wafers 组i within a safe range: P 组i (t + 1) = P 组i (t) - γ·(T 组i - T threshold ) Where: T threshold is the set safe temperature threshold; γ is the power adjustment coefficient.

[0057] The series structure of the interleaved layout wafer group has a direct impact on the algorithm and signal processing logic of the control module, specifically manifested as: The data acquisition module needs to support multi-channel signal sampling and perform signal grouping processing according to the intra-group and inter-group logic; The control core module needs to run a grouping optimization algorithm based on the voltage, temperature, and power data of the three groups of wafers to achieve coordinated control within and between groups; The dynamic current distribution module needs to calculate the inter-group current ratio α according to the power characteristics of the groups 组i and the intra-group current ratio α k to achieve precise current distribution; The thermoelectric coupling feedback module needs to dynamically adjust the power distribution in combination with the grouped temperature rise data; The drive control module needs to generate PWM signals for each group of wafers according to the output signals of the control core module and further precisely adjust the drive current of the wafers within the group.

[0058] The design of the data acquisition module aims to adapt to the series-connected structure of multiple wafers after layout, providing accurate and real-time data support for the control core module and subsequent current distribution and feedback control. This module is responsible for collecting the forward voltage, current, and temperature signals of each group of wafers, and grouping and multi-channel transmitting these data to ensure that the system can dynamically respond to the operating state of the wafers. The following details the data acquisition module for the interleaved wafer groups.

[0059] In this embodiment, the data acquisition module includes a voltage sensor, a current sensor, and a temperature sensor for real-time acquisition of the operating parameters of the series-connected structure of multiple wafers. These parameters include the forward voltage V of each group of wafers 组i , the total current I, and the temperature T of each type of wafer k . The design of the module needs to meet the requirements of high precision, high speed, and multi-channel sampling.

[0060] Generally, each group of wafers contains three types of wafers, each with different characteristics, and the grouping logic of the three groups of wafers needs to be clear. Therefore, the data acquisition module needs to group and process the data according to the arrangement rules of the wafers. The arrangement rules of the wafers are as follows: Wafer 1 is arranged at positions 1, 5, and 9; Wafer 2 is arranged at positions 2, 6, and 7; Wafer 3 is arranged at positions 3, 4, and 8.

[0061] Specifically, the voltage sensor is used to collect the forward voltage V of each wafer k . The total voltage V of each group of wafers 组i is expressed as: V 组i = V1 + V2 + V3 where: V 组i is the total voltage of the i-th group; V1, V2, and V3 are the forward voltages of Wafer 1, Wafer 2, and Wafer 3, respectively.

[0062] As an option, the voltage sensor can be collected using a multi-channel ADC (analog-to-digital converter) to ensure synchronous sampling of the voltage signals of the three wafers within each group. In one implementation, the resolution of the ADC is not less than 12 bits to meet the accuracy requirements for collecting the forward voltage signals of the wafers.

[0063] Generally, to improve the anti-interference ability, a differential amplifier and a filter circuit are added to the voltage acquisition channel to reduce the influence of external noise on the sampled signal. For example, the gain of the differential amplifier can be adjusted according to the voltage range of the wafers to ensure that the signal is within the input range of the ADC.

[0064] The current sensor is used to measure the total current I of the series structure and serves as the basis for system power calculation and dynamic current distribution. The total current I and the power P of each group of wafers 组i satisfy the following relationship: P 组i = I·V 组i where: P 组i is the total power of the i-th group.

[0065] In one implementation, the current sensor can adopt a Hall effect sensor, which has the advantages of non-contact measurement, high precision, and wide range characteristics. To adapt to systems with different powers, a high-sensitivity Hall element with zero hysteresis can be selected, and a low-pass filter circuit is combined to smooth the sampled signal.

[0066] As another option, the current sensor can adopt the sampling resistor method, that is, the current value is calculated by detecting the voltage drop across the resistor: where: V R is the voltage across the sampling resistor; R s is the resistance value of the sampling resistor.

[0067] The temperature sensor is used to collect the temperature T of each type of wafer k , and calculate the average temperature T of each group of wafers 组i . The calculation formula for the average temperature is: where: T k is the real-time temperature of each type of wafer; T 组i is the average temperature of the i-th group.

[0068] In some embodiments, the temperature sensor can adopt an NTC thermistor or a digital temperature sensor (such as DS18B20). Generally, the NTC thermistor outputs a voltage signal through a voltage division circuit, and the temperature is calculated using the following formula: where: R T is the current resistance value of the thermistor; R T0 is the resistance value at the reference temperature T0; β is the material constant; T k is the current temperature of the wafer (unit: Kelvin).

[0069] Under normal circumstances, the data acquisition module needs to transmit voltage, current, and temperature signals to the control core module. To support the synchronous acquisition and transmission of multiple groups of signals, the module can be optimized in the following ways: Communication interface: Adopt the I2C or SPI protocol to achieve high-bandwidth data transmission. The I2C interface has the advantage of multi-device connection and is suitable for grouped data processing; while the SPI interface, due to its high-speed characteristics, is suitable for application scenarios with high-frequency sampling.

[0070] Grouping logic: During the data transmission process, the module marks the signals according to the arrangement rules of the wafers. For example, each packet of data contains V 组i , T 组i , P 组i and other information, which facilitates the control core module for subsequent processing.

[0071] In an extended design, the data acquisition module can also integrate a real-time calibration function. For example, by adding a reference voltage source and a calibration circuit, the voltage sensor and the temperature sensor are periodically calibrated to reduce the impact of long-term drift on data accuracy.

[0072] As an improvement, the data acquisition module can support remote monitoring functions. The module can upload the collected data to the cloud through a wireless communication interface (such as Wi-Fi or Bluetooth), and users can view the system status in real time through a mobile device.

[0073] Through multi-channel sensors and grouping logic, the data acquisition module can accurately collect the voltage, current, and temperature signals of each group of wafers, providing complete input data for subsequent control algorithms. The module design takes into account anti-interference ability, data transmission efficiency, and expansion functions, ensuring the stability and flexibility of the system. The above description fully discloses the implementation method of the data acquisition module and its connection method with other modules of the control system.

[0074] The control core module is the core processing unit of the multi-wafer series-connected structure control system. Its main function is to receive the real-time signals provided by the data acquisition module, including voltage V k , current I, and temperature T k , and perform real-time control on the system according to the dynamic current distribution algorithm and the thermoelectric coupling feedback algorithm. Through the optimized processing of grouped data, this module can coordinate the current distribution between and within groups, dynamically adjust the power output, and ensure the stable operation of the multi-wafer series-connected structure.

[0075] In this embodiment, the control core module is centered on a high-performance microcontroller (MCU) and realizes the comprehensive control of the multi-wafer series-connected structure through three parts: grouping management, algorithm operation, and signal output.

[0076] Under normal circumstances, the control core module first receives grouped data from the data acquisition module, including the total voltage V of each group of wafers 组i , the average temperature T 组i and the total power P 组i . By processing this data, the module can extract the overall operating state of the system.

[0077] Specifically, the total power of each group of wafers is calculated by the following formula: P 组i = I·V 组i Where: P 组i is the power of the i-th group of wafers; I is the total current of the system; V 组i is the total voltage of the i-th group of wafers.

[0078] The control core module analyzes the power P 组i of each group of wafers and the average temperature T 组i to determine whether power distribution needs to be adjusted.

[0079] Under normal circumstances, the control core module realizes current optimization between and within groups by running a dynamic current distribution algorithm.

[0080] Inter-group current distribution: The total power P total of the system and the target power P target组i satisfy the following relationship: n 组 = 3 To achieve power balance, the control core module calculates the inter-group current ratio α 组i : Intra-group current distribution: Within each group, the current ratio α k of each type of wafer is calculated according to the forward voltages V1, V2, V3 of the three types of wafers: The actual current I k of each type of wafer is expressed as: I k = α k ·I 组i The above distribution results will be used as the basis for the drive control module to generate PWM signals.

[0081] As an improvement, the control core module runs a thermoelectric coupling feedback algorithm to dynamically adjust power distribution according to the temperature rise of each group of wafers.

[0082] Under normal circumstances, the average temperature rise T of each group of wafers 组i and the set temperature threshold T threshold The deviation between them is used to adjust the power output: P 组i (t + 1)=P 组i (t)-γ·(T 组i -T threshold ) Where: P 组i (t) and P 组i (t + 1) are the current and adjusted powers; T threshold is the temperature safety threshold; γ is the power adjustment coefficient.

[0083] Within the group, the control core module further refines the power adjustment for each type of wafer according to the wafer temperature T k : P k (t + 1)=P k (t)-γ k ·(T k -T threshold组i ) This hierarchical thermal feedback control mechanism can effectively suppress the thermoelectric positive feedback effect and ensure the stable operation of the system.

[0084] Under normal circumstances, the calculation results of the control core module are output to the drive control module in the form of multi-channel signals. To ensure the real-time and reliable signal transmission, the module optimizes the output logic in the following ways: PWM duty cycle calculation: Calculate the PWM signal duty cycle D of each group according to the allocation result 组i : D 组i =α 组i ·D max Where: D 组i is the PWM duty cycle of the i-th group; D max is the maximum duty cycle (100%).

[0085] Intra-group signal output: The PWM signal of each group is further allocated to three types of wafers, and its duty cycle is related to the intra-group ratio α k : D k =α k ·D 组i Communication Interface: In one implementation, the control core module transfers control parameters to the drive module through the I2C or SPI interface, and uploads the system operating status to the monitoring terminal at the same time.

[0086] In some embodiments, the control core module also supports the following extended functions: Real-time Data Calibration: The module is built with a calibration algorithm to periodically correct the zero drift and gain error of the sensors in the data acquisition module to ensure data accuracy.

[0087] Abnormal State Alarm: When the temperature T 组i or power P 组i of a certain group of wafers exceeds the set range, the module will send an alarm signal through the communication interface and automatically adjust the control parameters to reduce the power output.

[0088] Adaptive Optimization: The module can optimize the parameters of the dynamic current distribution and thermal feedback algorithms based on historical operation data. For example, adjust the power adjustment coefficient γ or the allocation ratio α 组i to adapt to different working environments.

[0089] Through the optimized processing of grouped data and the operation of multi-level algorithms, the control core module achieves precise control of the multi-wafer series structure. The module design fully considers the wafer arrangement characteristics, as well as the current distribution and thermal management requirements between and within groups. The above technical solutions disclose the complete algorithm logic and implementation details, providing a solid guarantee for the efficient operation of the system, and having good scalability and reproducibility.

[0090] The dynamic current distribution module is a key unit in the control system to achieve power balance in the multi-wafer series structure. For the multi-wafer series structure, this module realizes the cooperative optimization control of multiple groups of wafers by running the current distribution algorithms between and within groups. Under the instruction of the control core module, the module dynamically adjusts the current distribution ratio of each group and each type of wafer according to parameters such as the voltage, power, and temperature of each group of wafers to ensure the balance and stability of the overall system performance.

[0091] In this embodiment, the design of the dynamic current distribution module combines the dual logics of inter-group current optimization and intra-group current distribution, and adapts to a three-group multi-wafer series structure. Generally, the module receives the inter-group and intra-group voltage, power, and temperature data from the control core module, calculates the dynamic current ratio of each group and each type of wafer using a hierarchical optimization algorithm, and outputs the calculation results to the drive control module.

[0092] Specifically, in the multi-wafer series structure, the power and voltage characteristics of each group of wafers are different. The dynamic current distribution module first calculates the current distribution ratio α 组i .

[0093] The power P of each group of wafers 组i is represented by the following formula: P 组i = I 组i ·V 组i where: P 组i is the total power of the i-th group of wafers; I 组i is the current allocated to the i-th group of wafers; V 组i is the total voltage of the i-th group of wafers.

[0094] The total power P of the system total and the target power P target组i satisfy the following relationship: where: P target组i is the target power allocated to the i-th group of wafers; n 组 = 3 is the number of wafer groups.

[0095] By calculating the allocation ratio α 组i , the current allocation amount for each group can be determined: I 组i = α 组i ·I The above allocation logic ensures the power balance of each group of wafers and provides basic data for the current allocation within the group.

[0096] Within each group, the dynamic current allocation module further calculates the current allocation ratio α k of each type of wafer based on the voltage V target组i of the three types of wafers and the target power PP k .

[0097] Generally, the power P k of each type of wafer is represented by the following formula: P k = I k ·V k where: P k is the power of the k-th type of wafer; I k is the current allocated to the k-th type of wafer; V k is the forward voltage of the k-th type of wafer.

[0098] The current ratio α kExpressed as: I k = α k ·I 组i In one implementation, the module dynamically updates the allocation ratio α by collecting the voltage data V of each wafer in real time k , to adapt to the differences in wafer characteristics. k

[0099] Generally, the dynamic current allocation module needs to update the allocation ratio at fixed time intervals (such as 1 ms or shorter) to ensure that the system can quickly respond to changes in wafer performance. For example, when the total voltage V 组i or temperature T 组i of a certain group of wafers fluctuates, the module will immediately recalculate the current allocation amount I 组i of this group and synchronously adjust the current allocation ratio α k within the group.

[0100] As an improvement, the module can implement parallel operation of the inter-group and intra-group allocation algorithms through multi-threaded processing technology, thereby improving the calculation efficiency.

[0101] The dynamic current allocation module also needs to combine the output results of the thermoelectric coupling feedback module to correct the current allocation ratio in real time.

[0102] Generally, when the temperature T 组i of a certain group of wafers exceeds the threshold T threshold , the module will reduce the heat accumulation by reducing the power P 组i of this group: P 组i (t + 1)= P 组i (t)-γ·(T 组i - T threshold ) The corrected current allocation amount I 组i (t + 1) is expressed as: Within the group, the module preferentially reduces the power allocation for wafers with faster temperature rise: P k (t + 1)= P k (t)-γ k ·(T k - T threshold ) The above thermal feedback logic ensures the safe operation of the wafers in the high-temperature state and maintains the overall power balance of the system.

[0103] ​The dynamic current distribution module highly coordinates with the control core module, the thermoelectric coupling feedback module, and the drive control module: Receive the voltage, power, and temperature data of each group of wafers from the control core module; Dynamically adjust the current distribution ratio according to the temperature correction result of the thermoelectric coupling feedback module; The calculated current distribution quantity α 组i and α k Output to the drive control module for generating PWM signals.

[0104] As an extension, the dynamic current distribution module can perform predictive distribution in combination with historical data. For example, by recording the historical power and temperature rise of each group of wafers, the module can adjust the distribution ratio in advance to avoid overheating problems in high-power areas.

[0105] In another implementation, the module supports an adaptive optimization function and can dynamically adjust the weight coefficient of the distribution algorithm according to the external environment (such as input voltage fluctuations) to improve the adaptability of the system.

[0106] The dynamic current distribution module accurately achieves power balance and thermal management of the multi-wafer series structure through inter-group and intra-group cooperative optimization algorithms. The module design discloses the complete current distribution logic, the thermo-feedback cooperative control method, and the connection method with other modules, ensuring the integrity and reproducibility of the technical solution. The above provides important support for the stable improvement of system performance and has good scalability.

[0107] The thermoelectric coupling feedback module is one of the core functional modules in the multi-wafer series structure control system. This module dynamically corrects the power distribution between wafers by real-time monitoring the temperature of each group of wafers and combining dynamic current distribution and power regulation algorithms. Its main role is to suppress power fluctuations and thermal runaway phenomena caused by temperature rise during wafer operation, ensuring the stability and safety of system operation.

[0108] In this embodiment, the thermoelectric coupling feedback module adjusts the power distribution ratio P of each group of wafers by collecting real-time temperature data from the data acquisition module and running the temperature feedback control algorithm 组i and the power distribution quantity P of each type of wafer k . The result of the feedback adjustment is further transmitted to the dynamic current distribution module and the drive control module for updating the actual drive current of the wafers.

[0109] Generally, the thermoelectric coupling feedback module monitors the wafer temperature in groups. Each group of wafers contains three different types of wafers, and its average temperature T 组i is calculated by the following formula: Where: T 组i is the average temperature of the i-th group of wafers; T k is the temperature of the k-th type of wafer.

[0110] Specifically, the data acquisition module collects the temperature signal T of each type of wafer through a temperature sensor k , and transfers the grouped temperature data to the thermoelectric coupling feedback module. The module first determines whether the temperature rise of each group exceeds the set safety threshold T threshold .

[0111] Generally, when the temperature rise T 组i of a certain group of wafers exceeds the set threshold T threshold , the thermoelectric coupling feedback module suppresses the temperature rise by reducing the power distribution ratio P 组i of this group. The power adjustment formula is as follows: P 组i (t + 1) = P 组i (t) - γ·(T 组i - T threshold ) Where: P 组i (t) and P 组i (t + 1) are the current and adjusted powers respectively; T 组i is the average temperature of the current group; T threshold is the safety temperature threshold; γ is the power adjustment coefficient, used to control the adjustment amplitude.

[0112] As an option, in order to avoid system instability caused by too fast power adjustment, the module can add a limiting condition to the power adjustment algorithm, such as limiting the power change amount ΔP 组i for each adjustment: ΔP 组i = min(γ·(T 组i - T threshold ), P max调整 In the in-group power optimization, the thermoelectric coupling feedback module further refines the power adjustment of each type of wafer. Generally, when the temperature T k of a certain type of wafer is higher than the safety threshold, the module will preferentially reduce the power allocation amount P k of this wafer. The specific adjustment formula is: P k (t + 1) = P k (t) - γ k ·(T k - T threshold组i ) Wherein: P k (t) and P k (t + 1) are the current and adjusted wafer powers respectively; T threshold组i is the temperature threshold set within the group; γ k is the wafer power adjustment coefficient, which is related to the wafer characteristics.

[0113] As an implementation method, the adjustment result of the in-group power optimization is transmitted to the dynamic current distribution module in real time for recalculating the in-group current distribution ratio.

[0114] Generally, the thermoelectric coupling feedback module needs to have a fast response ability to adjust the power distribution in a timely manner when the temperature changes, preventing the occurrence of thermal runaway. In one implementation method, the module samples the temperature of each group and each type of wafer at a fixed time interval (such as 1 ms or shorter), and runs a feedback algorithm for correction.

[0115] To further improve the real-time performance, the module can adopt a distributed computing architecture, that is, each group of wafers independently runs the feedback algorithm and synchronizes data with other groups through a communication interface. This design can not only speed up the feedback speed but also reduce the computational burden of cross-group collaboration.

[0116] The collaborative effect between the thermoelectric coupling feedback module and other modules directly affects the overall performance of the system. Generally, the feedback adjustment result of the module interacts with other modules in the following ways: Dynamic current distribution module: The power adjustment results P 组i and P k of the feedback module are used to update the input parameters of the dynamic current distribution algorithm; Drive control module: After being calculated by the dynamic current distribution module, the adjustment result output by the feedback module is converted into the PWM signal parameters of the drive module for real-time adjustment of the drive current of the wafer; Control core module: The feedback module can upload the temperature data and power adjustment results of each group of wafers to the control core module for system status monitoring and global optimization.

[0117] As an extended design, the thermoelectric coupling feedback module can combine historical data and prediction algorithms to judge the temperature rise trend in advance. For example, the module can predict the temperature at the next moment by analyzing the historical temperature change rate ΔT 组i / Δt of each group of wafers and adjust the power distribution in advance.

[0118] In another implementation, the module supports adaptive feedback parameter optimization. Specifically, the module can dynamically adjust the power adjustment coefficient γ and the threshold T according to external factors such as environmental temperature and input voltage threshold , so as to adapt to different operating conditions.

[0119] The thermoelectric coupling feedback module effectively suppresses the negative impact of temperature rise on system performance through grouped temperature monitoring, inter-group and intra-group power optimization, and real-time feedback control. The design of the module comprehensively considers the connection logic with the dynamic current distribution module and the drive control module, ensuring that the feedback adjustment results can be quickly converted into the actual drive current of the wafer. The above technical solutions disclose in detail the core algorithm, real-time control logic and extended functions of the module, providing a solid guarantee for the stability and security of system operation.

[0120] The drive control module is the execution unit of the multi-wafer series structure control system, which is used to generate accurate drive signals according to the control instructions of the dynamic current distribution module and the thermoelectric coupling feedback module, and realize the dynamic current distribution and real-time power adjustment of multiple groups of wafers. Through the synergistic effect of the PWM signal and the constant current output, the module provides precise current control for each group of wafers to ensure the optical output uniformity and operation stability of the system.

[0121] In this embodiment, the drive control module mainly includes a signal generation unit, a PWM control unit and a constant current drive unit. Based on a multi-channel design, the module can generate independent drive signals for three groups of wafers and different types of wafers within the group respectively to complete the accurate distribution of current.

[0122] Generally, the drive control module generates corresponding PWM signals and constant current outputs according to the inter-group current ratio α 组i and the intra-group current ratio α k provided by the dynamic current distribution module.

[0123] Specifically, the target current I 组i of each group of wafers is determined by the following formula: I 组i =α 组i ·I Where: I 组i is the target current of the i-th group of wafers; α 组i is the current distribution ratio of the i-th group; I is the total current of the system.

[0124] The target current I k of each type of wafer within the group is calculated by the following formula: I k =α k ·I组i Wherein: I k is the target current allocated to the k-th type of wafer; α k is the in-group current allocation ratio.

[0125] In one implementation, the drive control module converts the above target current into the duty cycle of a PWM signal, and the specific relationship is: Wherein: D k is the PWM duty cycle of the k-th type of wafer; I max is the maximum current output supported by the module; D max is the maximum duty cycle of the PWM (usually 100%).

[0126] Generally, the PWM control unit generates an independent PWM signal for each group of wafers according to the calculated duty cycle D k , and smooths it into a DC signal through a filter circuit.

[0127] Specifically, the frequency of the PWM signal needs to be higher than the response frequency of the wafer to avoid optical flicker. For example, for a typical LED wafer, the PWM frequency can be set above 20 kHz. The duty cycle of the PWM signal is updated in real time by the dynamic current allocation module to ensure that the drive current is consistent with the target current.

[0128] As an option, the PWM control unit can also dynamically change the duty cycle of the PWM signal according to the temperature adjustment result of the thermoelectric coupling feedback module to achieve real-time power adjustment. For example, when the temperature of a certain group of wafers rises rapidly, the PWM control unit will automatically reduce the duty cycle of the corresponding wafers to reduce their power output.

[0129] Specifically, the constant current drive unit converts the PWM signal into a stable DC current to directly drive each type of wafer. The constant current drive unit usually adopts a closed-loop control design, including the following main components: Current detection circuit: Measure the output current I s through the sampling resistor R out .

[0130] Feedback control circuit: Compare the target current I k and the actual output current I out in real time, and maintain a constant current by adjusting the drive voltage V drive .

[0131] The calculation formula for the output current is: Wherein: I out is the output current; V R is the voltage across the sampling resistor; R s is the resistance value of the sampling resistor.

[0132] As an improved design, the constant current drive unit can introduce a digital control mode to dynamically adjust the target current I k through the I2C or SPI interface to adapt to different operating conditions.

[0133] Generally, the drive control module needs to have fast real-time response capabilities to meet the control requirements of the dynamic current distribution module and the thermoelectric coupling feedback module.

[0134] In one implementation, the module has a built-in clock interrupt mechanism to update the PWM signal and the constant current output parameters at fixed intervals (such as 1 ms). The update process includes receiving the latest instructions from the control core module, calculating the duty cycle D k and the target current I k and generating the PWM signal and adjusting the output current.

[0135] As an improvement, the module also supports an exception handling function. For example, when the output current I 组i of a certain group of wafers exceeds the set threshold, the module will automatically reduce the PWM duty cycle or cut off the drive current of the corresponding group to prevent system overload.

[0136] The drive control module works closely with the control core module, the dynamic current distribution module, and the thermoelectric coupling feedback module. The specific cooperation methods include: Receiving the target current distribution ratio α 组i and α k from the dynamic current distribution module for generating the PWM signal.

[0137] Receiving the power adjustment result P 组i and P k from the thermoelectric coupling feedback module to adjust the drive current in real time.

[0138] Feeding back the drive status data, including the actual output current I out and the exception alarm signal, to the control core module.

[0139] As an extended design, the drive control module can support the following additional functions: Multi-mode operation: The module can switch the working mode according to the application requirements, such as the low-power mode, the high-brightness mode, etc. In the low-power mode, the duty cycle of the PWM signal will be reduced overall, thereby reducing energy consumption.

[0140] Fault detection: The module has built-in current and temperature detection functions. When overcurrent or overheating of the wafer is detected, it will automatically trigger the protection mechanism and send an alarm signal to the control core module.

[0141] Remote control and monitoring: The module supports wireless communication interfaces (such as Wi-Fi or Bluetooth). Users can remotely adjust the drive parameters or monitor the system status through remote devices.

[0142] Through the coordinated operation of signal generation, PWM control, and constant current drive, the drive control module realizes precise current distribution and power control for the multi-wafer series structure. The module design fully considers the coordination requirements with other control modules, ensuring the real-time performance and stability of the system. The above technical solutions detail the core functions, specific implementations, and expansion capabilities of the module, providing important support for the efficient operation of the system and having good scalability and reproducibility.

[0143] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An internal multi-crystal series high-brightness LED lamp structure, comprising a bracket (1), characterized in that: A lamp cup (2) is mounted on the top of the bracket (1), a circuit board (3) is mounted in the middle of the lamp cup (2), a plurality of chip group structures are connected in series in the middle of the circuit board (3), and a heat dissipation structure is mounted on the bottom of the bracket (1); Each of the chip group structures comprises a chip one (4), a chip two (5) and a chip three (6), and the chip one (4), the chip two (5) and the chip three (6) are connected in series.

2. The internal multi-crystal series high-brightness LED lamp structure according to claim 1, characterized in that: The heat dissipation structure comprises a through hole (7) provided in the middle of the bracket (1) and a heat conducting plate (8) affixed to the bottom of the circuit board (3); heat dissipation fins (9) are also installed at the bottom of the heat conducting plate (8); and a plurality of mutually perpendicular air ducts (10) are provided at the bottom of the bracket (1).

3. The internal multi-crystal series high-brightness LED lamp structure according to claim 1, characterized in that: In each chip set structure, the placement positions of chip one (4), chip two (5), and chip three (6) are all different.

4. The control system of the internal multi-crystal series high-brightness LED lamp structure is characterized by: The internal multi-crystal series high-brightness LED lamp structure applied to any one of claims 1 to 3 comprises: A multi-chip series structure, wherein the multi-chip series structure is composed of multiple groups of chips, each group of chips contains at least three different types of chips, and the various chips are arranged in a staggered manner in the multiple groups of chips to improve the light source mixing uniformity and thermal management performance; A data acquisition module, used to collect the forward voltage, total current and temperature data of each group of chips in the multi-chip series structure, and perform group processing on the data; A control core module, connected to the data acquisition module, for performing inter-group power allocation and intra-group current optimization based on the voltage, total current and temperature data; A dynamic current distribution module, connected to the control core module, for dynamically adjusting the driving current of each group and each type of chip according to the inter-group power distribution and the intra-group current optimization results; Thermoelectric coupling feedback module, used to monitor the chip temperature in real time and adjust the power allocation ratio of each group of chips based on the temperature rise control logic; The drive control module is connected to the dynamic current distribution module and the thermoelectric coupling feedback module, and is used to generate a corresponding PWM signal and a constant current output signal according to the drive current to drive each chip in the multi-chip series structure.

5. The control system of the internal multi-crystal series high-brightness LED lamp structure according to claim 4, characterized in that: The chips of the multi-chip serial structure are arranged in the following staggered manner: Wafer one (4) is arranged at the first position of the first group, the second position of the second group, and the third position of the third group; wafer three (6) is arranged at the second position of the first group, the third position of the second group, and the first position of the third group; wafer two (5) is arranged at the third position of the first group, the first position of the second group, and the second position of the third group.

6. The control system of the internal multi-crystal series high-brightness LED lamp structure according to claim 4, characterized in that: The data acquisition module comprises: A multi-channel voltage sensor for collecting the forward voltage of each wafer and calculating the total voltage of each group of wafers; A current sensor is used to collect the total current of the multi-chip series structure; The temperature sensor is used to collect the real-time temperature of each chip and calculate the average temperature of each group of chips through grouping logic.

7. The control system of the internal multi-crystal series high-brightness LED lamp structure according to claim 4, characterized in that: The control core module performs the following steps: Calculating a target power allocation ratio for each group based on the voltage and power of each group of chips provided by the data acquisition module; Based on the forward voltage and temperature data of each chip, the current distribution ratio of each chip is calculated; The calculation result is transmitted to the dynamic current distribution module to achieve optimized control of the driving current.

8. The control system of the internal multi-crystal series high-brightness LED lamp structure according to claim 4, characterized in that: The dynamic current distribution module comprises: An inter-group current distribution unit, used for calculating a target current of each group of chips according to a target power distribution ratio of each group of chips; An intra-group current distribution unit, used for calculating a target current for each wafer in the group based on a forward voltage and a target power of each wafer; An output control unit is used to transmit the calculated target current to the drive control module.

9. The control system of the internal multi-crystal series high-brightness LED lamp structure according to claim 4, characterized in that: The thermoelectric coupling feedback module operates based on the following logic: When the average temperature of a group of chips exceeds a set threshold, the power output of the group of chips is reduced by lowering the target power allocation ratio of the group of chips; When the temperature of a certain chip exceeds the safety range within the group, the power distribution ratio within the group is adjusted by preferentially reducing the power output of the chip; The input of the dynamic current distribution module is updated by the power adjustment result fed back in real time.

10. The control system of the internal multi-crystal series high-brightness LED lamp structure according to claim 4, characterized in that: The drive control module comprises: A PWM signal generating unit, used for generating a multi-channel PWM signal according to a target current ratio provided by a dynamic current distribution module; A constant current driving unit, used for converting the target current into a stable direct current output according to the PWM signal; The abnormality detection unit is used to detect the output current and chip temperature in real time, and automatically adjust or cut off the drive signal when an abnormal state is detected.