Optimal process parameter prediction method, system and equipment and storage medium
By applying machine learning models in semiconductor manufacturing and training process parameter prediction models based on semiconductor performance test data, the problem of experience and time-consuming dependence on process parameter optimization in the existing technology is solved, and efficient and accurate optimal process parameter prediction is achieved.
Patent Information
- Application Number
- CN202510239028.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2025-06-20
AI Technical Summary
The prior art relies on rules of thumb when looking for the best process parameters in wafer testing, which takes time and is difficult to establish quantitative relationships. Especially after the CMOS manufacturing process is complicated, the influencing factors are diverse, resulting in low optimization efficiency.
Using machine learning models, training based on semiconductor performance test data, a process parameter prediction model is established, and the optimal process parameter combination that meets the target performance requirements is predicted through algorithms such as decision trees and random forests, and its effectiveness is verified through TCAD simulation.
It significantly improves the efficiency of finding optimal process parameters, shortens the R&D cycle, can explore the optimal process parameters combination that meets the target performance conditions in a short time, and improves the accuracy of prediction.
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Figure CN120180285A_ABST
Abstract
Description
Background Art
[0002] Wafer Acceptance Test (WAT) is mainly used to monitor and evaluate the quality and stability of the wafer manufacturing process. Its purpose is to measure the electrical parameters of specific test structures under different process conditions in the die sorting test to ensure that the circuits on the wafer meet the expected electrical performance.
[0003] The electrical performance values obtained from wafer acceptance tests (such as linear threshold voltage Vtlin, linear region drain current Idlin, saturation region drain current Idsat, off-state leakage current Ioff, and drain-source breakdown voltage BVDS) are usually related to ion implantation and heat treatment in the front-end-of-line (FEOL). Usually, a large number of batch experiments or Technology Computer-Aided Design (TCAD) simulations are required to find the optimal process parameters for achieving the target electrical performance in wafer acceptance tests. However, from a physical intuitive perspective, it is difficult to establish a quantitative relationship between process parameters and wafer acceptance test data through these manual search methods. Traditional methods usually optimize process parameters based on experience, and it is difficult to ensure the degree of optimization of the found process parameters. In addition, traditional methods are very time-consuming.
[0004] As the CMOS (Complementary Metal-Oxide–Semiconductor) manufacturing process becomes more and more complex, there are more and more factors affecting the results of wafer acceptance tests, such as well-channel implantation, well threshold voltage (VT) implantation, lightly doped drain (LDD) pocket implantation, and the process parameters of various heat treatment processes. This brings a problem that the exploration of the optimal process parameters overly relies on experience and is time-consuming.
[0005] It should be noted that the information disclosed in the above background art section is only used to enhance the understanding of the background of the present application, and thus may include information that does not constitute the prior art known to those of ordinary skill in the art. Summary of the Invention
[0006] Aiming at the problems in the prior art, the purpose of the present application is to provide a method, system, device, and storage medium for predicting optimal process parameters, which abandons the traditional trial-and-error experiment method or simulation calculation method based on experience, improves the efficiency of finding optimal process parameters, and significantly shortens the R & D cycle.
[0007] The embodiment of the present application provides a method for predicting optimal process parameters, including the following steps:
[0008] Collect semiconductor performance test data, where the semiconductor performance test data includes the process parameters of the test piece and the performance data of the test piece;
[0009] Train a machine learning model based on the semiconductor performance test data to obtain a trained process parameter prediction model. The process parameter prediction model is used to predict the performance requirements that can be met by various process parameter combinations and select the process parameter combinations that can meet specific performance requirements;
[0010] Set the target performance requirements, and obtain the optimal process parameter combination that meets the target performance requirements based on the process parameter prediction model;
[0011] Verify whether the optimal process parameter combination meets the target performance requirements.
[0012] In some embodiments, the semiconductor performance test includes wafer acceptance test and / or die saw test;
[0013] The performance data includes electrical performance test results and / or functional test results.
[0014] In some embodiments, the machine learning model is a decision tree, a random forest, or a gradient boosting decision tree.
[0015] In some embodiments, training the machine learning model based on the semiconductor performance test data includes the following steps:
[0016] Preprocess the semiconductor performance test data using a preset preprocessing method;
[0017] Select specific types of feature data and the corresponding performance data from the preprocessed semiconductor performance test data;
[0018] Train the machine learning model based on the specific types of feature data and the corresponding performance data.
[0019] In some embodiments, after training the machine learning model based on the specific types of feature data and the corresponding performance data, the following steps are further included for feature dimensionality reduction:
[0020] Calculate the feature importance of each feature type, and perform feature dimensionality reduction according to the feature importance; and / or calculate the Pearson correlation coefficient between every two feature types, and perform feature dimensionality reduction according to the Pearson correlation coefficient.
[0021] In some embodiments, the machine learning model is a random forest. When training the machine learning model, use random sampling with replacement to obtain training data, and for each new decision tree, select a random subset of all provided features for the nodes of the tree;
[0022] When training a machine learning model, the optimal number of decision trees in a random forest is determined based on the coefficient of determination, and the optimal number of decision trees is the number of trees when the value and stability of the coefficient of determination reach the preset coefficient requirements.
[0023] In some embodiments, verifying whether the optimal process parameter combination meets the target performance requirements includes the following steps:
[0024] Use technical computer-aided design to simulate and calculate the performance results that can be obtained when using the optimal process parameter combination, and determine whether the performance results meet the target performance requirements.
[0025] The embodiment of the present application also provides an optimal process parameter prediction system for implementing the optimal process parameter prediction method, and the system includes:
[0026] A data acquisition module for acquiring semiconductor performance test data, where the semiconductor performance test data includes the process parameters of the test piece and the performance data of the test piece;
[0027] A model training module for training a machine learning model based on the semiconductor performance test data to obtain a trained process parameter prediction model, where the process parameter prediction model is used to predict the performance requirements that various process parameter combinations can meet, and select a process parameter combination that can meet specific performance requirements;
[0028] A parameter prediction module for setting target performance requirements and obtaining the optimal process parameter combination that meets the target performance requirements based on the process parameter prediction model;
[0029] A parameter verification module for verifying whether the optimal process parameter combination meets the target performance requirements.
[0030] The embodiment of the present application also provides an optimal process parameter prediction device, including:
[0031] A processor;
[0032] A memory, in which executable instructions of the processor are stored;
[0033] Wherein, the processor is configured to execute the steps of the optimal process parameter prediction method by executing the executable instructions.
[0034] The embodiment of the present application also provides a computer-readable storage medium for storing a program, and when the program is executed by a processor, the steps of the optimal process parameter prediction method are implemented.
[0035] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure.
[0036] The prediction method, system, device and storage medium for the optimal process parameters of this application have the following beneficial effects:
[0037] This application abandons the traditional trial-and-error experiment method or simulation calculation method based on experience, and uses a machine learning model to find the optimal process parameter combination. It trains the machine learning model based on semiconductor performance test data, improves the efficiency of finding the optimal process parameters, and can explore the optimal process parameter combination that can meet the target performance conditions in a short time, significantly shortening the R & D cycle. This method can perform multi-objective simultaneous prediction, and after finding the optimal process parameter combination, it can verify that the optimal process parameter combination can meet the target performance conditions, improving the accuracy of predicting the optimal process parameter combination. Description of the Drawings
[0038] The drawings here are incorporated into the specification and constitute a part of this specification, showing the embodiments in line with the present invention, and are used together with the specification to explain the principles of the present invention. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts.
[0039] Figure 1 is a flowchart of the prediction method for the optimal process parameters in an embodiment of this application;
[0040] Figure 2 is a schematic structural diagram of a random forest in an embodiment of this application;
[0041] Figure 3 is a schematic diagram of the number of R2-trees in an embodiment of this application;
[0042] Figure 4 is a schematic diagram of feature importance in an embodiment of this application;
[0043] Figure 5 is a schematic diagram of the Pearson correlation coefficient between features in an embodiment of this application;
[0044] Figure 6 is a schematic diagram of the comparison between the predicted Vtlin and the true value of a random forest in an embodiment of this application;
[0045] Figure 7 is a schematic diagram of the predicted results of Vtlin for all process parameter combinations in an embodiment of this application;
[0046] Figure 8 is a schematic structural diagram of the optimal process parameter prediction system in an embodiment of this application;
[0047] Figure 9It is a schematic structural diagram of the optimal process parameter prediction device according to an embodiment of the present application;
[0048] Figure 10 It is a schematic structural diagram of the computer-readable storage medium according to an embodiment of the present application. Detailed implementation manners
[0049] Now, example embodiments will be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.
[0050] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.
[0051] The flowcharts shown in the accompanying drawings are only illustrative and do not necessarily include all steps. For example, some steps can be decomposed, and some steps can be combined or partially combined. Therefore, the actual execution order may be changed according to the actual situation.
[0052] Nowadays, data science has been gradually popularized. This is essentially a big data problem, aiming to analyze a large amount of data to provide new insights for the research and development of the research system. Machine learning refers to the concept that when a computer obtains sufficient data, it can learn the internal laws / principals by itself. Therefore, machine learning can summarize patterns from a statistical perspective and establish the relationship between process conditions and wafer acceptance test data in a short time. This provides a better method for predicting the optimal process parameters of the target electrical performance. The present invention uses the existing semiconductor performance test data and machine learning models to summarize patterns, providing a better method for predicting the optimal process parameter combination of the target performance.
[0053] As Figure 1 shown, an embodiment of the present application provides an optimal process parameter prediction method, including the following steps:
[0054] S100: Collect semiconductor performance test data, where the semiconductor performance test data includes the process parameters of the device under test and the performance data of the device under test; the process parameters are the actual process parameters adopted in the production process of the device under test, and the performance data is the performance test result obtained through testing, such as the test value of the electrical performance parameter linear threshold voltage Vtlin, the test value of the drain current Idlin in the linear region, etc.;
[0055] S200: Train a machine learning model based on the semiconductor performance test data to obtain a trained process parameter prediction model. The process parameter prediction model is used to predict the performance requirements that can be met by various process parameter combinations and select the process parameter combinations that can meet specific performance requirements;
[0056] S300: Set the target performance requirements and obtain the best process parameter combination that meets the target performance requirements based on the process parameter prediction model; the target performance requirements include the value ranges of one or more performance parameters. For example, the target performance requirements may only include the condition of the value range of the linear threshold voltage Vtlin, or may include both the value range of the linear threshold voltage Vtlin and the value range of the drain current Idlin in the linear region, or include the value ranges of more performance parameters at the same time, etc.; the process parameter combination includes the combination of characteristic values of multiple characteristic types, and each characteristic type corresponds to a process parameter type. For example, the process parameter combination includes the combination of multiple process parameters such as ion implantation energy, ion implantation dose, well depth, etc.;
[0057] S400: Verify whether the best process parameter combination meets the target performance requirements.
[0058] If it is verified that the best process parameter combination can meet the target performance requirements, then use the best process parameter combination in the production of semiconductor products. If it is verified that the best process parameter combination does not meet the target performance requirements, it may be that the prediction accuracy of the model does not meet the requirements. After further optimizing and training the process parameter prediction model, re-predict again.
[0059] In the best process parameter prediction method of this application, the traditional trial-and-error experiment method or simulation calculation method based on experience is abandoned. The best process parameter combination is found based on a machine learning model, and the machine learning model is trained based on semiconductor performance test data, improving the efficiency of finding the best process parameter combination. It can explore the best process parameter combination that can meet the target performance conditions in a short time, significantly shortening the R & D cycle. This method can perform multi-objective simultaneous prediction, and after finding the best process parameter combination, verify whether the best process parameter combination can meet the target performance conditions, improving the accuracy of predicting the best process parameter combination.
[0060] In this embodiment, the semiconductor performance test includes wafer acceptance test and / or die sorting test. The wafer acceptance test is mainly used to monitor and evaluate the quality and stability of the wafer manufacturing process. By measuring the electrical performance values of specific structures under different process conditions, it is ensured that the circuits on the wafer meet the expected electrical performance. The electrical performance includes, for example: linear threshold voltage Vtlin, linear region drain current Idlin, saturation region drain current Idsat, off-state leakage current Ioff, and drain-source breakdown voltage BVDS, etc. The die sorting test is a comprehensive performance test for individual chips (small pieces cut from the wafer), covering multiple aspects such as function, electrical performance, and reliability, to ensure that the chips can meet the actual application requirements. For example, it tests whether the functions of the chips are normal at different operating frequencies. The wafer acceptance test lays the foundation for the die sorting test. If serious process problems are found in the wafer acceptance test, the die sorting test may not be necessary. The die sorting test is a supplement to the wafer acceptance test, which more carefully detects the individual differences of the chips. The performance data includes electrical performance test results and / or function test results. When the performance data includes electrical performance test results. When the semiconductor performance test includes the die sorting test, the performance data may include electrical performance test results and function test results.
[0061] In this embodiment, the machine learning model is a decision tree, a random forest, or a gradient boosting decision tree (GBDT). In other alternative embodiments, the machine learning model can also be a neural network or other types of artificial intelligence models. Here, taking the machine learning model as a random forest as an example, the training and use process of this machine learning model is specifically described. A random forest consists of multiple decision trees, and each tree is trained based on different bootstrap sampling data sets and randomly selected feature subsets. The final prediction result is obtained by integrating the prediction results of all decision trees. Random forests are very suitable for dealing with problems of non-linear relationships and conditional dependencies. When training a random forest, multi-objective simultaneous training can be carried out to enable the trained model to be applicable to multi-objective simultaneous prediction. For example, the target performance requirements are simultaneously set to include the target value range of the linear threshold voltage Vtlin, the target range of the linear region drain current Idlin, the target value range of the saturation region drain current Idsat, the value range of the off-state leakage current Ioff, and the target value range of the drain-source breakdown voltage BVDS. Figure 2 is a schematic diagram of the architecture of a random forest according to an embodiment of the present application, where Well VT Implantation dose>3e12cm-3 means that the well threshold voltage implantation dose is greater than 3e12 ions per cubic centimeter, and LDD implantation energy>5keV means that the lightly doped drain region implantation energy is greater than 5 keV.
[0062] In this embodiment, in step S100, semiconductor performance test data is collected from various sources. Step S200: Training a machine learning model based on the semiconductor performance test data, including the following steps:
[0063] Preprocess the semiconductor performance test data using a preset preprocessing method;
[0064] The preset preprocessing method includes, for example, format unification, handling missing values, outliers, etc., to ensure data quality. Format unification means separating the semiconductor performance test data into multiple sample data according to each test, unifying the format and checking for missing values / outliers for each sample data. When there are missing values, default values or average values are used to replace them. When there are outliers (e.g., much higher or much lower than the average value), the outliers are replaced with default values or average values;
[0065] Select specific types of feature data and the corresponding performance data from the preprocessed semiconductor performance test data; specifically, determine the feature types to be used. For example, select width, length, ion implantation energy, well channel depth, etc. as the process parameter feature types to be used. For each sample data, the process parameter values corresponding to the feature types are used as feature data. Select a specific performance category as the target performance category. For example, the linear threshold voltage Vtlin is used as the specific performance category, or multiple specific performance categories are selected, and the performance test results corresponding to these performance categories in the sample data are used as performance data;
[0066] Split the semiconductor performance test data into a training set and a test set, usually in a ratio of 80 / 20 or 70 / 30, and a validation set can be selected for model parameter adjustment;
[0067] Train the machine learning model based on the specific types of feature data and the corresponding performance data. During training, the training set is used to optimize the model parameters of the machine learning model to obtain the best model parameters. The trained process parameter prediction model is used to predict the performance parameters of various process parameter combinations and select the best process parameter combination that can meet the target performance conditions according to the target performance conditions.
[0068] After model training, use the test set, metrics such as mean squared error (MSE), coefficient of determination (R2), etc., and the model prediction results to evaluate the model performance. The calculation formulas for mean squared error and coefficient of determination are as follows:
[0069]
[0070] where N represents the number of test set samples, and y represents the model prediction result, Represents the true result. Here, the model prediction result represents the performance parameter value corresponding to the process parameter combination adopted by the test set sample, and the true result represents the true performance parameter value in the test set sample.
[0071] In this embodiment, when training the machine learning model, random sampling with replacement is used to obtain the training data, and for each new decision tree, a random subset of all provided features is selected for the nodes of the tree. When training the machine learning model, the optimal number of decision trees in the random forest is determined based on the coefficient of determination. The optimal number of decision trees is the number of trees when the value of the coefficient of determination and the stability reach the preset coefficient requirements. Generally speaking, the optimal number of decision trees is the number of trees corresponding to when the R2 value reaches a relatively high level and tends to be stable. Selecting this number of decision trees can avoid unnecessary waste of computing resources and increase in model complexity while ensuring the model performance.
[0072] Figure 3 Is a schematic diagram of the R2 - number of trees in an embodiment of the present application. The R2 coefficient is a statistic used to evaluate the goodness of fit of the random forest model. It measures the degree of interpretation of the model for the observed data, and its value range is between 0 and 1. The number of trees is the number of decision trees included in the random forest. In the random forest model, the graph of the relationship between R2 and the number of trees reflects the change in the performance (measured by R2) of the random forest model as the number of decision trees increases. By observing the graph of the relationship between R2 and the number of trees, the number of decision trees that makes the model performance reach the optimal can be found. As Figure 3 shown, during the process of increasing the number of decision trees, the R2 value continues to rise and there is no sign of overfitting, indicating that the trained model has good generalization ability and can accurately predict new data.
[0073] Furthermore, after the model training, the model is further optimized according to the evaluation results, such as adjusting parameters, selecting different models, and performing feature dimensionality reduction through feature importance analysis and / or Pearson correlation coefficient analysis.
[0074] In this embodiment, in step S200, after training the machine learning model based on the specific type of feature data and the corresponding performance data, the following steps are further included for feature dimensionality reduction:
[0075] Calculate the feature importance of each feature type, and perform feature dimensionality reduction according to the feature importance; and / or, calculate the Pearson correlation coefficient between every two feature types, and perform feature dimensionality reduction according to the Pearson correlation coefficient.
[0076] The formula for calculating the feature importance is:
[0077]
[0078] where n is the number of decision trees, and x j represents the condition (feature) in the j-th decision tree, and is the importance of the condition in the i-th decision tree.
[0079] Figure 4 is a schematic diagram of feature importance according to an embodiment of the present application. Combining Figure 4 it can be seen that width, length, well vertical threshold voltage, and light-doped drain structure pocket implantation parameter 1 have relatively high feature importance and are retained, while other parameters with relatively low feature importance can be selectively retained. For example, a feature importance score threshold is set. When the feature importance score of a feature type is greater than the score threshold, that feature type is retained; otherwise, that feature type is removed.
[0080] By calculating the feature importance, the importance scores of each feature type are obtained.
[0081] The Pearson correlation coefficient P is expressed as:
[0082]
[0083] where x and y represent different conditions (features).
[0084] Figure 5 is a schematic diagram of the Pearson correlation coefficient between features according to an embodiment of the present application. A Pearson correlation coefficient threshold between features can be set. When the Pearson correlation coefficient between two features is greater than the coefficient threshold, it indicates that the correlation degree between these two feature types is very high. One of them can be retained, and optionally, the feature with a lower importance degree score between the two feature types can be removed, or the feature type with more features whose correlation coefficient with it is greater than the coefficient threshold can be removed.
[0085] In this embodiment, the step S400: verifying whether the optimal process parameter combination meets the target performance requirements includes the following steps:
[0086] Using Technology Computer-Aided Design (TCAD) to simulate and calculate the performance results that can be obtained when using the optimal process parameter combination, and determining whether the performance results meet the target performance requirements.
[0087] The R2 coefficient is a direct evaluation index of the regression model. The larger the value of the R2 coefficient, the better the prediction performance of the algorithm, and its optimal value is 1. The smaller the values of MSE and root mean square error (RMSE), the better the prediction performance of the model. The MSE and R2 of the prediction of Vtlin by the model trained by the method of the present application are respectively and 0.94, indicating good prediction accuracy.Figure 6 It is a schematic diagram comparing the predicted Vtlin of the random forest with the true value in an embodiment of the present application. It can be seen from Figure 6 that the Vtlin predicted by the model of the present invention is very close to the real data, and the prediction accuracy of the model is high.
[0088] Figure 7 It is a schematic diagram of the predicted results of Vtlin for all process parameter combinations in an embodiment of the present application. The target Vtlin of the studied 1.5V PMOS (P-channel Metal-Oxide-Semiconductor) is 0.52V. Taking the predicted Vtlin condition with the structure ID of 782 as an example for TCAD verification below. The Vtlin predicted by the random forest is 0.52V, while the Vtlin calculated by TCAD simulation is 0.50V, indicating that the prediction accuracy of the model is very high.
[0089] In different embodiments, the present invention is not limited to the CMOS system, but also applicable to other systems, such as the more complex Bipolar-CMOS-DMOS (BCD) technology. Optionally, by integrating more advanced federated learning, the overall parameter update can be coordinated from the aggregation point without sharing data between multiple clients, so as to meet the condition optimization requirements of the entire department or even the entire company through a set of model parameters.
[0090] As Figure 8 shown, an embodiment of the present application also provides an optimal process parameter prediction system for implementing the optimal process parameter prediction method, and the system includes:
[0091] A data acquisition module M100 for acquiring semiconductor performance test data, where the semiconductor performance test data includes the process parameters of the test piece and the performance data of the test piece;
[0092] A model training module M200 for training a machine learning model based on the semiconductor performance test data to obtain a trained process parameter prediction model, where the process parameter prediction model is used to predict the performance requirements that various process parameter combinations can meet, and select the process parameter combinations that can meet specific performance requirements;
[0093] A parameter prediction module M300 for setting target performance requirements and obtaining the optimal process parameter combination that meets the target performance requirements based on the process parameter prediction model;
[0094] A parameter verification module M400 for verifying whether the optimal process parameter combination meets the target performance requirements.
[0095] In the optimal process parameter prediction system of the present application, the functions of each module can be implemented by the specific implementation manners of the optimal process parameter prediction method described above, which will not be elaborated herein.
[0096] In the optimal process parameter prediction system of the present application, the traditional trial-and-error experiment method or simulation calculation method based on experience is abandoned. Instead, a machine learning model is used to find the optimal process parameter combination, and the machine learning model is trained based on semiconductor performance test data to improve the efficiency of finding the optimal process parameters. It can explore the optimal process parameter combination that can meet the target performance conditions within a short time, significantly shortening the R & D cycle. This method can perform multi-objective simultaneous prediction, and after finding the optimal process parameter combination, it can verify whether the optimal process parameter combination can meet the target performance conditions, improving the accuracy of predicting the optimal process parameter combination.
[0097] An embodiment of the present application also provides an optimal process parameter prediction device, including a processor; a memory storing executable instructions of the processor; wherein, the processor is configured to execute the steps of the optimal process parameter prediction method via executing the executable instructions.
[0098] Those skilled in the art can understand that various aspects of the present application can be implemented as a system, a method, or a program product. Therefore, various aspects of the present application can be specifically implemented in the following forms, namely: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation combining hardware and software aspects, which can be collectively referred to as "circuit", "module", or "platform" here.
[0099] Next, refer to Figure 9 to describe the electronic device 600 according to this embodiment of the present application. Figure 9 The electronic device 600 shown is only an example and should not bring any limitations to the functions and usage scope of the embodiments of the present application.
[0100] As Figure 9 shown, the electronic device 600 is presented in the form of a general-purpose computing device. The components of the electronic device 600 may include but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different system components (including the storage unit 620 and the processing unit 610), a display unit 640, etc.
[0101] Among them, the storage unit stores program codes, and the program codes can be executed by the processing unit 610, so that the processing unit 610 executes the steps according to various exemplary embodiments of the present application described in the above optimal process parameter prediction method part of this specification. For example, the processing unit 610 can execute the steps as Figure 1 shown in
[0102] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) 6201 and / or a cache storage unit 6202, and may further include a read-only storage unit (ROM) 6203.
[0103] The storage unit 620 may further include a program / utilities 6204 having a set (at least one) of program modules 6205. Such program modules 6205 include, but are not limited to: an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment.
[0104] The bus 630 may represent one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus structures.
[0105] The electronic device 600 may also communicate with one or more external devices 700 (such as a keyboard, a pointing device, a Bluetooth device, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or may communicate with any device that enables the electronic device 600 to communicate with one or more other computing devices (such as a router, a modem, etc.). Such communication may be carried out through an input / output (I / O) interface 650. Moreover, the electronic device 600 may also communicate with one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 through the bus 630. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.
[0106] In the optimal process parameter prediction device, when the program in the memory is executed by the processor, the steps of the optimal process parameter prediction method are implemented. Therefore, the device can also obtain the technical effects of the above optimal process parameter prediction method.
[0107] The embodiments of the present application also provide a computer-readable storage medium for storing a program, which when executed by a processor implements the steps of the optimal process parameter prediction method described above. In some possible implementation manners, various aspects of the present application can also be implemented in the form of a program product, which includes program code. When the program product is executed on a terminal device, the program code is used to cause the terminal device to execute the steps according to various exemplary embodiments of the present application described in the optimal process parameter prediction method section above in this specification.
[0108] Referring Figure 10 As shown, a program product 800 for implementing the above method according to an embodiment of the present application is described. It can be a portable compact disc read-only memory (CD-ROM) and includes program code, and can be executed on a terminal device, such as a personal computer. However, the program product of the present application is not limited thereto. In this document, the readable storage medium can be any tangible medium that contains or stores a program, and this program can be used by or in combination with an instruction execution system, apparatus, or device.
[0109] The program product can adopt any combination of one or more readable media. The readable media can be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples (non-exhaustive list) of the readable storage medium include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.
[0110] The computer-readable storage medium can include a data signal propagated in a baseband or as part of a carrier wave, which carries the readable program code. Such a propagated data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The readable storage medium can also be any readable medium other than the readable storage medium, and this readable medium can send, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium can be transmitted by any appropriate medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination of the above.
[0111] Program code for performing the operations of this application can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc., and also including conventional procedural programming languages such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, executed as a stand-alone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user's computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or, it can be connected to an external computing device (e.g., by connecting through the Internet using an Internet service provider).
[0112] When the program in the computer storage medium is executed by a processor, the steps of the optimal process parameter prediction method are implemented. Therefore, the computer storage medium can also achieve the technical effects of the above optimal process parameter prediction method.
[0113] The above content is a further detailed description of this application in combination with specific preferred embodiments. It cannot be determined that the specific implementation of this application is only limited to these descriptions. For those of ordinary skill in the technical field to which this application belongs, without departing from the concept of this application, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of this application.
Claims
1. A method for predicting optimal process parameters, characterized in that: The steps include: Collecting semiconductor performance test data, wherein the semiconductor performance test data includes process parameters of the tested device and performance data of the tested device; Training a machine learning model based on the semiconductor performance test data to obtain a trained process parameter prediction model, wherein the process parameter prediction model is used to predict performance requirements that can be met by various process parameter combinations, and select a process parameter combination that can meet specific performance requirements; Setting target performance requirements, and obtaining an optimal process parameter combination that meets the target performance requirements based on the process parameter prediction model; Verify whether the optimal process parameter combination meets the target performance requirements.
2. The optimal process parameter prediction method according to claim 1, characterized in that: The semiconductor performance test includes wafer acceptance test and / or dicing test; The performance data includes electrical performance test results and / or functional test results.
3. The optimal process parameter prediction method according to claim 1, characterized in that: The machine learning model is a decision tree, a random forest, or a gradient boosted decision tree.
4. The optimal process parameter prediction method according to claim 1, characterized in that: Training a machine learning model based on the semiconductor performance test data includes the following steps: Preprocessing the semiconductor performance test data using a preset preprocessing method; Selecting a specific type of feature data and corresponding performance data from the preprocessed semiconductor performance test data; The machine learning model is trained based on the feature data of the specific type and the corresponding performance data.
5. The optimal process parameter prediction method according to claim 4, characterized in that: After training the machine learning model based on the feature data of the specific type and the corresponding performance data, the method further includes performing feature dimension reduction by the following steps: Calculate the feature importance of each feature type, and perform feature dimensionality reduction according to the feature importance; and / or calculate the Pearson correlation coefficient between every two feature types, and perform feature dimensionality reduction according to the Pearson correlation coefficient.
6. The optimal process parameter prediction method according to claim 1, characterized in that: The machine learning model is a random forest. When training the machine learning model, random sampling with replacement is used to obtain training data, and for each new decision tree, a random subset of all provided features is selected for the nodes of the tree; When training a machine learning model, the optimal number of decision trees in the random forest is determined based on the determination coefficient, where the optimal number of decision trees is the number of trees when the value and stability of the determination coefficient meet the preset coefficient requirements.
7. The optimal process parameter prediction method according to claim 1, characterized in that: Verifying whether the optimal process parameter combination meets the target performance requirements includes the following steps: Computer-aided design technology is used to simulate and calculate the performance results that can be obtained when the optimal process parameter combination is used to determine whether the performance results meet the target performance requirements.
8. An optimal process parameter prediction system, characterized in that: For implementing the optimal process parameter prediction method according to any one of claims 1 to 7, the system comprises: A data acquisition module, used for acquiring semiconductor performance test data, wherein the semiconductor performance test data includes process parameters of the tested device and performance data of the tested device; A model training module, used for training a machine learning model based on the semiconductor performance test data to obtain a trained process parameter prediction model, wherein the process parameter prediction model is used to predict performance requirements that can be met by various process parameter combinations and select a process parameter combination that can meet specific performance requirements; A parameter prediction module is used to set target performance requirements and obtain the best process parameter combination that meets the target performance requirements based on the process parameter prediction model; The parameter verification module is used to verify whether the optimal process parameter combination meets the target performance requirements.
9. An optimal process parameter prediction device, characterized in that: include: processor; a memory storing executable instructions of the processor; The processor is configured to execute the steps of the optimal process parameter prediction method according to any one of claims 1 to 7 by executing the executable instructions.
10. A computer-readable storage medium for storing a program, characterized in that: When the program is executed by a processor, the steps of the optimal process parameter prediction method according to any one of claims 1 to 7 are implemented.
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