Method for manufacturing substrate, substrate, display module and electronic device

Abstract

Embodiments of the present application provide a substrate manufacturing method, a substrate, a display module and an electronic device, and relate to the display field, to solve the problem of complicated process and high cost when forming vias with different depths in the substrate. The substrate manufacturing method comprises: forming a photoresist on the side of the functional film layer away from the substrate; forming a first opening and a groove in the photoresist, the first opening penetrating through the photoresist, and the groove not penetrating through the photoresist; etching the functional film layer and the photoresist to form a first via at the position corresponding to the first opening in the functional film layer and a second via at the position corresponding to the groove, the depth of the first via being greater than the depth of the second via; and stripping the photoresist.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a method for manufacturing a substrate, a substrate, a display module, and an electronic device. Background Technology

[0002] The display module includes a substrate, which includes functional film layers, such as an insulating layer. Typically, vias of different depths are set in the functional film layers to achieve different functions, but currently, the process of forming such vias of varying depths is quite complicated and costly. Summary of the Invention

[0003] In view of this, embodiments of this application provide a method for manufacturing a substrate, a substrate, a display module, and an electronic device to solve the problem of cumbersome processes and high costs when forming vias of different depths in a substrate.

[0004] In a first aspect, embodiments of this application provide a method for fabricating a substrate, comprising: forming a photoresist on the side of a functional film layer facing away from the substrate; forming a first opening and a groove in the photoresist, wherein the first opening penetrates the photoresist and the groove does not penetrate the photoresist; etching the functional film layer and the photoresist to form a first via at a position corresponding to the first opening and a second via at a position corresponding to the groove in the functional film layer, wherein the depth of the first via is greater than the depth of the second via; and stripping the photoresist.

[0005] Based on the above manufacturing method, when processing the photoresist before etching, the photoresist at both the first position (the position corresponding to the first via) and the second position (the position corresponding to the second via) is not completely removed. Instead, only the photoresist at the first position and a portion of the photoresist at the second position are removed. Thus, during subsequent etching, because the photoresist at the first position is completely removed, the functional film layer at that position is exposed. Therefore, the etching solution at the first position reacts directly with the functional film layer, etching a via at that position. However, at the second position, because some photoresist thickness remains, the etching solution must first react with the remaining photoresist at the second position to remove it before further reacting with the functional film layer to form a via within it. Because the photoresist at the second position occupies a certain etching depth, the second via ultimately formed in the functional film layer at the second position is shallower, resulting in a depth difference compared to the first via ultimately formed in the functional film layer at the first position.

[0006] Using the manufacturing method provided in the embodiments of this application, vias of different depths can be formed in the substrate in only one round of exposure, etching and photoresist stripping, which greatly simplifies the process and helps to shorten the process cycle and reduce the process cost.

[0007] In one feasible implementation, the process of forming a first opening and a groove in the photoresist includes: exposing the photoresist using a mask, the mask including a first region and a second region, the first region and the second region having different transmittances; developing the photoresist to form a first opening at a position corresponding to the first region and a groove at a position corresponding to the second region in the photoresist.

[0008] The photomask has different transmittance at different positions, which can make the photoresist exposed to different degrees at different positions. This means that during subsequent development, the thickness of the photoresist that the developer can remove at different positions will be different, thus forming a first opening that penetrates the photoresist and a groove that does not penetrate the photoresist at different positions.

[0009] This method is based on the design of different transmittance of the mask in different areas. It can complete the patterning of all areas with only one exposure and one mask. First, it can reduce the number of masks used and reduce the process cost. Second, by adjusting the transmittance of the mask at different positions, the photoresist thickness at the groove can be adjusted, thereby allowing for more precise control of the depth of the second via.

[0010] In one feasible implementation, the photoresist includes a positive photoresist material, with the transmittance of the first region being greater than that of the second region. Since the portion of the positive photoresist material exposed to light dissolves in the developer, while the portion not exposed to light does not, for positive photoresist materials, the lower the transmittance in the mask, the lower the light intensity received by the photoresist material, resulting in less dissolution in the developer during subsequent development. Therefore, when the photoresist includes a positive photoresist material, by setting a lower transmittance in the second region of the mask, the light intensity received by the photoresist at the second position can be reduced, ensuring that only a portion of the photoresist at the second position dissolves in the developer. This guarantees that a certain thickness of photoresist material remains at the second position after development, effectively ensuring that a non-penetrating groove can be formed at the second position.

[0011] Alternatively, the photoresist may include a negative photoresist material, where the transmittance of the first region is lower than that of the second region. Since the portion of the negative photoresist material exposed to light will not dissolve in the developer, while the portion not exposed to light will, for negative photoresist materials, the higher the transmittance in the mask, the greater the light intensity received by the negative photoresist material, resulting in less dissolution in the developer during subsequent development. Therefore, when the photoresist includes a negative photoresist material, by setting a higher transmittance in the second region of the mask, the light intensity received by the photoresist at the second position can be increased, ensuring that only a portion of the photoresist at the second position dissolves in the developer. This guarantees that a certain thickness of photoresist material remains at the second position after development, thus ensuring the formation of a non-penetrating groove for the photoresist at the second position.

[0012] Furthermore, the photoresist includes a positive photoresist material, and the transmittance of the second region is greater than 0 and less than 50%, so that the light intensity received by the positive photoresist material at the second position is too high, thereby avoiding the situation where the positive photoresist material at the second position is completely removed by the developer.

[0013] Alternatively, the photoresist may include a negative photoresist material, with the transmittance of the second region being greater than 50% and less than 100%, in order to avoid the light intensity received by the positive photoresist material at the second position being too low, thereby avoiding the situation where the negative photoresist material at the second position is completely removed by the developer.

[0014] Furthermore, in order to completely remove the photoresist at the first position during development to ensure the formation of a first opening through the photoresist at the first position, the transmittance of the first region can be set to 100% when the photoresist includes a positive photoresist material, or the transmittance of the first region can be set to 0 when the photoresist includes a negative photoresist material.

[0015] In one feasible implementation, the process of etching the functional film layer and photoresist to form a first via at a position corresponding to the first opening and a second via at a position corresponding to the groove in the functional film layer includes: etching the functional film layer and photoresist to form a third via at a position corresponding to the first opening in the functional film layer, and removing the photoresist at the groove to form a second opening penetrating the photoresist at a position corresponding to the groove; etching the functional film layer to increase the depth of the third via to form the first via, and forming the second via at a position corresponding to the second opening in the functional film layer.

[0016] The above method forms the first and second vias through two etching processes. During the first etching, because the functional film at the first location is exposed, the etching solution reacts with the functional film at that location to form a third via with a depth less than the first via. Simultaneously, because the etching solution also reacts with the photoresist material, at the second location, the etching solution reacts with the remaining photoresist in the groove, dissolving it and creating a second opening through the photoresist at that location. Then, during the second etching, the etching solution reacts with the functional film exposed at the third via, increasing the depth of the third via and ultimately forming the first via. At the second location, the etching solution reacts with the functional film exposed at the second opening, forming the second via at that location.

[0017] The first and second vias are formed by etching in stages. The depth of each etching step does not need to be too large, which reduces the difficulty of the process and avoids the risk of over-etching. For example, it can prevent the metal or semiconductor layer from being over-etched at the second location due to excessive etching depth in a single step.

[0018] In one feasible implementation, the substrate includes a display area and a bending area; the functional film layer includes at least two sublayers, the sublayers including inorganic materials, a first via located in the bending area, a second via located in the display area, and the number of sublayers penetrated by the first via is greater than the number of sublayers penetrated by the second via.

[0019] In the above structure, the first via can be a crack-prevention via in the bending region, and the second via can be a connection via in the display region. Because inorganic materials are relatively brittle, during bending, the sublayers within the bending region are prone to cracking under stress, affecting the reliability of the film layers within the bending region. To address this, this application embodiment provides a first via penetrating a large number of sublayers in the bending region. This type of first via releases stress to a greater extent, preventing cracks in the sublayers within the bending region and improving the bending performance of the substrate.

[0020] Moreover, the manufacturing method provided in this application only requires one round of exposure, etching and photoresist stripping process and one mask plate to form shallower vias in the display area and deeper vias in the bending area, which can effectively simplify the process and reduce manufacturing costs.

[0021] Furthermore, at least two sublayers include a buffer layer and at least one inorganic insulating layer, with the buffer layer adjacent to the substrate and the inorganic insulating layer located on the side of the buffer layer away from the substrate; a first via penetrates both the inorganic insulating layer and the buffer layer. At this point, the first via exposes the substrate to its maximum depth, resulting in superior crack resistance and higher reliability in the bending region.

[0022] Secondly, based on the same inventive concept, this application also provides a substrate, which is manufactured by the above-described substrate manufacturing method.

[0023] Thirdly, based on the same inventive concept, embodiments of this application also provide a display module, which includes the aforementioned substrate.

[0024] Fourthly, based on the same inventive concept, embodiments of this application also provide an electronic device, which includes the aforementioned display module.

[0025] The substrate, display module, and electronic device provided in this application can overcome the problems of complicated manufacturing processes and high costs. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart of a substrate manufacturing method in related technologies;

[0028] Figure 2 for Figure 1 The corresponding part of the structural flowchart;

[0029] Figure 3 for Figure 1 The corresponding other part of the structural flowchart;

[0030] Figure 4 This is a flowchart illustrating a method for manufacturing a substrate provided in an embodiment of this application.

[0031] Figure 5 for Figure 4 A corresponding structural flowchart;

[0032] Figure 6 A flowchart illustrating another method for manufacturing the substrate provided in an embodiment of this application;

[0033] Figure 7 for Figure 6 A corresponding partial structural flowchart;

[0034] Figure 8 for Figure 6 The corresponding partial structure flowchart;

[0035] Figure 9 for Figure 6 Another corresponding partial structural flowchart;

[0036] Figure 10 This is a schematic diagram of photoresist thickness variation provided in an embodiment of this application;

[0037] Figure 11 A flowchart illustrating another method for manufacturing the substrate provided in an embodiment of this application;

[0038] Figure 12 for Figure 11 A corresponding structural flowchart;

[0039] Figure 13 This is a flowchart illustrating another structural design of the substrate provided in an embodiment of this application.

[0040] Figure 14 This is a schematic diagram of the structure of a substrate provided in an embodiment of this application;

[0041] Figure 15 This is a schematic diagram of a display module provided in an embodiment of this application;

[0042] Figure 16This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0043] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0044] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0045] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0046] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0047] As described in the background section, vias of varying depths are typically incorporated into substrates to achieve different functions. During their research, the inventors discovered that currently, forming vias of varying depths requires at least two rounds of exposure, etching, and photoresist stripping processes. This not only complicates the overall substrate manufacturing process but also increases the substrate's processing cost.

[0048] Taking a substrate including a first deep hole and a first shallow hole as an example, such as Figures 1-3 As shown, Figure 1 This is a flowchart of a substrate fabrication method in related technologies. Figure 2 for Figure 1 The corresponding part of the structural flowchart, Figure 3 for Figure 1 The corresponding other part of the structural flowchart, and the substrate fabrication methods in related technologies include:

[0049] Step K1: Form a first photoresist 103 on the side of the functional film layer 101 facing away from the substrate 102.

[0050] Step K2: Expose the first photoresist 103 using the first mask 104. After exposure, develop the first photoresist 103 to form a first opening 105 and a second opening 106 in the first photoresist 103. The first opening 105 and the second opening 106 respectively penetrate the first photoresist 103. The first opening 105 corresponds to the position of the first deep hole 112 to be formed, and the second opening 106 corresponds to the position of the first shallow hole 107 to be formed.

[0051] Step K3: Etch the functional film layer 101 to form a first shallow hole 107 at the position corresponding to the second opening 106 and a second shallow hole 108 at the position corresponding to the first opening 105 in the functional film layer 101.

[0052] Step K4: Remove the first photoresist 103.

[0053] Step K5: Form a second photoresist 109 on the side of the functional film layer 101 facing away from the substrate 102.

[0054] Step K6: Expose the second photoresist 109 using the second mask 110. After exposure, develop the second photoresist 109 to form a third opening 111 in the second photoresist 109. The third opening 111 penetrates the second photoresist 109 and corresponds to the position of the second shallow hole 108.

[0055] Step K7: Etch the functional film layer 101 to increase the depth of the second shallow hole 108 to form the first deep hole 112.

[0056] Step K8: Remove the second photoresist 109.

[0057] In addition, see Figure 3 In step K8, the substrate further includes a semiconductor layer 113 and a metal layer 114. The first shallow hole 107 may be a connection via connected to the semiconductor layer 113 or the metal layer 114, and the first deep hole 112 may be a non-connection via.

[0058] Based on the above process flow, it is evident that forming vias of varying depths requires two complete cycles of exposure, etching, and photoresist stripping. This complex process results in a long substrate delivery cycle and high processing costs. Specifically, see [link to relevant documentation]. Figure 2 Step K2 and Figure 3 In step K6, because the opening positions required to be formed in the photoresist are different in the two rounds of process flow, different photomasks are required for these two rounds of process flow. This will result in a larger number of photomasks required in the entire process, leading to higher costs.

[0059] In response, this application provides a method for manufacturing a substrate, such as... Figure 4 and Figure 5 As shown, Figure 4 This is a flowchart illustrating a method for manufacturing a substrate according to an embodiment of this application. Figure 5 for Figure 4 A corresponding structural flowchart shows that the substrate fabrication method provided in this application embodiment includes:

[0060] Step S1: Form photoresist 3 on the side of the functional film layer 1 facing away from the substrate 2.

[0061] Step S2: A first opening 4 and a groove 5 are formed in the photoresist 3, wherein the first opening 4 penetrates the photoresist 3, and the groove 5 does not penetrate the photoresist 3, that is, the photoresist thickness at the first opening 4 is 0, and the photoresist thickness at the groove 5 is greater than 0.

[0062] Step S3: Etch the functional film layer 1 and the photoresist 3 to form a first via 6 at the position corresponding to the first opening 4 and a second via 7 at the position corresponding to the groove 5 in the functional film layer 1. The depth of the first via 6 is greater than the depth of the second via 7.

[0063] Step S4: Remove photoresist 3.

[0064] See Figure 5 The substrate may also include a semiconductor layer 8 and a metal layer 9. The second via 7 may be a connecting via in the substrate that connects to the semiconductor layer 8 or the metal layer 9. The first via 6 may be a non-connecting via in the substrate.

[0065] For clarity, in this embodiment, the position corresponding to the first via 6 is defined as the first position, and the position corresponding to the second via 7 is defined as the second position.

[0066] Unlike related technologies, in this embodiment, during the exposure and development process (step S2) of the photoresist 3, the photoresist 3 at both the first and second positions is not completely removed. Instead, only the photoresist 3 at the first position and a portion of the photoresist 3 at the second position are removed. Thus, during subsequent etching, since the photoresist 3 at the first position is completely removed, the functional film layer 1 at the first position is exposed. Therefore, the etching solution at the first position reacts directly with the functional film layer 1, etching a via at that position. At the second position, however, since a portion of the photoresist 3 remains, the etching solution at the second position needs to react with this remaining portion of the photoresist 3 first to remove it before further reacting with the functional film layer 1 at that position to form a via in the functional film layer 1. Because the photoresist 3 at the second position occupies a certain etching depth, the via ultimately formed by the functional film layer 1 at the second position can be shallower, resulting in a difference in depth compared to the via ultimately formed by the functional film layer 1 at the first position.

[0067] That is, by using the manufacturing method provided in the embodiments of this application, vias of different depths can be formed in only one round of exposure, etching and photoresist stripping, which greatly simplifies the process and helps to shorten the process cycle and reduce the process cost.

[0068] In one feasible implementation, such as Figure 6 and Figure 7 As shown, Figure 6 This is a flowchart illustrating another method for manufacturing the substrate provided in an embodiment of this application. Figure 7 for Figure 6 A corresponding partial structural flowchart, the above step S2 may specifically include:

[0069] Step S21: Expose the photoresist 3 using a mask 10. The mask 10 includes a first region 11 and a second region 12, and the transmittance of the first region 11 and the second region 12 is different.

[0070] Step S22: Develop the photoresist 3 to form a first opening 4 at the position corresponding to the first region 11 and a groove 5 at the position corresponding to the second region 12. That is, the first region 11 corresponds to the first position, and the second region 12 corresponds to the second position.

[0071] When the transmittance of the mask 10 is different at different positions, the exposure degree of the photoresist 3 will be different at different positions. During subsequent development, the thickness of the photoresist that the developing solution can remove at different positions will also be different. This allows the formation of a first opening 4 that penetrates the photoresist 3 and a groove 5 that does not penetrate the photoresist 3 at different positions.

[0072] In this approach, based on the different transmittance designs of the mask 10 in different areas, patterning of all areas can be completed with only one exposure and one mask. Firstly, this reduces the number of masks required in related technologies from two to one, thus reducing the number of masks used and further lowering process costs. When this substrate is used in a display module, the number of masks required for the display module can be reduced; for example, the total number of masks required can be reduced from 12 to 11. Secondly, by adjusting the transmittance of the mask 10 at different positions, the photoresist thickness at the groove 5 can be adjusted, thereby allowing for more precise control over the depth of the second via 7.

[0073] In one feasible implementation, combined with Figure 7 The photoresist 3 includes a positive photoresist material, and the transmittance of the first region 11 is greater than that of the second region 12.

[0074] Because the portion of a positive photoresist material exposed to light dissolves in the developer, while the portion not exposed to light does not, for positive photoresist materials, the lower the transmittance of a location in the mask 10, the lower the light intensity received by the positive photoresist material, and the less it dissolves in the developer during subsequent development. Therefore, when the photoresist 3 includes a positive photoresist material, this embodiment of the application sets the transmittance of the second region 12 in the mask 10 to a lower value. This reduces the light intensity received by the photoresist 3 at the second location, ensuring that only a portion of the photoresist 3 at the second location dissolves in the developer. This guarantees that a certain thickness of photoresist material remains at the second location after development, thus ensuring that a groove 5 that does not penetrate the photoresist 3 can be formed at the second location.

[0075] Alternatively, in another feasible implementation, such as Figure 8 As shown, Figure 8 for Figure 6 The corresponding partial structural flowchart shows that the photoresist 3 includes a negative photoresist material, and the transmittance of the first region 11 is less than that of the second region 12.

[0076] Because the portion of a negative photoresist material exposed to light will not dissolve in the developer, while the portion not exposed to light will dissolve, for a negative photoresist material, the higher the transmittance of the mask 10, the greater the light intensity received by the negative photoresist material, and the less it dissolves in the developer during subsequent development. Therefore, when the photoresist 3 includes a negative photoresist material, this embodiment of the application sets a higher transmittance for the second region 12 of the mask 10, which increases the light intensity received by the photoresist 3 at the second position. This ensures that the photoresist 3 at the second position only partially dissolves in the developer, guaranteeing that a certain thickness of photoresist material remains at the second position after development. In other words, it ensures that a groove 5 that does not penetrate the photoresist 3 can be formed at the second position.

[0077] Furthermore, the photoresist 3 includes a positive photoresist material, and the transmittance of the second region 12 is greater than 0 and less than 50%. For example, in optional configurations of embodiments of this application, the transmittance of the second region 12 can be 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, etc. This configuration can prevent excessive light intensity from the positive photoresist material at the second position, thereby preventing the positive photoresist material at the second position from being completely removed by the developer.

[0078] Alternatively, the photoresist 3 may include a negative photoresist material, and the transmittance of the second region 12 may be greater than 50% and less than 100%. For example, in an optional configuration of the embodiments of this application, the transmittance of the second region 12 may be 55%, 60%, 65%, 70%, 75%, 80%, 85%, or 90%. This configuration can prevent the light intensity received by the positive photoresist material at the second position from being too low, thereby preventing the negative photoresist material at the second position from being completely removed by the developer.

[0079] It should be noted that when the photoresist 3 includes a positive photoresist material or a negative photoresist material, the specific value of the transmittance of the second region 12 can be comprehensively set according to factors such as the initial thickness of the photoresist 3, the photoresist thickness to be removed at the second position, and the depth of the second via 7.

[0080] Furthermore, in order to completely remove the photoresist 3 at the first position during development to ensure that a first opening 4 through the photoresist 3 is formed at the first position, when the photoresist 3 includes a positive photoresist material, the transmittance of the first region 11 can be set to 100%, or when the photoresist 3 includes a negative photoresist material, the transmittance of the first region 11 can be set to 0.

[0081] Understandably, see Figure 7 and Figure 8 The mask plate 10 also includes a third region 13, which corresponds to the position in the substrate where vias are not required.

[0082] When photoresist 3 includes a positive photoresist material, the transmittance of the third region 13 can be set to 0 so that the positive photoresist material at the corresponding position in the third region 13 is not exposed to light and is not dissolved by the developer during subsequent development. In one configuration, the transmittance of the first region 11 in the mask is 100%, the transmittance of the second region 12 is x%, and the transmittance of the third region 13 is 0, where 0 < x% < 100%, and further, 0 < x% < 50%.

[0083] When photoresist 3 includes a negative photoresist material, the transmittance of the third region 13 can be set to 100% so that the negative photoresist material at the corresponding position in the third region 13 receives a greater degree of illumination and is not dissolved by the developer during subsequent development. In one configuration, the transmittance of the first region 11 in the mask is 0%, the transmittance of the second region 12 is y%, and the transmittance of the third region 13 is 100%, where 0 < y% < 100%, and further, 50% < y% < 100%.

[0084] In one feasible implementation, combined with Figure 6 ,like Figure 9 As shown, Figure 9 for Figure 6In another partial structural flowchart, step S3 above may specifically include:

[0085] Step S31: Etch the functional film layer 1 and the photoresist 3 to form a third via 14 at the position corresponding to the first opening 4 in the functional film layer 1, and remove the photoresist 3 at the groove 5 to form a second opening 15 through the photoresist 3 at the position corresponding to the groove 5.

[0086] Step S32: Etch the functional film layer 1 to increase the depth of the third via 14 to form the first via 6, and form the second via 7 at the position corresponding to the second opening 15 in the functional film layer 1.

[0087] The above method forms the first via 6 and the second via 7 through two etching processes. During the first etching in step S31, because the functional film layer 1 at the first location is exposed, the etching solution directly reacts with the functional film layer 1 at the first location to form a third via 14 with a depth less than the first via 6. Simultaneously, because the etching solution also reacts with the photoresist material, at the second location, the etching solution reacts with the remaining portion of the photoresist 3 in the groove 5, dissolving it and forming a second opening 15 penetrating the photoresist 3 at the second location. Then, during the second etching in step S32, the etching solution reacts with the exposed functional film layer 1 at the third via 14, increasing the depth of the third via 14 and ultimately forming the first via 6. At the second location, the etching solution reacts with the exposed functional film layer 1 at the second opening 15, forming the second via 7 at that location.

[0088] When forming the first via 6 and the second via 7 by using a multi-stage etching method, the depth of each etching step does not need to be too large, which can reduce the difficulty of the process and avoid the risk of over-etching. For example, it can avoid over-etching the metal layer 9 or the semiconductor layer 8 at the second position due to excessive etching depth in a single step.

[0089] In this embodiment of the application, in step S31, the etching solution removes the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at the position corresponding to the groove 5, which may include the following two cases:

[0090] In the first case, the etching solution only etches away the photoresist 3 at the groove 5, without etching the functional film layer 1. The functional film layer 1 at the second position is etched during the second etching process to form the second via 7 at the second position.

[0091] In the second scenario, after the etching solution removes the photoresist 3 at the groove 5, it will further react with the functional film layer 1 to form a shallow via at the second location. During the subsequent second etching, this via will be deepened to form a second via 7.

[0092] In addition, in other optional embodiments of this application, the first via 6 and the second via 7 can be formed in the functional film layer 1 using only a single etching process. Specifically, after forming the first opening 4 and the groove 5 in the photoresist 3, a certain thickness of the functional film layer 1 is etched away at the first location to form the first via 6 using only a single etching process, and the remaining photoresist 3 and a certain thickness of the functional film layer 1 are etched away at the second location to form the second via 7.

[0093] Alternatively, in other optional embodiments of this application, the first via 6 and the second via 7 can be formed in the functional film layer 1 using three or more etching processes. Specifically, after forming the first opening 4 and the groove 5 in the photoresist 3, the functional film layer 1 and the photoresist 3 are first etched using a single etching process to form a third via 14 at a first position in the functional film layer 1, and to remove the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at a second position; then, using a single etching process, the depth of the third via 14 at the first position is increased to form a fourth via, and a fifth via is formed at a second position in the functional film layer 1; then, using a single etching process, the depth of the fourth via at the first position is increased to form a first via 6, and the depth of the fifth via at the second position is increased to form a second via 7.

[0094] However, compared to single etching and three or more etching processes, the two etching processes using steps S31 and S32 can not only avoid excessive etching depth in a single etching process, which would lead to over-etching, but also reduce the number of etching processes, thus saving on manufacturing steps and reducing costs.

[0095] It should be noted that because the etching solution reacts with the photoresist material during etching, the film thickness of photoresist 3 will differ before and after each etching process. For example... Figure 10 As shown, Figure 10 This is a schematic diagram of photoresist thickness variation provided in an embodiment of this application. After photoresist 3 is formed in step S1, the thickness of photoresist 3 is a. After processing photoresist 3 in step S2, the thickness of photoresist 3 at the groove 5 is b, and the thickness of photoresist 3 at the first opening 4 is 0. After the first etching in step S31, the thickness of photoresist 3 is reduced to a1 at other positions besides the first and second positions, and the thickness of photoresist 3 at the groove 5 is 0. After the second etching in step S32, the thickness of photoresist 3 is reduced to a2 at other positions besides the first and second positions.

[0096] In one feasible implementation, combined with Figure 14The substrate includes a display area 17 and a bending area 18. The substrate 2 can be a flexible substrate and may include polyimide (PI) material. The functional film layer 1 includes at least two sublayers 16, each sublayer 16 comprising an inorganic material. A first via 6 is located in the bending area 18, and a second via 7 is located in the display area 17. The number of sublayers 16 penetrated by the first via 6 is greater than the number of sublayers 16 penetrated by the second via 7.

[0097] In the above structure, the first via 6 can be a crack-resistant via in the bending region 18, and the second via 7 can be a connection via in the display region 17. Because inorganic materials are relatively brittle, the inorganic insulating layer 20 in the bending region 18 is prone to cracking during bending, affecting the reliability of the film layer. To address this, this embodiment provides a first via 6 penetrating a large number of sub-layers 16 in the bending region 18. This first via 6 can release more stress during bending, reducing the risk of cracking and improving the bending performance of the substrate.

[0098] Furthermore, as described above regarding the relevant technologies, to form vias of varying depths in the display area 17 and the bending area 18, the relevant technologies require first employing a process of exposure, etching, and photoresist stripping, along with a photomask, to form vias penetrating a portion of the sublayer 16 in the display area 17 and the bending area 18. Then, another process of exposure, etching, and photoresist stripping, along with a photomask, is used to deepen the vias penetrating the portion of the sublayer 16 in the bending area 18, allowing the deepened vias to penetrate more sublayers 16, thereby increasing the via depth. However, the manufacturing method provided in this application, combined with… Figure 11 and Figure 12 By using only one process of exposure, etching, and photoresist stripping, as well as one mask 10, shallower vias can be formed in the display area 17 and deeper vias can be formed in the bending area 18, which can effectively simplify the process and reduce manufacturing costs.

[0099] Furthermore, combined Figure 14 At least two sublayers 16 include a buffer layer 19 and at least one inorganic insulating layer 20. The buffer layer 19 is adjacent to the substrate 2, and the inorganic insulating layer 20 is located on the side of the buffer layer 19 away from the substrate 2. A first via 6 penetrates both the inorganic insulating layer 20 and the buffer layer 19, and a second via 7 penetrates at least a portion of the inorganic insulating layer 20. In this case, the first via 6 exposes the substrate 2 to its maximum depth, resulting in superior crack resistance and higher reliability of the bending region 18.

[0100] The substrate may include structures such as transistors, capacitors, and signal lines. The semiconductor layer 8 can be used to form the active layer of the transistor, and the metal layer 9 may include a first metal layer 21 and a second metal layer 22. The first metal layer 21 can be used to form structures such as the gate of the transistor and the lower electrode of the capacitor, and the second metal layer 22 can be used to form structures such as the upper electrode of the capacitor.

[0101] The buffer layer 19 is located between the substrate 2 and the semiconductor layer 8. The inorganic insulating layer 20 may specifically include a first gate insulating layer 23, a second gate insulating layer 24 and an interlayer dielectric layer 25. The first gate insulating layer 23 is located between the semiconductor layer 8 and the first metal layer 21. The second gate insulating layer 24 is located between the first metal layer 21 and the second metal layer 22. The interlayer dielectric layer 25 is located on the side of the second metal layer 22 away from the substrate 2. That is, in step S1, the photoresist 3 is formed on the side of the interlayer insulating layer 25 away from the substrate 2.

[0102] The following is combined with Figure 11 and Figure 12 The fabrication process of the aforementioned substrate will be described in detail. In this method of fabricating the substrate:

[0103] Step S1 may specifically include: forming a photoresist 3 on the side of the inorganic insulating layer 20 away from the substrate 2.

[0104] Step S21 may specifically include: exposing the photoresist 3 using a mask 10, wherein the mask 10 includes a first region 11 and a second region 12, and the transmittance of the first region 11 and the second region 12 is different.

[0105] The first region 11 corresponds to at least a portion of the bending region 18, and the second region 12 corresponds to a portion of the display region 16. When the photoresist 3 includes a positive photoresist material, the transmittance of the first region 11 is greater than that of the second region 12; when the photoresist 3 includes a negative photoresist material, the transmittance of the first region 11 is less than that of the second region 12.

[0106] Step S22 may specifically include: developing the photoresist 3 to form a first opening 4 at the position corresponding to the first region 11 and a groove 5 at the position corresponding to the second region 12 in the photoresist 3.

[0107] Step S31 may specifically include: etching the inorganic insulating layer 20 and the photoresist 3 to form a third via 14 at the position corresponding to the first opening 4 in the inorganic insulating layer 20, and removing the photoresist 3 at the groove 5 to form a second opening 15 penetrating the photoresist 3 at the position corresponding to the groove 5.

[0108] It should be noted that, in step S31, this application does not specifically limit the number of inorganic insulating layers 20 penetrated by the third via 14. For example, see... Figure 12The third via 14 may penetrate only the interlayer insulating layer 25 and the second gate insulating layer 24, or, in other ways, the third via 14 may penetrate the interlayer insulating layer 25, the second gate insulating layer 24 and the first gate insulating layer 23.

[0109] Step S32 may specifically include: etching the inorganic insulating layer 20 and the buffer layer 19 to increase the depth of the third via 14 to form the first via 6, and forming the second via 7 at the position corresponding to the second opening 15 in the functional film layer 1.

[0110] In display area 17, because the positions of the semiconductor layer 8 and metal layer 9 connected to the second via 7 are different at different locations, the number of inorganic insulating layers 20 penetrated by the second via 7 at different locations can be different. For example, see Figure 12 The second via 7 connected to the semiconductor layer 8 can penetrate the interlayer insulating layer 25, the second gate insulating layer 24 and the first gate insulating layer 23. The second via 7 connected to the first metal layer 21 can penetrate the interlayer insulating layer 25 and the second gate insulating layer 24, while the second via 7 connected to the second metal layer 22 can only penetrate the interlayer insulating layer 25.

[0111] Step S4: Remove photoresist 3.

[0112] Combination Figure 14 The metal layer 9 may further include a third metal layer 26 and a fourth metal layer 28, and the substrate may further include a planarization layer 27. For example... Figure 13 As shown, Figure 13 This is another structural flowchart of the substrate provided in the embodiments of this application. After the photoresist 3 is removed, the substrate fabrication method may further include:

[0113] Step S5: A third metal layer 26 is formed on the side of the interlayer insulating layer 25 away from the substrate 2. The third metal layer 26 is used to form the first electrode, second electrode and other structures of the transistor. The third metal layer 26 can be connected to the first metal layer 21, the second metal layer 22 or the semiconductor layer 8 through part of the second via 7.

[0114] Step S6: A planarization layer 27 is formed on the side of the third metal layer 26 away from the substrate 2. The planarization layer 27 includes an organic material that can fill the first via 6 to improve the bending resistance of the bending region 18. Furthermore, the planarization layer 27 includes an opening for exposing the unconnected second via 7.

[0115] Step S7: A fourth metal layer 28 is formed on the side of the planarization layer 27 away from the substrate 2. The fourth metal layer 28 is used to form structures such as signal lines. The fourth metal layer 28 can be connected to the first metal layer 21, the second metal layer 22 or the semiconductor layer 8 through a portion of the second via 7.

[0116] The fabrication processes for the third metal layer 26, the planarization layer 27, and the fourth metal layer 28 can also be processes such as exposure etching, which will not be elaborated further.

[0117] Based on the same inventive concept, this application also provides a substrate, which is manufactured by the manufacturing method provided in any of the above embodiments. Specifically, the substrate can be an array substrate.

[0118] like Figure 14 As shown, Figure 14 This is a schematic diagram of a substrate provided in an embodiment of the present application. The substrate may include a substrate 2 and a functional film layer 1 located on one side of the substrate 2. The functional film layer 1 includes a first via 6 and a second via 7, wherein the depth of the first via 6 is greater than the depth of the second via 7.

[0119] Furthermore, the substrate includes a display area 17 and a bending area 18, and the functional film layer 1 includes at least two sublayers 16, each sublayer 16 comprising an inorganic material. A first via 6 is located in the bending area 18, and a second via 7 is located in the display area 17. The number of sublayers 16 penetrated by the first via 6 is greater than the number of sublayers 16 penetrated by the second via 7.

[0120] More specifically, at least two sublayers 16 include a buffer layer 19 and at least one inorganic insulating layer 20. The buffer layer 19 is adjacent to the substrate 2, and the inorganic insulating layer 20 is located on the side of the buffer layer 19 away from the substrate 2. A first via 6 penetrates both the inorganic insulating layer 20 and the buffer layer 19, and a second via 7 penetrates at least a portion of the inorganic insulating layer 20. The specific structure of the inorganic insulating layer 20 has been described in detail in the above embodiments and will not be repeated here.

[0121] Based on the same inventive concept, embodiments of this application also provide a display module, wherein the substrate can specifically be a flexible display module, such as... Figure 15 As shown, Figure 15 This is a schematic diagram of a display module provided in an embodiment of this application. The display module includes the substrate 100 provided in any of the above embodiments. The specific structure of the substrate 100 has been described in detail in the above embodiments and will not be repeated here.

[0122] Based on the same inventive concept, embodiments of this application also provide an electronic device, such as... Figure 16 As shown, Figure 16 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device includes the aforementioned display module 200. It should be noted that... Figure 16 The electronic device shown is for illustrative purposes only. It can be any electronic device with a display function, such as a mobile phone, tablet computer, laptop computer, e-reader, or television.

[0123] The same or similar parts between the various embodiments in this specification can be referred to mutually. In particular, the device embodiments and terminal embodiments are basically similar to the method embodiments, so the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.

Claims

1. A method for manufacturing a substrate, characterized in that, include: A photoresist is formed on the side of the functional film layer facing away from the substrate; A first opening and a groove are formed in the photoresist, the first opening penetrating the photoresist, the groove not penetrating the photoresist, and the opening size of the groove being smaller than the opening size of the first opening; The functional film layer and the photoresist are etched to form a first via at the position corresponding to the first opening and a second via at the position corresponding to the groove in the functional film layer, wherein the depth of the first via is greater than the depth of the second via. Strip the photoresist; The process of forming a first through-hole at the position corresponding to the first opening and a second through-hole at the position corresponding to the groove in the functional film layer includes: Through an etching process, a third via is formed in the functional film layer at the position corresponding to the first opening. During this process, the thickness of the photoresist is reduced, so that the photoresist at the groove is removed, and a second opening through the photoresist is formed at the position corresponding to the groove. The depth of the third via is increased again by etching to form the first via, and the second via is formed in the functional film layer at the position corresponding to the second opening.

2. The method for manufacturing a substrate according to claim 1, characterized in that, The process of forming the first opening and the groove in the photoresist includes: The photoresist is exposed using a photomask, which includes a first region and a second region, and the first region and the second region have different transmittance. The photoresist is developed to form the first opening at the position corresponding to the first region and the groove at the position corresponding to the second region.

3. The method for manufacturing a substrate according to claim 2, characterized in that, The photoresist includes a positive photoresist material, and the transmittance of the first region is greater than that of the second region; Alternatively, the photoresist may include a negative photoresist material, wherein the transmittance of the first region is less than that of the second region.

4. The method for manufacturing a substrate according to claim 3, characterized in that, The photoresist comprises a positive photoresist material, and the transmittance of the second region is greater than 0 and less than 50%. Alternatively, the photoresist may include a negative photoresist material, wherein the transmittance of the second region is greater than 50% and less than 100%.

5. The method for manufacturing a substrate according to claim 3, characterized in that, The photoresist comprises a positive photoresist material, and the transmittance of the first region is 100%. Alternatively, the photoresist may comprise a negative photoresist material, and the transmittance of the first region may be 0.

6. The method for manufacturing a substrate according to claim 1, characterized in that, The substrate includes a display area and a bending area; The functional film layer includes at least two sublayers, each sublayer comprising an inorganic material. The first via is located in the bending region, and the second via is located in the display region. The number of sublayers penetrated by the first via is greater than the number of sublayers penetrated by the second via.

7. The method for manufacturing a substrate according to claim 6, characterized in that, At least two of the sublayers include a buffer layer and at least one inorganic insulating layer, the buffer layer being adjacent to the substrate and the inorganic insulating layer being located on the side of the buffer layer away from the substrate; The first via penetrates the inorganic insulating layer and the buffer layer.

8. A substrate, characterized in that, It is manufactured by the method of manufacturing the substrate according to any one of claims 1 to 7.

9. A display module, characterized in that, Includes the substrate as described in claim 8.

10. An electronic device, characterized in that, Includes the display module as described in claim 9.

Images