Chip physical self-destruction packaging structure based on energetic film and control method

Abstract

The invention discloses a chip physical self-destruction packaging structure based on an energetic film and a control method. The packaging structure comprises a packaging shell, a self-destruction execution module, a control switch module, an electrostatic dredging module and a system circuit. The packaging shell comprises a packaging shell base and a packaging top cover; depositing a first energetic film in the packaging top cover; the control switch module comprises an insulating layer, a diversion layer, a control layer and a substrate; the diversion layer comprises a metal bonding pad and a rectangular micro-bridge type heating layer; the control layer comprises bonding pad metal, a double-V-shaped micro-bridge type heating circuit and a second energetic film; the method comprises the following steps: when an invasion occurs, the control switch module generates pulse current to enable the micro-bridge heating circuit to explode the rectangular micro-bridge heating layer, so that the self-destruction execution module relieves circuit isolation; the system circuit enables the first energetic film to be subjected to alloying reaction, and a high-pressure crushing target chip is formed in a closed cavity formed in the packaging shell base and the packaging top cover. Physical comminuted self-destruction of the chip is realized, and the self-destruction process is accurate and controllable.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit security technology and chip security protection, and particularly to a chip physical self-destruction packaging structure and control method based on an energetic film. Background Art

[0002] Chip self-destruction is the last line of defense for information security. With the development of information technology, information security issues have received increasing attention. To improve the security of core information and prevent the leakage of its content, many institutions have put forward higher security requirements for the use of core chips.

[0003] Existing chip security protection technologies are mainly divided into two categories: logical protection and physical self-destruction. Among them, the chip security protection methods based on logical protection mainly include information encryption and built-in anti-leakage programs, etc. However, with the development of high-tech such as password cracking technology, reverse engineering such as FIB repair and layer-by-layer peeling, the limitations of logical protection are gradually exposed: it cannot prevent the extraction of physical layer information and there is a risk of key leakage. In this context, physical self-destruction technology has become a key technology direction in high-security scenarios due to its irreversible damage ability to the chip structure.

[0004] Physical self-destruction technology is a new type of chip security protection technology developed in recent years. Its core idea is that when the chip is illegally invaded or lost, by triggering the self-destruction mechanism, the circuits or storage units inside the chip are made ineffective, thereby protecting sensitive information. According to different triggering mechanisms and damage principles, self-destruction technology can include, for example, chemical corrosion self-destruction and electrochemical self-destruction. Among them, chemical corrosion self-destruction dissolves the chip material through a chemical reaction to achieve self-destruction. Its advantage is that the self-destruction process is relatively gentle, but the chemical reaction is usually slow and it is difficult to meet the requirement of rapid self-destruction; electrochemical self-destruction uses an electrochemical reaction to generate high voltage or high current to damage the transistor gates inside the chip. Its characteristic is rapid response, but the damage ability is limited and it is difficult to achieve complete physical destruction.

[0005] With the continuous development of micro-electro-mechanical system (MEMS) technology, transducers and energetic charges are developing towards miniaturization and integration. This technological progress provides new possibilities for chip self-destruction technology. In an energetic micro self-destruction device, micro-structured transducers and micro-charges are the main functional components. The micro-structured transducers can efficiently convert the input electrical energy into heat energy, and the micro-charges generate detonation waves under the detonation of the transducers, causing irreversible damage to the chip.

[0006] In summary, how to provide a highly reliable and non-invasive chip self-destruction packaging structure and control method, achieve physical pulverization damage of the chip, and integrate electrostatic conduction and control switches to ensure that the self-destruction process is precisely controllable is a technical problem that urgently needs to be solved. Summary of the Invention

[0007] Objective of the Invention: Aiming at the problems existing in the above prior art, the present invention proposes a physical self-destruction packaging structure for chips based on an energetic film, aiming to provide a highly reliable and non-invasive chip self-destruction packaging structure; the present invention also proposes a physical self-destruction method for chips based on an energetic film, which realizes the physical pulverization self-destruction of the chip through the thermite reaction in the self-destruction packaging structure, and integrates electrostatic conduction and control switches to ensure that sensitive information cannot be restored in case of illegal intrusion or loss, and the self-destruction process is precisely controllable.

[0008] Technical Solution: The physical self-destruction packaging structure for chips based on an energetic film of the present invention includes a packaging shell, a self-destruction execution module, a control switch module, an electrostatic conduction module and a system circuit;

[0009] The diversion layer of the control switch module, the self-destruction execution module and the electrostatic conduction module are connected in parallel and then connected to the system circuit;

[0010] The packaging shell includes a packaging shell base and a packaging top cover; a first energetic film is deposited on the inner surface of the packaging top cover;

[0011] The self-destruction execution module includes an execution layer and a substrate arranged from top to bottom; the self-destruction execution module is attached to the packaging top cover; the execution layer includes a metal pad and an actuator; the actuator is a double-V-shaped micro-bridge heating circuit prepared by magnetron sputtering from a Ni-Cr energetic film;

[0012] The control switch module includes an insulating layer, a diversion layer, a control layer and a substrate arranged from top to bottom; the diversion layer includes a metal pad and a rectangular micro-bridge heating layer; the control layer includes a pad metal, a double-V-shaped micro-bridge heating circuit and a second energetic film; the second energetic film is stacked with the double-V-shaped micro-bridge heating circuit;

[0013] The first energetic film and the second energetic film are multi-layer energetic films formed by alternately depositing nanoscale aluminum layers and nickel layers by magnetron sputtering;

[0014] The electrostatic conduction module includes an insulating layer, an electrostatic conduction layer and a substrate arranged from top to bottom; the electrostatic conduction layer is composed of comb-shaped electrode plates arranged in a staggered manner.

[0015] The multi-layer energetic film is a periodic unit structure formed by alternately stacking aluminum layers and nickel layers, and the periodic unit structure includes a single-layer aluminum thin film and a single-layer nickel thin film.

[0016] The thickness of the single-layer aluminum thin film and the single-layer nickel thin film is 10 nm - 100 nm.

[0017] The surfaces of the aluminum thin film and the nickel thin film are covered with a Parylene-C passivation layer, and the total thickness of the aluminum thin film and the nickel thin film is 50 - 200 μm.

[0018] The included angle of the double-V-shaped micro-bridge heating circuit is between 45° and 145°, and the thickness is 0.1–1 μm.

[0019] The material of the insulating layer is silicon dioxide, and the thickness of the insulating layer is 0.1–1 μm.

[0020] The thickness of the rectangular micro-bridge heating layer is 0.1–1 μm, the length is 10–100 μm, and the width is 10–100 μm.

[0021] The comb-shaped electrode plate is a rectangle with a thickness of 0.1–1 μm and a length of 10–100 μm, and the gap between the staggered comb-shaped electrode plates is 0.1–1 μm.

[0022] The chip physical self-destruction control method based on the energetic film of the present invention is implemented by the chip physical self-destruction packaging structure based on the energetic film. The self-destruction control method includes the following steps:

[0023] Step (1), when the target chip is in normal working conditions, the self-destruction execution module is connected to the system circuit; the diversion layer of the control switch module is connected in parallel with the self-destruction execution module to short-circuit the self-destruction execution module; the static electricity diversion module is connected in parallel with the self-destruction execution module, and the static electricity diversion module discharges static electricity charges in real time;

[0024] Step (2), when the system circuit detects an intrusion signal, the pulsed current generated by the capacitor discharge of the control layer of the control switch module passes through the Joule heat generated by the micro-bridge heating circuit of the control layer to melt, vaporize the bridge area material of the micro-bridge heating circuit and generate plasma, resulting in an electric explosion. The released energy activates the second energetic film of the control layer to undergo a thermite reaction and burn, breaking the rectangular micro-bridge heating layer of the upper diversion layer, so that the self-destruction execution module is released from circuit isolation; the system circuit controls the double-V-shaped micro-bridge heating circuit of the self-destruction execution module to heat up to the ignition threshold of the first energetic film of the packaging top cover. The first energetic film undergoes an alloying reaction to release heat, high-temperature gas and shock waves, forming a local high pressure in the closed chamber jointly formed by the packaging housing base and the packaging top cover, and crushing the physical structure of the target chip.

[0025] In step (2), the first energetic film undergoes an alloying reaction to release heat, high-temperature gas and shock waves, forming a local high pressure of ≥2 MPa in the closed chamber formed by the packaging housing base and the packaging top cover, and crushing the physical structure of the target chip.

[0026] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0027] (1) The present invention addresses the problems of long time consumption and incomplete destruction in traditional self-destruction methods. Through a self-destruction implementation method based on the high-efficiency release of thermite reaction, by designing an energetic film structure (a self-destruction actuator with an Al / Ni energetic film as the energy amplification element and a Ni-Cr bridge as the igniter, and optimizing the modulation ratio of the energetic film to 3:2), an energy density of ≥8 kJ / cm 3 is achieved, the self-destruction time is <1 second, and the thoroughness of destruction is superior to the deficiency of the traditional chemical corrosion method that requires minutes.

[0028] (2) The present invention addresses the problem of difficult risk control of mis-triggering. It constructs a physical fuse mechanism, designs a parallel physical fuse structure of the diversion layer and forms a short-circuit protection circuit with the self-destruction module to short-circuit the self-destruction execution module and prevent the mis-triggering of the self-destruction execution module.

[0029] (3) The present invention addresses the problem of damage to the chip caused by electrostatic accumulation. It proposes an electrostatic drainage design. By integrating an electrostatic drainage layer in the packaging structure, it effectively guides and disperses static charges, prevents damage to the chip caused by electrostatic accumulation. At the same time, during the self-destruction process, the electrostatic drainage layer can also quickly release the static charges to the ground to avoid the influence of static electricity on the self-destruction process. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 FIG. is a schematic diagram of an embodiment of the physical self-destruction packaging structure of the chip based on the energetic film of the present invention when the chip is in a safe state;

[0031] Figure 2 FIG. is a schematic diagram of an embodiment of the self-destruction actuator of the physical self-destruction packaging structure of the chip based on the energetic film of the present invention;

[0032] Figure 3 FIG. is a schematic diagram of an embodiment of the control switch module of the physical self-destruction packaging structure of the chip based on the energetic film of the present invention;

[0033] Figure 4 FIG. is a schematic diagram of an embodiment of the electrostatic drainage module of the physical self-destruction packaging structure of the chip based on the energetic film of the present invention;

[0034] Figure 5 FIG. is a schematic diagram of an embodiment of the physical self-destruction packaging structure of the chip based on the energetic film of the present invention when the chip executes the self-destruction instruction. DETAILED DESCRIPTION OF THE INVENTION

[0035] Figures 1 to 5In the figure: 1 - Encapsulation housing base; 2 - Encapsulation top cover; 3 - System circuit; 4 - Target chip; 5 - First energetic film; 6 - Internal interconnection pins; 7 - Electrostatic conduction module; 8 - Control switch module; 9 - Self-destruction execution module; 10 - Substrate; 11 - Metal pad; 12 - Double V-shaped micro-bridge heating circuit; 13 - First insulating layer; 14 - Current guiding layer; 15 - Second energetic film; 16 - Control layer; 17 - Substrate; 18 - Second insulating layer; 19 - Electrostatic conduction layer; 20 - Substrate.

[0036] An object of the present invention is to provide a chip physical self-destruction encapsulation structure based on an energetic film. As Figures 1 to 5 shown, the chip physical self-destruction encapsulation structure based on an energetic film of the present invention includes an encapsulation housing, a self-destruction execution module 9, a control switch module 8, an electrostatic conduction module 7, and a system circuit 3.

[0037] The encapsulation housing is composed of two parts: an encapsulation housing base 1 and an encapsulation top cover 2. Among them, the encapsulation housing base 1 is made of ceramics such as Al2O3 or a metal substrate such as Cu-W alloy; four groups of internal interconnection pins 6 are designed inside the encapsulation housing base 1, which are respectively used for signal transmission between the system circuit 3 and the self-destruction execution module 9, the current guiding layer between the system circuit and the control switch module 8, the system circuit and the control switch module, and the system circuit and the electrostatic conduction module.

[0038] The self-destruction execution module 9, the control switch module 8, and the electrostatic conduction module 7 are integrated inside the encapsulation housing base 1 made of ceramics or a metal substrate, and are electrically connected through internal interconnection pins.

[0039] The current guiding layer of the control switch module 8, the self-destruction execution module 9, and the electrostatic conduction module 7 are connected in parallel and then connected to the system circuit 3, and the current guiding layer of the control switch module 8 is connected in series with the system circuit 3.

[0040] The encapsulation top cover 2 is made of ceramics or a metal substrate, and a first energetic film 5 is deposited on the inner surface of the encapsulation top cover 2, that is, the inner surface of the encapsulation top cover 2 is composed of a multi-layer energetic film formed by alternately depositing nano-scale aluminum Al layers and nickel Ni layers through a magnetron sputtering process.

[0041] The multi-layer energetic film is a periodic unit structure formed by alternating stacking of aluminum (Al) layers and nickel (Ni) layers. Each periodic unit structure contains a single-layer aluminum (Al) film and a single-layer nickel (Ni) film. The thickness of the single-layer aluminum (Al) film and the single-layer nickel (Ni) film is between 10 nm and 100 nm, and the thickness ratio of the aluminum (Al) film to the nickel (Ni) film is 3:2. The interfacial bonding strength between layers is optimized by annealing treatment. The surfaces of the aluminum film and the nickel film are covered with a Parylene-C passivation layer to prevent oxidation. The total thickness of the film is 50–200 μm, and the shape is rectangular. The first energetic film 5 is located directly above the target chip 4 and the self-destruction execution module 9 in the system circuit. The first energetic film 5 is deposited on the inner surface of the package lid 2. When the lid 2 and the substrate are completed with packaging, the spatial projection of the first energetic film 5 covers the target chip 4 and the self-destruction execution module 9 in the system circuit.

[0042] The self-destruction execution module 9 includes an execution layer and a substrate 10 arranged from top to bottom; the self-destruction execution module 9 is attached to the package lid 2. The execution layer includes a metal pad 11 and an actuator; the actuator is a double-V-shaped micro-bridge heating circuit prepared from a Ni-Cr energetic film by magnetron sputtering process. The included angle of the double-V-shaped micro-bridge heating circuit is between 45° and 145°, and the thickness is 0.1–1 μm.

[0043] As Figure 3 shown, the control switch module 8 includes a first insulating layer 13, a current-carrying layer 14, a control layer 16 and a substrate 17 arranged from top to bottom; the material of the first insulating layer 13 is silicon dioxide, and the thickness is 0.1~1 μm. The current-carrying layer 14 includes a metal pad and a rectangular micro-bridge heating layer. Preferably, the thickness of the rectangular micro-bridge heating layer is between 0.1~1 μm, the length is 10~100 μm, and the width is 10~100 μm.

[0044] The control layer 16 includes a pad metal, a double-V-shaped micro-bridge heating circuit and a second energetic film 15. The included angle of the double-V-shaped micro-bridge heating circuit is between 45° and 145°, the thickness is 0.1~1 μm, and the length is 10~100 μm. The second energetic film 15 is a multi-layer energetic film formed by alternately depositing nano-scale aluminum (Al) layers and nickel (Ni) layers by magnetron sputtering process. The multi-layer energetic film is a periodic unit structure formed by alternating stacking of aluminum (Al) layers and nickel (Ni) layers. The thickness of the periodic unit structure is 0.1~1 μm, and the length is 10~100 μm; the second energetic film 15 and the double-V-shaped micro-bridge heating circuit are closely stacked up and down.

[0045] As Figure 4As shown, the static electricity drainage module 7 includes a second insulating layer 18, a static electricity drainage layer 19, and a substrate 20 arranged from top to bottom. The material of the second insulating layer 18 is silicon dioxide, and its thickness is 0.1 - 1 μm; the static electricity drainage layer 19 has a comb-like structure and is composed of comb-shaped electrode plates arranged in an interleaved manner. Preferably, the comb-shaped electrode plates are rectangular, with a thickness of 0.1 - 1 μm, a length of 10 - 100 μm, and the electrode plates are arranged in an interleaved manner with a gap of 0.1 - 1 μm.

[0046] The chip physical self-destruction control method based on an energetic film of the present invention includes the following steps:

[0047] 1) When the target chip 4 is in a normal working condition, the self-destruction execution module 9 is connected to the system circuit 3; the diversion layer of the control switch module 8 is connected in parallel with the self-destruction execution module 9 to short-circuit the self-destruction execution module 9 and prevent the self-destruction execution module 9 from being accidentally triggered; the static electricity drainage module 7 is connected in parallel with the self-destruction execution module 9 to drain static charges in real time and prevent static electricity release from interfering with the trigger circuit.

[0048] 2) As Figure 5 shown, when the system circuit 3 detects an illegal intrusion signal such as sudden light change, physical impact, or encrypted wireless instruction, the control layer 16 of the control switch module 8 generates Joule heat when a large pulsed current generated by the discharge of the capacitor passes through the micro-bridge heating circuit of the control layer 16, melting, vaporizing the bridge area material of the micro-bridge heating circuit and generating plasma, and then an electro-explosion phenomenon occurs. The released energy activates the second energetic film 15 of the control layer 16 to undergo a thermite reaction and burn, blowing off the rectangular micro-bridge heating layer of the upper diversion layer 14, so that the self-destruction execution module 9 is released from circuit isolation; the system circuit 3 controls the double V-shaped micro-bridge heating circuit 12 of the self-destruction execution module 9 to be powered on, and the temperature rises to the ignition threshold of the first energetic film 5 of the package top cover 2 within 5 - 50 ms. The first energetic film 5 composed of Al / Ni material undergoes an alloying reaction to release heat, and the reaction temperature > 2000 °C, releasing high-temperature gas and shock waves to form a local high pressure (≥ 2 MPa) in the closed chamber jointly formed by the package housing base 1 and the package top cover 2, crushing the physical structure of the target chip 4 to ensure that sensitive information cannot be restored.

[0049] Finally, it should be noted that the purpose of publishing the embodiments is to help further understand the present invention. However, those skilled in the art can understand that: without departing from the spirit and scope of the present invention and the appended claims, various substitutions and modifications are possible. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection required by the present invention is defined by the scope of the claims.

Claims

1. A chip physical self-destruction packaging structure based on an energetic film, characterized in that: It comprises a packaging shell, a self-destruction execution module (9), a control switch module (8), a static electricity drainage module (7) and a system circuit (3); The guide layer of the control switch module (8), the self-destruction execution module (9) and the static electricity drainage module (7) are connected in parallel and then connected to the system circuit (3); The packaging shell comprises a packaging shell base (1) and a packaging top cover (2); a first energetic film (5) is deposited on the inner surface of the packaging top cover (2); The self-destruction execution module (9) comprises an execution layer and a substrate (10) arranged from top to bottom; the self-destruction execution module (9) is bonded to the package top cover (2); the execution layer comprises a metal pad (11) and an actuator; the actuator is a double V-shaped microbridge heating circuit prepared by magnetron sputtering and made of Ni-Cr energetic thin film; The control switch module (8) comprises an insulating layer (13), a guide layer (14), a control layer (16) and a substrate (17) arranged from top to bottom; the guide layer (14) comprises a metal pad and a rectangular microbridge heating layer; the control layer (16) comprises a pad metal, a double V-shaped microbridge heating circuit and a second energy-containing film (15); the second energy-containing film (15) is stacked with the double V-shaped microbridge heating circuit; The first energetic film (5) and the second energetic film (15) are multi-layer energetic films formed by alternately depositing nano-scale aluminum layers and nickel layers by magnetron sputtering; The electrostatic drainage module (7) comprises an insulating layer (18), an electrostatic drainage layer (19) and a substrate (20) arranged from top to bottom; the electrostatic drainage layer (19) is composed of comb-shaped electrode plates arranged in a staggered manner.

2. The chip physical self-destruction packaging structure based on an energetic film according to claim 1, characterized in that: The multilayer energetic film is a periodic unit structure formed by alternately stacking aluminum layers and nickel layers, and the periodic unit structure includes a single-layer aluminum film and a single-layer nickel film.

3. The chip physical self-destruction packaging structure based on energetic thin film according to claim 2 is characterized in that: The thickness of the single-layer aluminum film and the single-layer nickel film is 10nm-100nm.

4. The chip physical self-destruction packaging structure based on energetic thin film according to claim 3 is characterized in that: The surfaces of the aluminum film and the nickel film are covered with a Parylene-C passivation layer, and the total thickness of the aluminum film and the nickel film is 50-200 μm.

5. The chip physical self-destruction packaging structure based on energetic thin film according to claim 1, characterized in that: The double V-shaped microbridge heating circuit has an included angle of 45° to 145° and a thickness of 0.1-1 μm.

6. The chip physical self-destruction packaging structure based on energetic thin film according to claim 1, characterized in that: The material of the insulating layer (13) is silicon dioxide, and the thickness of the insulating layer is 0.1-1 μm.

7. The chip physical self-destruction packaging structure based on energetic thin film according to claim 1 is characterized in that: The rectangular micro-bridge heating layer has a thickness of 0.1 to 1 μm, a length of 10 to 100 μm, and a width of 10 to 100 μm.

8. The chip physical self-destruction packaging structure based on energetic thin film according to claim 1 is characterized in that: The comb-tooth electrode plates are rectangular with a thickness of 0.1 to 1 μm and a length of 10 to 100 μm, and the gaps between the staggered arrangement of the comb-tooth electrode plates are 0.1 to 1 μm.

9. A chip physical self-destruction control method based on energetic film, characterized in that: The method is implemented by the chip physical self-destruction packaging structure based on the energetic film according to claim 1, and comprises the following steps: Step (1), when the target chip (4) is in a normal working condition, the self-destruction execution module (9) is connected to the system circuit (3); the guide layer of the control switch module (8) is connected in parallel with the self-destruction execution module (9), so that the self-destruction execution module (9) is short-circuited; the static electricity drainage module (7) is connected in parallel with the self-destruction execution module (9), and the static electricity drainage module (7) discharges static electricity charges in real time; Step (2), when the system circuit (3) detects an intrusion signal, the pulse current generated by the capacitor discharge of the control layer (16) of the control switch module (8) passes through the Joule heat generated by the microbridge heating circuit of the control layer (16), causing the bridge area material of the microbridge heating circuit to melt, vaporize and generate plasma, and an electric explosion occurs. The released energy activates the second energy-containing film (15) of the control layer (16) to undergo an aluminum thermite reaction and burn, and blows off the rectangular microbridge heating layer of the guide layer (14), so that the self-destruction execution module (9) releases the circuit isolation; the system circuit (3) controls the double V-shaped microbridge heating circuit (12) of the self-destruction execution module (9) to be energized and heated to the ignition threshold of the first energy-containing film (5) of the package top cover (2), and the first energy-containing film (5) undergoes an alloying reaction to release heat, high-temperature gas and shock waves, forming a local high pressure in the closed chamber formed by the package shell base (1) and the package top cover (2), thereby crushing the physical structure of the target chip (4).

10. The chip physical self-destruction control method based on energetic thin film according to claim 9, characterized in that: In step (2), the first energetic film (5) undergoes an alloying reaction to release heat, high-temperature gas and shock waves, thereby forming a local high pressure of ≥2MPa in the closed chamber formed by the packaging shell base (1) and the packaging top cover (2), thereby crushing the physical structure of the target chip (4).

Images