Semiconductor laser heat sink structure
By designing grooves composed of high thermal conductivity grooves and insulating materials in the heat sink structure of semiconductor lasers, the problem of temperature and light field inhomogeneity caused by the centralized distribution of current is solved, and more effective heat dissipation and longer service life are achieved.
Patent Information
- Application Number
- CN202510384120.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-12-10
- Filing Date
- 2025-03-28
- Publication Date
- 2025-06-24
AI Technical Summary
Existing semiconductor lasers have local temperature increase and unbalanced light field distribution due to the centralized current distribution at large current density, affecting the device's threshold current, output power and lifetime.
A semiconductor laser heat sink structure is designed, including grooves composed of high thermal conductivity groove structure and insulating material. By designing high thermal conductivity grooves in the central area of the laser ridge waveguide, heat accumulation is reduced, heat dissipation capacity is enhanced, and current distribution is balanced by controlling the number and position of the grooves.
It effectively improves the heat dissipation ability of the laser, improves the uniformity of temperature and light field distribution, and extends the service life of the laser.
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Figure CN120200091A_ABST
Abstract
Description
[0001] This disclosure claims the priority of a Chinese patent application No. 202411808197.1 filed on December 10, 2024, the entire content of which is incorporated herein by reference. Technical Field
[0002] This disclosure relates to the technical field of semiconductor lasers, and particularly to a heat sink structure for a semiconductor laser. Background Art
[0003] Due to their excellent light-emitting characteristics, semiconductor lasers are widely used in multiple fields such as lighting, display, communication, and medical applications. These devices have the advantages of high brightness, low power consumption, small size, and light weight, providing unlimited possibilities for the development of future applications.
[0004] The edge-emitting ridge waveguide structure is one of the common structures of laser diodes. Currently, in the manufacturing process of edge-emitting ridge waveguide laser diodes, the conventional manufacturing method is to cover an insulating dielectric layer on the sidewalls and the edges of the ridge mesa, and form an electrode structure in the central region of the upper surface of the ridge mesa. Under high current density, in order to evenly diffuse the current, the prior art is to intermittently arrange multiple island current injection blocking layer structures in the central region of the top of the ridge mesa to avoid problems such as local temperature rise of the chip and uneven optical field distribution caused by concentrated current distribution, such as gain spatial hole burning. However, since the island current injection blocking layer occupies more than about 50% of the ridge area, and the island current injection blocking layer usually selects silicon oxide or silicon nitride materials, the thermal conductivity ranges from 1.1 W / m·K to 1.9 W / m·K, and its thermal conductivity is relatively low, and there is a large difference in the coefficient of thermal expansion between the III-V semiconductor laser material. The coefficient of thermal expansion of silicon oxide or silicon nitride ranges from 0.5×10 −6 K -1 -3.2×10 −6 K -1 , and the coefficient of thermal expansion of the III-V semiconductor laser material ranges from 4.5×10 −6 K -1 -6×10 −6 K -1 . If the heat of the laser chip cannot be effectively transferred to the heat sink with a larger heat capacity and a larger body surface area, most of the heat accumulates at the laser chip, which will affect the characteristics of the laser such as the threshold current, output power, lasing wavelength, and optical field distribution, reduce the life of the laser, and even burn out the laser. Summary of the Invention
[0005] In view of the above problems, this disclosure provides a heat sink structure for a semiconductor laser, which improves the problems of uneven temperature distribution and optical field distribution of the laser caused by the concentrated distribution of the injection current in the traditional overheat sink, and at the same time can effectively improve the heat dissipation ability of the laser and extend its service life.
[0006] The present disclosure provides a heat sink structure for a semiconductor laser, comprising: a heat sink substrate, an upper electrode layer, a lower electrode layer, a solder layer, a groove structure, and a semiconductor laser. The upper electrode layer is disposed on a first surface of the heat sink substrate; the lower electrode layer is disposed on a second surface of the heat sink substrate, and the first surface and the second surface are opposite to each other; the solder layer is disposed on the upper electrode layer; the groove structure is disposed on the solder layer; the semiconductor laser is disposed on the solder layer, and the groove structure is disposed in a central region of the ridge waveguide of the semiconductor laser and distributed along the ridge extension direction.
[0007] The heat sink structure for a semiconductor laser provided by the present disclosure has at least the following technical effects:
[0008] In the central region of the laser ridge waveguide and along the ridge extension direction, a high-thermal-conductivity groove heat sink structure corresponding to the packaging position of the heat sink is designed to reduce the accumulation of heat between the chip center and the solder layer, increase the heat dissipation capacity of the heat sink solder layer, and improve the heat dissipation effect.
[0009] A heat sink structure using a first type of groove and a second type of groove made of an insulating material controls the number of grooves and the relative positions of the grooves along the ridge extension direction, balances the injection current distribution, solves the current crowding effect caused by the concentrated injection of current into the central region of the laser ridge, and avoids problems such as laser wavelength instability and non-uniformity of the optical field distribution caused thereby. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Through the following description of the embodiments of the present disclosure with reference to the drawings, the above content and other objects, features, and advantages of the present disclosure will become clearer. In the drawings:
[0011] Figure 1 Schematically shows a schematic diagram of a heat sink structure for a semiconductor laser according to an embodiment of the present disclosure;
[0012] Figure 2 Schematically shows a side view of a heat sink structure for a semiconductor laser according to an embodiment of the present disclosure;
[0013] Figure 3 Schematically shows a front top view of a heat sink structure for a semiconductor laser according to an embodiment of the present disclosure;
[0014] Figure 4 Schematically shows a back top view of a heat sink structure for a semiconductor laser according to an embodiment of the present disclosure;
[0015] Figure 5 Schematically shows a schematic diagram of a semiconductor laser heat sink packaging chip according to an embodiment of the present disclosure;
[0016] Figure 6Schematically shows a side view of a semiconductor laser heat sink packaged chip according to an embodiment of the present disclosure;
[0017] Figure 7 Schematically shows a front top view of a semiconductor laser heat sink packaged chip according to an embodiment of the present disclosure;
[0018] Figure 8 Schematically shows a cross-sectional view of the position of the first type of groove after packaging according to an embodiment of the present disclosure;
[0019] Figure 9 Schematically shows a cross-sectional view of the position of the second type of groove after packaging according to an embodiment of the present disclosure;
[0020] Figure 10 Schematically shows a schematic diagram of wire bonding between a laser chip and a heat sink lead according to an embodiment of the present disclosure;
[0021] In the figure: 1. Heat sink substrate; 2. Upper electrode layer; 3. Lower electrode layer; 4. Solder layer; 5. Groove structure; 6. Semiconductor laser chip; 7. Gold wire; 101 Electrical isolation area; 20. First electrode area; 21. Second electrode area; 201, 211, 301 Metal transition layer; 202, 212, 302 Metal adhesion layer; 501. First type of groove; 502. Second type of groove; 601. Ridge of the laser chip; 602. Insulating layer of the laser chip; 603. P-side electrode of the laser chip; 604. N-side electrode of the laser chip. Detailed implementation manners
[0022] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present disclosure. In the following detailed description, for the sake of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, obviously, one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present disclosure.
[0023] The terms used herein are merely for describing specific embodiments and are not intended to limit the present disclosure. The terms "including", "comprising", etc. used herein indicate the presence of the described features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.
[0024] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.
[0025] In the case of using expressions such as "at least one of A, B, and C", generally, it should be interpreted according to the meaning that those skilled in the art usually understand this expression (for example, "a system having at least one of A, B, and C" should include, but not be limited to, a system having only A, only B, only C, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).
[0026] Embodiments of the present disclosure provide a novel semiconductor laser heat sink structure. The laser chip can still adopt a conventional ridge waveguide structure without an island pattern. By designing a groove structure composed of a highly thermally conductive and insulating material with a thermal conductivity range on the solder layer on top of the electrode layer on the heat sink, the heat dissipation capacity between the laser chip and the transition heat sink is improved, and at the same time, the problem of uneven temperature distribution and optical field distribution of the laser caused by the concentrated distribution of the injection current in the traditional excessive heat sink is improved. The following is a detailed introduction.
[0027] Please refer to Figures 1 to 10 , the semiconductor laser heat sink structure of this embodiment may include:
[0028] A heat sink substrate 1, an upper electrode layer 2, a lower electrode layer 3, a solder layer 4, a groove structure 5, and a semiconductor laser 6.
[0029] The upper electrode layer 2 is disposed on the first surface of the heat sink substrate 1; the lower electrode layer 3 is disposed on the second surface of the heat sink substrate 1, and the first surface and the second surface are opposite; the solder layer 4 is disposed on the upper electrode layer 2; the groove structure 5 is disposed on the solder layer 4; the semiconductor laser 6 is disposed on the solder layer 4, and the groove structure 5 is disposed in the central region of the ridge waveguide of the semiconductor laser 6 and is distributed along the ridge extension direction.
[0030] Based on the above embodiments, in some embodiments, the upper electrode layer 2 includes a first electrode region and a second electrode region arranged in parallel, and the gap between the first electrode region and the second electrode region forms an electrical isolation region; the gap between the first electrode and the second electrode and the edge of the heat sink substrate forms a non-conductive blank region; the first electrode region includes a metal transition layer and a metal adhesion layer. The gap between the lower electrode layer 3 and the edge of the heat sink substrate 1 forms a non-conductive blank region. The solder layer 4 is disposed on the metal adhesion layer. The P-side metal electrode of the semiconductor laser 6 is in contact with the solder layer, and the N-side metal electrode is connected to the second electrode region through a gold wire 7. The P-side electrode of the laser chip is the positive electrode, and the N-side electrode of the laser chip is the negative electrode. Gold wires with both ends welded to the top surface of the second electrode layer and the top surface of the laser chip respectively can be used, and the number of the gold wires can be multiple and arranged at intervals.
[0031] Based on the above embodiments, in some other embodiments, the material of the heat sink substrate 1 includes any one or a combination of aluminum nitride ceramics, silicon carbide ceramics, alumina ceramics, beryllium oxide ceramics, and diamond. The length of the heat sink substrate 1 is 800 um - 10 mm, the width is 800 um - 10 mm, and the thickness is 0.15 mm - 1.5 mm.
[0032] Based on the above embodiments, in some other embodiments, the metal materials of the upper electrode layer 2 and the lower electrode layer 3 include any one or a combination of high-purity copper and high-purity nickel gold. The material of the metal transition layer is copper, with a thickness of 30 um - 100 um, and the material of the metal adhesion layer is nickel gold, with a thickness greater than or equal to 1 um.
[0033] Based on the above embodiments, in some other embodiments, the solder layer 4 is composed of any one or a combination of prefabricated eutectic AuSn solder, In solder, In-Sn solder, and nano-sintered silver paste and a surface thin gold layer. The length of the solder layer 4 is 750 um - 10.05 mm, the width is 200 um - 1 mm, the thickness is 2 um - 6 um, and the thickness of the surface thin gold layer is 20 nm - 50 nm.
[0034] Based on the above embodiments, in some other embodiments, the groove structure 5 includes a first type of groove and a second type of groove.
[0035] In the plane of the heat sink substrate 1, the first type of groove is arranged longitudinally on the center line of the transverse direction of the solder layer 4, and the second type of groove is arranged longitudinally on both sides of the transverse direction of the solder layer 4 at a distance from the center line. The longitudinal direction is along the ridge waveguide extension direction, and the transverse direction is perpendicular to the ridge waveguide extension direction. The first type of groove and the second type of groove penetrate the length direction of the solder layer 4 longitudinally.
[0036] Based on the above embodiments, in some other embodiments, the number of the first grooves arranged transversely is 1, and the number of the second grooves arranged transversely is 2; the distance between the second type of groove and both sides of the transverse direction of the solder layer 4 at a distance from the center line is 5 um - 20 um, the distance between the first type of groove and the adjacent second type of groove is 5 um - 15 um, and the distance between adjacent first type of grooves or adjacent second type of grooves is 20 um - 50 um. The length of the first type of groove and the second type of groove is 5 um - 20 um, the width is 5 um - 20 um, the thickness is 2 um - 16 um, the groove structure 5 is flush with the top of the solder layer 4, and the groove depth is less than or equal to the thickness of the metal adhesion layer.
[0037] Based on the above embodiments, in some other embodiments, the shapes of the first type of groove and the second type of groove include rectangle, square, circle, or hexagon.
[0038] Based on the above embodiments, in some other embodiments, the material of the groove structure 5 is a material with high thermal conductivity, and the thermal conductivity ranges from 140 W / m·K to 930 W / m·K, which may include any one or a combination of more of alumina, silicon nitride, diamond, aluminum nitride, hexagonal boron nitride.
[0039] Based on the above embodiments, in some other embodiments, the semiconductor laser 6 is encapsulated in the solder area of the solder layer 4 in a flip-chip bonding manner, keeping the light-emitting surface flush with or protruding a certain distance from one edge of the heat sink substrate 1; the metal electrode covering the ridge of the semiconductor laser 6 contacts the top of the groove structure 5, and the groove structure 5 is located within the ridge width to make the current distribution in the injected ridge region uniform and reduce the current crowding effect.
[0040] To more clearly illustrate the semiconductor laser heat sink structure of the embodiments of the present disclosure, a specific example will be understood and described below. It should be understood that the parameter values, types of materials, and shapes of each structure involved in the following examples are for the purpose of more clearly illustrating the present disclosure and are not used to limit the present disclosure.
[0041] Please continue to refer to Figures 1 - 10 As shown, the semiconductor laser heat sink structure in this embodiment may include: a heat sink substrate 1; an upper electrode layer 2 and a lower electrode layer 3 are respectively electroplated on the top and bottom of the heat sink substrate 1; non-conductive blank areas are formed between the upper and lower electrode layers and the substrate edge; the upper electrode layer 2 includes a first electrode area 20 and a second electrode area 21; the blank area between the first electrode area 20 and the second electrode area 21 forms an electrical isolation area 101; the first electrode area 20 includes a metal transition layer 201 and a metal adhesion layer 202, and a solder layer 4 is plated on the top of the metal adhesion layer 202; the second electrode area 21 includes a metal transition layer 211 and a metal adhesion layer 212; the lower electrode layer 3 includes a metal transition layer 301 and a metal adhesion layer 302; a high thermal conductivity and insulating groove structure 5 is provided in the central area of the solder layer 4; the groove structure 5 includes first-type grooves 501 and second-type grooves 502 alternately forming a periodic groove structure; the semiconductor laser chip 6 is aligned and pasted at the edge of the heat sink solder layer 4 in a flip-chip bonding form; a ridge waveguide 601 is etched on the P surface of the chip 6, and the top edge and side walls of the ridge waveguide 601 are coated with an insulating layer 602, and a P surface electrode 603 is covered on the ridge top; an N surface electrode 604 is deposited on the back of the chip 6; the P surface electrode 603 covering the ridge type table is aligned and pasted with the groove structure 5; the lead 7 wire-bonds the N surface electrode 604 to the metal adhesion layer 202 of the second electrode area.
[0042] The heat sink substrate 1 is generally rectangular in shape and can be set into other shapes according to needs. The substrate 1 is made of ceramic material, which can be any one or a combination of silicon carbide, diamond, beryllium oxide, aluminum nitride materials, or other types of materials can be selected according to actual needs. In this embodiment, the substrate 1 is preferably silicon carbide ceramic. Silicon carbide has the advantages of stable chemical properties, high thermal conductivity, small thermal expansion coefficient, good wear resistance, etc. In this embodiment, the substrate size is 800 um * 1300 um * 350 um.
[0043] On the top surface of the heat sink substrate 1, the patterns of the electrode layer 2 and the reserved groove structure 5 are lithographed; the upper electrode layer 2 includes a first electrode region 20 and a second electrode region 21. The first electrode region 20 and the second electrode region 21 are separated by an isolation region 101 to ensure that there is no short - circuit phenomenon between the first electrode region 20 and the second electrode region 21. The first electrode region 20 includes, from bottom to top: a metal transition layer 201 in contact with the heat sink substrate and a metal adhesion layer 202 in contact with the solder 4, and the pattern sizes and horizontal positions of the 201 and 202 are the same; the second electrode region 21 includes, from bottom to top: a metal transition layer 211 in contact with the heat sink substrate and a metal adhesion layer 212 in contact with the gold wire 7, and the pattern sizes and horizontal positions of the 211 and 212 are the same. In this embodiment, in the first step, the metal transition layers 201 and 202 are lithographed, and metal transition Cu is electroplated with a thickness of 75 μm; in the second step, the metal adhesion layers 202 and 212 are lithographed, and an opening groove is designed in the 202 pattern to reserve space for the subsequent production of the groove structure 5. The groove size is 10 um * 10um. The material of the metal adhesion layer is Ni / Au with a thickness of 3 um / 2 um. The size of the first electrode region is 500 um * 1300um, and the size of the second electrode region is 200 um * 1300 um.
[0044] There is no metal layer on the non - conductive blank area and the electrical isolation area 101 on the top surface of the heat sink substrate 1, and the material is the heat sink substrate. In this embodiment, the size of the isolation area is 50 um * 1300 um, and the width of the non - conductive blank area is 25 um.
[0045] On the bottom surface of the heat sink substrate 1, a lower electrode 3 is lithographed. The lower electrode 3 and the edge of the heat substrate 1 form a non - conductive blank area pattern, and the width of the non - conductive blank area is 25 um. The lower electrode region 3 includes, from top to bottom: a metal transition layer 301 in contact with the heat sink substrate and a metal adhesion layer 302 welded to the metal package or the solid heat sink, and the pattern sizes and horizontal positions of the 301 and 302 are the same; the metal layer material and thickness of the lower electrode 3 are the same as those of the upper electrode 2, and the sizes and horizontal positions of the non - conductive blank areas on the bottom surface and the top surface are the same. The size of the lower electrode is 450 um * 1300 um.
[0046] Perform the second photolithography on the metal contact layer 202 at the top of the first electrode region 20 and prepare the solder layer 4. It is required that the opening groove pattern reserved during the first photolithography be the same as that set during the second photolithography of the solder layer. The solder layer material can be selected from any one or a combination of AuSn, In solder, In-Sn solder, nano-sintered silver paste, etc. In this case, a prefabricated AuSn solder layer is selected, with a ratio of Au(75±5wt%)Sn and a thickness of 4 um. The AuSn ratio and thickness can be adjusted according to specific circumstances. The size of the solder area is 250 um * 1300 um, and the widths of the boundaries of the solder area from the boundaries of the metal contact layer 202 are 25 um and 200 um respectively.
[0047] Lithograph a groove opening in the central area of the solder layer 4, and cover other non-groove areas with photoresist. Deposit a high thermal conductivity and insulating layer in the groove to form a groove structure, and remove the high thermal conductivity insulating layer and photoresist in the remaining non-groove areas. The high thermal conductivity and insulating material can be selected from one or a combination of alumina, silicon nitride, diamond, aluminum nitride, hexagonal boron nitride, etc. In this embodiment, the selected material is diamond with a thickness of 8 um. The bottom of this insulating layer contacts the bottom of the metal contact layer and is flush with the top of the solder layer. The thermal conductivity is 620 W / m·K.
[0048] In the insulating groove structure 5, the groove structure includes separated first-type grooves 501 and second-type grooves 502. In the heat sink plane, define the direction along the extension direction of the ridge waveguide 601 as "longitudinal", and the direction perpendicular to the extension direction of the ridge waveguide 601 as "transverse". The first-type grooves 501 are arranged along the "longitudinal" direction on the "transverse" center line of the solder layer, and the number of first grooves arranged in each "transverse" direction is 1. The second-type grooves 502 are arranged along the "longitudinal" direction on both sides of the "transverse" center line of the solder layer at a distance of 5 um - 20 um, and the number of second grooves arranged in each "transverse" direction is 2. The interval distance between the first-type groove 501 and the adjacent second-type groove 502 is 10 um, and the interval distance between adjacent first-type grooves or adjacent second-type grooves is 30 um. The groove shape can be rectangular, square, circular, hexagonal, etc.; in this case, a square structure is adopted, and the size of all grooves is 10 um * 10 um. The total width of the area occupied by the first-type and second-type groove structures is 30 um, and the length is 1300 um.
[0049] The size of the laser chip 6 is 150 um * 600 um * 110 um, the size of the chip electrode is 110 um * 600 um, and the width of the ridge waveguide 601 is 60 um, which is greater than the total width of the first type of groove 501 and the second type of groove 502; the top edge and both side walls of the ridge waveguide 601 are coated with an insulating layer 602 to enable current to be concentratedly injected into the ridge waveguide 601 and prevent the lateral diffusion of current. The thickness of the insulating layer is 300 nm, and the material can be selected from one or a combination of SiO2, Al2O3, Si3N4, MgF, CaF, MgO, AlN, SiNO. In this embodiment, SiO2 is used.
[0050] A P-side metal electrode 603 is covered on the ridge waveguide 601; the chip is eutectically welded to the solder area 4 in a flip-chip packaging manner, keeping the light-emitting surface flush with or protruding a certain distance from one edge of the solder layer. And the metal electrode covered on the ridge platform contacts the top of the groove, and the groove is located within the ridge width, so that the current distribution injected into the ridge area is uniform, reducing the current crowding effect.
[0051] Figure 8 and Figure 9 are respectively Figure 7 The cross-sectional views of the heat sink and the chip package at positions A (any position of the first type of groove below the chip) and B (any position of the second type of groove below the chip). The direction perpendicular to the extension direction of the ridge waveguide is defined as the cross-section of the ridge. In the vertical direction within the cross-section of the ridge, the extension line of the center of 1 first type of groove 501 coincides with the center of the ridge, and 2 second type of grooves 502 are symmetrically distributed 5 um on both sides of the extension line of the ridge center. The first type of groove and the second type of groove are located near the central area in the extension direction of the ridge, which can balance the cavity current, make the current distribution in the ridge area uniform, reduce the current crowding effect, and at the same time improve the self-heating effect caused by the high current density in the local area, enhancing the heat dissipation performance of the laser chip.
[0052] Use a high-precision chip packaging device for chip soldering. The soldering process requires heating up to 300 °C, applying pressure to the chip, and introducing an inert gas N2 for protection.
[0053] In this embodiment, the two ends of the gold wire 8 are respectively soldered to the top surface of the metal adhesion layer 212 and the N-side electrode 604 of the laser chip. The number of gold wires can be one or more. In this embodiment, the number of gold wires is multiple and they are arranged at intervals. The wire diameter of the gold wire is 2 mil. Multiple wires can increase the load of the lead, can withstand greater current and voltage, and improve the stability of the semiconductor laser heat sink during operation. In this disclosure, the lead is bonded by thermocompression bonding. The key steps include the precise positioning and peeling of the gold wire, the thorough cleaning of the solder joints, the precise alignment and fixation of the gold wire and the chip pins, and finally, through precisely controlled heating and applying pressure, the soldering of the chip pins is achieved.
[0054] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, a segment of a program, or a part of code, and the above-mentioned module, segment of a program, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, and combinations of blocks in the block diagram or flowchart, may be implemented by a dedicated hardware-based system that performs the specified functions or operations, or may be implemented by a combination of dedicated hardware and computer instructions.
[0055] Those skilled in the art can understand that the features recited in the various embodiments and / or claims of the present disclosure can be combined or combined in various ways, even if such combinations or combinations are not explicitly recited in the present disclosure. In particular, without departing from the spirit and teachings of the present disclosure, the features recited in the various embodiments and / or claims of the present disclosure can be combined and combined in various ways. All such combinations and / or combinations fall within the scope of the present disclosure.
[0056] The above describes the embodiments of the present disclosure. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although the embodiments are described separately above, this does not mean that the measures in each embodiment cannot be used advantageously in combination. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art can make various substitutions and modifications, and all such substitutions and modifications should fall within the scope of the present disclosure.
Claims
1. A semiconductor laser heat sink structure, characterized in that: include: Heat sink substrate (1); The upper electrode layer (2) is arranged on the first surface of the heat sink substrate (1); A lower electrode layer (3) is provided on a second surface of the heat sink substrate (1), the first surface and the second surface being opposite to each other; A solder layer (4) is provided on the upper electrode layer (2); A groove structure (5) provided on the solder layer (4); A semiconductor laser (6) is arranged on the solder layer (4); the groove structure (5) is arranged in the central area of the ridge waveguide of the semiconductor laser (6) and is distributed along the ridge extension direction.
2. The semiconductor laser heat sink structure according to claim 1, characterized in that: The upper electrode layer (2) comprises a first electrode region and a second electrode region arranged in parallel, the gap between the first electrode region and the second electrode region constitutes an electrically isolated region; the gap between the first electrode and the second electrode and the edge of the heat sink substrate constitutes a non-conductive blank region; the first electrode region comprises a metal transition layer and a metal adhesion layer; The gap between the lower electrode layer (3) and the edge of the heat sink substrate (1) forms a non-conductive blank area; The material layer (4) is arranged on the metal adhesion layer; The P-side metal electrode of the semiconductor laser (6) is in contact with the solder layer, and the N-side metal electrode is connected to the second electrode region via a gold wire (7).
3. The semiconductor laser heat sink structure according to claim 1 or 2, characterized in that: The groove structure (5) comprises a first type of groove and a second type of groove; In the plane of the heat sink substrate (1), the first type of grooves are arranged along the longitudinal direction on the transverse center line of the solder layer (4), and the second type of grooves are arranged along the longitudinal direction on both sides of the transverse distance from the center line of the solder layer (4), the longitudinal direction is along the extension direction of the ridge waveguide, and the transverse direction is perpendicular to the extension direction of the ridge waveguide, and the first type of grooves and the second type of grooves are longitudinally extending through the length direction of the solder layer (4).
4. The semiconductor laser heat sink structure according to claim 3, characterized in that: The number of each transversely arranged first groove is 1, and the number of each transversely arranged second groove is 2; the transverse distance between the second type of groove and the solder layer (4) on both sides of the center line is 5 um-20 um, the distance between the first type of groove and the adjacent second type of groove is 5 um-15 um, and the distance between adjacent first type of grooves or between adjacent second type of grooves is 20 um-50 um; The length of the first type of groove and the second type of groove is 5 um-20 um, the width is 5 um-20 um, and the thickness is 2 um-16 um. The groove structure (5) is flush with the top of the solder layer (4), and the groove depth is less than or equal to the thickness of the metal adhesion layer.
5. The semiconductor laser heat sink structure according to claim 3, characterized in that: The shapes of the first type of grooves and the second type of grooves include rectangle, square, circle or hexagon.
6. The semiconductor laser heat sink structure according to claim 1, characterized in that: The material of the groove structure (5) includes any one or more combinations of aluminum oxide, silicon nitride, diamond, aluminum nitride, and hexagonal boron nitride.
7. The semiconductor laser heat sink structure according to claim 1 or 2, characterized in that: The material used for the heat sink substrate (1) includes any one or more combinations of aluminum nitride ceramics, silicon carbide ceramics, aluminum oxide ceramics, beryllium oxide ceramics, and diamond. The heat sink substrate (1) has a length of 800 um-10 mm, a width of 800 um-10 mm, and a thickness of 0.15 mm-1.5 mm.
8. The semiconductor laser heat sink structure according to claim 2, characterized in that: The metal materials of the upper electrode layer (2) and the lower electrode layer (3) include any one or more combinations of high-purity copper and high-purity nickel-gold, the material of the metal transition layer includes copper with a thickness of 30 um-100 um, and the material of the metal adhesion layer includes nickel-gold with a thickness greater than or equal to 1 um.
9. The semiconductor laser heat sink structure according to claim 2, characterized in that: The solder layer (4) is made of a material selected from any one or more of prefabricated eutectic phase AuSn solder, In solder, In-Sn solder, and nano-sintered silver paste and a thin gold layer on the surface. The solder layer (4) has a length of 750 um-10.05 mm, a width of 200 um-1 mm, and a thickness of 2 um-6 um. The thickness of the thin gold layer on the surface is 20 nm-50 nm.
10. The semiconductor laser heat sink structure according to claim 1, characterized in that: The semiconductor laser (6) is packaged in the solder area of the solder layer (4) in a flip-chip soldering manner, with the light-emitting surface being aligned with an edge of the heat sink substrate (1) or protruding a certain distance; the metal electrode covered on the ridge-shaped table of the semiconductor laser (6) is in contact with the top of the groove structure (5), and the groove structure (5) is located within the ridge width.