Preparation method of printed circuit board, printed circuit board and electronic equipment

Abstract

The invention discloses a preparation method of a printed circuit board, the printed circuit board and electronic equipment, and relates to the technical field of printed circuit boards, and the method comprises the steps: obtaining the bonding pad flatness of the printed circuit board in response to the condition that the warping degree of the printed circuit board is greater than a warping degree threshold value, and obtaining the bonding pad flatness of the printed circuit board in response to the condition that the bonding pad flatness of the printed circuit board is greater than a flatness threshold value; according to the method, the filling area is determined, the plurality of solder-resisting filling layers are formed around the bonding pad of the filling area, and the surface height difference of the sides, deviating from the printed circuit board, of the plurality of solder-resisting filling layers is smaller than or equal to the flatness threshold value, so that the flatness of the filling area is improved, and the overall flatness of the printed circuit board is also improved; the problems of pseudo soldering and missing soldering when the printed circuit board and the electronic component are welded due to fluctuation of the printed circuit board are avoided, the welding reliability of the printed circuit board is improved, and the use reliability and stability of the printed circuit board are further improved.

Description

Technical Field

[0001] The present application relates to the technical field of printed circuit boards, and in particular to a method for preparing a printed circuit board, a printed circuit board and an electronic device. Background Art

[0002] With the continuous development of electronic technology, the signal rate is constantly increasing, and the size of printed circuit boards (PCBs), memory sticks, and chip packages are getting larger and larger. During welding, if the deformation of the printed circuit board is too large, the surface of the printed circuit board is ups and downs, which will affect the normal welding of electronic components and printed circuit boards, resulting in problems such as cold welding and empty welding, thereby affecting its signal performance. Summary of the invention

[0003] The present application provides a method for preparing a printed circuit board, a printed circuit board and an electronic device, which reduces the problem of cold soldering, avoids rework due to poor soldering, and enhances the soldering reliability and stability of the printed circuit board.

[0004] In a first aspect, the present application provides a method for preparing a printed circuit board, comprising: obtaining a warpage of the printed circuit board;

[0005] In response to the warpage of the printed circuit board being greater than a warpage threshold, acquiring the flatness of a pad of the printed circuit board;

[0006] In response to the flatness of the pads of the printed circuit board being greater than a flatness threshold, determining a fill-in area;

[0007] Forming a plurality of solder resist leveling layers around the pads located in the leveling area;

[0008] Wherein, a surface height difference of a plurality of the solder resist leveling layers away from a side of the printed circuit board is less than or equal to the flatness threshold.

[0009] In a second aspect, the present application also provides a printed circuit board, comprising a flattened area and a filled area;

[0010] It also includes: a substrate, a pad and a solder resist layer; the substrate is covered with a solder resist layer, a solder resist window is provided on the solder resist layer, and the pad is located in the solder resist window; the flatness of the pad in the filled area is greater than the flatness threshold;

[0011] It also includes: a solder resist filling layer, which is located around the pad in the filling area; wherein the height difference of the planes of the plurality of solder resist filling layers away from one side of the printed circuit board is less than or equal to a flatness threshold.

[0012] In a third aspect, the present application further provides a printed circuit board assembly, comprising the printed circuit board provided in the second aspect; and further comprising: an electronic component; the electronic component is connected to the printed circuit board via solder.

[0013] In a fourth aspect, the present application further provides an electronic device, comprising the printed circuit board assembly provided in the third aspect.

[0014] The method for preparing a printed circuit board provided in the embodiment of the present application obtains the flatness of the pads of the printed circuit board in response to the warpage of the printed circuit board being greater than the warpage threshold, determines a filling area in response to the flatness of the pads of the printed circuit board being greater than the flatness threshold, and forms a plurality of solder resist filling layers around the pads in the filling area, wherein the surface height difference of the plurality of solder resist filling layers away from the side of the printed circuit board is less than or equal to the flatness threshold, thereby improving the flatness of the filling area and the overall flatness of the printed circuit board, avoiding the problem of cold solder joints and empty solder joints when the printed circuit board is welded to electronic components due to the ups and downs of the printed circuit board, improving the welding reliability of the printed circuit board, and further improving the reliability and stability of the printed circuit board, and facilitating the development of the printed circuit board in the direction of high density and miniaturization. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0016] Figure 1 A schematic diagram of a process for preparing a printed circuit board provided in an embodiment of the present application;

[0017] Figure 2 A schematic diagram of a top view of a printed circuit board provided in an embodiment of the present application;

[0018] Figure 3 for Figure 2 Schematic diagram of the cross-sectional structure along the AA' direction;

[0019] Figure 4 A schematic diagram of a twisted state of a printed circuit board provided in an embodiment of the present application;

[0020] Figure 5 A schematic diagram of a curved shape of a printed circuit board provided in an embodiment of the present application;

[0021] Figure 6 A schematic diagram of forming a solder resist protective layer mask on a printed circuit board provided in an embodiment of the present application;

[0022] Figure 7 Another top - view structural schematic diagram of a printed circuit board provided by an embodiment of the present application;

[0023] Figure 8 is Figure 7 The sectional structural schematic diagram along the BB' direction in

[0024] Among them, the corresponding relationship between the reference numerals and the structural names: 1, printed circuit board; 2, solder pad; 3, solder mask layer; 4, solder mask filling layer; 5, solder mask protection mask; 11, substrate; S, filling area; S1, ball grid array package welding area; S2, memory module welding area; S3, hollowed - out area. Specific embodiments

[0025] In order to more clearly understand the above - mentioned objects, features, and advantages of the present disclosure, the solutions of the present disclosure will be further described below. It should be noted that, without conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other.

[0026] In the following description, many specific details are set forth in order to fully understand the present disclosure, but the present disclosure can also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only a part of the embodiments of the present disclosure, rather than all the embodiments.

[0027] In order to enable those skilled in the art of the present technology to better understand the solutions of the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0028] In the related art, the memory module connector is a long - strip device. Currently, during welding, a tray is usually used to support the bottom surface of the printed circuit board to minimize the deformation of the printed circuit board as much as possible. However, the benefit of adding tray support to improve flatness is relatively small. After problems such as false soldering and void soldering occur on the printed circuit board, only rework can be carried out.

[0029] For ball grid array package chips, since the flatness of the printed circuit board is relatively high in a small - size area, a ball grid array package chip with a size of 50mm * 50mm can be directly soldered on the printed circuit board. For larger - size ball grid array package chips, a metal Socket (socket) needs to be assembled on the printed circuit board to electrically connect the pins of the Socket to the solder pads of the printed circuit board, and then the ball grid array package chip is placed in the Socket to electrically connect the ball grid array package chip to the Socket to improve the stability of the electrical connection between the ball grid array package chip and the printed circuit board. However, after the assembly of the Socket, the performance of the signal will be greatly fluctuated and affected. Due to the presence of the Socket, the layout space occupied by the ball grid array package chip on the printed circuit board will become larger, which is not conducive to the development of the board card towards high - density and miniaturization.

[0030] To solve the above problems, an embodiment of the present application provides a method for manufacturing a printed circuit board. Figure 1 It is a schematic flowchart of a method for manufacturing a printed circuit board provided by an embodiment of the present application. As Figure 1 shown, the method for manufacturing a printed circuit board includes:

[0031] S101. Obtain the warpage of the printed circuit board.

[0032] Specifically, after the printed circuit board is manufactured, the warpage of different printed circuit boards is different. The warpage of multiple printed circuit boards is detected, and it is judged whether the warpage of the printed circuit board meets the requirements according to the warpage of the printed circuit board, and the printed circuit boards that do not meet the requirements are screened out for subsequent processing. For example, the warpage of ten printed circuit boards is detected. If the warpage of two printed circuit boards is greater than the warpage threshold, these two printed circuit boards are subjected to subsequent processing. For the printed circuit boards with warpage less than or equal to the warpage threshold, it is considered that they can be normally soldered with electronic components, and the subsequent soldering steps are directly carried out.

[0033] S102. In response to the warpage of the printed circuit board being greater than the warpage threshold, obtain the pad flatness of the printed circuit board.

[0034] Specifically, in response to the warpage of the printed circuit board being greater than the warpage threshold, for example, 0.6 mm, it indicates that the warpage degree of the printed circuit board is too large, and there is a high probability of problems such as false soldering and void soldering when soldering with electronic components. Therefore, a more refined pad flatness test is continued for this printed circuit board to judge whether the pad flatness of the printed circuit board meets the standard.

[0035] It should be noted that the warpage threshold can be set according to the actual use of the printed circuit board, and the embodiment of the present application does not limit this.

[0036] S103. In response to the pad flatness of the printed circuit board being greater than the flatness threshold, determine the filling area.

[0037] Figure 2 It is a schematic top view structure diagram of a printed circuit board provided by an embodiment of the present application. Figure 3 is Figure 2 the schematic cross-sectional structure diagram along the AA' direction in Figure 2 and Figure 3During the preparation of the printed circuit board 1, the pad 2 and the substrate of the printed circuit board 1 are pressed together. Within a certain area, if the flatness of the pad is greater than the flatness threshold, it means that the pad 2 is undulating, and the surface of the printed circuit board 1 in the area around the pad 2 is also undulating. It is easy for the printed circuit board 1 and the electronic components to have problems of cold solder joints and empty solder joints during the welding process. Therefore, the area on the printed circuit board 1 where the flatness of the pad is greater than the flatness threshold is used as the filling area S to improve the flatness of the filling area S.

[0038] In some embodiments, obtaining the flatness of pads of a printed circuit board includes: obtaining the flatness of pads of a ball grid array package soldering area and / or a memory bar soldering area of ​​the printed circuit board.

[0039] Specifically, Figure 2 As shown, for example, a ball grid array (BGA) welding area S1 and a memory bar welding area S2 may be provided on the printed circuit board 1, and pads 2 are provided in both the ball grid array welding area S1 and the memory bar welding area S2. The pads 2 in the ball grid array welding area S1 are used to be electrically connected to the ball grid array welding chip, and the pads 2 in the memory bar welding area S2 are used to be electrically connected to the memory bar connector. Since the number of pads 2 in the ball grid array welding area S1 and the memory bar welding area S2 is large and the arrangement is dense, the ball grid array welding area S1 and the memory bar welding area S2 account for a large proportion on the entire printed circuit board 1, and have a greater impact on the welding quality of the printed circuit board 1. Therefore, in response to the warpage of the printed circuit board 1 being greater than the warpage threshold, the pad flatness of at least one area of ​​the ball grid array welding area S1 and the memory bar welding area S2 on the circuit board may be detected.

[0040] It should be noted that Figure 2 Only some pads of the ball grid array package welding area S1 and the memory stick welding area S2 are shown by way of example. The specific number of pads 2 can be set according to the actual use requirements of the printed circuit board, and the embodiments of the present application are not limited to this.

[0041] For example, in response to the flatness of the pad in the ball grid array package welding area S1 being greater than the flatness threshold, the ball grid array package welding area S1 is used as the filling area S. When the ball grid array package chip is subsequently welded, there is no need to introduce a socket, which facilitates the development of the printed circuit board in the direction of high density and miniaturization. In response to the flatness of the pad in the memory bar welding area S2 being greater than the flatness threshold, the memory bar welding area S2 is used as the filling area S.

[0042] It should be noted that only the ball grid array package welding area S1 can be used as the filling area, or only the memory bar welding area S2 can be used as the filling area, orFigure 2 As shown, the ball grid array package welding area S1 and the memory bar welding area S2 are both used as the filling area S, which can be set according to the actual detection result of the flatness of the pad of the printed circuit board 1, and the embodiment of the present application is not limited to this.

[0043] Optionally, the flatness threshold is the sum of a solder setting error and a deformation error of the soldered electronic component.

[0044] For example, solder needs to be added between the pads of the printed circuit board and the pins of the electronic components for welding. When adding solder, a steel mesh will be set on the printed circuit board, and the openings of the steel mesh correspond to the pad settings. The solder is added to the pads through the openings of the steel mesh. Therefore, the thickness of the solder should theoretically be the same as the thickness of the steel mesh, but there will be a certain error when actually laying the solder. The thickness of the steel mesh is, for example, 0.18mm, the thickness of the solder after printing is about 0.22mm, the solder setting error is 0.04mm, and the deformation error of the welded electronic components is, for example, 0.07mm. The flatness threshold can be set to 0.11mm so that the flatness of the pads can meet the error requirements of the solder and the welded electronic components.

[0045] It should be noted that the specific value of the flatness threshold can be set according to the actual design requirements of the printed circuit board, and the embodiments of the present application do not limit this. It can be understood that the steel mesh thickness, solder thickness, and deformation error of the welded electronic components provided above are all examples, and the specific values ​​are not limited in the embodiments of the present application.

[0046] S104, forming a plurality of solder resist leveling layers around the pads located in the leveling area.

[0047] The height difference of the surfaces of the plurality of solder resist leveling layers away from the side of the printed circuit board is less than or equal to the flatness threshold.

[0048] Specifically, combined Figure 2 and Figure 3 A solder resist filling layer 4 is formed around the pad 2 of the filling area S, and the surface height difference of the solder resist filling layer 4 away from the printed circuit board side is less than or equal to the flatness threshold, thereby improving the flatness of the filling area S, and also improving the overall flatness of the printed circuit board 1, avoiding the problem of cold solder joints and empty solder joints when the printed circuit board 1 is soldered to electronic components due to the ups and downs of the printed circuit board 1, and improving the reliability and stability of the printed circuit board.

[0049] In an embodiment of the present application, in response to the warpage degree of the printed circuit board being greater than the warpage degree threshold, the pad flatness of the printed circuit board is obtained, and in response to the pad flatness of the printed circuit board being greater than the flatness threshold, a filling area is determined, and a plurality of solder mask filling layers are formed around the pads in the filling area. The surface height difference on the side of the plurality of solder mask filling layers facing away from the printed circuit board is less than or equal to the flatness threshold, which improves the flatness of the filling area and also improves the overall flatness of the printed circuit board, avoiding problems such as false soldering and void soldering when the printed circuit board is welded to electronic components, improving the welding reliability of the printed circuit board, and further improving the use reliability and stability of the printed circuit board, facilitating the development of the printed circuit board in the direction of high density and miniaturization.

[0050] Optionally, obtaining the warpage degree of the printed circuit board includes: obtaining the maximum warpage value of the printed circuit board and the thickness of the printed circuit board; determining the warpage degree of the printed circuit board according to the difference between the maximum warpage value of the printed circuit board and the thickness of the printed circuit board.

[0051] Specifically, a warping machine can be used to test the printed circuit board without connected electronic components, that is, the warpage degree of the printed circuit board. The test process of the warping machine is well-known to those skilled in the art, and the embodiments of the present application will not elaborate herein.

[0052] Regarding the warpage degree of the printed circuit board, it can be divided into twist and bow according to the shape. Figure 4 It is a schematic diagram of the twist form of a printed circuit board provided by an embodiment of the present application. Figure 4 The dotted line part is the actual twist form of the printed circuit board. In order to improve the maximum warpage value of the obtained printed circuit board, the first side 101 of the printed circuit board can be flush with the reference plane 103 with the test platform as the reference plane, and the third side 104 will rise to the position of the second side 102, that is, the twist form of the printed circuit board after adjustment based on the reference plane of the solid black line printed circuit board.

[0053] During the data collection process, the lowest point H5 is found. Taking H5 as the demarcation point, taking Figure 2 the direction as an example, the highest points H1 and H8 of the warped printed circuit board on both sides of the lowest point H5 are found. Figure 2Among them, H1, H2, H3, H4, and H5 are four equally spaced points on the first side 101, and H5, H6, H7, and H8 are four equally spaced points on the second side 102. According to the distance between adjacent acquisition points, calculate the distance from H1 to H5 and the distance from H5 to H8, and measure the projection length D1 of the first side 101 on the reference plane 103, and the projection length D2 of the third side 104 on the reference plane 103. Determine the angle A according to the distance from H1 to H5 and the projection length D1 of the first side 101 on the reference plane 103, and determine the angle B according to the distance from H5 to H8 and the projection length D2 of the third side 104 on the reference plane 103. Then, the included angle C between the second side 102 and the reference plane 103 = A + B. The lengths of the second side 102 and the third side 104 are equal, both D3 = D2 / cosB, and the maximum warpage value D4 = D3 * sinC.

[0054] Figure 5 It is a schematic diagram of the bow shape of a printed circuit board provided by an embodiment of the present application. H13 is the highest warpage point of the printed circuit board, and the measured maximum warpage value D5 in the bow shape of the printed circuit board is the distance between H13 and the reference plane 103.

[0055] The above process of calculating the maximum warpage value of the printed circuit board can be executed by a warpage tester, for example. The warpage tester can directly output the maximum warpage value of the printed circuit board. Since the thickness of the printed circuit board is a known quantity, for the warpage degree of the under-twisted shape and the bow shape of the printed circuit board, for example, it can be equal to the difference between the maximum warpage value and the thickness of the printed circuit board. Exemplarily, if the thickness of the printed circuit board is D6, then the warpage degree W of the printed circuit board in the twisted shape = D4 - D6, and the warpage degree W of the printed circuit board in the bow shape = D5 - D6.

[0056] Optionally, obtaining the pad flatness of the printed circuit board includes: obtaining the height of each pad on the printed circuit board; determining the pad flatness of the printed circuit board according to the difference between the maximum height and the minimum height of the pads.

[0057] Specifically, for example, when obtaining the flatness of the pads in the ball grid array package welding area and / or the memory module welding area of the printed circuit board, the height of each pad in the ball grid array package welding area and / or the memory module welding area can be measured. The height of the pad is, for example, the distance from the upper surface of the pad to the bottom surface of the printed circuit board. Screen the measured height values of each pad, and use the difference between the maximum height and the minimum height of the pads as the pad flatness of the printed circuit board.

[0058] Optionally, a plurality of solder mask filling layers are formed around the pads located in the filled area, including: obtaining the highest point of the printed circuit board in the filled area; forming a solder mask filling layer at a position in the filled area that is lower than the highest point of the printed circuit board.

[0059] Exemplarily, in combination with Figure 2 and Figure 3 , the height data of the printed circuit board 1 in the filled area S can be collected under an optical microscope, and the highest point H of the printed circuit board 1 in the filled area S can be found. A solder mask filling layer 4 is formed at a position in the filled area S that is lower than the highest point H of the printed circuit board 1. For example, the solder mask filling layer 4 can be formed by spraying a solder mask agent at a position in the filled area S that is lower than the highest point of the printed circuit board 1. It should be noted that other methods can also be used to form the solder mask filling layer 4, and the embodiments of the present application do not limit this.

[0060] Thus, by forming the solder mask filling layer 4 at a position in the filled area S that is lower than the highest point of the printed circuit board 1, the height difference between the surface of the solder mask filling layer 4 facing away from the printed circuit board 1 and the plane where the highest point of the printed circuit board 1 is located is less than or equal to the flatness threshold, improving the flatness of the filled area S and also improving the overall flatness of the printed circuit board 1, avoiding problems such as false soldering and void soldering when the printed circuit board 1 is welded to electronic components, and improving the use reliability and stability of the printed circuit board 1.

[0061] Optionally, before forming a plurality of solder mask filling layers around the pads located in the filled area, it further includes: forming a solder mask protection mask on the printed circuit board; wherein, the solder mask protection mask includes a plurality of hollowed-out areas, and the hollowed-out areas correspond to the positions where the solder mask filling layers are formed; after forming a plurality of solder mask filling layers around the pads located in the filled area, it further includes: removing the solder mask protection mask.

[0062] Figure 6 As shown in Figure 6 which is a schematic diagram of forming a solder mask protection mask on the printed circuit board provided by the embodiments of the present application, before forming a plurality of solder mask filling layers around the pad 2 located in the filled area, a solder mask protection mask 5 can be formed on the printed circuit board 1. The solder mask protection mask 5 includes a plurality of hollowed-out areas S3, and the hollowed-out areas S3 can correspond to the positions where the solder mask filling layers are formed. The solder mask agent can be sprayed onto the printed circuit board through the hollowed-out areas S3, so that the solder mask filling layers are formed at the positions corresponding to the hollowed-out areas S3. After forming a plurality of solder mask filling layers around the pads located in the filled area, the solder mask protection mask is removed to avoid affecting subsequent welding processes.

[0063] The non-hollowed area S3 of the printed circuit board can cover the pads on the printed circuit board and the positions where the solder mask leveling layer does not need to be formed, so as to avoid the problem that the solder mask is sprayed onto the pads, affecting the electrical performance of the pads, and can also avoid the problem that the solder mask is sprayed onto other positions where the solder mask leveling layer does not need to be formed, resulting in poor flatness of the printed circuit board, improving the process reliability of forming the solder mask leveling layer.

[0064] Optionally, the pads in the hollowed area and the filled area do not overlap.

[0065] Figure 7 This is a top view structural schematic diagram of another printed circuit board provided by an embodiment of the present application. Figure 8 is Figure 7 a cross-sectional structural schematic diagram along the BB' direction in. Combining Figures 6 to 8 , it can be set that the pads in the hollowed area S3 and the filled area do not overlap, so that the position where the solder mask is sprayed is spaced from the pads 2 in the filled area by a preset distance. Finally, the Figure 7 and Figure 8 solder mask leveling layer 4 in is spaced from the pads 2 in the filled area S by a preset distance L. Thus, it is prevented that when the solder mask leveling layer 4 is formed, the solder mask is sprayed onto the pads 2, affecting the electrical performance of the pads 2, and the process reliability of forming the solder mask leveling layer 4 is improved.

[0066] The method for manufacturing a printed circuit board provided by an embodiment of the present application, by responding to the warpage degree of the printed circuit board being greater than the warpage degree threshold, obtaining the pad flatness of the printed circuit board, and responding to the pad flatness of the printed circuit board being greater than the flatness threshold, determining the filled area, and forming a plurality of solder mask leveling layers around the pads in the filled area, the height difference between the surfaces on the side of the plurality of solder mask leveling layers facing away from the printed circuit board is less than or equal to the flatness threshold, improving the flatness of the filled area and also improving the overall flatness of the printed circuit board, avoiding the problems of false soldering and void soldering when the printed circuit board is welded to electronic components due to the high and low undulations of the printed circuit board, and improving the use reliability and stability of the printed circuit board.

[0067] An embodiment of the present application further provides a printed circuit board. Combining Figure 2 , Figure 3 , Figures 6 to 8 , the printed circuit board 1 includes a flat area and a filled area S; it further includes: a substrate 11, pads 2, and a solder mask layer 3; the solder mask layer 3 covers the substrate 11, and a solder mask opening is provided on the solder mask layer 3, and the pads 2 are located in the solder mask opening; the pad flatness in the filled area S is greater than the flatness threshold; a solder mask leveling layer 4, the solder mask leveling layer 4 is located around the pads 2 in the filled area S; wherein, the height difference between the planes on the side of the plurality of solder mask leveling layers 4 facing away from the printed circuit board 1 is less than or equal to the flatness threshold.

[0068] Specifically, combiningFigure 2 , Figure 3 , Figures 6 to 8 The printed circuit board 1 may include, for example, a flattened area and a filled area S, both of which include a substrate 11, a pad 2 and a solder resist layer 3. The substrate 11 includes, for example, a phenolic paper substrate, an epoxy resin glass cloth board, a composite substrate, and a metal substrate, etc., which is not limited in the embodiments of the present application. Copper foil is laid on the substrate 11, and after the copper foil and the substrate 11 are pressed together, the pad 2 is formed by photolithography and the like. The printed circuit board 1 also includes a solder resist layer 3, and a solder resist window is provided on the solder resist layer 3. The pad 2 is located in the solder resist window. The solder resist layer 3 covers the wiring on the copper layer to prevent the wiring on the printed circuit board 1 from contacting other metals, solder or other conductive objects to cause a short circuit.

[0069] The flatness of the pads in the filling area S is greater than the flatness threshold. Therefore, in order to avoid the problems of cold solder joints and empty solder joints of the printed circuit board 1, a solder resist filling layer 4 is arranged around the pads 2 in the filling area S, and the surface height difference of the solder resist filling layer 4 on the side away from the printed circuit board 1 is less than or equal to the flatness threshold, thereby improving the flatness of the filling area S, and also improving the overall flatness of the printed circuit board 1, avoiding the problems of cold solder joints and empty solder joints when the printed circuit board 1 is welded to electronic components due to the ups and downs of the printed circuit board 1, improving the welding reliability of the printed circuit board 1, and then also improving the reliability and stability of the use of the printed circuit board 1, which is convenient for the printed circuit board 1 to develop in the direction of high density and miniaturization.

[0070] The printed circuit board provided in the embodiment of the present application is provided with a solder resist filling layer 4 in the filling area S, and the surface height difference of the solder resist filling layer 4 on the side away from the printed circuit board 1 is less than or equal to the flatness threshold, thereby improving the flatness of the filling area S, and also improving the overall flatness of the printed circuit board 1, avoiding the problem of cold solder joints and empty solder joints caused by the ups and downs of the printed circuit board 1, and improving the reliability and stability of the printed circuit board 1.

[0071] Optionally, combined Figure 7 and Figure 8 , a preset distance is provided between the pad 2 in the filling area S and the surrounding solder resist filling layer 4 .

[0072] Specifically, combined Figure 7 and Figure 8 Before forming a plurality of solder resist filling layers 4 around the pads 2 located in the filling area S, in order to prevent the solder resist from being sprayed onto the pads 2, a layer as shown in FIG. Figure 6The solder mask protection layer mask 5 therein, the hollowed-out area S3 of the solder mask protection layer mask 5 does not overlap with the pad 2 of the filling area S, so that the position where the solder resist can be sprayed is spaced from the pad 2 of the filling area S by a preset distance L. Finally, the formed solder resist filling layer 4 is spaced from the pad 2 of the filling area S by a preset distance L, preventing the solder resist from being sprayed onto the pad 2 when the solder resist filling layer 4 is formed, which affects the electrical performance of the pad 2, and improving the process reliability of forming the solder resist filling layer 4.

[0073] The printed circuit board provided by the embodiment of the present application uses the solder resist filling layer 4 to improve the flatness of the filling area S and also improve the overall flatness of the printed circuit board 1, avoiding the problems of false soldering and void soldering caused by the unevenness of the printed circuit board 1, and improving the use reliability and stability of the printed circuit board 1. And by setting a preset distance between the pad 2 in the filling area S and the surrounding solder resist filling layer 4, the problem that the solder resist is sprayed onto the pad 2 and affects the electrical performance of the pad 2 is avoided, and the process reliability of forming the solder resist filling layer 4 is improved.

[0074] The embodiment of the present application also provides a printed circuit board assembly, including the printed circuit board provided by the above embodiment; further including: electronic components; the electronic components are connected to the printed circuit board through solder.

[0075] Specifically, the printed circuit board assembly includes, for example, a printed circuit board and electronic components. The printed circuit board can be electrically connected to the electronic components through solder. And because there is a solder resist filling layer in the filling area of the printed circuit board, when the stencil is placed on the solder resist filling layer, the stencil is on the same horizontal plane, and the distance between the upper surface of the pad with a lower height and the stencil is greater than the distance between the upper surface of the pad with a higher height and the stencil. Therefore, the amount of solder in the filling area is related to the height of the pad, that is, the amount of solder added to the pad with a lower height is greater than the amount of solder added to the pad with a higher height, so that the solder is on the same horizontal plane. Thus, the difference in the amount of solder is used to make up for the height difference of the pads, reducing the problem of the risk of false soldering and void soldering when welding electronic components, and enhancing the reliability and stability of the printed circuit board assembly.

[0076] The embodiment of the present application also provides an electronic device, including any printed circuit board assembly provided by the above embodiment. Therefore, it can also solve the same technical problems as the above printed circuit board assembly embodiment and achieve the same technical effects, which will not be elaborated here.

[0077] The provided method for manufacturing a printed circuit board, the printed circuit board, and the electronic device respond to the warpage degree of the printed circuit board being greater than the warpage degree threshold, obtain the pad flatness of the printed circuit board, and respond to the pad flatness of the printed circuit board being greater than the flatness threshold to determine the filling area, and form a plurality of solder mask filling layers around the pads in the filling area. The surface height difference of the plurality of solder mask filling layers on the side away from the printed circuit board is less than or equal to the flatness threshold, which improves the flatness of the filling area and also improves the overall flatness of the printed circuit board, avoiding problems such as false soldering and void soldering during the soldering of the printed circuit board and the electronic components, improving the soldering reliability of the printed circuit board, and further improving the use reliability and stability of the printed circuit board, facilitating the development of the printed circuit board in the direction of high density and miniaturization.

[0078] It should be noted that in this text, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0079] The above are only specific embodiments of the present disclosure, enabling those skilled in the art to understand or implement the present disclosure. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to these embodiments herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for preparing a printed circuit board, characterized in that: include: Obtain the warpage of the printed circuit board; In response to the warpage of the printed circuit board being greater than a warpage threshold, acquiring the flatness of a pad of the printed circuit board; In response to the flatness of the pads of the printed circuit board being greater than a flatness threshold, determining a fill-in area; Forming a plurality of solder resist leveling layers around the pads located in the leveling area; Wherein, a surface height difference of a plurality of the solder resist leveling layers away from a side of the printed circuit board is less than or equal to the flatness threshold.

2. The method for preparing a printed circuit board according to claim 1, characterized in that: The step of obtaining the warpage of the printed circuit board comprises: Obtaining a maximum warpage value of a printed circuit board and a thickness of the printed circuit board; The warpage of the printed circuit board is determined according to a difference between a maximum warpage value of the printed circuit board and a thickness of the printed circuit board.

3. The method for preparing a printed circuit board according to claim 1, characterized in that: The obtaining of the flatness of the pads of the printed circuit board comprises: Obtaining the height of each pad on the printed circuit board; The flatness of the pads of the printed circuit board is determined according to the difference between the maximum height of the pads and the minimum height of the pads.

4. The method for preparing a printed circuit board according to claim 1, characterized in that: The step of forming a plurality of solder resist leveling layers around the pads located in the leveling area comprises: Obtain the highest point of the printed circuit board in the leveled area; A solder resist leveling layer is formed in the leveling area at a position lower than the highest point of the printed circuit board.

5. The method for preparing a printed circuit board according to claim 1, characterized in that: Before forming a plurality of solder resist filling layers around the pads located in the filling area, the method further comprises: Forming a solder resist protective layer mask on the printed circuit board; wherein the solder resist protective layer mask includes a plurality of hollow areas, and the hollow areas correspond to positions where the solder resist filling layer is formed; After forming a plurality of solder resist filling layers around the pads located in the filling area, the method further includes: removing the solder resist protection layer mask.

6. The method for preparing a printed circuit board according to claim 5, characterized in that: The solder pads in the hollow area and the filled area do not overlap.

7. A printed circuit board, characterized in that: include: Leveling and filling areas; It also includes: a substrate, a pad and a solder resist layer; the substrate is covered with a solder resist layer, a solder resist window is provided on the solder resist layer, and the pad is located in the solder resist window; the flatness of the pad in the filled area is greater than the flatness threshold; It also includes: a solder resist filling layer, which is located around the pad in the filling area; wherein the height difference of the planes of the plurality of solder resist filling layers away from one side of the printed circuit board is less than or equal to a flatness threshold.

8. The printed circuit board according to claim 7, characterized in that: The pad located in the filling area is spaced a preset distance from the surrounding solder resist filling layer.

9. A printed circuit board assembly, characterized in that: It comprises the printed circuit board as described in any one of claims 7-8; and also comprises: an electronic component; the electronic component is connected to the printed circuit board through solder.

10. An electronic device, characterized in that: Comprising the printed circuit board assembly of claim 9.

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