Chamber impedance management in processing chamber

Abstract

Embodiments of the present disclosure include apparatuses and methods for controlling plasma uniformity by controlling plasma density in a bulk plasma over a central region and a circumferential edge region of a substrate. Plasma uniformity may be controlled during plasma processing by using an RF tuning circuit coupled to one of a plurality of electrodes positioned relative to a substrate. By adjusting the electrical characteristics of at least one of the RF tuning circuits, the effect of the generated RF fundamental frequency and associated RF harmonic frequency on the plasma processing results can be controlled. Beneficially, one or more of the use of the tuning circuit and methods of using the tuning circuit may be used to provide individual tuning knobs to control reactive neutral concentration, ion energy and angular distribution, ion direction and direction uniformity, as well as to individually control ion flux and reactive neutral uniformity on a substrate surface.

Description

BACKGROUND OF THE INVENTION

[0001] FIELD

[0002] Embodiments herein relate to a plasma generation apparatus for semiconductor device manufacturing, and more particularly to a processing chamber configured to generate plasma in a chamber space and process a semiconductor substrate therein.

[0003] RELATED ART DESCRIPTION

[0004] Reliably generating high aspect ratio features is one of the key technological challenges for next-generation semiconductor devices. One method of forming high aspect ratio features uses a plasma-assisted etching process (such as a reactive ion etch (RIE) process) to transfer an opening in a masking layer to an exposed portion of the substrate surface thereunder.

[0005] In a typical plasma-assisted etching process, a substrate is positioned on a substrate support (such as an electrostatic chuck (ESC) disposed in a processing chamber), plasma is formed above the substrate, and ions are accelerated from the plasma toward the substrate across a plasma sheath (i.e., an electron-depleted region) formed between the plasma and the substrate surface. The opening in the masking layer is transferred to the substrate surface via a combination of chemical and physical interactions of neutrals generated by the plasma and impinging ions that provide anisotropic etching. The processing result at the substrate surface depends (among other things) on the characteristics of the plasma and the plasma sheath formed above it.

[0006] Often, a plasma chamber is configured to form capacitively coupled plasma and control the plasma sheath by using two or more radio frequency (RF) powers. For example, a high-frequency component may be used to ignite and sustain the plasma, which determines the plasma density and thus the ion flux at the substrate surface, while a lower-frequency component may be used to control the voltage drop across the plasma sheath.

[0007] However, non-uniformities in plasma density neutralization and / or the shape of the plasma sheath (attributed to harmonic generation during plasma formation) can lead to undesired process result variations in the etched feature profile and etch uniformity. Excessive process non-uniformity can adversely affect device yield and reduce device yield. Such non-uniformities are often particularly evident near the substrate edge and can be caused by, among other things, non-uniform power distribution, changes in chamber geometry, differences in surface material properties, and / or electrical discontinuities between the substrate edge and the surface of an ESC positioned close to that edge. It is believed that the material discontinuity at the substrate edge is attributed to the boundary effect generated by RF waves, which results in non-uniformity at the substrate edge. Harmonic frequency waves generated by the RF power used to generate the plasma have been identified as a major source of etch rate and profile non-uniformity. Since harmonics are at least partially generated non-linearly by the plasma sheath (and it is difficult to completely remove the effect of harmonics on the already formed plasma sheath), proper management and / or reduction of harmonic frequency waves is important for overall plasma uniformity control. It is believed that since some of the generated RF harmonics have wavelengths short relative to the size of the substrate being processed, standing waves caused by the generated harmonics can lead to non-uniform plasma formed from the center to the edge of the substrate, resulting in etch rate non-uniformity and an overall tilt of the etched features.

[0008] Accordingly, there is a need in the art to control and / or minimize the adverse effects of boundary effects and generated RF harmonics inside the plasma chamber. There is also a need for systems, apparatuses, and methods that address the above problems. SUMMARY OF THE INVENTION

[0009] Embodiments provided herein generally include apparatuses (e.g., plasma processing systems) and methods for plasma processing of substrates in a processing chamber. In some embodiments, aspects of the apparatuses and methods relate to improving process uniformity on a substrate surface, reducing the defectivity on a substrate surface, or both.

[0010] Embodiments of the present disclosure include a plasma processing chamber. A substrate support assembly having a substrate support surface is disposed within a processing space of the plasma processing chamber. The substrate support assembly includes a first electrode; a first portion of a dielectric material, the first portion of the dielectric material being disposed over the first electrode, the first portion of the dielectric material forming the substrate support surface; and a second electrode, the second electrode being disposed at a distance from the first electrode in a first direction parallel to the substrate support surface. A first voltage generator is electrically coupled to the first electrode. A radio frequency (RF) generator is electrically coupled to an RF electrode, wherein the RF generator is configured to generate a plasma within the processing space by delivering an RF signal to the RF electrode, and the RF signal includes a fundamental RF frequency. A first filter assembly is electrically coupled between the first electrode and the first voltage generator, wherein the first filter assembly includes one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and harmonics of the fundamental RF frequency received at the first electrode from flowing to the first voltage generator. A first tuning circuit is electrically coupled between the first electrode and the first filter assembly, wherein the first tuning circuit includes a plurality of impedance generating elements, the plurality of impedance generating elements including at least one or more variable impedance elements. The plurality of impedance generating elements of the first tuning circuit are configured to adjust one or more characteristics of the fundamental RF frequency and / or one of the harmonics of the fundamental RF frequency established at the first electrode when a plasma is generated within the processing space.

[0011] Embodiments of the present disclosure include a method of processing a substrate in a plasma processing chamber. The method includes generating and maintaining a plasma within a processing space of the plasma processing chamber, wherein generating and maintaining the plasma is performed by delivering a radio frequency (RF) signal to an RF electrode, and the RF signal includes a fundamental RF frequency. A first portion of the plasma is formed over a substrate support surface of a substrate support assembly and the first electrode. A second portion of the plasma is formed over the substrate support surface of the substrate support assembly and the second electrode. By using a tuning circuit coupled to the first electrode, one or more characteristics of the fundamental RF frequency and / or a harmonic of the fundamental RF frequency at the first electrode are adjusted relative to one or more characteristics of the fundamental RF frequency and / or the harmonics of the fundamental RF frequency at the second electrode to change a ratio of a plasma density in the second portion of the plasma to a plasma density in the first portion of the plasma.

[0012] Other embodiments include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Accordingly, a manner in which the above-described features of the present disclosure can be understood in detail can be obtained by referring to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings only illustrate exemplary embodiments and should not be considered as limiting its scope, and other equally effective embodiments are allowed.

[0014] Figures 1A to 1B FIG. is a schematic cross-sectional view of a processing system configured to practice the methods set forth herein according to one or more embodiments.

[0015] Figure 2 FIG. is a simplified schematic diagram of one or both of the processing systems illustrated in Figures 1A to 1B according to one or more embodiments.

[0016] Figure 3 FIG. is a simplified schematic diagram of a PV source component that can be used in one or both of the processing systems illustrated in Figures 1A to 1B according to one or more embodiments.

[0017] Figure 4 FIG. illustrates a PV waveform including a plurality of voltage pulses that can be provided within the power delivery line of the first PV source component illustrated in Figure 3 according to one or more embodiments.

[0018] Figures 5A to 5D FIG. illustrates an example radio frequency (RF) waveform that can be established at an electrode using the embodiments described herein.

[0019] Figures 6A to 6B FIG. is a graph of process results using an edge tuning circuit configuration according to the embodiments described herein.

[0020] Figure 7 FIG. is a diagram illustrating a processing method that can be performed using the embodiments described herein.

[0021] For the sake of facilitating understanding, wherever possible, the same element symbols have been used to denote the same elements common to the various figures. It is contemplated that the elements and features of one embodiment can be beneficially incorporated into other embodiments without further recitation. DETAILED DESCRIPTION

[0022] Embodiments of the present disclosure will include apparatuses and methods for processing substrates in a plasma processing chamber. In some embodiments, aspects of the apparatuses and methods relate to improving the process results of plasma processing on the surface of a substrate. In some embodiments, these apparatuses and methods provide improved control over the uniformity of the plasma formed over the center and edges of the substrate and / or the distribution of ion flux and energy at the substrate surface.

[0023] Embodiments of the present disclosure may include an apparatus and method for providing a pulsed voltage (PV) waveform delivered from one or more pulsed voltage (PV) generators to one or more electrodes within a processing chamber, while a radio frequency (RF) generated RF waveform is provided from an RF generator to one or more RF electrodes within the processing chamber. The provided PV waveform delivered from one or more PV generators is configured to establish a substantially constant sheath voltage to provide a desired ion energy distribution function (IEDF) at a substrate surface during one or more plasma processing operations performed within the processing chamber.

[0024] Some embodiments of the present disclosure include an apparatus and method for controlling plasma uniformity, e.g., by controlling the electron density in the bulk plasma over a central region and a circumferential edge region of a substrate. In some embodiments, plasma uniformity is controlled during plasma processing by using an RF tuning circuit coupled to one of a plurality of electrodes positioned relative to the substrate. In one example, plasma uniformity is controlled by using an RF tuning circuit coupled to an electrode centrally positioned beneath the substrate and / or an RF tuning circuit coupled to an electrode positioned beneath an edge of the substrate. Accordingly, by adjusting the electrical characteristics of at least one of the RF tuning circuits, the effects of the generated RF fundamental frequency and associated RF harmonic frequencies on plasma processing results can be controlled. More specifically, it has been found that by adjusting and controlling the properties of one or more of the generated RF fundamental and harmonic frequencies, such as the amplitude and phase of the RF frequency, plasma processing uniformity and process results can be improved. Advantageously, one or more of the use of the tuning circuit and the method of using the tuning circuit can be used to provide individual tuning knobs to control the reactive neutral species concentration, ion energy and angular distribution, ion direction and direction uniformity, and individually control the ion flux and / or reactive neutral species uniformity on the substrate surface.

[0025] Example of plasma processing system

[0026] Figure 1A and Figure 1B are schematic cross-sectional views of corresponding processing systems 10A and 10B configured to perform one or more of the plasma processing methods set forth herein. Figure 2 is a simplified schematic diagram of a processing scenario that can be used with one or both of processing systems 10A and 10B in accordance with one or more embodiments disclosed herein. Figure 3Illustrative examples of tuning circuits and filter configurations within a PV source assembly are presented in accordance with one or more embodiments disclosed herein, which can be used in one or both of processing systems 10A and 10B to control and adjust plasma uniformity over a substrate surface.

[0027] In some embodiments, Figure 1A and Figure 1B processing systems 10A and 10B illustrated in are configured for plasma-assisted etching processes, such as reactive ion etch (RIE) plasma processing. However, it should be noted that the embodiments described herein can also be used with processing systems configured for other plasma-assisted processes, such as plasma-enhanced deposition processes (e.g., plasma-enhanced chemical vapor deposition (PECVD) processes, plasma-enhanced physical vapor deposition (PEPVD) processes, plasma-enhanced atomic layer deposition (PEALD) processes), plasma processing treatments, or plasma-based ion implantation processes (e.g., plasma doping (PLAD) treatments).

[0028] As Figures 1A to 1B shown in, processing systems 10A - 10B are configured to form a capacitively coupled plasma (CCP), where the processing chamber 100 includes an upper electrode (e.g., chamber lid 123) disposed above in the processing space 129, which faces a lower electrode (e.g., substrate support assembly 136) also disposed in the processing space 129. In a typical capacitively coupled plasma (CCP) processing system, a radio frequency (RF) source (e.g., RF generator 118) is electrically coupled to one of the upper or lower electrodes (e.g., 123 or 136) and delivers an RF signal configured to ignite and sustain a plasma (e.g., plasma 101), which is capacitively coupled to each of the upper and lower electrodes and disposed in the processing region therebetween. Typically, the opposite of the upper or lower electrode (e.g., 123 or 136) can be coupled to ground or coupled to a second RF generator (not shown). In Figures 1A to 1B one or more components of the substrate support assembly 136, such as the support base 107, can be electrically coupled to the plasma generator assembly 163 including the RF generator 118. Wherein, the chamber lid 123 can be electrically coupled to ground.

[0029] AsFigures 1A to 1B As shown, each of processing systems 10A and 10B includes a processing chamber 100, which includes a substrate support assembly 136, a system controller 126, and a plasma control assembly 188. It is contemplated that in the embodiments described herein, any one or combination of the features, configurations, and / or structural components of processing system 10A (e.g., the structural components of substrate support assembly 136 and / or the electrical components of plasma control assembly 188) may be used in processing system 10B, and vice versa.

[0030] The processing chamber 100 generally includes a chamber body 113, which includes a chamber lid 123, one or more sidewalls 122, and a chamber base 124, which together define a processing space 129. The one or more sidewalls 122 and the chamber base 124 generally include materials sized and shaped to form a structural support for the components of the processing chamber 100 and configured to withstand the pressure and additional energy applied thereto while generating a plasma 101 within the vacuum environment maintained in the processing space 129 of the processing chamber 100 during processing. In one example, the one or more sidewalls 122 and the chamber base 124 are formed of a metal such as aluminum, an aluminum alloy, or a stainless steel alloy.

[0031] A gas inlet 128 disposed through the chamber lid 123 is for delivering one or more processing gases or vapors from a processing gas source 119 in fluid communication therewith to the processing space 129. In some embodiments, the chamber lid 123 includes a showerhead 127, and the gas or vapor is distributed into the processing space 129 via the showerhead 127. In some embodiments, a gas or vapor is delivered to the processing space 129 using a gas inlet (not shown) disposed through one of the one or more sidewalls 122. The substrate 103 is loaded into and removed from the processing space 129 via an opening (not shown) in one of the one or more sidewalls 122, which is sealed by a slit valve (not shown) during plasma processing of the substrate 103.

[0032] In some embodiments, a plurality of lift pins 20 disposed movably to pass through openings formed in a substrate support assembly 136 are used to facilitate transferring a substrate to and from a substrate support surface 105A. In some embodiments, the plurality of lift pins 20 are disposed above a lift pin ring (not shown) and coupled to and / or engageable with the lift pin ring, which is disposed in a process space 129. The lift pin ring may be coupled to a shaft (not shown) that extends sealingly through a chamber base 124. The shaft may be coupled to an actuator (not shown) that is configured to raise and lower the lift pin ring. When the lift pin ring is in a raised position, it engages the plurality of lift pins 20 to raise an upper surface of the lift pins above the substrate support surface 105A, thereby lifting the substrate 103 from the substrate support surface 105A and enabling a non-active (back) surface of the substrate 103 to be picked up by a robotic handler (not shown). When the lift pin ring is in a lowered position, the plurality of lift pins 20 are flush with or recessed below the substrate support surface 105A, and the substrate 103 is positioned thereon.

[0033] The system controller 126 (also referred to herein as a process chamber controller) includes a central processing unit (CPU) 133, a memory 134, and support circuitry 135. The system controller 126 is configured to control process sequences during processing of the substrate 103, including the substrate biasing methods described herein. The CPU 133 is a general-purpose computer processor configured for use in an industrial setting to control the processing chamber 100 and associated sub-processors. The memory 134 described herein (which is generally non-volatile memory) may include random access memory, read-only memory, a floppy disk, or a hard disk drive, or other suitable forms of digital memory, local or remote. The support circuitry 135 is coupled to the CPU 133 in a conventional manner and may include a cache, a clock circuit, an input / output subsystem, a power supply, and the like, and combinations thereof. Software instructions (programs) and data may be encoded and stored within the memory 134 for instructing a processor within the CPU 133. Software programs (or computer instructions) readable by the CPU 133 in the system controller 126 determine which tasks are to be performed by components in the processing system 10A and / or 10B. Generally, programs readable by the CPU 133 in the system controller 126 include program code that, when executed by a processor (CPU 133), performs tasks related to the plasma processing scenarios described herein. The program may include instructions for controlling various hardware and electrical components within the processing system 10A and / or 10B to perform various process tasks and various process sequences for implementing the methods described herein. In one embodiment, the program includes instructions for performing one or more of the methods described herein.

[0034] The plasma control assembly 188 generally includes a plasma generator assembly 163, a first PV source assembly 196 for establishing a first pulsed voltage (PV) waveform at the bias electrode 104, and a second PV source assembly 197 for establishing a second PV waveform at the edge control electrode 115. In some embodiments, the plasma generator assembly 163 delivers an RF signal to the support base 107 (e.g., a power electrode or a cathode), which can be used to generate (maintain and / or ignite) a plasma 101 in a processing region 129 disposed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the RF generator 118 is configured to deliver an RF signal having a frequency greater than 400 kHz, such as about 1 MHz or higher, or about 2 MHz or higher (such as about 13.56 MHz or higher, about 27 MHz or higher, about 40 MHz or higher), or, for example, between about 30 MHz and about 200 MHz (such as between about 30 MHz and about 160 MHz, between about 30 MHz and about 120 MHz, or between about 30 MHz and about 60 MHz).

[0035] In some embodiments, the plasma control assembly 188, the first PV source assembly 196, and / or the second PV source assembly 197 include a tuning circuit 154, as discussed above, which can be used to adjust one or more characteristics of the plasma 101 formed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the tuning circuit 154 can be used to adjust the density of the portion of the plasma 101 formed above the circumferential edge region 103B of the substrate 103 relative to the density of the portion of the plasma 101 formed above the surface of the central region 103A of the substrate 103 (disposed on the substrate support assembly 136). As will be further discussed below, one or more of the edge tuning circuits 154 enables manipulation of one or more characteristics of the harmonics of the RF power provided by the RF generator 118, which is used to maintain the plasma 101 in the region above the central region 103A and / or the circumferential edge region 103B of the substrate support assembly 136. For example, the tuning circuit 154 in one or both of the PV source assemblies 196, 197 can be used to adjust one or more of the voltage, current, and / or phase characteristics of the RF signal received by the tuning circuit 154 and reflected (due to delivery of the RF signal to the plasma 101 by the RF source 118) by using the tuning circuit 154. In this example, adjusting the voltage, current, and / or phase of this portion of the incoming RF signal that is reflected is used to adjust the plasma characteristics between the central region and the edge region of the substrate.

[0036] As further discussed below, the tuning circuit 154 may be electrically coupled to the bias electrode 104 and / or the edge control electrode 115 disposed in the substrate support assembly 136. In some embodiments, an RF signal for igniting and / or maintaining the plasma 101 is delivered from the plasma generator assembly 163 to the support base 107, which is capacitively coupled to the bias electrode 104 and the edge control electrode 115 via a dielectric material layer disposed therebetween. The edge tuning circuit 154 may be used to adjust one or more characteristics of the RF power, for example, by adjusting the voltage, current, and / or phase of the RF power at the bias electrode 104 relative to the edge control electrode 115, where the RF power is used to maintain the plasma in the region above the bias electrode 104 and the edge control electrode 115.

[0037] In some embodiments, the voltage, current, and / or phase of the RF power (for igniting and / or maintaining the plasma in the region above the edge control electrode 115 and the bias electrode 104) are determined and / or monitored by measuring or determining the corresponding voltage, current, and / or phase of the RF power at various RF frequencies received at the edge control electrode 115 and / or the bias electrode 104 or at the output of the tuning circuit 154, and the harmonic components thereof. In some embodiments, one or more characteristics of the RF power at the edge control electrode 115 and / or the bias electrode 104 are measured and / or determined using the signal detection module 187. In some embodiments, one or more characteristics of the generated RF power are measured and / or determined by using the signal detection module 187 communicatively coupled to the system controller 126. The signal detection module 187 is generally configured to receive electrical signals from electrical signal traces (not shown) that are electrically coupled to various components within the processing systems 10A and 10B, such as at Figure 2 and Figure 3 nodes N1, N2, N3, N4 in. The signal detection module 187 may include a plurality of input channels 172 ( Figures 1A to 1B), each of which is configured to receive an electrical signal from a corresponding electrical signal trace and data acquisition module 169. The electrical signals received by input channel 172 may include, without limitation, one or more characteristics of the following: an RF signal delivered to an electrode; an RF waveform established at the output of a tuning circuit 154 coupled via a transmission line to one or both of bias electrode 104 and edge control electrode 115; a pulsed voltage (PV) waveform established at one or both of bias electrode 104 and edge control electrode 115; and a clamping voltage delivered to one or both of bias electrode 104 and edge control electrode 115. The electrical signals received by input channel 172 may be detected and monitored by using an RF current sensor (not shown) configured to sense an RF current I(t) and an RF voltage sensor configured to sense an RF voltage V(t). The RF current I(t) and RF voltage V(t) may be received by analog inputs of a microcontroller and may then be converted into their digital representations, which are transmitted to system controller 126. A phase angle θ (the time difference between I(t) and V(t)) may be determined by a phase detector (not shown) of input channel 172 or may be determined after I(t) and V(t) have been converted into digital representations.

[0038] In some embodiments, data acquisition module 169 is configured to generate control signals for automatically controlling one or more characteristics of the RF signal, RF waveform, PV waveform, and / or clamping voltage during substrate processing. In some embodiments, the desired changes in the one or more characteristics are communicated to signal detection module 187 by system controller 126, and the desired changes may be implemented using data acquisition module 169.

[0039] As discussed above, in some embodiments, the plasma generator assembly 163 (including the RF generator 118 and the RF matching assembly 160) is generally configured to deliver a desired amount of continuous wave (CW) or pulsed RF power to an electrode (such as the support base 107 of the substrate support assembly 136) at a desired substantially fixed sinusoidal waveform frequency based on a control signal provided by the system controller 126. In some embodiments, the support base 107 is an RF electrode that is electrically coupled to the RF generator 118 via an RF matching circuit 162 and a pulsed voltage (PV) waveform filter assembly 161, both of which are disposed within the RF matching assembly 160. The PV waveform filter assembly 161 includes one or more electrical components that are configured to substantially prevent current generated by the output of the PV waveform generator 150 from flowing through the RF power delivery line 167 and damaging the RF generator 118. The PV waveform filter assembly 161 acts as a high impedance (e.g., high Z) for the PV signal generated by the PV pulse generator within the PV waveform generator 150 and thus inhibits current flow to the RF matching circuit 162 and the RF generator 118.

[0040] In some embodiments, the RF matching assembly 160 and the RF generator 118 are used to ignite and sustain a processing plasma 101 using a processing gas disposed in the processing space 129 and a field generated by the RF power (RF signal) delivered to the support base 107 by the RF generator 118. The processing space 129 is fluidly coupled via a vacuum outlet 120 to one or more dedicated vacuum pumps that maintain the processing space 129 at a sub-atmospheric pressure condition and evacuate processing gas and / or other gases therefrom. In some embodiments, the substrate support assembly 136 disposed in the processing space 129 is mounted on a support shaft 138 that is grounded and extends through the chamber base 124.

[0041] As briefly discussed above, the substrate support assembly 136 generally includes a substrate support 105 (e.g., an ESC substrate support) and a support base 107. In some embodiments, the substrate support assembly 136 may additionally include an insulating plate 111 and a ground plate 112, as further discussed below. The support base 107 is electrically isolated from the chamber base 124 by the insulating plate 111, and the ground plate 112 is inserted between the insulating plate 111 and the chamber base 124. The substrate support 105 is thermally coupled to and disposed on the support base 107. In some embodiments, the support base 107 is configured to regulate the temperature of the substrate support 105 and the substrate 103 disposed on the substrate support 105 during substrate processing. In some embodiments, the support base 107 includes one or more cooling channels (not shown) disposed therein, which are fluidly coupled to and in fluid communication with a coolant source (not shown), such as a refrigerant source or a water source having a relatively high resistivity. In some embodiments, the substrate support 105 includes a heater (not shown), such as a resistive heating element embedded in its dielectric material. Herein, the support base 107 is formed of a corrosion-resistant thermally conductive material (such as a corrosion-resistant metal, e.g., aluminum, aluminum alloy, or stainless steel), and is coupled to the substrate support by an adhesive or by mechanical components.

[0042] Generally, the substrate support 105 is formed of a dielectric material, such as a bulk-sintered ceramic material, such as a corrosion-resistant metal oxide or metal nitride material, e.g., alumina (Al2O3), aluminum nitride (AlN), titanium oxide (TiO), titanium nitride (TiN), yttrium oxide (Y2O3), mixtures thereof, or combinations thereof. In the embodiments herein, the substrate support 105 further includes a bias electrode 104 embedded in its dielectric material. In some embodiments, one or more characteristics of the RF power for maintaining the plasma 101 in the processing region above the bias electrode 104 are determined and / or monitored by measuring the RF waveform (e.g., the first RF waveform 601 in FIG. 6) established at the bias electrode 104. Generally, the first RF waveform is established by delivering an RF signal from the plasma generator assembly 163 to the substrate support 105, which is capacitively coupled to the bias electrode.

[0043] In one configuration, the bias electrode 104 is a chucking bar that is used to secure (i.e., chuck) the substrate 103 to the substrate receiving surface 105A of the substrate support 105 and to bias the substrate 103 relative to the processing plasma 101 using one or more of the pulsed voltage biasing schemes described herein. Generally, the bias electrode 104 is formed of one or more conductive portions, such as one or more metal grids, foils, plates, or combinations thereof. In some embodiments, the bias electrode 104 is electrically coupled to a clamping network 116 that provides a chucking voltage to the bias electrode 104 using an electrical conductor (such as a coaxial power delivery line 157 (e.g., coaxial cable)), such as a static DC voltage between approximately -5000V and approximately 5000V. As will be discussed further below, the clamping network 116 includes a bias compensation circuit element 116A, a DC power supply 155, and a bias compensation module blocking capacitor (which is also referred to herein as blocking capacitor C B ). The blocking capacitor C B is disposed between the output of the pulsed voltage (PV) waveform generator 150 and the bias electrode 104 via a filter assembly 151 and a tuning circuit 154.

[0044] Referring Figure 1A and Figure 1B , the substrate support assembly 136 includes an edge control electrode 115 that is positioned below the edge ring 114 and surrounds the bias electrode 104 and / or is disposed at a distance from the center of the bias electrode 104. Generally, for a processing chamber 100 configured to process a circular substrate, the edge control electrode 115 is annular in shape, made of a conductive material, and configured to surround at least a portion of the bias electrode 104. In some embodiments (such as shown in Figure 1A ), the edge control electrode 115 is positioned within the region of the substrate support 105. In some embodiments, as depicted in Figure 1A , the edge control electrode 115 includes a conductive grid, foil, and / or plate that is disposed at a distance from the edge ring 114 similar to the distance of the bias electrode 104 from the substrate support surface 105A of the substrate support 105 (i.e., in the Z direction). In some other embodiments (such as in Figure 1BAs shown (not shown), the edge control electrode 115 includes a conductive grid, foil, and / or plate positioned on or within a region of the dielectric tube 110 that surrounds at least a portion of the bias electrode 104 and / or the substrate support 105. The dielectric tube 110 can be made of various insulating materials such as alumina, aluminum nitride, or quartz. In some embodiments, the dielectric tube 110 can include several portions made of the same or different materials. Alternatively, in some other embodiments (not shown), the edge control electrode 115 is positioned within or coupled to the edge ring 114, which is disposed on and adjacent to the substrate support 105.

[0045] In some embodiments, for the waveforms containing fundamental and harmonic radio frequency (RF) frequencies established at the bias electrode 104 and the waveforms containing fundamental and harmonic RF frequencies established at the edge control electrode 115, one or more characteristics of the RF power for maintaining the plasma 101 in the processing region above the bias electrode 104 and the edge control electrode 115 are determined and / or monitored. The fundamental and harmonic RF waves established at these electrodes and to be controlled by one or more of the methods described herein will have the same RF frequency but can have different current, voltage, and / or phase electrical characteristics. In one example, the primary RF frequency provided from the RF source 118 is provided at a radio frequency of about 40 MHz, and the harmonic to be controlled by using the tuning circuit 154 (which is coupled to the electrode (e.g., the bias electrode 104 or the edge electrode 115)) has an RF frequency of about 80 MHz (e.g., the first harmonic). In some cases, one or more characteristics of the fundamental and harmonic RF waves established at the electrodes can be manipulated by using the tuning circuit 154 within one of the PV source assemblies (such as the PV source assemblies 196 or 197) to adjust the plasma density in the region above the center or the circular edge of the substrate 103. In this example, the tuning circuit 154 in the second PV source assembly 197 can be used to control the generation of the active species in the bulk plasma 101, which enables fine control of the ion and / or radical flux at the edge (edge region 103B) of the substrate 103 relative to the central region 103A of the substrate 103.

[0046] In some embodiments and as shown, the PV source assemblies 196 and 197 include a clamping network 116 that is electrically coupled to the bias electrode 104 and the edge control electrode 115, respectively, using electrical conductors such as coaxial power delivery lines 157 and 158 (e.g., coaxial cables). The clamping network 116 can be used to deliver a static DC voltage (such as between about -5000 V and about 5000 V) to the edge control electrode and can include one or more bias compensation circuit elements 116A, a DC power supply 155, and a blocking capacitor C B . The blocking capacitor CB It is disposed between the output of the pulsed voltage (PV) waveform generator 150 and the edge control electrode 115. The clamping network 116 can be used to deliver a clamping voltage to the edge control electrode 115 to provide an additional process tuning knob, and the clamping voltage is the same as or different from the clamping voltage delivered to the bias electrode 104 from other clamping networks 116 (the first PV source assembly 196).

[0047] In some embodiments, the processing chamber 100 further includes a dielectric tube 110, or collar, which at least partially circumscribes multiple portions of the substrate support assembly 136. The dielectric tube 110 provides a dielectric barrier between the RF hot substrate support assembly 136 and the grounded liner 108, and also protects the substrate support 105 and / or the support base 107 from contact with corrosive processing gases or plasmas, cleaning gases or plasmas, or their by-products. Generally, the liner 108 circumscribes the dielectric tube 110, the insulating plate 111, and the ground plate 112. In some embodiments, the plasma barrier 109 is positioned between the cathode liner 108 and the sidewall 122 to prevent plasma from forming in the space below the plasma barrier 109 between the liner 108 and one or more sidewalls 122.

[0048] Process control scheme

[0049] Figure 2 For use with Figure 1A and Figure 1B A simplified schematic diagram of a bias and edge control scheme that can be used with one or both of the processing systems 10A-10B illustrated in. As Figure 2 shown, the RF generator 118 and the PV waveform generator 150 are configured to deliver an RF waveform and a pulsed voltage waveform, respectively, to one or more electrodes disposed within the processing space 129 of the processing chamber 100. In one embodiment, the RF generator 118 and the PV waveform generator 150 are configured to simultaneously deliver an RF waveform and a pulsed voltage waveform to one or more electrodes disposed within the substrate support assembly 136.

[0050] In a non-limiting example, the RF generator 118 and the PV waveform generator 150 are configured to deliver an RF waveform and a pulsed voltage waveform, respectively, to the support base 107 and the bias electrode 104, both of which are disposed in the substrate support assembly 136. In another example, the RF generator 118, the first PV waveform generator 150, and the second PV waveform generator 150 are configured to deliver an RF waveform, a first pulsed voltage waveform, and a second pulsed voltage waveform, respectively, to the support base 107, the bias electrode 104, and the edge control electrode 115, all of which are disposed in the substrate support assembly 136. The RF generator 118 is configured to provide the RF signal to one or more electrodes disposed in the chamber body 113 by delivering an RF signal including a sinusoidal RF waveform via the RF (plasma) matching assembly 160, which includes an RF matching circuit 162 and a PV waveform filter assembly 161. Additionally, each of the PV waveform generators 150 is configured to establish a PV waveform at the bias electrode 104 or the edge electrode 115 by delivering a pulsed voltage (PV) waveform 401 ( Figure 4 ) to one or more electrodes disposed in the chamber body 113, the pulsed voltage (PV) waveform 401 generally including a series of voltage pulses (e.g., microsecond or sub-microsecond voltage pulses, including nanosecond voltage pulses).

[0051] Referring Figure 3 , the RF filter assembly 151 includes a plurality of inductors and capacitors configured to eliminate or at least minimize RF signals (which include the fundamental RF frequency and its associated harmonics) generated due to the delivery of RF power to the formed plasma 101 by the RF generator 118, thereby preventing them from returning to the high voltage power supply 155 and the PV waveform generator 150. Generally, the RF filter assembly 151 will include at least one of a parallel resonant circuit, a low-pass filter, and one or more tuned shunt frequency rejection circuits for use in the power delivery line that couples the high voltage power supply 155 and / or the PV waveform generator 150 to their respective electrodes. In one example, as Figure 3As shown, the parallel resonant circuit includes inductor L4 and capacitor C4, which are configured to block the fundamental frequency (e.g., 40 MHz) generated by RF generator 118. In one example, the tuned shunt frequency rejection circuit is arranged to attenuate (reduce amplitude) the harmonics (e.g., 80 MHz or 160 MHz) of the fundamental frequency generated by RF generator 118. The tuned shunt frequency rejection circuit includes a series of inductor L5 and capacitor C5 arrangements, which are coupled between power delivery line 157 and ground. In some embodiments, RF filter assembly 151 may include multiple tuned shunt frequency rejection circuits (not shown), which are configured to individually attenuate different harmonic frequencies, thereby preventing them from returning to high voltage power supply 155 and PV waveform generator 150. In another example, as Figure 3 As shown, the low-pass filter includes inductor L3 and capacitor C3, which are configured to allow the PV waveform to pass through the RF filter assembly and substantially attenuate the fundamental RF frequency and all harmonics generated by RF generator 118. The low-pass filter portion of RF filter assembly 151 may be configured to attenuate RF frequencies greater than 400 kHz, such as greater than 500 kHz or even greater than 1 MHz.

[0052] As discussed above, the tuning circuit 154 within the PV source assemblies 196, 197 is generally configured to control and adjust the uniformity of the plasma formed between the chamber lid 123 and the substrate support assembly 136, for example, by controlling the plasma density (i.e., the free electron density in the bulk plasma 101) above the center and / or edges of the substrate 103. In some embodiments, as Figure 1A and Figure 2 As shown, the tuning circuit 154 is electrically coupled between the bias electrode 104 (e.g., a centrally located electrode), the RF filter assembly 151 of the first PV source assembly 196, and the PV waveform generator 150, and the tuning circuit 154 is electrically coupled between the edge control electrode 115 (edge bias electrode), the RF filter assembly 151 of the second PV source assembly 197, and the PV waveform generator 150. However, in some embodiments, the tuning circuit 154 is only located within one of the PV source assemblies 196 or 197.

[0053] Referring to Figure 3 , the tuning circuit 154 includes multiple inductors and capacitors, which are configured to control or affect the signal amplitude and / or phase of the fundamental and / or harmonic RF frequencies coupled to the bias electrode 104 and / or the edge control electrode 115 by modifying the RF impedance seen by the RF signal at the electrodes 104, 115.

[0054] This circuit of series or parallel or more complex geometry can be used to control the phase and / or amplitude of the RF signal coupled to the bias electrode 104 and / or the edge control electrode 115 by changing the impedance of the tuning circuit 154, which impedance includes a first tunable impedance (including an inductor L1 and a variable capacitor VC3 connected in series or parallel) and a second tunable impedance (including an inductor L2 and a variable capacitor VC1 connected in series or parallel). In one example, the first tunable impedance is coupled between the second tunable impedance and the corresponding electrode 104 or 105. Since the RF impedance is very high at the node N2 of the filter assembly 151, only the path through which the RF travels from the electrode 104 or 115 will pass through the tuning circuit 154, where at least one node of the tuning circuit 154 is coupled to the RF ground. Each of the first tunable impedance and the second tunable impedance can be adjusted to be tuned independently to a resonant frequency, above the resonant frequency, or below the resonant frequency. For example, the resonant frequency can be the frequency of the RF generator 118 and / or its harmonics.

[0055] In some embodiments, when the total impedance of the tuning circuit 154 and the power delivery line 157 is tuned to be very low and substantially resistive at the harmonic frequency, the RF voltage on the substrate or the edge ring surface is substantially zero at that harmonic frequency. This tuning configuration results in the RF power absorbed by the plasma at that harmonic frequency being minimized or negligible, thus minimizing the plasma non-uniformity effects generated by the harmonic frequency. Due to the setting of the impedance generating components disposed within the tuning circuit 154, the tuning circuit 154 can thus be used to attenuate and / or alter the influence of the harmonic waveform on the RF voltage established at the substrate.

[0056] When the first tunable impedance and the second tunable impedance are tuned to be above and / or below the resonant frequency, the total impedance of the tuning circuit and the power delivery line will become capacitive or inductive, which will change the RF voltage and the phase angle between the RF voltage and the RF current at the electrode 104 or 115. The RF signal amplitude may also be affected, which can depend on the RF impedance at the electrodes 104 and 115. When the nature of the load formed by the generated plasma changes, the tuning circuit 154 can be adjusted to compensate for the change in the RF signal received by the tuning circuit 154 at the harmonic frequency.

[0057] The tuning circuit 154 may further include a plurality of first tunable impedances and a plurality of second tunable impedances, each having a different resonant frequency (e.g., harmonic frequency), and being tunable to different frequency combinations above or below the associated resonant frequency. Thus, different combinations of RF amplitude and phase angle adjustments between the RF voltage and current at one or more frequencies can be obtained. These frequencies need not be related in terms of harmonics, as long as there are tunable impedances for these frequencies. Series, parallel, or more complex connections between the first tunable impedance and the second tunable impedance having different resonant frequencies are also contemplated herein.

[0058] The variable capacitors VC1 and VC3 may have a capacitance range from about 3 pF to about 5000 pF, but are not limited thereto. The inductors L1 and L2 may have an inductance range from about 0.01 μH to about 1000 μH, but are not limited thereto. The motor position actuator of the position control and monitoring circuit of the system controller 126 may further include a position sensor that indicates the mechanical position of the adjustable element, e.g., the amount of shaft rotation of a variable vacuum capacitor or the synchronous stepper motor position count after the minimum and maximum rotation positions have been determined (detecting maximum and minimum clockwise and counterclockwise shaft rotations). The position value may be correlated with a capacitance (or inductance)-position value table such that the capacitance and / or inductance values can be monitored and set to a desired position based on the desired capacitance / inductance value. The tuning element position value can be used to monitor and default the tuning element position in accordance with the teachings of the present disclosure.

[0059] In some embodiments, the type of tuning circuit 154 may be selected based on the desired ability to control the plasma density profile, which can be achieved by adjusting one or more parameters of the tuning circuit 154 such that one or more characteristics of the RF waveform established at the edge control electrode 115 can be adjusted relative to one or more characteristics of the first RF waveform established at the bias electrode 104. As briefly discussed above, Figure 3 An example of a processing chamber 100 including a plasma generator assembly 163 and a first PV source assembly 196 is schematically illustrated, and the first PV source assembly 196 includes a schematic representation of a tuning circuit 154 and an RF filter assembly 151. For purposes of simplifying the discussion and not intending to limit the scope of the present disclosure provided herein, Figure 3 only a detailed schematic of the first PV source assembly 196 is included. However, the second PV source assembly 197 can be similarly configured and controlled separately.

[0060] The arrangement of the impedance generating components within the tuning circuit 154 can also be used to attenuate harmonic RF waveforms, which will generally include at node N1 ( Figure 3) The reduction in RF power found at [location]. In some embodiments, the settings of the impedance generating components within the tuning circuit 154 are used to substantially or completely attenuate the harmonic RF waveforms such that the attenuated harmonic RF waveforms reaching the RF filter assembly 151 (e.g., node N2) are absent or negligible. The RF filter assembly 151 is then configured to further attenuate the attenuated harmonic RF waveforms to a level that is absent or negligible at the output of the PV waveform generator 150 and / or the high voltage module 155 (e.g., node N3).

[0061] In some embodiments, as Figure 3 illustrated in [figure], due to the configuration of the RF filter assembly 151 and the tuning circuit 154, the PV waveform 401 generated by the PV waveform generator 150 is allowed to pass through the RF filter assembly 151 and the tuning circuit 154 and is applied to the bias electrode 104 and established on the substrate 103. Figure 4 An example of a PV waveform 401 including multiple voltage pulses is illustrated. In this example, the PV waveform 401 provided by the PV waveform generator 150 includes multiple voltage pulses 401c of asymmetric shape, each of which includes two main phases: an ion current phase 401b and a sheath collapse phase 401a. At the end of the ion current phase 401b and at the start of the sheath collapse phase 401a, a rising edge of the PV waveform 401 is generated by the PV source assembly, which forms part of a generally short and narrow positive pulse that transitions from a negative voltage level to a positive voltage greater than zero volts. The duration of the positive part of the pulse (e.g., T OFF ) can vary and, in some embodiments, is between 1% and 90% of the waveform period (T P = T OFF + T ON ), such as between 5% and 85% of the waveform period (T P ). In one example, the repetition frequency of the voltage pulses within the PV waveform 401 can be between approximately 100 kHz and 500 kHz, such as between 200 kHz and 400 kHz. Overall control of the delivery of the PV waveform from the PV waveform generator 150 is controlled by using a signal provided from the system controller 126. In one non-limiting example, the PV waveform generator 150 is configured to maintain a predetermined, substantially constant negative voltage at its output (i.e., to ground) during the ion current phase 401b by repeatedly closing and opening one or more switches within the PV waveform generator 150 at a predetermined rate. In one example, during the first phase of the pulse interval, a first switch is used to connect the high voltage power supply to the bias electrode 104, and during the second phase of the pulse interval, a second switch is used to connect the bias electrode 104 to ground.

[0062] Advantageously, the tuning circuit 154 can be configured to provide a wide range of desired plasma processing conditions above the surface of the substrate 103 to control and / or adjust the plasma density distribution at different points between the center and the edge of the substrate 103.

[0063] In some embodiments, the tuning circuit 154 is automatically adjusted by commands from the system controller 126 to maintain desired processing conditions, such as to account for plasma impedance variations at the fundamental frequency and / or one or more harmonic frequencies during changes in gas flow or power or pulsed voltage. For example, these methods can be used to automatically adjust the capacitances VC1 and / or VC3 of the tuning circuit to account for detected variations in RF power found in the harmonics of the fundamental frequency. In some embodiments, using the signal detection module 187, the system controller 126 can be configured to: detect signals of one or more electrical parameters at corresponding nodes N1 of the processing systems 10A, 10B; determine whether the processing systems 10A, 10B are operating under desired processing conditions by comparing the characteristics of the detected signals with one or more control limits stored in memory; and when the electrical signal characteristics are outside the control limits, adjust one or more variable impedance components within the tuning circuit 154 to correct for undesired variations. Some embodiments include automatically adjusting the tuning circuit 154, such as adjusting the variable capacitances VC1 or VC3 to maintain desired RF voltage amplitude ratios, RF current amplitude ratios, and / or RF phase differences at the fundamental and harmonic frequencies of the edge control electrode 115 and / or the bias electrode 104.

[0064] In another embodiment, based on plasma processing result data collected from substrates processed within the plasma processing chamber, one or more of the variable impedance components can be adjusted to correct for undesired processing results seen on one or more previously processed substrates, such as an increased etch rate at the center relative to the edges of one or more substrates. In one example, the system controller 126 or the system user can set one or more of the variable impedance components within the tuning circuit 154 to a first set point that is intended to correct for previously found undesired processing results by adjusting the effect of the fundamental and / or harmonic frequencies on the plasma density and / or the sheath formed above the substrate surface. One or more programs stored within the system controller 126 or the system user can further vary the processing results by adjusting the set points of one or more of the variable impedance components from the first set point based on additional data received from subsequent analysis of the processed substrates, using the first set point of the variable impedance components.

[0065] Example of plasma processing

[0066] Figures 5A to 5DIllustrates the RF waveform generated by the experiment, which is the superposition of the fundamental and harmonic RF frequencies established at two electrodes within the processing chamber 100. Figures 5A to 5D Each of them includes an RF voltage waveform 501V and an RF current waveform 501C, both established at the edge electrode 115, and an RF voltage waveform 502V established at the bias electrode 104. The variations found between each of Figures 5A to 5D them include adjusting the variable capacitor VC1 in the tuning circuit, which is configured similarly to the tuning circuit 154 illustrated in Figure 3 .

[0067] As Figure 5A shown, the first settings of the variable capacitors VC1 and VC3 of the tuning circuit 154 are set to a first setting to achieve the RF voltage waveform 501V and the RF current waveform 501C, each having a first amplitude and in phase with each other, as shown at time T M . Similarly, at time T M , the RF voltage waveform 502V measured at the bias electrode 104 has a first amplitude and is in phase with the RF voltage waveform 501V.

[0068] As Figure 5B shown, the second settings of the variable capacitors VC1 and VC3 of the tuning circuit 154 are set to a second setting to achieve new second RF voltage waveforms 501V, second RF current waveforms 501C, and a second RF voltage waveform 502V established at the edge electrode 115 and the bias electrode 104, respectively. As Figure 5B shown, the second settings of the variable capacitors VC1 and VC3 of the tuning circuit 154 achieve the second RF voltage waveform 501V and the second RF current waveform 501C, each having a second amplitude and remaining in phase with each other, as shown at time T M . The amplitude of the second RF voltage waveform 501V has decreased from the Figure 5A first RF voltage waveform 501V illustrated in. Due to the change in the variable capacitors VC1 and VC3, the second amplitude of the second RF current waveform 501C has increased from the Figure 5A first RF current waveform 501C illustrated in. The second RF voltage waveform 502V measured at the bias electrode 104 has a second amplitude greater than the first RF voltage waveform 502V and is shifted to a position out of phase with the second RF voltage waveform 501V at time T M .

[0069] Refer to Figure 5C, the third settings of the variable capacitors VC1 and VC3 of the tuning circuit 154 are set to the third settings to achieve new third RF voltage waveforms 501V, third RF current waveforms 501C, and third RF voltage waveforms 502V established at the edge electrode 115 and the bias electrode 104, respectively. As Figure 5C shown, the third settings of the variable capacitors VC1 and VC3 of the tuning circuit 154 achieve third RF voltage waveforms 501V and third RF current waveforms 501C, each having a third amplitude and offset relative to each other such that they are out of phase with each other, as at time T M shown. The amplitude of the third RF voltage waveform 501V has increased from Figure 5A the first RF voltage waveform 501V shown in Figure 5A . The amplitude of the third RF current waveform 501C has increased from M the first RF current waveform 501C shown in

[0070] Reference Figure 5D , the fourth settings of the variable capacitors VC1 and VC3 of the tuning circuit 154 are set to the fourth settings to achieve new fourth RF voltage waveforms 501V, fourth RF current waveforms 501C, and fourth RF voltage waveforms 502V established at the edge electrode 115 and the bias electrode 104, respectively. As Figure 5D shown, the fourth settings of the variable capacitors VC1 and VC3 in the tuning circuit 154 achieve fourth RF voltage waveforms 501V and fourth RF current waveforms 501C, each having a fourth amplitude and offset relative to each other such that they are out of phase with each other, as at time T M shown. The amplitude of the fourth RF voltage waveform 501V has increased from Figure 5A the first RF voltage waveform 501V shown in Figure 5A . The amplitude of the fourth RF current waveform 501C has increased from M the first RF current waveform 501C shown in

[0071] Figures 6A to 6B is a graph of the effect on the etching rate above the substrate surface by adjusting the characteristics of the edge tuning circuit or the center tuning circuit according to the embodiments described herein. Figure 6AIllustrates the effect on the etching rate caused by adjusting the capacitance of the variable capacitor in the tuning circuit 154 coupled to the edge electrode 115, as shown by curves S1, S2, and S3, respectively. Figure 6B Illustrates the effect on the etching rate caused by adjusting the capacitance of the variable capacitor in the tuning circuit 154 coupled to the bias electrode 104, as shown by curves S1, S2, and S3, respectively.

[0072] Example of processing method

[0073] Figure 7 Is a process flow diagram of a method 700 for illustrating the results of plasma processing on a substrate according to one embodiment. At operation 702, method 700 includes delivering a first radio frequency (RF) signal to an electrode disposed in the processing space 129 of the processing chamber 100, such as the support base 107 of the substrate support assembly 136. Generally, an RF signal is delivered to the electrode using a plasma generator assembly 163 that is electrically coupled to the electrode via an RF matching circuit 162 and a PV waveform filter 161. Here, the RF signal is configured to ignite and / or sustain a processing plasma 101 in the processing region 129A of the processing chamber 100, where the processing region 129A is disposed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the RF signal has a fundamental RF frequency of about 1 MHz or greater, such as about 13.56 MHz or greater, or even 40 MHz or greater.

[0074] In some embodiments, operation 702 further includes electrostatically clamping the substrate 103 to the substrate support 105 by delivering a clamping voltage from a DC power supply 155 electrically coupled to the bias electrode 104 to the bias electrode 104 using a power delivery line 157. The clamping voltage is used to create a potential difference between the substrate 103 and the bias electrode 104, and thus generate an electrostatic attraction (clamping force) via the capacitance of the first portion of the dielectric material disposed therebetween. In some embodiments, method 700 includes flowing an inert gas (e.g., helium) into the gap region disposed between the substrate 103 and the substrate support surface 105A and / or between the edge ring 114 and the surface of the substrate support assembly 136 to facilitate heat transfer therebetween.

[0075] At operation 704, method 700 includes establishing a pulsed voltage (PV) waveform, optionally, at one or both of the bias electrode 104 and the edge control electrode 115. Here, a first PV voltage waveform including an asymmetric voltage pulse can be established at the bias electrode 104 using a first PV source assembly 196, and a second PV waveform can be established at the edge control electrode 115 using a second PV source assembly 197. As described above, the PV waveform generator 150 can be used to establish an almost constant sheath voltage (e.g., an almost constant difference between the substrate potential and the plasma potential), which provides a single-peak IEDF for ions accelerating towards the substrate surface, and / or can be manipulated to provide a desired IEDF profile of ion energy at the substrate surface.

[0076] In some embodiments, the first PV waveform and / or the second PV waveform includes a series of repeating cycles, where the waveform within each cycle has a first portion that occurs during a first time interval (e.g., the sheath formation phase and the ion current phase), and a second portion that occurs during a second time interval (e.g., the sheath collapse phase). In some embodiments, the waveform established at the substrate surface is substantially constant during at least a portion of the second time interval, and the second time interval is longer than the first time interval. In some embodiments, the first PV waveform and / or the second PV waveform each has a voltage peak in the first time interval and has a substantially positive slope or a substantially negative slope during at least a portion of the second time interval. In some embodiments, the second time interval is longer than the first time interval. In other embodiments, the second time interval is shorter than the first time interval or is approximately the same as the first time interval.

[0077] At operation 706, method 700 includes adjusting one or more characteristics of an RF waveform received at the bias electrode 104 or the edge control electrode 115, the RF waveform having a fundamental frequency and harmonic RF frequencies of the fundamental RF frequency. In some embodiments, one or more characteristics of the RF waveform are adjusted at either or both of the fundamental frequency and the harmonic frequencies, such as changing the voltage amplitude ratio of the RF waveform; adjusting the current amplitude ratio of the RF waveform; adjusting the phase difference between the RF voltage and the RF current of the RF waveform; adjusting the phase difference between the RF voltage or RF current between the bias electrode 104 and the edge control electrode 115; adjusting the delivered power ratio between the bias electrode 104 and the edge control electrode 115; or a combination thereof. The adjustment of one or more characteristics of the RF waveform is performed by adjusting the electrical characteristics of one or more impedance generating elements within the tuning circuit 154.

[0078] In some embodiments, adjusting the harmonic waveform changes the plasma uniformity over at least a portion of the processing region 129A. For example, in one embodiment, the processing region 129A is defined by the chamber lid 123 and the substrate support assembly 136, and the plasma 101 is a bulk plasma formed therebetween. In some embodiments, a first portion of the plasma 101 is formed in the region disposed between the chamber lid 123 and the bias electrode 104, and a second portion of the plasma 101 is formed in the region disposed between the chamber lid 123 and the edge control electrode 115. In those embodiments, adjusting the fundamental and / or harmonic waveform changes the plasma density in the second portion of the plasma 101 relative to the plasma density in the first portion of the plasma 101.

[0079] It has been found that by adjusting one or more of the variable impedance elements in the tuning circuit coupled to the electrodes disposed within the processing space, such as those discussed above, the RF waveforms generated at two or more electrodes can be altered to adjust the process variables of the plasma processing process. It is believed that by adjusting the characteristics (such as amplitude and phase) of the fundamental and / or harmonic RF waveforms, by adjusting one or more of the variable impedance elements in at least one tuning circuit coupled to the electrodes, the plasma density and sheath properties can be adjusted to improve the process results.

[0080] In some embodiments of the processing chamber 100, the system controller 126 is configured to automatically adjust the tuning circuit 154 based on the desired processing conditions and / or the desired characteristics of the fundamental and / or selected harmonic RF waveforms found at the edge control electrode 115 and / or the bias electrode 104. In some embodiments, the tuning circuit characteristics are controlled by adjusting one or more components of the tuning circuit 154 to a desired set point and / or within a desired control limit, where the desired set point and / or control limit is selected by the user and stored in the instructions for controlling the processing systems 10A, 10B. For example, the variable capacitors VC1, VC3 of the tuning circuit 154 can be controlled to a desired capacitance, which is determined by the user and stored in the memory of the system controller 126. However, in some embodiments, the tuning circuit 154 can be adjusted manually. The system controller 126 can utilize the information provided in the experimental data (such as the data found in Figures 5A to 5D to adjust and / or control the settings of the variable impedance elements found in the tuning circuit 154 before or during plasma processing.

[0081] When compared to a conventional RF biased CCP system, the RF plasma density control method can be implemented independently and / or in combination with a pulsed voltage (PV) waveform biasing method to provide independent and fine control of ion energy, IEDF, ion direction, ion flux, and activated neutral gas molecule flux at the substrate surface.

[0082] Although the foregoing is directed to embodiments of the present disclosure, other and additional embodiments of the present disclosure may be devised without departing from the basic scope thereof, and the scope of the present disclosure is determined by the following claims.

Claims

1. A plasma processing chamber, the plasma processing chamber comprising: A substrate support assembly having a substrate support surface, the substrate support assembly being disposed within a processing space of the plasma processing chamber and comprising: A first electrode; A first portion of a dielectric material, the first portion of the dielectric material being disposed over the first electrode, the first portion of the dielectric material forming the substrate support surface; and A second electrode, the second electrode being disposed at a distance from the first electrode in a first direction parallel to the substrate support surface; A first voltage generator electrically coupled to the first electrode; A radio frequency (RF) generator electrically coupled to an RF electrode, wherein the RF generator is configured to generate a plasma within the processing space by delivering an RF signal to the RF electrode, and the RF signal comprises a fundamental RF frequency; A first filter assembly electrically coupled between the first electrode and the first voltage generator, wherein the first filter assembly comprises one or more capacitor and inductor elements configured to substantially block the fundamental RF frequency and harmonics of the fundamental RF frequency received at the first electrode from flowing to the first voltage generator; and A first tuning circuit electrically coupled between the first electrode and the first filter assembly, wherein the first tuning circuit comprises: A plurality of impedance generating elements, the plurality of impedance generating elements comprising at least one or more variable impedance elements, and The plurality of impedance generating elements of the first tuning circuit are configured to adjust one or more characteristics of the fundamental RF frequency and / or one of the harmonics of the fundamental RF frequency established at the first electrode when the plasma is generated within the processing space.

2. The plasma processing chamber of claim 1, the plasma processing chamber further comprising: A signal detection module configured to detect a characteristic of one of the harmonics of the fundamental RF frequency; And A system controller configured to adjust settings of the one or more variable impedance elements of the first tuning circuit based on the detected characteristic of one of the harmonics of the fundamental RF frequency.

3. The plasma processing chamber of claim 2, wherein the detected characteristic comprises the amplitude or phase of the harmonics of the fundamental RF frequency, and the adjustment of the one or more variable impedance elements comprises adjusting the position of a variable capacitor of the one or more variable impedance elements.

4. The plasma processing chamber of claim 1, the plasma processing chamber further comprising: A signal detection module configured to detect a characteristic of the fundamental RF frequency; And A system controller configured to adjust settings of the one or more variable impedance elements of the first tuning circuit based on the detected characteristics of the fundamental RF frequency.

5. The plasma processing chamber of claim 4, wherein the detected characteristics include the amplitude or phase of the fundamental RF frequency, and the adjustment of the one or more variable impedance elements includes adjusting the position of a variable capacitor of the one or more variable impedance elements.

6. The plasma processing chamber of claim 1, the plasma processing chamber further comprising: A second voltage generator electrically coupled to the second electrode; A second filter assembly electrically coupled between the second electrode and the second voltage generator, wherein the second filter assembly includes one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and harmonics of the fundamental RF frequency from reaching the second voltage generator; And A second tuning circuit electrically coupled between the second electrode and the second filter assembly, wherein the tuning circuit includes: A plurality of impedance generating elements including at least one or more variable impedance elements, and The plurality of impedance generating elements of the second tuning circuit are configured to adjust one or more characteristics of one of the harmonics of the fundamental RF frequency established at the first electrode when the plasma is generated in the processing space.

7. The plasma processing chamber of claim 6, the plasma processing chamber further comprising: A system controller configured to adjust settings of the one or more variable impedance elements of the second tuning circuit based on the detected characteristics of one of the harmonics of the fundamental RF frequency.

8. The plasma processing chamber of claim 7, wherein the detected characteristics include the amplitude or phase of the harmonic of the fundamental RF frequency, and the adjustment of the one or more variable impedance elements includes adjusting the position of a variable capacitor of the one or more variable impedance elements.

9. The plasma processing chamber of claim 1, the plasma processing chamber further comprising: A second voltage generator electrically coupled to the second electrode; A second filter assembly electrically coupled between the second electrode and the second voltage generator, wherein the second filter assembly includes one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and harmonics of the fundamental RF frequency from reaching the second voltage generator; And A second tuning circuit electrically coupled between the second electrode and the second filter assembly, wherein the tuning circuit includes: A plurality of impedance generating elements including at least one or more variable impedance elements, and The plurality of impedance generating elements of the second tuning circuit are configured to adjust one or more characteristics of the fundamental RF frequency established at the first electrode when the plasma is generated in the processing space.

10. The plasma processing chamber of claim 9, the plasma processing chamber further comprising: A system controller configured to adjust settings of the one or more variable impedance elements of the second tuning circuit based on detected characteristics of the fundamental RF frequency.

11. The plasma processing chamber of claim 10, wherein the detected characteristics include the amplitude or phase of the fundamental RF frequency, and the adjustment of the one or more variable impedance elements includes adjusting the position of the variable capacitor of the one or more variable impedance elements.

12. The plasma processing chamber of claim 1, wherein the RF signal delivered by the RF generator is configured to ignite and sustain a plasma from a gas or vapor delivered to a processing region of the processing chamber.

13. The plasma processing chamber of claim 1, the plasma processing chamber further comprising: Computer-implemented instructions stored in a memory that, when executed by a processor, are configured to perform a method of processing a substrate, including: (i) Igniting and sustaining a plasma from a gas or vapor delivered to the processing space, wherein a first portion of the plasma is formed above the substrate support surface of the substrate support assembly and the first electrode, and a second portion of the plasma is formed above the substrate support surface of the substrate support assembly and the second electrode; and (ii) Adjusting one or more characteristics of the fundamental RF frequency and / or one of the harmonics of the fundamental RF frequency at the first electrode by using the tuning circuit with respect to one or more characteristics of the fundamental RF frequency and / or the harmonics of the fundamental RF frequency at the second electrode to change the ratio of the plasma density in the second portion of the plasma to the plasma density in the first portion of the plasma.

14. The plasma processing system of claim 1, wherein The first voltage generator is configured to establish an asymmetric pulsed voltage waveform at the first electrode, The asymmetric pulsed voltage waveform includes a series of repeating pulses, and each repeating pulse has a first portion that occurs during a first time interval and a second portion that occurs during a second time interval, The waveform has a voltage peak in the first time interval, and The waveform has a substantially positive slope, a substantially negative slope, or is substantially constant during at least a portion of the second time interval.

15. A method of processing a substrate in a plasma processing chamber, the method comprising: Generating and sustaining a plasma within a processing space of the plasma processing chamber, wherein The plasma is generated and maintained by delivering a radio frequency (RF) signal to an RF electrode, and the RF signal includes a fundamental RF frequency. A first portion of the plasma is formed above a substrate support surface of a substrate support assembly and a first electrode, and a second portion of the plasma is formed above the substrate support surface of the substrate support assembly and a second electrode; and by using a tuning circuit coupled to the first electrode to adjust one or more characteristics of the fundamental RF frequency and / or harmonics of the fundamental RF frequency at the first electrode relative to one or more characteristics of the fundamental RF frequency and / or harmonics of the fundamental RF frequency at the second electrode to change a ratio of a plasma density in the second portion of the plasma to a plasma density in the first portion of the plasma.

16. The method according to claim 15, wherein adjusting the one or more characteristics of the fundamental RF frequency and / or the harmonics of the fundamental RF frequency comprises: Adjust the position of a variable capacitor of one or more variable impedance elements of the tuning circuit.

17. The method of claim 15, the method further comprising: establishing an asymmetric pulsed voltage waveform at the first electrode by a first voltage generator, wherein the asymmetric pulsed voltage waveform includes a series of repeating pulses, and each repeating pulse has a first portion that occurs during a first time interval and a second portion that occurs during a second time interval, the waveform has a voltage peak in the first time interval, and the waveform has a substantially positive slope, a substantially negative slope, or is substantially constant during at least a portion of the second time interval.

18. The method of claim 17, the method further comprising: establishing an asymmetric pulsed voltage waveform at the second electrode by a second voltage generator, wherein the asymmetric pulsed voltage waveform includes a series of repeating pulses, and each repeating pulse has a first portion that occurs during a first time interval and a second portion that occurs during a second time interval, the waveform has a voltage peak in the first time interval, and the waveform has a substantially positive slope, a substantially negative slope, or is substantially constant during at least a portion of the second time interval.

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