Schottky diode device and preparation method thereof

Abstract

The invention provides a Schottky diode device and a preparation method thereof, an unintentionally doped or lightly doped gallium oxide single crystal substrate is used as a basis, a conducting channel with a groove structure is formed through an etching process, and an aluminum oxide dielectric layer, an ohmic electrode and a Schottky electrode are sequentially arranged on the conducting channel. Wherein the electrode covers the side wall, a part of the lower table top and a part of the upper table top, the ohmic electrode is composed of a titanium layer and a gold layer, and the Schottky electrode is composed of a nickel layer and a gold layer which are oppositely arranged; a silicon dioxide passivation layer covers the device, and a first extraction electrode and a second extraction electrode which are connected with corresponding electrodes are arranged on the device. By designing a side wall electrode and a lower electrode structure, a channel is controlled from multiple directions, the carrier concentration and distribution are effectively adjusted, the control capability of the electrode on channel current is improved, excellent switching characteristics are achieved, the sub-threshold swing and leakage current are reduced, and the switching speed and frequency characteristics are improved; meanwhile, the structure enables the current to flow more uniformly, reduces the current crowding, reduces the channel resistance, increases the effective channel thickness, further reduces the on-resistance, improves the current driving capability and the power processing capability, reduces the energy loss, and improves the device performance.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a Schottky diode device and a preparation method thereof. Background Art

[0002] As an emerging ultra-wide bandgap semiconductor material, gallium oxide (Ga2O3) has received extensive attention in the field of power devices due to its large bandgap, high voltage resistance, high temperature resistance, radiation resistance and other advantages. The Schottky diode (SBD), as an ideal switching device, has the advantages of high current density and low turn-on voltage, and has a fast switching speed and low switching loss. However, it has limitations in applications with high voltage, high power and strict requirements for reverse characteristics, such as low reverse breakdown voltage and large reverse leakage current. In the prior art, for the p-Si / Ga2O3 heterojunction diode, the unidirectional conduction characteristic of the PN junction is adopted to reduce the reverse leakage current and improve the reverse breakdown voltage characteristic of the device. Finally, the device realizes a reverse breakdown voltage of about 0.86 kV. Although a relatively high reverse breakdown voltage is achieved, the heterojunction has interface states, resulting in a large on-resistance of 7.02 mΩ·cm 2 In addition, the calculated average electric field is 2.04 MV / cm, which is much lower than the theoretical limit (8 MV / cm) of the gallium oxide material, resulting in the problem of premature breakdown of the device. For the low-leakage-current gallium oxide MIS SBD, although the reverse leakage current is reduced by introducing an aluminum nitride (AlN) insertion layer, the gallium oxide homoepitaxial process and the aluminum nitride preparation process are complex and expensive, and the lattice mismatch and defects at the heterojunction interface will also introduce interface states, resulting in enhanced local electric fields and premature breakdown. In addition, the existing gallium oxide SBD substrate materials and structures also have deficiencies. The vertical structure devices require a thick epitaxial layer and a low doping concentration, resulting in complex and expensive growth processes. Although the lateral devices have better manufacturing process compatibility, they have problems such as small on-current, large on-resistance, small reverse breakdown voltage and large reverse leakage current, which affect the performance and reliability of the devices. Therefore, developing a new device structure and process method to improve the on-current and reverse breakdown voltage of the lateral SBD device and reduce the device power consumption has become an important research direction at present. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a Schottky diode device and a preparation method thereof to eliminate or improve one or more defects existing in the prior art and solve the problems of small on-current, large on-resistance, small reverse breakdown voltage and large reverse leakage of the lateral Schottky diode device.

[0004] One aspect of the present invention provides a Schottky diode device, including:

[0005] An unintentionally doped or lightly doped gallium oxide single crystal substrate;

[0006] An aluminum oxide dielectric layer, disposed above the gallium oxide single crystal substrate;

[0007] An ohmic electrode, covering the sidewalls, part of the lower surface, and part of the upper surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the first side; the ohmic electrode includes a titanium layer and a first gold layer obtained by magnetron sputtering;

[0008] A Schottky electrode, covering the sidewalls, part of the lower surface, and part of the upper surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the second side; the Schottky electrode includes a nickel layer and a second gold layer obtained by magnetron sputtering; the second side is opposite to the first side in position;

[0009] A conductive channel layer, obtained by etching, disposed between the ohmic electrode and the Schottky electrode;

[0010] A silicon dioxide passivation layer, covering the ohmic electrode and the Schottky electrode;

[0011] A first lead electrode and a second lead electrode, disposed on the silicon dioxide passivation layer, the first lead electrode is connected to the ohmic electrode, and the second lead electrode is connected to the Schottky electrode.

[0012] In some embodiments, the gallium oxide single crystal substrate adopts the 010 or -201 crystal orientation.

[0013] In some embodiments, the thickness of the titanium layer in the ohmic electrode is 10 - 50 nm, and the thickness of the first gold layer is 100 - 1000 nm; the thickness of the nickel layer in the Schottky electrode is 10 - 50 nm, and the thickness of the second gold layer is 100 - 1000 nm.

[0014] In some embodiments, the thickness of the aluminum oxide dielectric layer is 20 - 100 nm, the thickness of the silicon dioxide passivation layer is 300 - 800 nm, and the length and width of the first lead electrode and the second lead electrode are both 300 - 1000 μm.

[0015] In some embodiments, the first lead electrode and the second lead electrode are composed of a 50 - nm - thick titanium layer and a 300 - nm - thick gold layer stacked together.

[0016] On the other hand, the present invention also provides a preparation method for the above - mentioned Schottky diode device, including the following steps:

[0017] Clean a non - intentionally doped or lightly doped gallium oxide single crystal substrate to remove organic contamination, inorganic contamination, and the natural oxide layer;

[0018] Deposit an aluminum oxide dielectric layer on the surface of the gallium oxide single crystal substrate by atomic layer deposition;

[0019] A conductive channel is prepared by wet etching the aluminum oxide dielectric layer and dry etching the gallium oxide single crystal substrate through a photolithography etching process;

[0020] Perform the first photolithography etching to form ohmic electrode regions on the sidewalls, part of the lower table surface, and part of the upper table surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the first side. Deposit a titanium layer with a thickness of 10 - 50 nm and a first gold layer with a thickness of 100 - 1000 nm on the ohmic electrode regions using a mesa process based on magnetron sputtering to obtain ohmic electrodes and field plates, and perform annealing treatment;

[0021] Perform the second photolithography etching to form Schottky contact electrode regions on the sidewalls, part of the lower table surface, and part of the upper table surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the second side. Deposit a nickel layer with a thickness of 10 - 50 nm and a second gold layer with a thickness of 100 - 1000 nm on the Schottky contact electrode regions using a mesa process based on magnetron sputtering to obtain Schottky electrodes and field plates;

[0022] Deposit a silicon dioxide passivation layer using a plasma enhanced chemical vapor deposition device, etch the silicon dioxide passivation layer, and prepare a first lead electrode and a second lead electrode and their field plates based on electron beam evaporation. The first lead electrode is connected to the ohmic electrode, and the second lead electrode is connected to the Schottky electrode.

[0023] In some embodiments, the doping concentration of the gallium oxide single crystal substrate is less than or equal to 10 16 cm -3 , and the crystal orientation is 010 or -201.

[0024] Clean the unintentionally doped or lightly doped gallium oxide single crystal substrate, including:

[0025] Successively perform ultrasonic cleaning on the gallium oxide single crystal substrate in acetone, ethanol, and deionized water for 5 minutes;

[0026] Soak and clean the gallium oxide single crystal substrate in a sulfuric acid-hydrogen peroxide mixed solution for 5 minutes; the sulfuric acid-hydrogen peroxide mixed solution is obtained by mixing 30% H2O2 and 96% H2SO4;

[0027] Rinse the gallium oxide single crystal substrate with deionized water for 15 minutes and dry it with nitrogen.

[0028] In some embodiments, during the first photolithography etching, wet-etch the aluminum oxide dielectric layer with a 1:20 hydrofluoric acid buffer solution, and dry-etch the ohmic electrode regions. For the gallium oxide single crystal substrate with a crystal orientation of 010, the etching time is 6 minutes and the etching depth is 1 μm.

[0029] In some embodiments, in the second lithography etching process, a hydrofluoric acid buffer solution with a ratio of 1:20 is used for wet etching of the aluminum oxide dielectric layer, and dry etching is used for the Schottky contact electrode region. For the gallium oxide single crystal substrate with a crystal orientation of 010, the etching time is 6 minutes and the etching depth is 1 μm.

[0030] In some embodiments, the annealing treatment includes:

[0031] Under the condition that the air pressure is less than or equal to 1×10-3 Torr, nitrogen is introduced to maintain the pressure at normal pressure of 760 Torr ± 5%;

[0032] Heat up to 480 °C at a rate of at least 50 °C / s, hold for 1 minute, and maintain continuous nitrogen purging;

[0033] Cool down based on the water cooling system at a rate of at least 30 °C / s until the temperature is below 100 °C and then naturally cool to room temperature.

[0034] The beneficial effects of the present invention are at least:

[0035] The Schottky diode device and its manufacturing method of the present invention are based on an unintentionally doped or lightly doped gallium oxide single crystal substrate, on which an aluminum oxide dielectric layer, an ohmic electrode, and a Schottky electrode are sequentially arranged. The electrodes cover along the sidewalls and part of the lower and upper surfaces. The ohmic electrode is composed of a titanium layer and a first gold layer, and the Schottky electrode is composed of a nickel layer and a second gold layer, and they are arranged opposite to each other; a silicon dioxide passivation layer covers above the device, and first and second lead electrodes for connecting the corresponding electrodes are provided. Through the novel electrode structure design, the channel is controlled from multiple directions, the carrier concentration and distribution are effectively adjusted, the control ability of the channel current is improved, excellent switching characteristics are achieved, the subthreshold swing and leakage current are reduced, and the switching speed and frequency characteristics are improved; at the same time, this structure makes the current flow more evenly, reduces current crowding, reduces the channel resistance, increases the effective channel width, further reduces the on-resistance, improves the current driving ability and power handling ability, reduces energy loss, and improves the device efficiency. In addition, the dual field plate structure design makes the electric field distribution more uniform, reduces electric field concentration, reduces the occurrence probability of reliability problems such as oxide layer breakdown and hot carrier effects, enhances the device stability and lifespan, and overall realizes a high-power, low-power consumption, high-performance switching device with low cost and stable performance, which is conducive to industrial application.

[0036] The additional advantages, objectives, and features of the present invention will be partially described below and will become partially apparent to those of ordinary skill in the art after studying the following text, or can be learned from the practice of the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the structure specifically pointed out in the specification and the drawings.

[0037] Those skilled in the art will understand that the objectives and advantages achievable by the present invention are not limited to those specifically described above, and the above and other objectives achievable by the present invention will be more clearly understood from the following detailed description. Description of the Drawings

[0038] The drawings described herein are used to provide a further understanding of the present invention, form a part of this application, and do not limit the present invention. In the drawings:

[0039] Figure 1 It is a structural diagram of a Schottky diode device according to an embodiment of the present invention.

[0040] Figure 2 It is a voltage-current test result diagram of a Schottky diode device according to an embodiment of the present invention.

[0041] Figure 3 It is a breakdown voltage test diagram of a Schottky diode device according to an embodiment of the present invention.

[0042] Reference Signs:

[0043] a: Gallium oxide single crystal substrate; b: Aluminum oxide dielectric layer; c: Ohmic electrode;

[0044] d: Schottky electrode; e: Silicon dioxide passivation layer; f1: First lead electrode;

[0045] f2: Second lead electrode. Detailed Embodiments

[0046] To make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below in conjunction with the embodiments and the drawings. Herein, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but do not limit the present invention.

[0047] Herein, it should also be noted that in order to avoid obscuring the present invention due to unnecessary details, only the structures and / or processing steps closely related to the solution according to the present invention are shown in the drawings, while other details less related to the present invention are omitted.

[0048] It should be emphasized that the term "including / comprising" when used herein refers to the presence of features, elements, steps, or components, but does not exclude the presence or addition of one or more other features, elements, steps, or components.

[0049] Herein, it should also be noted that if not otherwise specified, the term "connection" in this article can not only refer to direct connection, but also represent indirect connection with an intermediate.

[0050] There are currently two types of substrate materials for gallium oxide Schottky diodes: substrates with an epitaxial layer and single-crystal substrates; and there are two structures: vertical structures and lateral structures. Vertical-structure devices require a relatively thick epitaxial layer and a low doping concentration, resulting in a complex growth process and thus a very high price, making it difficult to achieve industrial application in a short time. The fused method can be used to grow large-scale, high-quality gallium oxide single crystals at low cost. The manufacturing process of lateral devices has better compatibility and does not require the introduction of too many complex process steps and special equipment, reducing the process difficulty and cost. Therefore, lateral devices based on single-crystal materials have the advantages of both low cost and high performance and are very promising power devices. There are the following deficiencies in lateral SBD devices: small on-state current, large on-state resistance, small reverse breakdown voltage, and large reverse leakage current, which affect the performance and reliability of the device. This is mainly caused by the device structure and process design. For example, the transmission current of lateral devices is limited within an extremely thin drift layer, resulting in a small current density, a large on-state resistance, and a serious self-heating effect; the reverse leakage current of the device is relatively high, which is not conducive to reducing the static power consumption. In this application, by designing a new device structure and adopting an optimized process flow, the device power can be increased and the device power consumption can be reduced.

[0051] Specifically, the present invention provides a Schottky diode device, as Figure 1 shown, comprising: a gallium oxide single-crystal substrate a, an aluminum oxide dielectric layer b, an ohmic electrode c, a Schottky electrode d, a silicon dioxide passivation layer e, a first lead electrode f1, and a second lead electrode f2.

[0052] An unintentionally doped or lightly doped gallium oxide single-crystal substrate. In some embodiments, the gallium oxide single-crystal substrate adopts the 010 or -201 crystal orientation. The (010) and (-201) crystal orientations of the gallium oxide (Ga2O3) single-crystal substrate refer to different orientations of the crystal, that is, the crystal plane direction selected when cutting the substrate. The (010) crystal orientation is parallel to the b-axis of the crystal, having a lower dielectric constant and anisotropic electron mobility, while the (-201) crystal orientation has a higher carrier mobility and better epitaxial growth performance. Selecting different crystal orientations can optimize the performance of the device. For example, the (010) direction is suitable for high breakdown electric field applications, while the (-201) direction is more conducive to the high-quality growth of the epitaxial layer and the improvement of electron mobility, making it suitable for high-power electronic devices.

[0053] The aluminum oxide dielectric layer is disposed above the gallium oxide single-crystal substrate. In some embodiments, the thickness of the aluminum oxide dielectric layer is 20 - 100 nm.

[0054] The ohmic electrode covers the side walls, part of the lower table surface and part of the upper table surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the first side; the ohmic electrode includes a titanium layer and a first gold layer obtained by magnetron sputtering. In some embodiments, the thickness of the titanium layer in the ohmic electrode is 10 - 50 nm, and the thickness of the first gold layer is 100 - 1000 nm.

[0055] The Schottky electrode covers the side walls, part of the lower table surface and part of the upper table surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the second side; the Schottky electrode includes a nickel layer and a second gold layer obtained by magnetron sputtering; the second side is opposite to the first side. The thickness of the nickel layer in the Schottky electrode is 10 - 50 nm, and the thickness of the second gold layer is 100 - 1000 nm.

[0056] The silicon dioxide passivation layer covers the ohmic electrode and the Schottky electrode. The thickness of the silicon dioxide passivation layer is 300 - 800 nm.

[0057] The first lead electrode and the second lead electrode are arranged on the silicon dioxide passivation layer, the first lead electrode is connected to the ohmic electrode, and the second lead electrode is connected to the Schottky electrode. The length and width of the first lead electrode and the second lead electrode are both 300 - 1000 μm. The first lead electrode and the second lead electrode are composed of a 50 - nm - thick titanium layer and a 300 - nm - thick gold layer stacked.

[0058] On the other hand, the present invention also provides a preparation method for the above - mentioned Schottky diode device, including the following steps S101 - S105:

[0059] Step S101: Clean the unintentionally doped or lightly doped gallium oxide single crystal substrate to remove organic contamination, inorganic contamination and natural oxide layer.

[0060] Step S102: Deposit an aluminum oxide dielectric layer on the surface of the gallium oxide single crystal substrate based on atomic layer deposition.

[0061] Step S103: Through a photolithography and etching process, a conductive channel is prepared by wet - etching the aluminum oxide dielectric layer and dry - etching the gallium oxide single crystal substrate.

[0062] Step S104: Perform the first photolithography and etching, form an ohmic electrode region on the side walls, part of the lower table surface and part of the upper table surface of the gallium oxide single crystal substrate and the aluminum oxide dielectric layer along the first side, deposit a 10 - 50 - nm - thick titanium layer and a 100 - 1000 - nm - thick first gold layer in the ohmic electrode region based on magnetron sputtering using a mesa process, obtain the ohmic electrode and the field plate and perform annealing treatment.

[0063] Step S105: Perform the second photolithography etching to form a Schottky contact electrode region on the sidewalls, part of the lower tabletop, and part of the upper tabletop of the gallium oxide single-crystal substrate and the aluminum oxide dielectric layer along the second side. Deposit a nickel layer with a thickness of 10 - 50 nm and a second gold layer with a thickness of 100 - 1000 nm on the Schottky contact electrode region using the mesa process based on magnetron sputtering to obtain a Schottky electrode and a field plate.

[0064] Step S106: Deposit a silicon dioxide passivation layer using a plasma-enhanced chemical vapor deposition device, etch the silicon dioxide passivation layer, and prepare a first lead electrode, a second lead electrode, and their field plates based on electron beam evaporation. The first lead electrode is connected to the ohmic electrode, and the second lead electrode is connected to the Schottky electrode.

[0065] In step S101, the gallium oxide single-crystal substrate is ultrasonically cleaned with deionized water to remove organic contaminants on the surface; then it is soaked in a dilute acid solution to remove inorganic contaminants; and finally it is treated with a dilute alkali solution to remove the native oxide layer. Ensure that the substrate surface is clean to provide a good interface for subsequent processes. Improve the adhesion and quality of subsequent deposited layers, ensure the stability and reliability of device performance, and avoid the adverse effects of impurities on device performance.

[0066] In some embodiments, the doping concentration of the gallium oxide single-crystal substrate is less than or equal to 10 16 cm -3 , and the crystal orientation is 010 or -201.

[0067] In some embodiments, the cleaning of the unintentionally doped or lightly doped gallium oxide single-crystal substrate includes steps S1011 - S1013:

[0068] Step S1011: Ultrasonically clean the gallium oxide single-crystal substrate in acetone, ethanol, and deionized water in sequence for 5 minutes.

[0069] Step S1012: Soak and clean the gallium oxide single-crystal substrate in a sulfuric acid-hydrogen peroxide mixed solution for 5 minutes; the sulfuric acid-hydrogen peroxide mixed solution is obtained by mixing 30% H2O2 and 96% H2SO4.

[0070] Step S1013: Rinse the gallium oxide single-crystal substrate with deionized water for 15 minutes and dry it with nitrogen.

[0071] In step S102, using an atomic layer deposition device, trimethylaluminum and water vapor are used as reactants, and the reaction gases are alternately introduced to grow an aluminum oxide dielectric layer layer by layer on the surface of the convex platform of the gallium oxide single crystal substrate. Depositing a layer of aluminum oxide dielectric layer on the surface of the convex platform of the gallium oxide single crystal substrate serves as insulation and protection, and at the same time improves the contact characteristics of the subsequent electrodes. The aluminum oxide dielectric layer can effectively block the intrusion of impurities and moisture, improve the stability and durability of the device, provide a good dielectric interface for the formation of subsequent ohmic contact and Schottky contact, and contribute to improving the performance and reliability of the device.

[0072] Step S103 prepares a conductive channel through a photolithography and etching process. The specific steps are as follows: First, a photoresist is coated on the surface of the aluminum oxide dielectric layer, and a patterned photoresist mask is formed through exposure and development. This mask defines the conductive channel region; then, wet etching is used to remove the aluminum oxide dielectric layer not covered by the photoresist, exposing the gallium oxide single crystal substrate; subsequently, dry etching techniques such as reactive ion etching are used to etch the gallium oxide single crystal substrate to form a conductive channel with a specific shape and size; finally, the remaining photoresist is removed to complete the preparation of the conductive channel. In step S104, a pattern of the ohmic electrode region is formed by coating a photoresist, exposure, and development; using a magnetron sputtering device, with titanium and gold as targets, a 10 - 50 nm titanium layer and a 100 - 1000 nm first gold layer are deposited in the ohmic electrode region through a mesa process to form an ohmic electrode and a field plate; finally, an annealing treatment is performed to improve the contact performance. The ohmic electrode can achieve a low contact resistance and improve the conductivity of the device. The annealing treatment can further optimize the contact interface between the electrode and the substrate, enhance the stability of the ohmic contact, and thus improve the overall performance and reliability of the device.

[0073] In some embodiments, during the first photolithography and etching, a 1:20 hydrofluoric acid buffer solution is used for wet etching the aluminum oxide dielectric layer, and dry etching is used for the ohmic electrode region. For a gallium oxide single crystal substrate with a crystal orientation of 010, the etching time is 6 minutes and the etching depth is 1 μm.

[0074] In some embodiments, the annealing treatment includes steps S1041 - S1043:

[0075] Step S1041: Under the condition that the pressure is less than or equal to 1×10 - 3 Torr, nitrogen is introduced to maintain the pressure at normal pressure of 760 Torr ± 5%.

[0076] Step S1042: Heat up to 480 °C at a rate of at least 50 °C / s, hold for 1 minute, and maintain the continuous purge of nitrogen.

[0077] Step S1043: Cool down based on a water cooling system at a rate of at least 30 °C / s until it is below 100 °C and then naturally cool to room temperature.

[0078] In step S105, a pattern of the Schottky contact electrode region is formed by coating photoresist, exposing, and developing; using a magnetron sputtering device, with nickel and gold as targets, a nickel layer with a thickness of 10 - 50 nm and a second gold layer with a thickness of 100 - 1000 nm are deposited in the Schottky contact electrode region through a mesa process to form a Schottky electrode and a field plate. The Schottky electrode can achieve good Schottky contact characteristics and has an appropriate Schottky barrier height, thereby improving the rectifying performance and switching speed of the device. The field plate structure also helps to optimize the electric field distribution of the device, enhance the breakdown voltage capability of the device, and further improve the performance and reliability of the device.

[0079] In some embodiments, during the second photolithography etching, a hydrofluoric acid buffer solution with a ratio of 1:20 is used for wet etching of the alumina dielectric layer, and dry etching is performed on the Schottky contact electrode region. For a gallium oxide single crystal substrate with a crystal orientation of 010, the etching time is 6 min and the etching depth is 1 μm. In other embodiments, the crystal orientation of the gallium oxide single crystal substrate is -201.

[0080] In step S106, using a plasma-enhanced chemical vapor deposition device, with silane and oxygen as reaction gases, a silicon dioxide passivation layer is deposited on the surface of the device; the silicon dioxide passivation layer is etched to form a contact window for the lead electrode; using an electron beam evaporation device, with gold as the target, a first lead electrode, a second lead electrode, and their field plates are prepared at the contact window. The first lead electrode is connected to the ohmic electrode, and the second lead electrode is connected to the Schottky electrode. The silicon dioxide passivation layer can effectively prevent the influence of the external environment on the device, improving the stability and anti-interference ability of the device. The reasonable design of the lead electrode can ensure good connection between the device and the external circuit, reduce the contact resistance, ensure the normal operation of the device, and thus realize the complete function and high-performance application of the Schottky diode device.

[0081] The present invention will be described below in conjunction with a specific embodiment:

[0082] This embodiment provides a Schottky diode device and its manufacturing process to increase the on-current and reverse breakdown voltage of a lateral SBD device. First, a groove in the electrode region is formed by dry etching the gallium oxide process, then the electrode and the field plate electrode are prepared, and finally, a second field plate is prepared during the electrode thickening process. The double field plate structure can effectively and uniformly distribute the electric field and reduce the leakage current. In addition, in order to obtain a high-quality etched surface, the substrate is soaked in acetone after etching the gallium oxide to reduce the surface state density, thereby increasing the reverse breakdown voltage and improving the power of the device.

[0083] The structure of the Schottky diode device from bottom to top sequentially includes: a β-Ga2O3 single crystal substrate a, an Al2O3 dielectric layer b, an ohmic electrode c, a Schottky contact electrode d, a SiO2 passivation layer e, and PAD electrodes f1 and f2.

[0084] Among them, the β-Ga2O3 single crystal substrate a is an unintentionally doped or lightly doped substrate, and the crystal orientation of the substrate is (010) or (-201). The thickness of the Al2O3 dielectric layer b is 20-100 nm. The ohmic electrode c is Ti / Au. First, dry etching is used to form a cylindrical groove with a depth of 100-2000 nm. Then, a Schottky electrode is magnetron sputtered, and the electrode structure is realized by using a mesa-encapsulation process. The thickness of Ti is 10-50 nm, and the thickness of Au is 100-1000 nm. The ohmic electrode is a structure covering the sidewall and the lower mesa. The Schottky electrode d is Ni / Au. First, dry etching is used to form a groove with a depth of 100-1000 nm. Then, an ohmic electrode is magnetron sputtered, and the electrode structure is realized by using a mesa-encapsulation process. The thickness of Ni is 10-50 nm, and the thickness of Au is 100-1000 nm. The Schottky electrode is an L-shaped structure covering the sidewall and the lower mesa. The thickness of the SiO2 passivation layer e is 300-800 nm. The length / width of the PAD electrode is 300-1000 μm.

[0085] The preparation process of the Schottky diode device is as follows:

[0086] Step 1: Select a β-Ga2O3 single crystal substrate. An unintentionally doped β-Ga2O3 single crystal substrate is selected, and its doping concentration is tested to be relatively low, which is 10 16 cm -3 . Select a gallium oxide single crystal with a (010) crystal orientation, which can obtain higher thermal conductivity and higher etching rate. The single crystal material has higher crystal quality, so higher breakdown voltage characteristics, lower on-state power consumption and leakage power consumption can be achieved, and the price is low, which is conducive to industrial application. When selecting a single crystal substrate, the doping elements and doping concentration, crystal orientation, etc. of the material need to be considered. In order to achieve high breakdown voltage characteristics, a single crystal material is required. In order to improve the breakdown voltage performance of the device in the off state, a semiconductor drift layer with a low doping concentration is usually designed. However, the low-doped drift layer will become an important part of the on-resistance of the device. The increase of the on-resistance of the device will reduce the forward conduction current and increase the power consumption of the device. In addition, β-Ga2O3 single crystals with different crystal orientations have different thermal conductivities, mobilities and etching rates.

[0087] Step 2: Clean the substrate, including organic cleaning and inorganic cleaning. Organic cleaning can remove organic contaminants on the surface, and inorganic cleaning can remove inorganic contaminants or natural oxide layers on the surface.

[0088] The sample was ultrasonically cleaned in acetone / ethanol / deionized water for 5 min in sequence. Then, the gallium oxide single crystal wafer was immersed in an SPM (deionized water: 30% H2O2: 96% H2SO4) solution for 5 min to remove the organic residues on the sample piece. Subsequently, it was rinsed with deionized water for 15 min to remove the SPM solution, and finally the substrate was dried with nitrogen N2.

[0089] Step 3: Deposit the Al2O3 dielectric layer. Specifically, the substrate wafer was placed in an ALD to deposit 60 nm of Al2O3.

[0090] Step 4: Dry-etch a groove to prepare for fabricating the electrodes. By adjusting the etching process parameters and etching time, the target etching surface and target etching depth can be obtained. After the etching is completed, the sample was soaked in acetone to reduce the surface state density.

[0091] Step 5: Photolithography etching. The Al2O3 was wet-etched using an HF buffer solution (1:20), and it could be etched through in 50 s. Then, the ohmic electrode region was dry-etched, and the sample was placed in an etching machine for etching. Referring to the etching rate of the (010) crystal orientation, the etching time was set to 6 min and the etching depth was 1 um. By adjusting the etching process parameters, a relatively rough etching surface was obtained, which was beneficial to forming a good ohmic contact.

[0092] Fabricate the ohmic electrodes. The etched substrate wafer was cleaned, then the anode pattern was photolithographed, and then a Ti(50 nm) / Au(300 nm) electrode was magnetron sputtered. Using the mesa encapsulation process, the electrode regions on the upper mesa, sidewalls, and lower mesa could be completely encapsulated to fabricate the electrodes and field plates. The photoresist was removed using the negative photoresist stripping process, and then the substrate was subjected to a rapid annealing treatment at 480 °C for 1 min.

[0093] Step 6: Photolithography etching. First, the Al2O3 was removed using an HF buffer solution, and then it was placed in an etching machine for etching. Referring to the etching rate of the (010) crystal orientation, the etching time was set to 6 min and the etching depth was 1 um. By adjusting the etching process parameters, a relatively smooth etching surface was obtained, which was beneficial to reducing the leakage current of the device. After the etching was completed, the sample was cleaned and soaked in acetone to reduce the surface states.

[0094] Fabricate the Schottky contact electrodes. The cathode pattern was photolithographed, and then a Ni(50 nm) / Au(300 nm) electrode was magnetron sputtered. Using the mesa encapsulation process, the electrode regions on the upper mesa, sidewalls, and lower mesa could be completely encapsulated to fabricate the electrodes and field plates. Finally, the photoresist was removed using the negative photoresist stripping process.

[0095] Step 7: Deposit the SiO2 passivation layer. The substrate wafer was placed in a PECVD machine to deposit a 600 nm SiO2 passivation layer.

[0096] Step 8: After lithographically etching SiO2, PAD electrodes Ti(50nm) / Au(300nm) and field plates are prepared by electron beam evaporation.

[0097] Step 9: Lithographically etch SiO2 to open holes in the PAD electrodes.

[0098] In this embodiment, a high-performance power device is fabricated using a single-crystalline Ga2O3 substrate, which is inexpensive and has stable performance, facilitating industrial applications. Lateral devices are prone to current collapse due to electric field crowding, failing to reach the expected current value and affecting the actual working performance and reliability of the devices. The present invention uses an etching process to fabricate electrodes that can control the channel from multiple directions, more effectively regulate the carrier concentration and distribution in the channel, thereby improving the control ability of the channel current, making the switching characteristics of the SBD more excellent, achieving better current control in the subthreshold region, reducing the subthreshold swing, decreasing the leakage current, and enhancing the switching speed and frequency characteristics of the device. Additionally, the electrode structure can make the current flow more uniformly in the channel, reducing current crowding and lowering the channel resistance. Meanwhile, by optimizing the size and shape of the electrodes, the effective channel width can be increased, further reducing the on-resistance, thereby enhancing the current drive ability and power handling ability of the SBD, reducing the energy loss in the on-state, and improving the efficiency of the device. A dual-field plate structure is designed to adjust the electric field at different positions and directions, making the distribution of the electric field more uniform inside the device, reducing electric field concentration, and thus decreasing the probability of reliability problems such as oxide breakdown and hot carrier effects caused by excessive electric fields, improving the stability and lifespan of the device.

[0099] Figure 1 is a schematic cross-sectional structure diagram of the Ga2O3 Schottky diode in this embodiment; each mark in the figure represents: a is an unintentionally doped Ga2O3 single-crystalline substrate, b is an Al2O3 dielectric layer (60nm), c is an L-shaped ohmic electrode Ti / Au(50nm / 500nm), d is an L-shaped Schottky contact electrode Ni / Au(50nm / 500nm), e is a SiO2 passivation layer (600nm), and f1 and f2 are PAD electrodes.

[0100] Figure 2 is a voltage-current test result graph of the Ga2O3 Schottky diode device in this embodiment. The device achieves ultra-high switching sensitivity. The current-voltage characteristic graph of the 10μm device has a turn-on voltage of 0.95V and a switching ratio of 10 11 , and the subthreshold swing is 65mV / dec. As Figure 3 shown, the 35μm device achieves extremely high reverse breakdown voltage characteristics, with a breakdown voltage of 1.15kV.

[0101] In summary, for the Schottky diode device and its manufacturing method of the present invention, based on an unintentionally doped or lightly doped gallium oxide single crystal substrate, a trench structure conductive channel is prepared through an etching process, on which an alumina dielectric layer, an ohmic electrode, and a Schottky electrode are sequentially arranged. The electrodes cover along the sidewalls, part of the lower tabletop, and the upper tabletop. The ohmic electrode is composed of a titanium layer and a first gold layer, and the Schottky electrode is composed of a nickel layer and a second gold layer, and they are arranged opposite to each other; a silicon dioxide passivation layer covers above the device, and first and second lead electrodes for connecting corresponding electrodes are provided. Through the electrode structure design, the channel is controlled from multiple directions, the carrier concentration and distribution are effectively adjusted, the control ability of the channel current is improved, excellent switching characteristics are achieved, the subthreshold swing and leakage current are reduced, and the switching speed and frequency characteristics are improved; at the same time, this structure makes the current flow more uniformly, reduces current crowding, reduces the channel resistance, increases the effective channel width, further reduces the on-resistance, improves the current driving ability and power handling ability, reduces energy loss, and improves the device efficiency. In addition, the dual field plate structure design makes the electric field distribution more uniform, reduces electric field concentration, and reduces the occurrence probability of reliability problems such as oxide layer breakdown and hot carrier effects, enhances the device stability and lifespan, and overall realizes a high-power, low-power consumption, and high-performance switching device, which is inexpensive, has stable performance, and is conducive to industrial application.

[0102] It should be clear that the present invention is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications, and additions, or change the order between steps after understanding the spirit of the present invention.

[0103] In the present invention, the features described and / or illustrated for one embodiment can be used in the same or similar manner in one or more other embodiments, and / or combined with the features of other embodiments or replace the features of other embodiments.

[0104] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, various changes and modifications can be made to the embodiments of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A Schottky diode device, characterized in that, Including: An unintentionally doped or lightly doped gallium oxide single crystal substrate; An alumina dielectric layer disposed above the gallium oxide single crystal substrate; An ohmic electrode covering the sidewalls, a part of the lower surface, and a part of the upper surface of the gallium oxide single crystal substrate and the alumina dielectric layer along a first side; the ohmic electrode includes a titanium layer and a first gold layer obtained by row magnetron sputtering; A Schottky electrode covering the sidewalls, a part of the lower surface, and a part of the upper surface of the gallium oxide single crystal substrate and the alumina dielectric layer along a second side; the Schottky electrode includes a nickel layer and a second gold layer obtained by magnetron sputtering; the second side is opposite to the first side in position; A conductive channel layer obtained by an etching method and disposed between the ohmic electrode and the Schottky electrode; A silicon dioxide passivation layer covering the ohmic electrode and the Schottky electrode; A first lead electrode and a second lead electrode disposed on the silicon dioxide passivation layer, the first lead electrode being connected to the ohmic electrode, and the second lead electrode being connected to the Schottky electrode.

2. The Schottky diode device according to claim 1, wherein The gallium oxide single crystal substrate adopts the 010 or -201 crystal orientation.

3. The Schottky diode device according to claim 2, characterized in that, In the ohmic electrode, the thickness of the titanium layer is 10 - 50 nm, and the thickness of the first gold layer is 100 - 1000 nm; in the Schottky electrode, the thickness of the nickel layer is 10 - 50 nm, and the thickness of the second gold layer is 100 - 1000 nm.

4. The Schottky diode device according to claim 3, characterized in that, The thickness of the alumina dielectric layer is 20 - 100 nm, and the thickness of the silicon dioxide passivation layer is 300 - 800 nm.

5. The Schottky diode device according to claim 4, wherein, The first lead electrode and the second lead electrode are composed of a 50-nm-thick titanium layer and a 300-nm-thick gold layer stacked, and the length and width of the first lead electrode and the second lead electrode are both 300 - 1000 μm.

6. A method for manufacturing a Schottky diode device according to any one of claims 1 to 5, characterized in that, Including the following steps: Clean the unintentionally doped or lightly doped gallium oxide single crystal substrate to remove organic contamination, inorganic contamination, and the natural oxide layer; Deposit an alumina dielectric layer on the surface of the gallium oxide single crystal substrate by atomic layer deposition; Through a photolithography and etching process, prepare a conductive channel by wet etching the alumina dielectric layer and dry etching the gallium oxide single crystal substrate; Perform the first photolithography and etching to form an ohmic electrode region on the sidewalls, a part of the lower surface, and a part of the upper surface of the gallium oxide single crystal substrate and the alumina dielectric layer along the first side, deposit a 10 - 50-nm titanium layer and a 100 - 1000-nm first gold layer in the ohmic electrode region by magnetron sputtering using the mesa process, obtain the ohmic electrode and the field plate, and perform an annealing treatment; Perform the second photolithography and etching to form a Schottky contact electrode region on the sidewalls, a part of the lower surface, and a part of the upper surface of the gallium oxide single crystal substrate and the alumina dielectric layer along the second side, deposit a 10 - 50-nm nickel layer and a 100 - 1000-nm second gold layer in the Schottky contact electrode region by magnetron sputtering using the mesa process, and obtain the Schottky electrode and the field plate; A plasma-enhanced chemical vapor deposition equipment is used to deposit a silicon dioxide passivation layer, the silicon dioxide passivation layer is etched, and a first extraction electrode, a second extraction electrode and their field plates are prepared based on electron beam evaporation. The first extraction electrode is connected to the ohmic electrode, and the second extraction electrode is connected to the Schottky electrode.

7. The manufacturing method of the Schottky diode device according to claim 6, characterized in that, The doping concentration of the gallium oxide single crystal substrate is less than or equal to 10 16 cm -3 , and the crystal orientation is 010 or -201; Clean the unintentionally doped or lightly doped gallium oxide single crystal substrate, including: Successively perform ultrasonic cleaning on the gallium oxide single crystal substrate in acetone, ethanol and deionized water for 5 minutes; Soak and clean the gallium oxide single crystal substrate with a sulfuric acid-hydrogen peroxide mixed solution for 5 minutes; the sulfuric acid-hydrogen peroxide mixed solution is obtained by mixing 30% H2O2 and 96% H2SO4; Rinse the gallium oxide single crystal substrate with deionized water for 15 minutes and dry it with nitrogen.

8. The method for preparing a Schottky diode device according to claim 6, wherein, During the first photolithography etching, the alumina dielectric layer is wet-etched with a 1:20 hydrofluoric acid buffer solution, and the ohmic electrode region is dry-etched. For the gallium oxide single crystal substrate with a crystal orientation of 010, the etching time is 6 minutes and the etching depth is 1 μm.

9. The manufacturing method of the Schottky diode device according to claim 6, characterized in that, During the second photolithography etching, the alumina dielectric layer is wet-etched with a 1:20 hydrofluoric acid buffer solution, and the Schottky contact electrode region is dry-etched. For the gallium oxide single crystal substrate with a crystal orientation of 010, the etching time is 6 minutes and the etching depth is 1 μm.

10. The manufacturing method of the Schottky diode device according to claim 6, characterized in that, The annealing treatment includes: Under the condition that the air pressure is less than or equal to 1×10-3 Torr, introduce nitrogen to maintain the pressure at normal pressure 760 Torr ± 5%; Heat up to 480°C at a rate of at least 50°C / s, hold for 1 minute, and maintain continuous nitrogen purging; Cool down based on the water cooling system at a rate of at least 30°C / s until it is below 100°C and then naturally cool to room temperature.

Images