Antenna device and manufacturing method thereof

Abstract

The invention provides an antenna device. The antenna device comprises a first substrate, a plurality of phase shift electrodes, a second substrate, a plurality of patches and a dielectric layer, the plurality of phase shift electrodes are arranged on the first substrate, the second substrate is arranged on the first substrate, the plurality of patches are arranged between the first substrate and the second substrate, the dielectric layer is arranged between the plurality of phase shift electrodes and the second substrate, and the thickness of the dielectric layer is larger than or equal to 5 micrometers and smaller than or equal to the thickness of the second substrate.

Description

[0001] This is a divisional application of the invention with the application number 201910871259.6, the application date of September 16, 2019, and the invention title of "Electronic Device and Its Manufacturing Method". Technical Field

[0002] The present invention relates to an electronic device and its manufacturing method, and particularly to an antenna device and its manufacturing method. Background Art

[0003] Electronic products have become indispensable necessities in modern society. With the booming development of such electronic products, consumers have high expectations for the quality, functions, or prices of these products.

[0004] Some electronic products are further equipped with communication capabilities, such as antenna devices, but still do not meet the requirements in all aspects. Therefore, developing a structural design that can further improve the performance or operational reliability of electronic products or devices remains one of the topics that the industry is currently committed to researching. Summary of the Invention

[0005] According to some embodiments of the present invention, an antenna device is provided, including: a first substrate, a plurality of phase-shifting electrodes, a second substrate, a plurality of patches, and a dielectric layer; the plurality of phase-shifting electrodes are disposed on the first substrate, the second substrate is disposed on the first substrate, the plurality of patches are disposed between the first substrate and the second substrate, the dielectric layer is disposed between the plurality of phase-shifting electrodes and the second substrate, the thickness of the dielectric layer is greater than or equal to 5 micrometers and less than or equal to the thickness of the second substrate. Brief Description of the Drawings

[0006] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of the specific embodiments of the present invention is provided in conjunction with the accompanying drawings, wherein:

[0007] Figure 1 Showing a top view structural schematic diagram of an electronic device according to some embodiments of the present invention;

[0008] Figure 2 Showing a three-dimensional schematic diagram of a partial structure of an electronic device according to some embodiments of the present invention;

[0009] Figure 3 Showing a cross-sectional structural schematic diagram of an electronic device according to some embodiments of the present invention;

[0010] Figure 4 Showing a cross-sectional structural schematic diagram of an electronic device according to some embodiments of the present invention;

[0011] Figure 5 Showing a cross-sectional structural schematic diagram of an electronic device according to some embodiments of the present invention;

[0012] Figure 6 Showing a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0013] Figure 7 Showing a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0014] Figure 8 Showing a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0015] Figure 9 Showing a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0016] Figure 10 Showing a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0017] Figures 11A to 11H Showing a schematic cross-sectional structure diagram of an electronic device at an intermediate stage of the manufacturing process according to some embodiments of the present invention;

[0018] Figures 12A to 12F Showing a schematic cross-sectional structure diagram of an electronic device at an intermediate stage of the manufacturing process according to some embodiments of the present invention.

[0019] Symbol Description

[0020] 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H, 10K Electronic devices;

[0021] 100A Modulation unit;

[0022] 102 First substrate;

[0023] 102a Inner side;

[0024] 102b Outer side;

[0025] 104 Phase shift electrode;

[0026] 106 First buffer layer;

[0027] 108 First alignment layer;

[0028] 202 Second substrate;

[0029] 202a Inner side;

[0030] 202b Outer side;

[0031] 202r Depression;

[0032] 203 Coplanar waveguide;

[0033] 204 patch;

[0034] 204t top surface;

[0035] 206 dielectric layer;

[0036] 206a inner side;

[0037] 206b outer side;

[0038] 206e hole;

[0039] 206p opening;

[0040] 206r depression;

[0041] 208 common electrode layer;

[0042] 208p opening;

[0043] 210 second buffer layer;

[0044] 210p opening;

[0045] 212 second alignment layer;

[0046] 214 protective layer;

[0047] 214t top surface;

[0048] 216 cover layer;

[0049] 300 liquid crystal layer;

[0050] 400 feeding structure;

[0051] 400A feeder;

[0052] 400B feeding line;

[0053] A-A’ cutting line;

[0054] d1 first distance;

[0055] d2 second distance;

[0056] D p diameter;

[0057] T1 first thickness;

[0058] T2 second thickness;

[0059] T3 third thickness;

[0060] T 3a thickness;

[0061] T3b Thickness;

[0062] W1 First width;

[0063] W2 Second width;

[0064] W3 Third width;

[0065] W4 Fourth width;

[0066] W5 Fifth width. Detailed implementation

[0067] The following provides a detailed description of the electronic device and its manufacturing method according to the embodiments of the present invention. It should be understood that the following description provides many different embodiments or examples for implementing different aspects of some embodiments of the present invention. The specific elements and arrangements described below are only used to simply and clearly describe some embodiments of the present invention. Of course, these are only for illustration and not for limiting the present invention. In addition, similar and / or corresponding reference numerals may be used in different embodiments to label similar and / or corresponding elements to clearly describe the present invention. However, the use of these similar and / or corresponding reference numerals is only for simply and clearly describing some embodiments of the present invention, and does not represent any correlation between the different embodiments and / or structures discussed.

[0068] It should be understood that the elements or devices in the drawings may exist in various forms well-known to those skilled in the art. In addition, relative terms may be used in the embodiments, such as "lower" or "bottom" or "higher" or "top", to describe the relative relationship of one element in the drawing to another element. It can be understood that if the device in the drawing is flipped upside down, the element described on the "lower" side will become the element on the "higher" side. The embodiments of the present invention can be combined with the attached Figure 1 And it is understood that the drawings of the present invention are also regarded as part of the invention description. It should be understood that the drawings of the present invention are not drawn to scale. In fact, the dimensions of the elements may be arbitrarily enlarged or reduced to clearly show the features of the present invention.

[0069] Furthermore, when it is mentioned that a first material layer is located on or above a second material layer, it includes the case where the first material layer is in direct contact with the second material layer, or, there may be one or more other material layers in between. In this case, the first material layer and the second material layer may not be in direct contact.

[0070] In addition, it should be understood that although terms such as "first", "second", "third", etc. may be used herein to describe various elements, components, or parts, these elements, components, or parts should not be limited by these terms. These terms are only used to distinguish different elements, components, regions, layers, or parts. Therefore, a first element, component, region, layer, or part discussed below may be referred to as a second element, component, region, layer, or part without departing from the teachings of the present invention.

[0071] In the text, terms such as "about", "approximately", "substantially", "substantially" generally mean within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. The quantity given herein is an approximate quantity, that is, the meaning of "about", "approximately", "substantially", "substantially" may still be implied even without specifically stating "about", "approximately", "substantially", "substantially". In addition, the terms "range from a first value to a second value", "range between a first value and a second value" mean that the range includes the first value, the second value, and other values therebetween.

[0072] In some embodiments of the present invention, terms related to joining and connecting, such as "connect", "interconnect", etc., unless otherwise defined, may mean that two structures are in direct contact, or may also mean that two structures are not in direct contact, and other structures are provided between these two structures. And these terms related to joining and connecting may also include the cases where both structures can move, or both structures are fixed. In addition, the term "coupled" includes any means of direct and indirect electrical connection.

[0073] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the technical field to which the present invention belongs. It can be understood that these terms, such as defining terms in a commonly used dictionary, should be interpreted to have a meaning consistent with the relevant technology and the background or context of the present invention, and should not be interpreted in an idealized or overly formal manner, unless specifically defined in the embodiments of the present invention.

[0074] According to some embodiments of the present invention, a method for manufacturing an electronic device can form a patch and a common electrode on the same side (single side) of a substrate. Compared with the process of forming a metal layer on both sides of the substrate, the risk of deterioration of the modulation material or cracking of the substrate due to the process temperature can be reduced, or the process can be further simplified, but not limited thereto. Furthermore, according to some embodiments of the present invention, the electronic device formed by the foregoing manufacturing method can reduce the dielectric loss of electromagnetic waves or improve the operation reliability.

[0075] According to some embodiments of the present invention, the provided electronic device may include an antenna device, a liquid crystal display device, a sensing device, a light-emitting device, a splicing device, other suitable devices, or a combination of the above devices, but not limited thereto. The electronic device may be a bendable or flexible electronic device. The antenna device may be, for example, a liquid crystal antenna, but not limited thereto. The splicing device may be, for example, an antenna splicing device, but not limited thereto. It should be understood that the electronic device may be any permutation and combination of the foregoing, but the present invention is not limited thereto.

[0076] Please refer to Figure 1 , Figure 1 which shows a top view structural schematic diagram of the electronic device 10A in some embodiments of the present invention. It should be understood that, for the sake of clear illustration, some elements are omitted in the figure, and only a part of the modulation unit 100A of the electronic device 10A is schematically shown. In addition, Figure 1 part of the coplanar waveguide 203 is also omitted. The coplanar waveguide 203 may overlap with one end of the phase-shifting electrode 104 (e.g., near the feeding line 400B) in the normal direction (e.g., the Z direction) of the first substrate 102. For example, the coplanar waveguide 203 may be disposed on the second substrate 202 (shown in Figure 2 ), but not limited thereto. In the present invention, if not specifically stated, "overlap" may include "overlap" and "partial overlap". In different embodiments, the number of modulation units 100A of the electronic device 10A may be adjusted according to actual needs. In addition, it should be understood that according to some embodiments, additional features may be added to the electronic device 10A described below. In other embodiments, some features of the electronic device 10A described below may be replaced or omitted.

[0077] As Figure 1 shown, the electronic device 10A may include a first substrate 102 and a plurality of modulation units 100A disposed on the first substrate 102. In some embodiments, the electronic device 10A may be an antenna device, and the modulation unit 100A may be an antenna unit for modulating electromagnetic waves (e.g., radio frequency or microwave).

[0078] In some embodiments, the material of the first substrate 102 may include glass, quartz, sapphire, ceramics, polyimide (PI), liquid-crystal polymer (LCP) material, polycarbonate (PC), photo sensitive polyimide (PSPI), polyethylene terephthalate (PET), other suitable materials, or a combination of the foregoing materials, but is not limited thereto. In some embodiments, the first substrate 102 may include a printed circuit board (PCB). In some embodiments, the first substrate 102 may include a flexible substrate, a rigid substrate, or a combination of the foregoing.

[0079] Furthermore, as Figure 1 shown, according to some embodiments, the electronic device 10A may include a feeding structure 400, and the feeding structure 400 may be disposed on the first substrate 102 for transmitting an electromagnetic wave signal. In some embodiments, the feeding structure 400 has a feeding source 400A and a feeding line 400B, and the feeding line 400B may be coupled to the feeding source 400A, and the feeding source 400A may provide an initial feeding wave. In one embodiment, one feeding line 400B may be coupled to multiple feeding sources 400A, but is not limited thereto. In another embodiment, multiple feeding lines 400B may be coupled to one feeding source 400A, but is not limited thereto. In some embodiments, the feeding structure 400 has multiple feeding sources 400A that may be coupled to multiple feeding lines 400B, but is not limited thereto. In some embodiments, the initial feeding wave may be a high-frequency electromagnetic wave, but is not limited thereto. In addition, in some embodiments, the feeding structure 400 may be further coupled to a signal processor, a signal modulator, or a combination of the foregoing (not shown).

[0080] In some embodiments, the feeding structure 400 may include a conductive material. For example, the metal conductive material may include copper (Cu), silver (Ag), tin (Sn), aluminum (Al), molybdenum (Mo), tungsten (W), gold (Au), chromium (Cr), nickel (Ni), platinum (Pt), titanium (Ti), copper alloy, silver alloy, tin alloy, aluminum alloy, molybdenum alloy, tungsten alloy, gold alloy, chromium alloy, nickel alloy, platinum alloy, titanium alloy, other suitable conductive materials, or a combination of the foregoing materials, but is not limited thereto.

[0081] In addition, the electronic device 10A may include a plurality of phase-shifting electrodes 104 (or microstrip lines), and the phase-shifting electrodes 104 may be disposed on the first substrate 102. The phase-shifting electrodes 104 may be adjacent to the feeding structure 400, and the phase-shifting electrodes 104 may have a spiral shape or a loop shape, but are not limited thereto. At least one of the phase-shifting electrodes 104 can be used to receive an electromagnetic wave signal from the feeding structure 400. For example, the feeding structure 400 can couple the electromagnetic wave signal to the phase-shifting electrode 104 through the coplanar waveguide 203 in a manner of inducing current through the feeding line 400B. However, in some other embodiments, the phase-shifting electrodes 104 can also be used to feed out the processed or modulated electromagnetic wave signal, for example, feed it out to the feeding line 400B. Specifically, the refractive index of the modulation material located above or around the phase-shifting electrode 104 can be modulated by changing the potential of the phase-shifting electrode 104 to change the electric field or magnetic field between the phase-shifting electrode 104 and the common electrode layer 208, thereby changing the phase difference of the passing electromagnetic wave. In another embodiment, the dielectric constant of the modulation material located above or around the phase-shifting electrode 104 can be modulated by changing the potential of the phase-shifting electrode 104 to change the electric field or magnetic field between the phase-shifting electrode 104 and the common electrode layer 208, thereby changing the capacitance.

[0082] In some embodiments, the material of the phase-shifting electrodes 104 may include a metal conductive material, a transparent conductive material, or a combination of the foregoing. The metal conductive material is similar to the metal conductive material of the feeding structure 400 and will not be described herein again. The transparent conductive material may include a transparent conductive oxide (TCO). For example, the transparent conductive oxide may include indium tin oxide (ITO), tin oxide (SnO), zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), antimony tin oxide (ATO), antimony zinc oxide (AZO), other suitable transparent conductive materials, or a combination of the foregoing materials, but is not limited thereto.

[0083] In addition, according to some embodiments, the phase-shifting electrode 104 may be further electrically connected to a driving element (not shown). In some embodiments, the driving element may include an active driving element (e.g., a thin-film transistor (TFT)), a passive driving element, or a combination of the foregoing. Specifically, in some embodiments, the phase-shifting electrode 104 may be electrically connected to a thin-film transistor, and the thin-film transistor may be further electrically connected to a data line and / or a scan line (gate line). In some embodiments, the phase-shifting electrode 104 may be electrically connected to an integrated circuit (IC) and / or a digital-to-analog converter.

[0084] Furthermore, the electronic device 10A may include a patch 204, and the patch 204 may be disposed on the phase-shifting electrode 104. In some embodiments, in the normal direction of the first substrate 102 (e.g., the Z direction), the patch 204 may partially overlap with the phase-shifting electrode 104. Further, in some embodiments, in the normal direction of the first substrate 102 (e.g., the Z direction), the patch 204 may overlap with one end of the phase-shifting electrode 104, but is not limited thereto. In another embodiment, the patch 204 may not overlap with the end of the phase-shifting electrode 104, but overlap with other parts of the phase-shifting electrode 104. In some embodiments, the patch 204 may be electrically floated, coupled to a fixed potential (e.g., grounded), or other functional circuits, but the present invention is not limited thereto.

[0085] In some embodiments, the material of the patch 204 may include a metal conductive material, a transparent conductive material, or a combination of the foregoing. The metal conductive material and the transparent conductive material are similar to the material of the phase-shifting electrode 104 and will not be described herein again.

[0086] Next, please refer to Figure 2 , Figure 2 which shows a perspective schematic diagram of a partial structure of the electronic device 10A according to some embodiments of the present invention. It should be understood that, for the sake of clarity, Figure 2 only shows Figure 1 some elements of the modulation unit 100A of Figure 2 . As shown in Figure 2 , in some embodiments, the modulation unit 100A may include a first substrate 102, and a feeding line 400B and a phase-shifting electrode 104 disposed on the first substrate 102. As shown in

[0087] Furthermore, in some embodiments, the modulation unit 100A may further include a second substrate 202, a patch 204, and a common electrode layer 208. The second substrate 202 may be disposed opposite to the first substrate 102, and the common electrode layer 208 and the patch 204 may be disposed between the first substrate 102 and the second substrate 202.

[0088] In some embodiments, the material of the second substrate 202 may be similar to that of the first substrate 102, which will not be elaborated herein. In addition, the material of the second substrate 202 may be the same as or different from that of the first substrate 102.

[0089] In addition, according to some embodiments, both the first substrate 102 and the second substrate 202 may be flexible substrates, whereby the overall flexibility or plasticity of the electronic device 10A can be improved, which is beneficial for mounting on the surfaces of various articles, such as automobiles, motorcycles, airplanes, ships, buildings, or other applicable articles, but the present invention is not limited thereto.

[0090] Furthermore, as Figure 2 shown, the common electrode layer 208 may have an opening 208p, and in the normal direction Z of the first substrate 102, the patch 204 partially overlaps with the opening 208p. In addition, in some embodiments, the end of the phase shift electrode 104 may overlap with the opening 208p, but is not limited thereto. According to some embodiments, different electric fields may be applied to the modulation material (e.g., the liquid crystal layer 300 in the subsequent drawings) in the modulation unit 100A to adjust the capacitance and / or phase difference, and control the transmission direction or other parameters of the electromagnetic wave signal passing through the opening 208p and the patch 204. The detailed structure of the electronic device 10A is further described as follows.

[0091] Please refer to Figure 3 which Figure 3 shows a schematic cross-sectional structure diagram of the electronic device 10A according to some embodiments of the present invention. Specifically, Figure 3 illustrates Figure 1 a schematic cross-sectional structure diagram of the modulation unit 100A along the cut line A-A' in. As described above, the electronic device 10A includes a first substrate 102 and a second substrate 202. Specifically, the first substrate 102 and the second substrate 202 are disposed opposite to each other. The first substrate 102 has an inner side 102a facing the second substrate 202 and an outer side 102b opposite to the inner side 102a. Similarly, the second substrate 202 has an inner side 202a facing the first substrate 102 and an outer side 202b opposite to the inner side 202a.

[0092] Furthermore, the first substrate 102 may have a first thickness T1, and the second substrate 202 may have a second thickness T2. In some embodiments, the first thickness T1 of the first substrate 102 may be greater than or equal to the second thickness T2 of the second substrate 202. It is worth noting that, according to some embodiments, the second thickness T2 may be less than the first thickness T1, because the second substrate 202 is the main substrate through which the electromagnetic wave signal passes, thereby reducing the dielectric loss of the electromagnetic wave radiated outward from the patch 204 or the electromagnetic wave that is intended to enter the patch 204 from the outside, but it is not limited thereto.

[0093] Furthermore, according to the embodiment of the present invention, the “first thickness T1” of the first substrate 102 and the “second thickness T2” of the second substrate 202 refer to the maximum thickness of the first substrate 102 and the second substrate 202 in the normal direction Z of the first substrate 102 .

[0094] In addition, according to the embodiments of the present invention, an optical microscope (OM), a scanning electron microscope (SEM), an α-step, an ellipsometer or other suitable methods can be used to measure the thickness, width or distance between each element. Specifically, in some embodiments, after removing the liquid crystal layer 300, a scanning electron microscope can be used to obtain any cross-sectional image of the structure, and the thickness, width or distance between each element in the image can be measured.

[0095] like Figure 2 and Figure 3 As shown, in some embodiments, the phase-shifting electrode 104 may be disposed on the inner side 102a of the first substrate 102. In some embodiments, the patch 204 may be disposed on the inner side 202a of the second substrate 202. As mentioned above, in some embodiments, in the normal direction Z of the first substrate 102, the patch 204 may overlap with the phase-shifting electrode 104.

[0096] In addition, the electronic device 10A may include a dielectric layer 206 and a common electrode layer 208 disposed between the first substrate 102 and the second substrate 202. Figure 3As shown, the dielectric layer 206 can be disposed between the common electrode layer 208 and the second substrate 202, and is disposed on the patch 204. For example, the patch 204 can be disposed between the second substrate 202 and the dielectric layer 206. Specifically, the dielectric layer 206 can be disposed adjacent to the second substrate 202, and the dielectric layer 206 has an inner side 206a facing the first substrate 102 and an outer side 206b opposite to the inner side 206a. In some embodiments, the patch 204 can be adjacent to the outer side 206b of the dielectric layer 206, and the common electrode layer 208 can be adjacent to the inner side 206a of the dielectric layer 206. The dielectric layer 206 can separate the patch 204 and the common electrode layer 208 from each other.

[0097] In some embodiments, the material of the dielectric layer 206 can include an organic material, an inorganic material, or a combination of the foregoing materials, but is not limited thereto. In some embodiments, the foregoing organic materials can include polyimide (PI), polymethylmethacrylate (PMMA), polyethylene terephthalate (PET), liquid-crystal polymer (LCP) material, polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), isoprene, phenol-formaldehyde resin, benzocyclobutene (BCB), perfluorocyclobutane (PECB), other suitable materials, or a combination of the foregoing materials, but is not limited thereto. In some embodiments, the foregoing inorganic materials can include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, titanium oxide, other suitable materials, or a combination of the foregoing materials, but is not limited thereto.

[0098] As Figure 3As shown, in some embodiments, the dielectric layer 206 may have a single-layer structure. However, in other embodiments, the dielectric layer 206 may have a multi-layer structure. Specifically, according to some embodiments, the number of layers of the multi-layer structure of the dielectric layer 206 may be between 2 and 50 layers (2 ≤ number ≤ 50), between 2 and 40 layers, between 3 and 30 layers, between 4 and 20 layers, or between 5 and 15 layers, such as 6 layers, 7 layers, 8 layers, 9 layers, 10 layers, 11 layers, 12 layers, 13 layers, or 14 layers, etc., but not limited thereto. In some embodiments, each layer of the dielectric layer 206 having a multi-layer structure may be formed of the same or different materials, or may be formed of partially the same and partially different layers. In addition, in some embodiments, the dielectric layer 206 may include at least one polyimide film, but not limited thereto.

[0099] According to some embodiments, the dielectric layer 206 may have a multi-layer structure, and the material of the layer closest to the common electrode layer 208 (or the layer in contact with the common electrode layer 208) may include silicon oxide, silicon nitride, other suitable materials, or a combination of the foregoing materials, but not limited thereto. In these embodiments, the difference in the coefficient of thermal expansion (CTE) between the dielectric layer 206 and the common electrode layer 208 can be reduced, thereby improving the warping problem of the second substrate 202.

[0100] Furthermore, the dielectric layer 206 may have a third thickness T3. In some embodiments, the third thickness T3 of the dielectric layer 206 may be greater than or equal to 5 micrometers (μm) and less than or equal to the second thickness T2 of the second substrate 202 (i.e., 5μm ≤ third thickness T3 ≤ second thickness T2). In some embodiments, the third thickness T3 of the dielectric layer 206 may be greater than or equal to 0.01 times the wavelength λ of the electromagnetic wave modulated by the electronic device 10A and less than or equal to 1 times the wavelength λ of the electromagnetic wave modulated by the electronic device 10A (i.e., 0.01λ ≤ third thickness T3 ≤ λ), such as 0.05λ, 0.1λ, 0.3λ, 0.5λ, 0.7λ, or 0.9λ. For example, the third thickness T3 may be between 0.02 times and 0.5 times the wavelength λ of the electromagnetic wave modulated by the electronic device 10A (0.02λ ≤ T3 ≤ 0.5λ).

[0101] It should be understood that if the third thickness T3 of the dielectric layer 206 is too small (e.g., less than 5μm or 0.01 times λ), the distance between the patch 204 and the common electrode layer 208 may be too small, resulting in a reduction in the radiation efficiency of the electromagnetic wave; on the other hand, if the third thickness T3 of the dielectric layer 206 is too large (e.g., greater than the second thickness T2 or 1 times λ), the intensity of the induced electromagnetic field may not be sufficient to achieve radiation.

[0102] Furthermore, according to an embodiment of the present invention, the "third thickness T3" of the dielectric layer 206 refers to the maximum thickness of the dielectric layer 206 in the normal direction Z of the first substrate 102.

[0103] As mentioned above, the electronic device 10A includes a common electrode layer 208. As Figure 3 shown, the common electrode layer 208 can be patterned to have an opening 208p, and the opening 208p can expose a part of the inner side 206a of the dielectric layer 206. Furthermore, the opening 208p can correspond to the patch 204. For example, in the normal direction Z of the first substrate 102, the patch 204 can overlap with the opening 208p. In addition, in some embodiments, the common electrode layer 208 can be electrically grounded. In one embodiment, the common electrode layer 208 can be patterned at the end corresponding to the phase shift electrode 104 to form a coplanar waveguide 203 (shown in Figure 1 ).

[0104] In some embodiments, the material of the common electrode layer 208 can include a metal conductive material, a transparent conductive material, or a combination of the foregoing. The metal conductive material and the transparent conductive material can be similar to the material of the phase shift electrode 104, which will not be elaborated herein.

[0105] As Figure 3 shown, in some embodiments, the patch 204 can have a first width W1, and the opening 208p of the common electrode layer 208 can have a second width W2. In some embodiments, in the first direction (e.g., the X direction), the second width W2 of the opening 208p can be greater than or equal to the first width W1 of the patch 204; in the second direction (e.g., the Y direction), the width of the opening 208p can be less than or equal to the width W of the patch 204, which helps the electromagnetic wave signal to pass through the opening 208p and be transmitted to the patch 204. The first direction can be different from the second direction. For example, the first direction can be substantially perpendicular to the second direction.

[0106] It should be understood that according to some embodiments of the present invention, the first direction can be the extending direction of the opening 208p, but is not limited thereto. In addition, the first direction can be the length direction of the opening 208p, but is not limited thereto. According to some embodiments of the present invention, the "length direction" refers to the direction along or substantially parallel to the long axis of an object. The long axis can be the maximum dimension closest to its longitudinal dimension. For an object without a clear long axis, the long axis can represent the long side of the smallest rectangle that can enclose the object.

[0107] As Figure 3 shown, according to some embodiments, the patch 204 and the common electrode layer 208 can both be disposed on the inner side 202a of the second substrate 202. In other words, the patch 204 and the common electrode layer 208 are disposed on the same side of the second substrate 202, but are not limited thereto.

[0108] It should be noted that in an electronic device where the patch 204 and the common electrode layer 208 are respectively disposed on both sides of the second substrate 202, a high-temperature metal coating process (such as a back plating process) that takes a long time may increase the risks of deterioration of the modulation material or cracking of the substrate due to the high-temperature process. According to some embodiments of the present invention, the patch 204 and the common electrode layer 208 disposed on one side of the second substrate 202 can reduce the risks of deterioration of the modulation material or cracking of the substrate due to the high-temperature process. The detailed manufacturing method of the electronic device 10A will be described later.

[0109] In addition, please refer to Figure 3 , the electronic device 10A includes a liquid crystal layer 300. The liquid crystal layer 300 can be disposed between the first substrate 102 and the second substrate 202, and the liquid crystal layer 300 can be disposed between the phase shift electrode 104 and the common electrode layer 208. As described above, according to some embodiments, the capacitance and the phase difference can be adjusted by applying different electric fields to the liquid crystal layer 300 to control the transmission direction of the electromagnetic signal passing through the opening 208p and the patch element 204.

[0110] In some embodiments, the material of the liquid crystal layer 300 may include nematic liquid crystal, smectic liquid crystal, cholesteric liquid crystal, blue-phase liquid crystal, other suitable liquid crystal materials, or a combination of the foregoing materials, but is not limited thereto. However, according to other embodiments, a material having a property of adjustable refractive index can be used to replace the liquid crystal layer 300. For example, transition metal nitride, electro-optics material, or a combination of the foregoing, but is not limited thereto. For example, the electro-optics material may include lithium niobate (LiNbO3), lithium tantalate (LiTaO3), cadmium telluride (CdTe), ammonium dihydrogen phosphate (NH4H2PO4), potassium dihydrogen phosphate (KH2PO4), potassium tantalum niobate (KTN), lead zirconate titanate (PZT), transition metal nitride (such as TiN, HfN, TaN, or ZrN), or a combination of the foregoing, but is not limited thereto. In one embodiment, the liquid crystal layer 300 may include isothiocyanate, or other highly polar functional groups, but is not limited thereto.

[0111] Please refer to Figure 3 , in some embodiments, the electronic device 10A may further include a first buffer layer 106. The first buffer layer 106 can be disposed between the first substrate 102 and the phase shift electrode 104. For example, in some embodiments, the first buffer layer 106 can be in contact with the inner side 102a of the first substrate 102 and the phase shift electrode 104. The first buffer layer 106 can reduce the difference in the coefficient of thermal expansion between the first substrate 102 and the phase shift electrode 104, thereby improving the warping problem of the first substrate 102.

[0112] In some embodiments, the electronic device 10A may further include a second buffer layer 210 disposed between the second substrate 202 and the patch 204. In some embodiments, the second buffer layer 210 may be in contact with the inner side 202a of the second substrate 202, the patch 204, and the dielectric layer 206. The second buffer layer 210 may reduce the difference in the coefficient of thermal expansion between the second substrate 202 and the patch 204, thereby improving the warping problem of the second substrate 202.

[0113] In some embodiments, the first buffer layer 106 and the second buffer layer 210 may include an insulating material. In some embodiments, the materials of the first buffer layer 106 and the second buffer layer 210 may include an organic material, an inorganic material, or a combination of the foregoing, but are not limited thereto. In some embodiments, the foregoing organic materials may include polyethylene terephthalate (PET), polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), polymethylmethacrylate (PMMA), isoprene, phenol-formaldehyde resin, benzocyclobutene (BCB), perfluorocyclobutane (PECB), or a combination of the foregoing, but are not limited thereto. In some embodiments, the foregoing inorganic materials may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide (AlOx), titanium oxide (TiOx), or a combination of the foregoing, but are not limited thereto. Furthermore, the material of the first buffer layer 106 may be the same as or different from the material of the second buffer layer 210.

[0114] Furthermore, the first buffer layer 106 and the second buffer layer 210 may have a single-layer structure or a multi-layer structure, for example, may include a plurality of sublayers. In embodiments where the first buffer layer 106 or the second buffer layer 210 includes a plurality of sublayers, the materials of the respective sublayers may be the same or different.

[0115] In addition, in some embodiments, the electronic device 10A may further include a circuit layer 110 (please refer to Figure 11F ), and the circuit layer 110 may be disposed between the first substrate 102 and the phase shift electrode 104. In some embodiments, the circuit layer 110 may include driving elements (such as thin film transistors) and signal lines electrically connected to the driving elements. The signal lines may include, for example, data lines and scan lines (gate lines).

[0116] Please continue to refer to Figure 3 In some embodiments, the electronic device 10A may further include a first alignment layer 108, and the first alignment layer 108 may be disposed between the phase shift electrode 104 and the liquid crystal layer 300. In some embodiments, the first alignment layer 108 may be disposed between the first buffer layer 106 and the liquid crystal layer 300. As Figure 3 shown, in some embodiments, the first alignment layer 108 may be conformally formed on the first buffer layer 106 and the phase shift electrode 104, but not limited thereto.

[0117] Furthermore, in some embodiments, the electronic device 10A may further include a second alignment layer 212, and the second alignment layer 212 may be disposed between the common electrode layer 208 and the liquid crystal layer 300. In some embodiments, the second alignment layer 212 may be disposed between the dielectric layer 206 and the liquid crystal layer 300. As Figure 3 shown, in some embodiments, the second alignment layer 212 may be conformally formed on the common electrode layer 208 and the dielectric layer 206, but not limited thereto. In some embodiments, the second alignment layer 212 may also extend (or be disposed) in the opening 208p.

[0118] In some embodiments, the first alignment layer 108 and the second alignment layer 212 may assist in controlling the alignment direction of the liquid crystal molecules in the liquid crystal layer 300. In some embodiments, the materials of the first alignment layer 108 and the second alignment layer 212 may include organic materials, inorganic materials, or a combination of the foregoing. For example, the foregoing organic materials may include polyimide (PI), photo-reactive polymer materials, or a combination of the foregoing, but not limited thereto. The foregoing inorganic materials may include, for example, silicon dioxide (SiO2), other materials having an alignment function, or a combination of the foregoing, but not limited thereto. In other embodiments, at least one of the first alignment layer 108 and the second alignment layer 212 may be omitted, but not limited thereto.

[0119] Next, please refer to Figure 4 , Figure 4 which shows a schematic cross-sectional structure diagram of an electronic device 10B according to some other embodiments of the present invention. It should be understood that the same or similar components or elements as those in the foregoing will be denoted by the same or similar reference numerals hereinafter, and their materials, manufacturing methods and functions are the same or similar to those described above, so this part will not be described in detail hereinafter.

[0120] Figure 4 The electronic device 10B shown in Figure 3The illustrated electronic device 10A is substantially similar, except that in the electronic device 10B, the second substrate 202 can be locally thinned. Specifically, in this embodiment, the second substrate 202 can have a recess 202r, and the recess 202r can correspond to the patch 204. In some embodiments, in the normal direction Z of the first substrate 102, the recess 202r can overlap with the patch 204.

[0121] In some embodiments, the recess 202r can be recessed a first distance d1 from the outer side 202b to the inner side 202a of the second substrate 202, and the first distance d1 can be regarded as the depth of the recess 202r. In some embodiments, the first distance d1 can be less than the second thickness T2 of the second substrate 202. In some embodiments, the first distance d1 can be equal to the second thickness T2 of the second substrate 202, that is, an opening is formed through the second substrate 202 and exposes the second buffer layer 210 or the dielectric layer 206.

[0122] Furthermore, the recess 202r can have a third width W3. In some embodiments, the third width W3 of the recess 202r can be greater than or equal to the first width W1 of the patch 204. According to some embodiments of the present invention, the third width W3 refers to the maximum width of the recess 202r in the X direction on any cross section. Furthermore, in some embodiments, the area of the recess 202r can be greater than or equal to the area of the patch 204. According to some embodiments of the present invention, the aforementioned area refers to the bottom areas of the recess 202r and the patch 204.

[0123] It should be noted that, according to some embodiments, the second substrate 202 with a smaller thickness at the position corresponding to the patch 204 can further reduce the dielectric loss of electromagnetic waves. Furthermore, it should be understood that although only the state where the second substrate 202 is locally thinned is shown in the drawings, according to other embodiments, the second substrate 202 can also be thinned as a whole.

[0124] In addition, as Figure 4 shown, in some embodiments, the electronic device 10B can further include a protective layer 214, and the protective layer 214 can be disposed (or filled) in the recess 202r. In some embodiments, the top surface 214t of the protective layer 214 can be lower than the outer side 202b of the second substrate 202. In other embodiments, the top surface 214t of the protective layer 214 can be substantially flush with the outer side 202b of the second substrate 202. In one embodiment, the dielectric constant of the protective layer 214 can be different from the dielectric constant of the second substrate 202. For example, the dielectric constant of the protective layer 214 is less than or equal to the dielectric constant of the second substrate 202. When the dielectric constant of the protective layer 214 is less than or equal to the dielectric constant of the second substrate, the dielectric loss of electromagnetic waves can be reduced, but it is not limited thereto.

[0125] In some embodiments, the material of the protective layer 214 may include polyimide (PI), polymethylmethacrylate (PMMA), polyethylene terephthalate (PET), liquid-crystal polymer (LCP) material, polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), isoprene, phenol-formaldehyde resin, benzocyclobutene (BCB), perfluorocyclobutane (PECB), or a combination of the foregoing, but not limited thereto.

[0126] Next, please refer to Figure 5 , Figure 5 which shows a schematic cross-sectional structure diagram of the electronic device 10C according to some other embodiments of the present invention. Figure 5 The electronic device 10C shown is substantially similar to Figure 3 the electronic device 10A shown, except that the electronic device 10C may not have the second substrate 202. In this embodiment, the electronic device 10C may also not have the second buffer layer 210. In other words, in this embodiment, the outer side 206b of the dielectric layer 206 and the top surface 204t of the patch 204 may be exposed to the environment.

[0127] Specifically, in this embodiment, the electronic device 10C includes a first substrate 102, a phase-shifting electrode 104, a dielectric layer 206, a patch 204, a common electrode layer 208, a liquid crystal layer 300, a first alignment layer 108, and a second alignment layer 212. Furthermore, the phase-shifting electrode 104 may be disposed on the first substrate 102, the dielectric layer 206 may be disposed on the phase-shifting electrode 104, the patch 204 may be disposed in the dielectric layer 206, and the common electrode layer 208 may be disposed between the dielectric layer 206 and the first substrate 102. In addition, the liquid crystal layer 300 may be disposed between the phase-shifting electrode 104 and the dielectric layer 206, the first alignment layer 108 may be disposed between the phase-shifting electrode 104 and the liquid crystal layer 300, and the second alignment layer 212 may be disposed between the common electrode layer 208 and the liquid crystal layer 300.

[0128] According to some embodiments, the electronic device 10C without the second substrate 202 can reduce the overall thickness of the structure. Furthermore, in some embodiments, the electronic device 10C may not have the first substrate 102, and a protective layer may be selectively disposed below the first buffer layer 106. Thereby, the electronic device 10C can be made more flexible or plastic, which is beneficial for mounting on the surfaces of various devices.

[0129] Next, please refer to Figure 6 , Figure 6 which shows a schematic cross-sectional structure diagram of the electronic device 10D in some other embodiments of the present invention. Figure 6 The illustrated electronic device 10D is substantially similar to Figure 5 the illustrated electronic device 10C, except that the electronic device 10D may further include a cover layer 216, and the cover layer 216 may be in contact with the patch 204. A dielectric layer 206 may be disposed between the cover layer 216 and the common electrode layer 208. In this embodiment, the cover layer 216 may be disposed on the outer side 206b of the dielectric layer 206 to provide protection for the patch 204.

[0130] In some embodiments, the material of the cover layer 216 may be similar to that of the protective layer 214, which will not be elaborated herein.

[0131] Next, please refer to Figure 7 , Figure 7 which shows a schematic cross-sectional structure diagram of the electronic device 10E in some other embodiments of the present invention. Figure 7 The illustrated electronic device 10E is substantially similar to Figure 3 the illustrated electronic device 10A, except that in the electronic device 10E, the dielectric layer 206 may be locally thinned. Specifically, in this embodiment, the dielectric layer 206 may further include a recess 206r, and the recess 206r may correspond to the patch 204. In some embodiments, in the normal direction Z of the first substrate 102, the recess 206r may overlap with the patch 204.

[0132] In some embodiments, the recess 206r may be recessed from the inner side 206a to the outer side 206b of the dielectric layer 206. In some embodiments, the thinned dielectric layer 206 (the dielectric layer 206 corresponding to the recess 206r) may have a thickness T 3a . In some embodiments, the thickness T 3a is less than the third thickness T3 of the dielectric layer 206. Furthermore, according to the embodiments of the present invention, "the thickness T 3a " refers to the minimum thickness in the normal direction Z of the first substrate 102 in the thinned area of the dielectric layer 206. In one embodiment, the thickness T 3a may be the minimum thickness at the non-overlapping portion with the patch 204.

[0133] In addition, the recess 206r may have a fourth width W4. In some embodiments, the fourth width W4 of the recess 206r may be greater than or equal to the first width W1 of the patch 204. According to some embodiments of the present invention, the fourth width W4 may refer to the maximum width of the recess 206r in any cross-section parallel to the recess direction of the opening 208p (e.g., the X direction as shown in the figure, and may also refer to Figure 2 ). Furthermore, in some embodiments, the area of the recess 206r may also be greater than or equal to the area of the patch 204. According to some embodiments of the present invention, the aforementioned area refers to the top area or the bottom area of the recess 206r and the patch 204.

[0134] It should be noted that, according to some embodiments, having the recess 206r in the dielectric layer 206 corresponding to the position of the patch 204 can improve the electromagnetic radiation signal in the electronic device 10E.

[0135] Furthermore, as Figure 7 shown, in some embodiments, the second width W2 of the opening 208p of the common electrode layer 208 may be greater than the fourth width W4 of the recess 206r. In some embodiments, in the normal direction Z of the first substrate 102, the recess 206r may also overlap with the opening 208p. In some embodiments, the opening 208p and the recess 206r may form a stepped recess structure. In some embodiments, the second alignment layer 212 may conformally extend into the opening 208p and the recess 206r to form a second alignment layer 212 having a stepped structure. In these embodiments, the stepped recess structure formed by the opening 208p and the recess 206r can reduce the probability of breakage or deterioration of the second alignment layer 212.

[0136] Next, please refer to Figure 8 which Figure 8 shows a schematic cross-sectional structure of an electronic device 10F according to some other embodiments of the present invention. Figure 8 The electronic device 10F shown is substantially similar to the Figure 7 electronic device 10E shown, except that in the electronic device 10F, the dielectric layer 206 may be locally thinned to expose at least part of the patch 204. Specifically, in this embodiment, the dielectric layer 206 may include an opening 206p, and the opening 206p may correspond to the patch 204. In some embodiments, in the normal direction Z of the first substrate 102, the opening 206p may overlap with the patch 204. In addition, in this embodiment, the opening 206p may expose at least part of the patch 204.

[0137] In some embodiments, the opening 206p may extend from the inner side 206a to the outer side 206b of the dielectric layer 206. In some embodiments, the thinned dielectric layer 206 (the dielectric layer 206 corresponding to the opening 206p) may have a thickness T3b In some embodiments, the thickness T 3b may be less than the third thickness T3 of the dielectric layer 206. In this embodiment, the thickness T 3b is substantially equal to the thickness (not labeled) of the patch 204. Furthermore, according to an embodiment of the present invention, "the thickness T 3b " refers to the minimum thickness of the thinned region of the dielectric layer 206 in the normal direction Z of the first substrate 102. In one embodiment, the thickness T 3b may be the minimum thickness at a location not overlapping with the patch 204.

[0138] In addition, the opening 206p may have a fifth width W5. In some embodiments, the fifth width W5 of the opening 206p may be greater than or equal to the first width W1 of the patch 204. According to some embodiments of the present invention, the fifth width W5 may be the maximum width of the opening 206p in any cross-section parallel to the extending direction of the opening 208p (e.g., the X direction as shown in the figure, and may also refer to Figure 2 ). Furthermore, in some embodiments, the area of the opening 206p may be greater than or equal to the area of the patch 204. According to some embodiments of the present invention, the aforementioned area refers to the top area or the bottom area of the opening 206p and the patch 204.

[0139] It should be noted that, according to some embodiments, having the opening 206p of the dielectric layer 206 at the position corresponding to the patch 204 can improve the electromagnetic radiation signal in the electronic device 10F.

[0140] Furthermore, as Figure 8 shown, in some embodiments, the second width W2 of the opening 208p of the common electrode layer 208 may be greater than the fifth width W5 of the opening 206p. In some embodiments, in the normal direction Z of the first substrate 102, the opening 206p may also overlap with the opening 208p. In some embodiments, the opening 208p and the opening 206p may form a stepped recess structure. In some embodiments, the second alignment layer 212 may conformally extend into the opening 208p and the opening 206p to form a second alignment layer 212 having a stepped structure.

[0141] Next, please refer to Figure 9 , Figure 9 which shows a schematic cross-sectional structure of an electronic device 10G according to some other embodiments of the present invention. Figure 9 The electronic device 10G shown in Figure 3The illustrated electronic device 10A is substantially similar, except that in the electronic device 10G, a part of the second buffer layer 210 is removed to form an opening 210p, and the patch 204 can be disposed in the opening 210p. Specifically, in this embodiment, in the normal direction Z of the first substrate 102, the opening 210p can overlap with the patch 204. Furthermore, in this embodiment, in the normal direction Z of the first substrate 102, the second buffer layer 210 can be non-overlapping with the patch 204. In this embodiment, the patch 204 can be in contact with the inner side 202a of the second substrate 202.

[0142] As Figure 9 shown, a second distance d2 is provided between the second buffer layer 210 and the patch 204. In some embodiments, the range of the second distance d2 can be between 1 μm and 100 μm (1 μm ≤ second distance d2 ≤ 100 μm), or between 2 μm and 50 μm, such as 5 μm, 10 μm, 20 μm, 40 μm, 60 μm, or 80 μm. It should be understood that if the second distance d2 is too large, the coverage rate of the buffer layer 210 is relatively low, and it is difficult to reduce the difference in the expansion coefficients; conversely, if the second distance d2 is too small, it is not easy to dispose the patch 204 in the opening 210p.

[0143] It should be noted that according to some embodiments, the second buffer layer 210 may not be disposed at the position corresponding to the patch 204, thereby improving the electromagnetic radiation signal in the electronic device 10G.

[0144] Next, please refer to Figure 10 , Figure 10 which shows a schematic cross-sectional structure of an electronic device 10H according to other embodiments of the present invention. Figure 10 The illustrated electronic device 10H is substantially similar to Figure 3 the illustrated electronic device 10A, except that in the electronic device 10H, the dielectric layer 206 may further include a plurality of holes 206e disposed therein. In this embodiment, the dielectric layer 206 may include the holes 206e, and the holes 206e can be used to accommodate the gas generated by the electronic device 10H in a high-temperature operating environment, thereby improving the operating reliability of the electronic device 10H.

[0145] Specifically, the holes 206e may have a diameter D p . In some embodiments, the diameter D p may range between 0.1 μm and 100 μm (1 μm ≤ diameter D p ≤ 100 μm), between 0.5 μm and 90 μm, between 5 μm and 80 μm, or between 10 μm and 70 μm, for example, 10 μm, 25 μm, 40 μm, or 60 μm. According to some embodiments of the present invention, the diameter D pmay refer to the maximum width of the hole 206e on any cross-section parallel to the extending direction of the opening 208p (e.g., the X direction as shown in the figure, and may also refer to Figure 2 )

[0146] Next, please refer to Figures 11A to 11H , Figures 11A to 11H which shows a schematic cross-sectional structure of the electronic device 10A at an intermediate stage of the manufacturing process according to some embodiments of the present invention. It should be understood that, according to some embodiments, additional operation steps may be provided before, during, and / or after the manufacturing method of the electronic device 10A. According to some embodiments, some of the described operation steps may be replaced or deleted. According to some embodiments, the order of the operation steps may be interchangeable.

[0147] First, please refer to Figure 11A , a first substrate 102 is provided, and then a phase shift electrode 104 may be formed on the first substrate 102. Specifically, in some embodiments, a conductive material may be first formed on the first substrate 102, and then a part of the conductive material is removed to pattern the conductive material to form the phase shift electrode 104.

[0148] In some embodiments, the phase shift electrode 104 may be formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating process, electroless plating process, other suitable methods, or a combination of the foregoing. The physical vapor deposition process may include, for example, sputtering process, evaporation process, or pulsed laser deposition, etc., but is not limited thereto. The chemical vapor deposition process may include, for example, low-pressure chemical vapor deposition (LPCVD), low-temperature chemical vapor deposition (LTCVD), rapid thermal chemical vapor deposition (RTCVD), plasma-enhanced chemical vapor deposition (PECVD), or atomic layer deposition (ALD), etc., but is not limited thereto.

[0149] In some embodiments, a part of the conductive material may be removed by a patterning process to form the phase shift electrode 104. In some embodiments, the foregoing patterning process may include a photolithography process and an etching process. The photolithography process may include photoresist coating (e.g., spin coating), soft baking, hard baking, mask alignment, exposure, post-exposure baking, photoresist development, cleaning, and drying, etc., but is not limited thereto. The etching process may include a dry etching process or a wet etching process, but is not limited thereto.

[0150] As Figure 11AAs shown, in some embodiments, before forming the phase shift electrode 104 on the first substrate 102, a first buffer layer 106 may be further formed on the first substrate 102, and the first buffer layer 106 may be in contact with the first substrate 102.

[0151] In some embodiments, the first buffer layer 106 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing.

[0152] Furthermore, in some embodiments, before forming the phase shift electrode 104 on the first substrate 102, a circuit layer 110 may be formed on the first buffer layer 106. As Figure 11A shown, the circuit layer 110 may be formed between the first substrate 102 and the phase shift electrode 104.

[0153] In some embodiments, the circuit layer 110 may be formed by a physical vapor deposition process, a chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination of the foregoing. Furthermore, the circuit layer 110 may be patterned by one or more lithography processes and etching processes.

[0154] As Figure 11A shown, in some embodiments, after forming the phase shift electrode 104 on the first substrate 102, a first alignment layer 108 may be further formed on the phase shift electrode 104. In some embodiments, the first alignment layer 108 may be conformally formed on the phase shift electrode 104.

[0155] In some embodiments, the first alignment layer 108 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing.

[0156] Next, please refer to Figure 11B , a second substrate 202 is provided, and a patch 204 is formed on the second substrate 202. Specifically, in some embodiments, a conductive material may be first formed on the second substrate 202, and then a part of the conductive material is removed to pattern the conductive material to form the patch 204.

[0157] In some embodiments, the patch 204 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination of the foregoing. Furthermore, the patch 204 may be patterned by one or more lithography processes and etching processes. In some embodiments, the lithography process may include photoresist coating (such as spin coating), soft baking, hard baking, mask alignment, exposure, post-exposure baking, photoresist development, cleaning, and drying, etc., but is not limited thereto. In some embodiments, the etching process may include a dry etching process or a wet etching process, but is not limited thereto.

[0158] As Figure 11B shown, in some embodiments, before forming the patch 204 on the second substrate 202, a second buffer layer 210 may be further formed on the second substrate 202, and the second buffer layer 210 may be in contact with the second substrate 202.

[0159] In some embodiments, the second buffer layer 210 may be formed by the foregoing physical vapor deposition process, the foregoing chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing.

[0160] Next, please refer to Figure 11C , a dielectric layer 206 is formed on the patch 204, and the dielectric layer 206 is also formed on the second substrate 202. As Figure 11C shown, in some embodiments, the dielectric layer 206 may be in contact with the patch 204 and the second buffer layer 210.

[0161] In some embodiments, the dielectric layer 206 may be formed by the foregoing physical vapor deposition process, the foregoing chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing.

[0162] Next, please refer to Figure 11D , a common electrode layer 208 is formed on the dielectric layer 206, and the dielectric layer 206 is located between the common electrode layer 208 and the second substrate 202. Specifically, in some embodiments, the common electrode layer 208 may be patterned to have an opening 208p. Continuing from the foregoing, the patch 204 may have a first width W1, and the opening 208p of the common electrode layer 208 may have a second width W2. In some embodiments, the second width W2 may be greater than or equal to the first width W1.

[0163] In some embodiments, the common electrode layer 208 may be formed by the foregoing physical vapor deposition process, the foregoing chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination of the foregoing. Furthermore, the common electrode layer 208 may be patterned by one or more photolithography processes and etching processes.

[0164] Next, please refer to Figure 11E , in some embodiments, after forming the common electrode layer 208 on the dielectric layer 206, a second alignment layer 212 may be further formed on the common electrode layer 208. In some embodiments, the second alignment layer 212 may be conformally formed on the common electrode layer 208 and conformally extend (or be disposed) in the opening 208p.

[0165] In some embodiments, the second alignment layer 212 can be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing.

[0166] Next, please refer to Figure 11F . The first substrate 102 and the second substrate 202 are aligned such that the patch 204 is located on the inner side 202a of the second substrate 202, and the inner side 202a faces the first substrate 102. Moreover, a liquid crystal layer 300 is formed between the first substrate 102 and the second substrate 202, and the liquid crystal layer 300 can be located between the phase shift electrode 104 and the common electrode layer 208.

[0167] In some embodiments, before the first substrate 102 and the second substrate 202 are aligned, the liquid crystal layer 300 can be formed by the one drop filling (ODF) method, or the liquid crystal can also be filled by a vacuum injection method after alignment. However, the present invention is not limited thereto.

[0168] Next, please refer to Figure 11G and Figure 11H . In some embodiments, after the liquid crystal layer 300 is formed between the first substrate 102 and the second substrate 202, the second substrate 202 can be selectively removed to form the electronic device 10K. In some embodiments, after the second substrate 202 is removed, the second buffer layer 210 can be exposed to the environment. In certain embodiments, the second buffer layer 210 can also be removed. In addition, after the second substrate 202 and / or the second buffer layer 210 are removed, a protective layer (not shown) can be formed on the patch 204 and the dielectric layer 206.

[0169] Next, please refer to Figures 12A to 12F . Figures 12A to 12F FIG. shows a cross-sectional structural schematic diagram of the electronic device 10E in an intermediate stage of the manufacturing process according to some other embodiments of the present invention.

[0170] Figure 12A and Figure 12B Similar to the foregoing Figure 11A and Figure 12B , details are not described herein again. Next, please refer to Figure 12C . A dielectric layer 206 is formed on the patch 204, and the dielectric layer 206 is also formed on the second substrate 202. As shown in Figure 11C , in some embodiments, the dielectric layer 206 can be in contact with the patch 204 and the second buffer layer 210. In some embodiments, after the dielectric layer 206 is formed on the patch 204, a part of the dielectric layer 206 can be removed, and the removed part of the dielectric layer 206 can correspond to the patch 204.

[0171] Specifically, in some embodiments, after forming the dielectric layer 206 on the patch 204, a portion of the dielectric layer 206 can be removed to form a recess 206r. For example, it can be exposed through a half-tone mask or a gray tone mask, and then the recess 206r is formed after a developing and etching step. In some embodiments, in the normal direction Z of the first substrate 102, the recess 206r can overlap with the patch 204. In addition, as mentioned above, the recess 206r can have a fourth width W4. In some embodiments, the fourth width W4 of the recess 206r can be greater than or equal to the first width W1 of the patch 204.

[0172] In some embodiments, the dielectric layer 206 can be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing. Furthermore, the dielectric layer 206 can be patterned by one or more lithography processes and etching processes to form the recess 206r. In other embodiments, an opening 206p as shown in Figure 8 can also be formed to replace the recess 206r to expose at least a portion of the patch 204.

[0173] Next, please refer to Figure 12D , a common electrode layer 208 is formed on the dielectric layer 206, and the dielectric layer 206 is located between the common electrode layer 208 and the second substrate 202. Specifically, in some embodiments, the common electrode layer 208 can be patterned to have an opening 208p. In some embodiments, the second width W2 of the opening 208p of the common electrode layer 208 can be greater than or equal to the first width W1 of the patch 204. Furthermore, in some embodiments, the second width W2 of the opening 208p can be greater than or equal to the fourth width W4 of the recess 206r. In other embodiments, after forming the dielectric layer 206 and the common electrode layer 208, the opening 208p and the recess 206r (or the opening 206p) can be formed in sequence, but this is not limited thereto.

[0174] It should be noted that, in some embodiments, the second width W2 of the opening 208p is greater than the fourth width W4 of the recess 206r, and the opening 208p and the opening 206p thus form a stepped recess structure, thereby reducing the risk of the common electrode layer 108 filling into the opening 206p due to process tolerances, or reducing the process difficulty.

[0175] In some embodiments, the common electrode layer 208 can be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination of the foregoing. Furthermore, the common electrode layer 208 can be patterned by one or more lithography processes and etching processes to form the opening 208p.

[0176] Next, please refer to Figure 12E , in some embodiments, after forming the common electrode layer 208 on the dielectric layer 206, a second alignment layer 212 may be further formed on the common electrode layer 208. In some embodiments, the second alignment layer 212 may be conformally formed on the common electrode layer 208 and conformally extend (or be disposed) in the recess 206r and the opening 208p.

[0177] In some embodiments, the second alignment layer 212 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination of the foregoing.

[0178] Next, please refer to Figure 12F , the first substrate 102 and the second substrate 202 are paired so that the patch 204 is located inside the second substrate 202, i.e., the inner side 202a, and the inner side 202a faces the first substrate 102. Moreover, a liquid crystal layer 300 is formed between the first substrate 102 and the second substrate 202, and the liquid crystal layer 300 is located between the phase shift electrode 104 and the common electrode layer 208.

[0179] In some embodiments, before the first substrate 102 and the second substrate 202 are paired, the liquid crystal layer 300 may be formed by the one drop filling (ODF) method, or may be filled with liquid crystal through a vacuum injection method after pairing, but the present invention is not limited thereto.

[0180] In summary, according to some embodiments of the present invention, the manufacturing method of the electronic device provided can form the patch and the common electrode on the same side (single side) of the substrate. Compared with the process of forming a metal layer on both sides of the substrate, it can reduce the risks such as deterioration of the modulation material or cracking of the substrate caused by the process temperature, or can further simplify the process, but is not limited thereto. Furthermore, according to some embodiments of the present invention, the electronic device formed by the aforementioned manufacturing method can reduce the dielectric loss of electromagnetic waves or improve the operation reliability.

[0181] Although the embodiments of the present invention and their advantages have been disclosed above, it should be understood that any person skilled in the art can make changes, substitutions, and modifications without departing from the spirit and scope of the present invention. As long as the features between the embodiments of the present invention do not violate the spirit of the invention or conflict with each other, they can be arbitrarily combined and used. In addition, the protection scope of the present invention is not limited to the processes, machines, manufactures, compositions of matter, devices, methods, and steps in the specific embodiments described in the specification. Any person skilled in the art can understand the processes, machines, manufactures, compositions of matter, devices, methods, and steps developed currently or in the future from the disclosure of the present invention. As long as they can perform substantially the same functions or obtain substantially the same results in the embodiments described herein, they can be used according to the present invention. Therefore, the protection scope of the present invention includes the above-mentioned processes, machines, manufactures, compositions of matter, devices, methods, and steps. In addition, a claim constitutes an individual embodiment, and the protection scope of the present invention also includes the combination of each claim and embodiment. The protection scope of the present invention shall be determined by what is defined in the claims. Any embodiment or claim of the present invention does not have to achieve all the purposes, advantages, and features disclosed in the present invention.

Claims

1. An antenna device, characterized in that, Comprising: A first substrate; A plurality of phase-shifting electrodes disposed on the first substrate; A second substrate disposed on the first substrate; A plurality of patches disposed between the first substrate and the second substrate; And A dielectric layer disposed between the plurality of phase-shifting electrodes and the second substrate, wherein a thickness of the dielectric layer is greater than or equal to 5 microns and less than or equal to a thickness of the second substrate.

2. The antenna device according to claim 1, characterized in that, The dielectric layer includes an opening corresponding to at least one of the plurality of patches.

3. The antenna device according to claim 2, characterized in that, At least one of the plurality of patches has a first width, the opening has a second width, and the second width is greater than the first width.

4. The antenna device according to claim 1, wherein The thickness of the dielectric layer is greater than a thickness of at least one of the plurality of patches.

5. The antenna device according to claim 1, wherein The second substrate includes a recess corresponding to at least one of the plurality of patches.

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