Plasma processing apparatus

Abstract

A plasma processing apparatus includes a chamber, first and second bias power supplies that supply first and second bias signals, a substrate support that supports a substrate and an edge ring within the chamber, a conditioning mechanism, and an electrical path. The substrate support has first and second regions that support the substrate and the edge ring, respectively, first and second bias electrodes within the first and second regions, and a grounded conditioning electrode within the second region. The conditioning mechanism has a first conditioning mechanism that controls the first bias signal, an isolator that blocks the second bias signal between the conditioning electrode and the first conditioning mechanism, and a second conditioning mechanism that controls the second bias signal. The isolator and the first and second conditioning mechanisms are connected in parallel and to the conditioning electrode. The electrical path connects the first and second bias power supplies to the first and second bias electrodes.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a plasma processing apparatus. BACKGROUND

[0002] In Patent Literature 1, it is disclosed that when a plasma sheath is lowered adjacent to an edge ring due to erosion of the edge ring, a capacitance of a variable capacitor is adjusted to be able to affect an RF amplitude near an edge of a substrate.

[0003] PRIOR ART DOCUMENTS

[0004] PATENT LITERATURE

[0005] Patent Literature 1: Japanese Patent Application Publication No. 2017-130659 SUMMARY

[0006] PROBLEMS TO BE SOLVED BY THE INVENTION

[0007] The present disclosure provides a plasma processing apparatus capable of improving controllability for a plurality of bias RF signals different in frequency.

[0008] TECHNICAL MEANS FOR SOLVING THE PROBLEMS

[0009] A plasma processing apparatus of one embodiment of the present disclosure includes a chamber, a first bias power supply configured to be able to supply a first bias signal, a second bias power supply configured to be able to supply a second bias signal, a substrate support configured to support a substrate and an edge ring in the chamber, an impedance adjustment mechanism, and an electric path. The substrate support is configured to have a first region configured to support the substrate, a second region configured to support the edge ring provided around the first region, a first bias electrode provided in the first region, a second bias electrode provided in the second region, and an impedance adjustment electrode provided in the second region and grounded. The impedance adjustment mechanism is configured to have a first impedance adjustment mechanism configured to control the first bias signal, an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, which blocks the second bias signal, and a second impedance adjustment mechanism configured to control the second bias signal. The isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism, and are connected to the impedance adjustment electrode. The electric path is configured to be able to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

[0010] EFFECT OF THE INVENTION

[0011] According to the present disclosure, it is possible to improve controllability for a plurality of bias RF signals different in frequency. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is a view that shows an example of a structure of a plasma processing apparatus in a first embodiment of the present disclosure.

[0013] Figure 2 FIG. 1 is a graph showing an example of the relationship between the consumption of the edge ring and the tilt.

[0014] Figure 3 FIG. 2 is a graph showing an example of the circuit structure of the impedance adjustment mechanism in the first embodiment.

[0015] Figure 4 FIG. 3 is a graph showing another example of the circuit structure of the impedance adjustment mechanism in the first embodiment.

[0016] Figure 5 FIG. 4 is a graph showing an example of the relationship between the electrostatic capacitance of the variable capacitor and the reactance.

[0017] Figure 6 FIG. 5 is a graph showing an example of the relationship between the electrostatic capacitance of the variable capacitor and the reactance.

[0018] Figure 7 FIG. 6 is a graph showing an example of the influence between the plurality of variable capacitors.

[0019] Figure 8 FIG. 7 is a graph showing an example of the influence between the plurality of variable capacitors.

[0020] Figure 9 FIG. 8 is a graph showing an example of the adjustment of the plurality of variable capacitors in the first embodiment.

[0021] Figure 10 FIG. 9 is a graph showing an example of the edge ring consumption in the reference example.

[0022] Figure 11 FIG. 10 is a graph showing an example of the edge ring consumption in the modification example 1.

[0023] Figure 12 FIG. 11 is a graph showing an example of the relationship between the sheath potential and the capacitance of the variable capacitor in the modification example 1.

[0024] Figure 13 FIG. 12 is a graph showing an example of the deviation of the etching rate.

[0025] Figure 14 FIG. 13 is a graph showing an example of the configuration of the conductive strip in the modification example 2.

[0026] Figure 15 FIG. 14 is a graph showing an example of the configuration of the conductive strip in the modification example 3.

[0027] Figure 16 FIG. 15 is a graph showing an example of the configuration of the conductive strip in the modification example 4.

[0028] Figure 17 FIG. 16 is a graph showing an example of the configuration of the conductive strip in the modification example 5.

[0029] Figure 18 FIG. 1 is a view showing an example of a structure of an electric path in Modification 6.

[0030] Figure 19 FIG. 1 is a view showing an example of a structure of an electric path in Modification 6.

[0031] Figure 20 FIG. 1 is a view showing an example of a structure of an electric path in Modification 6. DETAILED DESCRIPTION

[0032] Hereinafter, the embodiments of the disclosed plasma processing apparatus will be described in detail based on the drawings. Furthermore, the disclosed technology is not limited by the following embodiments.

[0033] In the plasma processing apparatus, depending on the potential difference between the substrate and the edge ring, the thickness of the plasma sheath layer is sometimes different. For example, when the edge ring is consumed, the height of the plasma sheath layer at the upper portion of the edge ring is sometimes lowered (the sheath thickness is increased). Therefore, at the peripheral portion of the substrate, the orientation of the electric field is not perpendicular to the substrate, the orbit of the ions is skewed, and a tilt (inward tilt) in which the etching hole is skewed is sometimes generated. In this regard, for example, it is considered to independently control the potential at the edge ring side. However, in the case where, as a bias power supply, bias RF signals of two different frequencies are used, for example, the potential at one frequency can be controlled, but the potential at the other frequency cannot be controlled. Therefore, it is expected to improve the controllability for a plurality of bias RF signals of different frequencies.

[0034] (First Embodiment)

[0035] [Structure of Plasma Processing Apparatus 1]

[0036] Hereinafter, an example of the structure of the plasma processing system will be described. Figure 1is a drawing showing an example of a structure of a plasma processing apparatus in a first embodiment of the present disclosure. The plasma processing system includes an inductively coupled plasma processing apparatus 1 and a control section 2. The inductively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply section 20, a power supply 30, and an exhaust system 40. The plasma processing chamber 10 includes a dielectric window 101. In addition, the plasma processing apparatus 1 also includes a substrate support section 11, a gas introduction section, and an antenna 14. The substrate support section 11 is disposed inside the plasma processing chamber 10. The antenna 14 is disposed on or above the plasma processing chamber 10 (i.e., on or above the dielectric window 101). The plasma processing chamber 10 has a plasma processing space 10s defined by the dielectric window 101, a sidewall 102 of the plasma processing chamber 10, and the substrate support section 11. In addition, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s and at least one gas exhaust port for exhausting gas from the plasma processing space. The plasma processing chamber 10 is grounded.

[0037] The substrate support section 11 includes a main body section 111 and a ring assembly 112. The main body section 111 has a central region 111a for supporting a substrate W and a ring-shaped region 111b for supporting the ring assembly 112. A wafer is an example of the substrate W. The ring-shaped region 111b of the main body section 111 encloses the central region 111a of the main body section 111 when viewed from above. The substrate W is disposed on the central region 111a of the main body section 111, and the ring assembly 112 is disposed on the ring-shaped region 111b of the main body section 111 so as to enclose the substrate W on the central region 111a of the main body section 111. Thus, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the ring-shaped region 111b is also referred to as a ring support surface for supporting the ring assembly 112. In addition, the substrate support section 11 is an example of a substrate support, the central region 111a is an example of a first region, and the ring-shaped region 111b is an example of a second region. In addition, in the following description, the central region 111a is sometimes referred to as a substrate support surface 111a, and the ring-shaped region 111b is sometimes referred to as a ring support surface 111b.

[0038] In one embodiment, the main body 111 includes a base 1110, an electrostatic chuck 1111, and an adhesive layer 1112. The base 1110 includes an electrically conductive member. The electrically conductive member of the base 1110 can function as a part of an electrical path 38 connected to the first and second bias electrodes 34 and 35 described later. A power supply line 33a is connected to the bottom of the base 1110. In addition, the electrical path 38 also includes the power supply line 33a. The electrostatic chuck 1111 is disposed on the base 1110 via the adhesive layer 1112. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed in the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has a ring-shaped region 111b. Other members surrounding the electrostatic chuck 1111, such as a ring-shaped insulating member, can also have the ring-shaped region 111b. In this case, the ring assembly 112 can be disposed on either the ring-shaped electrostatic chuck or the ring-shaped insulating member, or on both the electrostatic chuck 1111 and the ring-shaped insulating member. In addition, at least one RF / DC electrode coupled to the RF (Radio Frequency) power source 31 and / or the DC (Direct Current) power source 32 described later can also be disposed in the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a bias electrode. That is, the first and second bias electrodes 34 and 35 described later are electrically connected to the RF power source 31 and / or the DC power source 32 via the electrical path 38. In addition, the electrically conductive member of the base 1110 and the at least one RF / DC electrode can also function as a plurality of bias electrodes. In addition, the electrostatic electrode 1111b can also function as a bias electrode, and the first bias electrode 34 can also function as an electrostatic electrode. Therefore, the wafer support portion 11 includes at least one bias electrode.

[0039] The ring assembly 112 includes one or more ring-shaped members. In one embodiment, the one or more ring-shaped members include one or more edge rings and at least one cover ring. The edge rings are formed of an electrically conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0040] Further, the substrate support section 11 can include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate W to a target temperature. The temperature adjustment module can include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as a salt water or a gas flows in the flow path 1110a. In one embodiment, the flow path 1110a is formed in the susceptor 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. Further, the substrate support section 11 can include a heat transfer gas supply section configured to supply a heat transfer gas to a gap between the back surface of the substrate W and the central region 111a.

[0041] The electrostatic chuck 1111 includes, in order from the substrate support surface 111a side in the lower portion of the substrate support surface 111a, an electrostatic electrode 1111b and a first bias electrode 34. The electrostatic chuck 1111 also includes, in order from the ring support surface 111b side in the lower portion of the ring support surface 111b, an impedance adjustment electrode 50 and a second bias electrode 35. The first bias electrode 34 is connected to, for example, the bottom of the susceptor 1110 via a conductive body 36b passing through a through-hole 36a of the susceptor 1110. Further, an insulating sleeve, not shown, is provided inside the through-hole 36a, and the susceptor 1110 is electrically insulated from the conductive body 36b inside the through-hole 36a. The second bias electrode 35 is connected to, for example, the bottom of the susceptor 1110 via a conductive body 37b passing through a through-hole 37a of the susceptor 1110. Further, an insulating sleeve, not shown, is provided inside the through-hole 37a, and the susceptor 1110 is electrically insulated from the conductive body 37b inside the through-hole 37a.

[0042] That is, the first bias electrode 34 and the second bias electrode 35 are connected to the matching circuit 33 described later via the conductive bodies 36b, 37b, the susceptor 1110, and the power supply line 33a, forming an electrical path 38. Further, the connection of the first bias electrode 34 and the second bias electrode 35 to the susceptor 1110 is not limited to a conductive member, and can be, for example, a method capable of supplying a bias RF signal such as magnetic resonance, capacitive coupling, and inductive coupling. That is, the electrical path 38 is configured to connect a bias power source (for example, the first bias RF generation section 31b described later), the first bias electrode 34, and the second bias electrode 35. Further, the electrical path 38 can be such that the first bias RF generation section 31b and the second bias RF generation section 31c are not connected to the susceptor 1110, and the first bias RF generation section 31b and the second bias RF generation section 31c are directly connected to the first bias electrode 34 and the second bias electrode 35. Further, the second bias electrode 35 also has a function of suppressing abnormal discharge of the LF1 electric power supplied from the first bias RF generation section 31b described later.

[0043] The impedance adjustment electrode 50 is grounded via an impedance adjustment mechanism 51. The impedance adjustment mechanism 51 adjusts the amount of the RF signal (electric bias) supplied from the second bias electrode 35 that flows to the earth side. By the impedance adjustment electrode 50, the amount of the RF signal that flows to the earth side is adjusted, whereby the potential of the ring assembly 112 is adjusted for the control of the tilt angle and / or the adjustment of the etching rate. The impedance adjustment electrode 50 is provided at least one within the electrostatic chuck 1111. In the case where the impedance adjustment electrode 50 is provided a plurality of, for example, two or more in the circumferential direction of the substrate support portion 11, the impedance adjustment mechanism 51 is also provided in a number corresponding to the impedance adjustment electrode 50. In addition, the impedance adjustment electrode 50 can also be provided two or more in the radial direction of the substrate support portion 11. Also, the impedance adjustment electrode 50 can also be provided two or more in the circumferential direction and the radial direction of the substrate support portion 11, respectively. Further, the impedance adjustment electrode 50 is arranged in parallel with the second bias electrode 35.

[0044] The first bias electrode 34 and the second bias electrode 35 reduce the impedance of the capacitor composed of the substrate W and the ring assembly 112, the ceramic of the electrostatic chuck 1111, and the electrodes by being as close as possible to the substrate W and the ring assembly 112. Thereby, the respective potential differences between the first bias electrode 34 and the second bias electrode 35 and the substrate W and the ring assembly 112 are reduced. Likewise, the impedances of the capacitors composed of the first bias electrode 34 and the electrostatic electrode 1111b and the second bias electrode 35 and the impedance adjustment electrode 50, respectively, are also reduced. In addition, the impedances of the capacitors composed of the electrostatic electrode 1111b and the substrate W and the impedance adjustment electrode 50 and the ring assembly 112, respectively, are also reduced.

[0045] Further, an impedance adjustment electrode can also be provided at the lower portion of the substrate support surface 111a, and an impedance adjustment mechanism connected to the impedance adjustment electrode can also be provided.

[0046] The gas introduction portion is configured to introduce at least one kind of processing gas from the gas supply portion 20 into the plasma processing space 10s. In one embodiment, the gas introduction portion includes a central gas injector (CGI) 13. The central gas injector 13 is arranged above the substrate support portion 11, and is mounted to a central opening portion formed in the dielectric window 101. The central gas injector 13 has at least one gas supply port 13a, at least one gas flow path 13b, and at least one gas introduction port 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the gas introduction port 13c through the gas flow path 13b. In addition, the gas introduction portion can include one or more side gas injectors (SGI) mounted to one or more opening portions formed in the side wall 102 in addition to or instead of the central gas injector 13.

[0047] The gas supply section 20 can also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply section 20 is configured to supply at least one process gas from the respective corresponding gas source 21 to the gas introduction section via the respective corresponding flow controller 22. Each flow controller 22 can also include, for example, a mass flow controller or a pressure-controlled flow controller. Also, the gas supply section 20 can include one or more flow modulation devices that modulate or pulse the flow of at least one process gas.

[0048] The power supply 30 includes an RF power source 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power source 31 is configured to supply at least one RF signal (RF electrical power) to the at least one first bias electrode 34, the second bias electrode 35, and the antenna 14. Thereby, a plasma is formed from the at least one process gas supplied to the plasma processing space 10s. Thus, the RF power source 31 can function as at least a portion of a plasma generation section configured to generate a plasma from one or more process gases in the plasma processing chamber 10. Further, by supplying a bias RF signal to the at least one first bias electrode 34 and the second bias electrode 35, a bias potential can be generated at the substrate W to draw ions from the formed plasma to the substrate W.

[0049] In one embodiment, the RF power source 31 includes a source RF generation section 31a, a first bias RF generation section 31b, and a second bias RF generation section 31c. The source RF generation section 31a is coupled to the antenna 14 and is configured to generate a source RF signal (source RF electrical power) for plasma generation via at least one impedance matching circuit. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the source RF generation section 31a can also be configured to generate a plurality of source RF signals having different frequencies. The generated source RF signal(s) is supplied to the antenna 14.

[0050] The first bias RF generation section 31b is coupled to the first bias electrode 34 and the second bias electrode 35 via the matching circuit 33, the power supply line 33a, and the pedestal 1110 and is configured to generate a first bias RF signal (hereinafter, also referred to as LF1 electrical power). The generated first bias RF signal is supplied to the first bias electrode 34 and the second bias electrode 35. In one embodiment, the first bias RF signal has a frequency lower than that of the source RF signal. In one embodiment, the first bias RF signal has a frequency in the range of 100 kHz to 5 MHz. The generated first bias RF signal is supplied to the at least one first bias electrode 34 and the second bias electrode 35.

[0051] The second bias RF generating section 31c is coupled with the first and second bias electrodes 34 and 35 via the matching circuit 33, the power supply line 33a, and the base 1110, and is configured to be able to generate a second bias RF signal (hereinafter, also referred to as LF2 electric power). The generated second bias RF signal is supplied to the first and second bias electrodes 34 and 35. The frequency of the second bias RF signal can be the same as the frequency of the source RF signal, or can be different. The frequency of the second bias RF signal has a higher frequency than the frequency of the first bias RF signal. In one embodiment, the second bias RF signal has a frequency in the range of 1 MHz to 60 MHz. The generated second bias RF signal is supplied to at least one of the first and second bias electrodes 34 and 35. Further, in various embodiments, at least one of the source RF signal, the first bias RF signal, and the second bias RF signal can be pulsed. Also, at least one of the first and second bias RF signals can have at least two power levels.

[0052] The matching circuit 33 is connected with the first bias RF generating section 31b, the second bias RF generating section 31c, and the substrate support section 11 (the base 1110). The matching circuit 33 is able to cause the first bias RF signal to be supplied from the first bias RF generating section 31b to the substrate support section 11 via the matching circuit 33. In addition, the matching circuit 33 is able to cause the second bias RF signal to be supplied from the second bias RF generating section 31c to the substrate support section 11 via the matching circuit 33.

[0053] In addition, the power supply 30 can also include a DC power supply 32 coupled with the plasma processing chamber 10. The DC power supply 32 includes a bias DC generating section 32a. In one embodiment, the bias DC generating section 32a is connected with at least one of the first and second bias electrodes 34 and 35, and is configured to be able to generate a bias DC signal. The generated bias DC signal is applied to at least one of the first and second bias electrodes 34 and 35.

[0054] In various embodiments, the bias DC signal can also be pulsed. In this case, a sequence of voltage pulses is applied to the at least one first bias electrode 34 and the second bias electrode 35. The voltage pulses can have a pulse waveform of a rectangular, trapezoidal, triangular, or a combination thereof. In one embodiment, a waveform generation section for generating the sequence of voltage pulses from the DC signal is connected between the bias DC generation section 32a and the at least one first bias electrode 34 and the second bias electrode 35. Thus, the bias DC generation section 32a and the waveform generation section constitute a voltage pulse generation section. The voltage pulses can have a positive polarity, or can have a negative polarity. In addition, the sequence of voltage pulses can also contain one or more positive polarity voltage pulses and one or more negative polarity voltage pulses in one cycle. Furthermore, the bias DC generation section 32a can be provided on the basis of the RF power source 31, or can be provided instead of at least one of the first bias RF generation section 31b and the second bias RF generation section 31c. In addition, in the following description, the first bias signal sometimes contains the first bias RF signal and / or the bias DC signal, and the second bias signal sometimes contains the second bias RF signal and / or the bias DC signal.

[0055] The antenna 14 includes one or more coils. In one embodiment, the antenna 14 can also include an outer coil and an inner coil arranged on the same axis. In this case, the RF power source 31 can be connected to both the outer coil and the inner coil, or can be connected to either one of the outer coil and the inner coil. In the former case, the same RF generation section can be connected to both the outer coil and the inner coil, and another RF generation section can also be connected to the outer coil and the inner coil, respectively.

[0056] The exhaust system 40 can be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 can also include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump can include a turbo molecular pump, a dry pump, or a combination thereof.

[0057] The control section 2 processes computer executable commands for causing the plasma processing apparatus 1 to execute various processes described in the present disclosure. The control section 2 can be configured to control each element of the plasma processing apparatus 1 in such a manner as to execute the various processes described herein. In one embodiment, part or all of the control section 2 can be included in the plasma processing apparatus 1. The control section 2 can include a processing section 2a1, a storage section 2a2, and a communication interface 2a3. The control section 2 is implemented by, for example, a computer 2a. The processing section 2a1 can be configured to execute various control actions by reading a program from the storage section 2a2 and executing the read program. The program can be pre-stored in the storage section 2a2 or can be acquired via a medium as needed. The acquired program is stored in the storage section 2a2 and read and executed by the processing section 2a1 from the storage section 2a2. The medium can be various storage media readable by the computer 2a or can be a communication line connected to the communication interface 2a3. The processing section 2a1 can be a CPU (Central Processing Unit). The storage section 2a2 can also include a RAM (Random Access Memory), a ROM (Read Only Memory), an HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 can also communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0058] [Relationship between consumption of edge ring and tilt]

[0059] Next, the relationship between the consumption of the edge ring and the tilt will be described using Figure 2 The relationship between the consumption of the edge ring and the tilt will be described. Figure 2 FIG. 6 is a graph showing an example of the relationship between the consumption of the edge ring and the tilt. Figure 2 The state 60 shown in FIG. 6 shows the state of the plasma sheath of the peripheral portion of the substrate W in a state where the edge ring is not consumed. In addition, the state 61 shows a state where the processing of the substrate W is performed for a prescribed period and the consumption of the edge ring progresses. The state 62 shows a state where the processing of the substrate W is further performed for a prescribed period from the state 61 and the consumption of the edge ring further progresses.

[0060] In the state 60, the height of the upper surface of the un-consumed edge ring 112a is located at a position higher than the upper surface of the substrate W. Therefore, the plasma sheath layer 64a becomes a state of being lifted from the peripheral portion of the substrate W to the upper surface of the edge ring 112a. At this time, the interval 65 is formed between the upper surface of the edge ring 112a and the plasma sheath layer 64a. In this case, at the peripheral portion of the substrate W, the direction 66a of the electric field is inclined toward the outside of the substrate W, as shown by the hole 67a, and an outward inclination angle in which the bottom of the hole is inclined toward the outside of the substrate W is generated. After that, the consumption of the edge ring 112a progresses, and the edge ring 112b shown in the state 61 is formed.

[0061] In the state 61, the height of the upper surface of the edge ring 112b is located at a position substantially the same as the upper surface of the substrate W. When the bias electric power applied to the edge ring 112b is the same electric power as that in the state 60, the plasma sheath layer 64b becomes substantially the same height as the peripheral portion of the substrate W. At this time, the interval 65 is formed between the upper surface of the edge ring 112b and the plasma sheath layer 64b, and the bias electric power is not changed. In this case, at the peripheral portion of the substrate W, the direction 66b of the electric field is not inclined, as shown by the hole 67b, and no inclination is generated. After that, the consumption of the edge ring 112b progresses, and the edge ring 112c shown in the state 62 is formed.

[0062] In the state 62, the height of the upper surface of the edge ring 112c is located at a position lower than the upper surface of the substrate W. Therefore, the plasma sheath layer 64c becomes a state of being lowered from the peripheral portion of the substrate W to the upper surface of the edge ring 112c. At this time, the interval 65 is formed between the upper surface of the edge ring 112c and the plasma sheath layer 64c, and the bias electric power is not changed. In this case, at the peripheral portion of the substrate W, the direction 66c of the electric field is inclined toward the inside of the substrate W, as shown by the hole 67c, and an inward inclination in which the bottom of the hole is inclined toward the inside of the substrate W is generated. In the present embodiment, the bias electric power applied to the ring assembly 112 is adjusted in accordance with the amount of consumption of the edge ring included in the ring assembly 112, and thereby the height of the plasma sheath layer of the upper surface of the substrate W and the upper surface of the ring assembly 112 is made substantially the same. In the present embodiment, the bias electric power applied to the ring assembly 112 is the LF1 electric power and the LF2 electric power, and the bias electric power can be adjusted by the impedance adjustment mechanism 51 connected to the impedance adjustment electrode 50. Furthermore, in the following description, the edge ring included in the ring assembly 112 is sometimes referred to simply as the ring assembly 112.

[0063] [Circuit structure of impedance adjustment mechanism]

[0064] Next, the circuit structure of the impedance adjustment mechanism 51 will be described. Figure 3 The circuit structure of the impedance adjustment mechanism 51 will be described. Figure 3 is a view showing an example of the circuit structure of the impedance adjustment mechanism in the first embodiment. As shown in the view, the impedance adjustment mechanism 51 includes the impedance adjustment electrode 50, the impedance adjustment circuit 52, and the impedance adjustment circuit 53.Figure 3 As shown, the impedance adjustment mechanism 51 has a first variable capacitor 52 that controls the first bias RF signal, a second variable capacitor 53 that controls the second bias RF signal, and an isolator 54. Further, in the following description, 400 kHz is used as an example of the frequency of the first bias RF signal, and 12.88 MHz is used as an example of the frequency of the second bias RF signal.

[0065] The first variable capacitor 52 sets a variable range of electrostatic capacitance to, for example, 200 pF to 2000 pF in order to be able to control the first bias RF signal (LF1 electric power) on the low frequency side (400 kHz). The second variable capacitor 53 sets a variable range of electrostatic capacitance to, for example, 10 pF to 475 pF in order to be able to control the second bias RF signal (LF2 electric power) on the high frequency side (12.88 MHz). That is, the first variable capacitor 52 is able to control a high capacitance range in the impedance adjustment mechanism 51, and the second variable capacitor 53 is able to control a low capacitance range in the impedance adjustment mechanism 51. In addition, in the following description, the variable capacitor is sometimes referred to as a variable capacitor (VC: Variable Capacitor). For example, the first variable capacitor 52 is sometimes referred to as a first variable capacitor 52, and the second variable capacitor 53 is sometimes referred to as a second variable capacitor 53.

[0066] The isolator 54 is connected between the impedance adjustment electrode 50 and the first variable capacitor 52, and blocks the second bias RF signal. That is, the isolator 54 is connected in series with the first variable capacitor 52 on the side of the impedance adjustment electrode 50 farther than the first variable capacitor 52. In addition, in the impedance adjustment mechanism 51, the first variable capacitor 52 and the isolator 54 are connected in parallel with the second variable capacitor 53, and are connected to the impedance adjustment electrode 50.

[0067] The isolator 54 has a capacitor 54a and a coil 54b. The capacitor 54a and the coil 54b constitute a parallel resonance circuit. The isolator 54 is able to block the second bias RF signal that flows from the side of the impedance adjustment mechanism 51 by setting the frequency (12.88 MHz) of the second bias RF signal as a resonance frequency. Further, the resonance frequency of the parallel resonance circuit of the isolator 54 can also be a frequency in the vicinity of the frequency of the second bias RF signal. For example, in the case where the frequency of the second bias RF signal is 12.88 MHz, the resonance frequency of the parallel resonance circuit of the isolator 54 can also be 13 MHz. In addition, the isolator 54 can also be, for example, a low-pass filter that passes the first bias RF signal and blocks the second bias RF signal, constituted using a coil or the like.

[0068] Further, the first variable capacitor 52 and the second variable capacitor 53 can also be a kind of circuit structure including other circuit constants. In this case, the first variable capacitor 52 and the second variable capacitor 53 can be expressed as a first impedance adjustment mechanism 52 and a second impedance adjustment mechanism 53, respectively. The use of Figure 4 A modification of the circuit structure in the case where the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 are provided will be described.

[0069] Figure 4 is a view showing another example of the circuit structure of the impedance adjustment mechanism in the first embodiment. As shown in Figure 4 , the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can have various structures such as circuits 170 to 174. The circuit 170 is an LC series circuit using an inductor and a variable capacitor. The circuit 171 is an RC series circuit using a resistor and a variable capacitor. The circuit 172 is an RR series circuit using a resistor and a variable resistor. The circuit 173 is a circuit capable of switching between an LC series circuit for high frequencies and an RR series circuit for low frequencies by a switch SW. The circuit 174 is a circuit capable of switching between an LC series circuit (inductor LI, variable capacitor CI) for high efficiency and an LC series circuit (inductor L2, variable capacitor C2) for low efficiency by a switch SW. The circuit 174 is wide in the adjustment range by switching the switch SW as shown in a graph 175. Further, although not illustrated in Figure 4 , the impedance adjustment mechanisms 52 and 53 can also be a circuit structure using a variable inductor.

[0070] Thus, in the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53, a variable resistor, a variable capacitor, a variable inductor, or the like can be used regardless of the kind of the circuit constant (R, L, C) to be adjusted. Further, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can be combined with one or more variable mechanisms (variable resistor, variable capacitor, variable inductor, or the like) so as to match the frequency of the bias RF signal, the component size, and the adjustment range. Further, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 do not need to pass the heater current, so a variable resistor and a variable capacitor can be used. Furthermore, the first impedance adjustment mechanism 52 and the second impedance adjustment mechanism 53 can be constituted by at least one of a variable resistor, a variable capacitor, a variable inductor, and a direct-current power supply. For example, in the case where the bias RF signal is a high frequency, the impedance between the second bias electrode 35 and the impedance adjustment electrode 50 and the impedance between the impedance adjustment electrode 50 and the ring assembly 112 become small values. Therefore, by using a direct-current power supply to control the potential, the potential can be controlled more efficiently.

[0071] Here, the use of Figure 5 and Figure 6The control range of the first variable capacitor 52 in the first and second bias RF signals will be described. Figure 5 and Figure 6 is a graph showing an example of the relationship between the electrostatic capacitance and the reactance of a variable capacitor. Figure 5 The graph 70 shown is the relationship between the electrostatic capacitance C and the reactance X of the first variable capacitor 52 in the first bias RF signal (400 kHz). As shown in the graph 70, for the first bias RF signal (400 kHz), the control range 71 of the reactance X can be about 900 Ω. The electrostatic capacitance C corresponding to the control range 71 is about 350 pF to 3000 pF. If the lower limit of the electrostatic capacitance C is extended to about 200 pF, the control range 71 of the reactance X can be extended to about 1500 Ω. Thus, as described above, the variable range of the first variable capacitor 52 can be 200 pF to 2000 pF.

[0072] Figure 6 The graph 72 shown is the relationship between the electrostatic capacitance C and the reactance X of the first variable capacitor 52 in the second bias RF signal (12.88 MHz). As shown in the graph 72, for the second bias RF signal (12.88 MHz), the control range 73 of the reactance X is about 50 Ω. The electrostatic capacitance C corresponding to the control range 73 is about 150 pF to 500 pF. That is, the first variable capacitor 52 is in a state where there is almost no control range with respect to the second bias RF signal (12.88 MHz). It is considered that this is the influence of the parasitic capacitance. Thus, for the second bias RF signal (12.88 MHz), the first variable capacitor 52 side is blocked by the isolator 54, and the impedance is adjusted using the second variable capacitor 53.

[0073] Next, the influence of the change in the electrostatic capacitance of the first variable capacitor 52 with respect to the second variable capacitor 53 when the second bias RF signal (12.88 MHz) is supplied will be described using Figure 7 and Figure 8 Figure 7 and Figure 8 are graphs showing an example of the influence between a plurality of variable capacitors. In the graphs 74 and 75, the horizontal axis represents the electrostatic capacitance of the first variable capacitor 52, and the vertical axis represents the electrostatic capacitance of the second variable capacitor 53. Figure 7 ​In the graph 74, the currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma are shown when the first variable capacitor 52 is set to 200 pF and the second bias RF signal is supplied, and the electrostatic capacitance C of the second variable capacitor 53 is changed. The graph 75 shows the current on the second variable capacitor 53 side. The graph 76 shows the current of the plasma. The graph 77 shows the current on the first variable capacitor 52 side. As shown in the graphs 75 to 77, when the electrostatic capacitance C of the second variable capacitor 53 is changed from 10 pF to 475 pF, the current of the plasma decreases, and the current on the second variable capacitor 53 side increases. On the other hand, the current on the first variable capacitor 52 side hardly flows and does not change.

[0074] In Figure 8 In the graph 78, the currents of the first variable capacitor 52, the second variable capacitor 53, and the plasma are shown when the first variable capacitor 52 is set to 2000 pF and the second bias RF signal is supplied, and the electrostatic capacitance C of the second variable capacitor 53 is changed. The graph 75a shows the current on the second variable capacitor 53 side. The graph 76a shows the current of the plasma. The graph 77a shows the current on the first variable capacitor 52 side. As shown in the graphs 75a to 77a, when the electrostatic capacitance C of the second variable capacitor 53 is changed from 10 pF to 475 pF, the current of the plasma decreases, and the current on the second variable capacitor 53 side increases. On the other hand, the current on the first variable capacitor 52 side hardly flows and does not change. Thus, it is known that, in the impedance adjusting mechanism 51, the isolator 54 functions so that the second bias RF signal is not affected even if the electrostatic capacitance C of the first variable capacitor 52 is changed from 200 pF to 2000 pF. That is, it is known that the current does not flow on the first variable capacitor 52 side even if the electrostatic capacitance C of the first variable capacitor 52 is made variable to a high capacitance.

[0075] [Adjustment example of variable capacitor]

[0076] Next, adjustment examples of the first variable capacitor 52 and the second variable capacitor 53 will be described. Figure 9 Adjustment examples of the first variable capacitor 52 and the second variable capacitor 53 will be described. Figure 9 is a graph showing an example of adjustment of the plurality of variable capacitors in the first embodiment. In Figure 9 , from the left side to the right side in the graph, adjustment examples of the electrostatic capacitances of the first variable capacitor 52 and the second variable capacitor 53 corresponding to the consumption amount of the edge ring included in the ring assembly 112 are shown. Further, in Figure 9 , the first bias electrode 34, the second bias electrode 35, and the electrostatic electrode 1111b are omitted, and the flow of the LF1 electric power and the LF2 electric power is shown by a hollow arrow. In addition, the flow of the LF1 electric power and the LF2 electric power is Figure 9The relative performance is not limited to this. In addition, LF1 power and LF2 power can be supplied simultaneously or switched.

[0077] First of all, Figure 9 The case of the unconsumed edge ring 112d on the left side will be explained. The electrostatic capacitance of the first variable capacitor 52 and the second variable capacitor 53 is adjusted so that the plasma sheath 64d is at a certain height on the upper part of the substrate W and the upper part of the edge ring 112d. For example, the first variable capacitor 52 is adjusted to 2000pF and the second variable capacitor 53 is adjusted to 475pF. When LF2 power (12.88MHz) is supplied to the impedance adjustment electrode 50, more LF2 power flows to the impedance adjustment mechanism 51 side compared to the edge ring 112d side. That is, more LF2 power flows to the second variable capacitor 53 side, which is adjusted to 475pF, compared to the edge ring 112d side. In addition, LF2 power hardly flows to the first variable capacitor 52 side because it is blocked by the isolator 54. That is, when LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with an electrostatic capacitance of 475pF.

[0078] When LF1 power (400kHz) is supplied to the impedance adjustment electrode 50, more LF1 power flows to the impedance adjustment mechanism 51 side compared to the edge ring 112d side. Specifically, more LF1 power flows to the first variable capacitor 52 (adjusted to 2000pF) and the second variable capacitor 53 (adjusted to 475pF) side compared to the edge ring 112d side. Furthermore, since the LF1 power is not blocked by the isolator 54, more LF1 power flows to the first variable capacitor 52 side compared to the second variable capacitor 53 side. In other words, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 2475pF.

[0079] Next, regarding Figure 9The situation of increased consumption in the central edge ring 112e will be explained. The electrostatic capacitance of the first variable capacitor 52 and the second variable capacitor 53 is adjusted so that the plasma sheath 64e is at a certain height on the upper part of the substrate W and the upper part of the edge ring 112e. For example, the first variable capacitor 52 is adjusted to 1000pF and the second variable capacitor 53 is adjusted to 200pF. When LF2 power (12.88MHz) is supplied to the impedance adjustment electrode 50, the LF2 power flows to the same extent on the edge ring 112e side and the impedance adjustment mechanism 51 side. That is, the LF2 power flows to the same extent on the edge ring 112e side and the side of the second variable capacitor 53, which is adjusted to 200pF. In addition, the LF2 power is blocked by the isolator 54, so it hardly flows to the first variable capacitor 52 side. That is, when LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with an electrostatic capacitance of 200pF.

[0080] When LF1 power (400kHz) is supplied to the impedance adjustment electrode 50, the LF1 power flows to the same extent on the edge ring 112e side and the impedance adjustment mechanism 51 side. That is, the LF1 power flows to the same extent on the edge ring 112e side, the first variable capacitor 52 adjusted to 1000pF, and the second variable capacitor 53 adjusted to 200pF. Furthermore, the LF1 power is not blocked by the isolator 54 and flows more towards the first variable capacitor 52 side than to the second variable capacitor 53 side. In other words, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 1200pF.

[0081] Next, regarding Figure 9 The further consumption of the edge ring 112f on the right side will be explained. The electrostatic capacitance of the first variable capacitor 52 and the second variable capacitor 53 is adjusted so that the plasma sheath 64f is at a certain height on the upper part of the substrate W and the upper part of the edge ring 112f. For example, the first variable capacitor 52 is adjusted to 200pF and the second variable capacitor 53 is adjusted to 10pF. When LF2 power (12.88MHz) is supplied to the impedance adjustment electrode 50, more LF2 power flows to the edge ring 112f side compared to the impedance adjustment mechanism 51 side. That is, more LF2 power flows to the edge ring 112f side compared to the second variable capacitor 53 side which is adjusted to 10pF. In addition, the LF2 power is blocked by the isolator 54, so it hardly flows to the first variable capacitor 52 side. That is, when LF2 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears to be a capacitive load with an electrostatic capacitance of 10pF.

[0082] When LF1 power (400kHz) is supplied to the impedance adjustment electrode 50, more LF1 power flows to the edge ring 112f side compared to the impedance adjustment mechanism 51 side. That is, more LF1 power flows to the edge ring 112f side compared to the first variable capacitor 52 (adjusted to 200pF) and the second variable capacitor 53 (adjusted to 10pF). Furthermore, LF1 power is not blocked by the isolator 54 and flows more to the first variable capacitor 52 side compared to the second variable capacitor 53 side. In other words, when LF1 power is supplied to the impedance adjustment electrode 50, the impedance adjustment mechanism 51 appears as a capacitive load with a capacitance of 210pF.

[0083] Thus, in Figure 9 In the adjustment example, for the LF1 power, the variable range of the electrostatic capacitance of the impedance adjustment mechanism 51 is 210pF to 2475pF. Furthermore, for the LF2 power, the variable range of the electrostatic capacitance of the impedance adjustment mechanism 51 is 10pF to 475pF. That is, the plasma processing apparatus 1 of this embodiment can improve the controllability of multiple bias RF signals with different frequencies.

[0084] (Variation Example 1)

[0085] Next, use Figure 10 to Figure 12 A variation of the first embodiment, namely Example 1, will be described. In Example 1, a solution is presented where, by providing the impedance adjustment electrode 50 and the impedance adjustment mechanism 51, the height of the plasma sheath layer at the upper part of the ring assembly 112 is easily lower than the height of the plasma sheath layer at the upper part of the substrate W. Furthermore, for the impedance adjustment electrode 50, there is also a method of supplying bias power to the ring assembly 112 from a power source different from the first bias RF generation unit 31b and the second bias RF generation unit 31c, but the edge ring is prone to wear.

[0086] In the modification example 1, the initial thickness of the edge ring of the ring assembly 112 is made thicker than that of the first embodiment. For example, in a state where the impedance adjustment mechanism 51 is not provided, the initial thickness of the edge ring is set so that the height of the plasma sheath layer of the upper portion of the ring assembly 112 is higher than the height of the plasma sheath layer of the upper portion of the substrate W. That is, the initial thickness of the edge ring is set so as to be outer inclined in a state where the impedance adjustment mechanism 51 is not provided. In the modification example 1, in the initial state, the height of the plasma sheath layer of the upper portion of the ring assembly 112 is made substantially the same as the height of the plasma sheath layer of the upper portion of the substrate W by setting the impedance adjustment mechanism 51 to low impedance (large electrostatic capacitance C). That is, in the initial state, the inclination angle of the peripheral edge portion of the substrate W becomes a vertical state. Thereafter, the impedance adjustment mechanism 51 is adjusted to the high impedance (small electrostatic capacitance C) side according to the consumption amount of the edge ring, whereby the height of the plasma sheath layer of the upper portion of the ring assembly 112 is made substantially the same as the height of the plasma sheath layer of the upper portion of the substrate W. That is, according to the consumption amount of the edge ring, the impedance adjustment mechanism 51 is adjusted to the high impedance (small electrostatic capacitance C) side, whereby the inclination angle is corrected.

[0087] Here, the elapsed time of the consumption amount of the edge ring and the bias electric power are described using Figure 10 and Figure 11 . Figure 10 is a graph showing an example of the consumption amount of the edge ring in the reference example. Figure 10 The reference example of Figure 10 is a case where the impedance adjustment mechanism 51 is not provided to the edge ring. The graph 80 shown in Figure 10 shows the relationship between the bias electric power supplied to the edge ring and the elapsed time in the reference example. In addition, the area 80a of the graph 80 shows the cumulative amount of the consumption of the edge ring with respect to the elapsed time. As shown in the graph 80, in the reference example, a certain bias electric power (100% in is shown) is supplied to the edge ring regardless of the elapsed time, and thus the consumption amount of the edge ring also becomes constant regardless of the elapsed time.

[0088] Figure 11 is a graph showing an example of the consumption amount of the edge ring in the modification example 1. Figure 11 The modification example 1 of Figure 11The graph 81 shown indicates the relationship between the bias electric power supplied to the edge ring and the use time in the modification example 1. Further, the bias electric power includes the LF1 electric power and the LF2 electric power. In addition, the area 81a of the graph 81 indicates the cumulative amount of the consumption of the edge ring with respect to the use time. As shown in the graph 81, in the modification example 1, when the consumption amount of the edge ring is small, the impedance adjustment mechanism 51 is adjusted to the low impedance, so that the bias electric power supplied to the edge ring side becomes small. In the modification example 1, thereafter, the impedance adjustment mechanism 51 is adjusted to the high impedance in stages according to the consumption amount of the edge ring. When the area 80a of the reference example is compared with the area 81a of the modification example 1, the area 81a is small, and in the modification example 1, it is possible to extend the life of the edge ring of the ring assembly 112.

[0089] Figure 12 is a graph indicating an example of the relationship between the sheath potential and the capacitance of the variable capacitor in the modification example 1. As shown in the graph 82 of Figure 12 In the case where the impedance adjustment mechanism 51 of the modification example 1 is the low impedance, for example, the electrostatic capacitance C is 2000 pF, the sheath potential of the upper portion of the edge ring of the ring assembly 112 becomes small with respect to the sheath potential of the upper portion of the substrate W, as shown in the graph 82. In the graph 82, the absolute value of the sheath potential is normalized within a prescribed range. That is, the interval between the upper surface of the edge ring of the ring assembly 112 and the plasma sheath is smaller than the interval between the upper surface of the substrate W and the plasma sheath. The upper surface of the edge ring of the ring assembly 112 of the modification example 1 is initially higher than the upper surface of the substrate W, so the difference in the interval between the plasma sheath and the substrate W is supplemented by the thickness of the edge ring of the ring assembly 112. That is, the height of the plasma sheath of the upper portion of the ring assembly 112 and the height of the plasma sheath of the upper portion of the substrate W are adjusted to be substantially the same, taking into account the thickness of the edge ring of the ring assembly 112. Thereafter, the impedance adjustment mechanism 51 is adjusted to the high impedance (small electrostatic capacitance C) side according to the consumption amount of the edge ring of the ring assembly 112. That is, the height of the plasma sheath of the upper portion of the ring assembly 112 and the height of the plasma sheath of the upper portion of the substrate W are adjusted to be substantially the same according to the consumption amount of the edge ring of the ring assembly 112.

[0090] (Modification Example 2)

[0091] Next, a modification example 2 of the first embodiment will be described using Figure 13 and Figure 14 In the modification example 2, an example of coping with the deviation in the etching rate caused by the layout of the conductive bar connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51 is indicated.

[0092] First, the deviation in the etching rate will be described using Figure 13 Figure 13 is a graph indicating an example of the deviation in the etching rate.​Figure 13 An example of a deviation in the etching rate of the substrate W in the electrostatic chuck 1111 when viewed from above in the case where adjustment based on the impedance adjustment mechanism 51 is not performed. Further, in Figure 13 , the difference in the etching rate is indicated by the hatching. As Figure 13 indicated, the introduction electrode 35a connected to the second bias electrode 35, the impedance adjustment mechanism 51, and the circular arc-shaped conductive strip 55 connected to the impedance adjustment mechanism 51 are arranged in the lower portion of the substrate support surface 111a. The introduction electrode 35a constitutes a part of the electric path 38 and is connected to the first bias RF generation section 31b and the second bias RF generation section 31c. Further, the conductive strip 55 is arranged along the inner circumferential side of the ring assembly 112 from the connection portion connected to the impedance adjustment mechanism 51 and is connected to the impedance adjustment electrode 50 in the vicinity of the introduction electrode 35a. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111 and grounded. As Figure 13 indicated, the etching rate of the substrate W is deviated in the 9 o'clock to 12 o'clock direction when viewed from above where the impedance adjustment mechanism 51 and the conductive strip 55 are located.

[0093] Figure 14 is a view indicating an example of the arrangement of the conductive strip in Modification 2. In Figure 14 the electrostatic chuck 1111c of Modification 2 indicated in , the introduction electrode 35a connected to the second bias electrode 35, the impedance adjustment mechanism 51, and the circular arc-shaped conductive strip 56 connected to the impedance adjustment mechanism 51 are arranged from the peripheral portion of the central region 111c to the lower portion of the ring assembly 112 (the annular region 111b). The introduction electrode 35a constitutes a part of the electric path 38 and is connected to the first bias RF generation section 31b and the second bias RF generation section 31c. Further, the conductive strip 56 connected to the impedance adjustment mechanism 51 is arranged along the inner circumferential side of the ring assembly 112 from the first connection portion 56a connected to the impedance adjustment mechanism 51 and is arranged substantially over the entire circumference. The conductive strip 56 is connected to the impedance adjustment electrode 50 through the second connection portion 56b connected to the impedance adjustment electrode 50 in the vicinity of the introduction electrode 35a. That is, the conductive strip 56 is arranged along the inner circumferential side of the annular region 111b (the second region) and has the first connection portion 56a connected to the impedance adjustment mechanism 51 and the second connection portion 56b connected to the impedance adjustment electrode 50. Further, the first connection portion 56a and the second connection portion 56b of the conductive strip 56 are adjacent in the circumferential direction with a gap 56c between the first connection portion 56a and the second connection portion 56b. The other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the electrostatic chuck 1111c and grounded. In the conductive strip 56, the electric current flows in the direction of the arrow 56d, so it is possible to suppress the deviation in the etching rate of the substrate W in the circumferential direction caused by the magnetic field generated by the electric current.

[0094] (Modification 3)

[0095] Next, using Figure 15 A modification 3 of the first embodiment will be described. In the modification 3, as with the modification 2, an example of coping with the deviation of the etching rate caused by the layout of the conductive strips connecting the impedance adjustment electrodes 50 and the impedance adjustment mechanisms 51 is shown.

[0096] Figure 15 is a view showing an example of the configuration of the conductive strips in the modification 3. In Figure 15 In the electrostatic chuck 1111d of the modification 3 shown in FIG. 17, a plurality of lead electrodes 35b connected to the second bias electrodes 35 and the impedance adjustment mechanisms 51a are arranged in the lower portion of the central region 111d. In addition, a circular arc-shaped first conductive strip 57 connected to the impedance adjustment mechanisms 51a and a plurality of second conductive strips 58 arranged toward the center of the central region 111d from the first conductive strip 57 are arranged in the lower portion of the central region 111d. The plurality of second conductive strips 58 have first connection portions 58a respectively connected to the impedance adjustment mechanisms 51a. Further, the other ends of the impedance adjustment mechanisms 51a are electrically connected to the outside of the electrostatic chuck 1111d and grounded.

[0097] The lead electrodes 35b constitute a part of the electric path 38 and are connected to the first bias RF generation portion 31b and the second bias RF generation portion 31c. The first conductive strip 57 is arranged in a manner of following the inner circumferential side of the ring assembly 112 and extends around the circumference. The first conductive strip 57 has a plurality of second connection portions 57b connected to the impedance adjustment electrodes 50 at the connection portions 57a respectively connected to the plurality of second conductive strips 58. Further, the impedance adjustment electrodes 50 may, for example, be a plurality of impedance adjustment electrodes divided in the circumferential direction, in which case the plurality of impedance adjustment electrodes are respectively the second connection portions 57b.

[0098] In other words, the electrostatic chuck 1111d has the first conductive strip 57 arranged in the circumferential direction in a manner of following the inner circumferential side of the annular region 111b (second region) and the plurality of second conductive strips 58 arranged toward the center of the susceptor 1110 of the substrate support portion 11 from the first conductive strip 57. In addition, the plurality of second conductive strips 58 have the first connection portions 58a respectively connected to the impedance adjustment mechanisms 51a. Further, the first conductive strip 57 has the plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 at the connection portions 57a respectively connected to the plurality of second conductive strips 58. In this way, the first conductive strip 57 and the plurality of second conductive strips 58 have the plurality of lead electrodes 35b connected to the impedance adjustment electrodes 50 as a path arranged equally with respect to the impedance adjustment mechanisms 51a arranged in the center of the central region 111d. Thus, the first conductive strip 57 and the plurality of second conductive strips 58 can suppress the deviation of the etching rate of the substrate W in the circumferential direction.

[0099] (Modification 4)

[0100] Next, use Figure 16 Modification 4 of the first embodiment will be described. In Modification 4, similar to Modification 2, a solution is presented for the deviation in etching rate caused by the layout of the conductive strip connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51.

[0101] Figure 16 This is a diagram illustrating an example of the arrangement of the conductive strips in Modification 4. Figure 16 In the modified example 4 shown, a conductive strip 59 is disposed below the base 1110 of the main body 111. The conductive strip 59 is arranged along the annular region 111b (second region) of the ring assembly 112 in a multi-turn manner. That is, the diameter of the conductive strip 59 can be, for example, less than the diameter of the electrostatic chuck 1111 and more than half the diameter of the central region 111a. One end of the conductive strip 59 is connected to the impedance adjustment electrode 50, and the other end is connected to the impedance adjustment mechanism 51. Furthermore, the other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded. In this way, the current flows in the conductive strip 59 in a coil shape along the ring assembly 112, so it is possible to suppress the deviation of the etching rate of the substrate W in the circumferential direction.

[0102] Furthermore, in Modification 4, similarly to the first embodiment, the LF1 and LF2 electrical powers supplied from the first bias RF generation unit 31b and the second bias RF generation unit 31c are supplied to the first bias electrode 34 and the second bias electrode 35 via electrical path 38. That is, the LF1 and LF2 electrical powers are supplied to the first bias electrode 34 and the second bias electrode 35 via electrical path 38 formed by the base 1110 and the conductors 36b and 37b.

[0103] (Variation Example 5)

[0104] Next, use Figure 17 Modification 5 of the first embodiment will be described. In Modification 5, a solution is shown for the deviation in etching rate caused by the layout of the conductive strip connecting the impedance adjustment electrode 50 and the impedance adjustment mechanism 51, and for the power loss caused by the spatial propagation of RF power from the base 1110 to the conductive strip.

[0105] Figure 17 This is a diagram illustrating an example of the arrangement of the conductive strips in Modification 5. Figure 17In Modification 5, similar to Modification 4, a conductive strip 56e is disposed below the base 1110 of the main body 111. The conductive strip 56e is disposed along the annular assembly 112, i.e., the annular region 111b (second region). That is, the diameter of the conductive strip 56e can be, for example, less than the diameter of the electrostatic chuck 1111 and more than half the diameter of the central region 111a. One end 56g of the conductive strip 56e is connected to the impedance adjustment electrode 50, and the other end 56f is connected to the impedance adjustment mechanism 51. Furthermore, the other end of the impedance adjustment mechanism 51 is electrically connected to the outside of the plasma processing chamber 10 and grounded.

[0106] The conductive strip 56e has the same shape as the conductive strip 56 in Modified Example 2, separated by a gap 56h between the unconnected portions in the circumferential direction of the ends 56g and 56f, with the ends 56g and 56f adjacent in the circumferential direction. The conductive strip 56e is used as an open-loop resonator. This open-loop resonator is configured, for example, to have a resonant frequency that resonates with the LF2 power when the impedance adjustment mechanism 51 adjusts the LF1 power. That is, the resonant frequency of the open-loop resonator is the frequency of the second bias RF signal. The resonant frequency of the open-loop resonator can be the frequency of the RF signal (RF power) used to generate plasma. In this way, by making the conductive strip 56e function as an open-loop resonator, the spatial propagation 83 of the RF power from the HOT portion of the base 1110, etc., to the conductive strip 56e can be suppressed, thereby suppressing the power loss of the RF power. In addition, since the current flows in a circumferential manner along the ring assembly 112, the circumferential deviation of the etching rate of the substrate W can be suppressed.

[0107] (Variation Example 6)

[0108] Next, use Figure 18 Modification 6 of the first embodiment will be described. Modification 6 involves controlling the power of the electrical bias output from the first bias RF generation unit 31b, the second bias RF generation unit 31c, and / or the bias DC generation unit 32a. Figure 18 In the example shown, the first bias RF generation unit 31b and the second bias RF generation unit 31c are illustrated.

[0109] Figure 18 This is a diagram illustrating an example of the electrical path structure in variation 6. For example... Figure 18 As shown, in the plasma processing apparatus 1 of Modified Example 6, a measuring unit 46 is provided in the electrical path 38 between the first bias RF generating unit 31b and the second bias RF generating unit 31c and the base 1110. Alternatively, in the plasma processing apparatus 1 of Modified Example 6, a high-voltage probe 47 may also be provided between the base 1110 and the ground.

[0110] The measurement section 46 is, for example, a VI probe, and is controlled to measure the voltage and current of the bias RF signal and / or bias DC signal output from the first bias RF generation section 31b, the second bias RF generation section 31c, and / or the bias DC generation section 32a. That is, the measurement section 46 is controlled to measure the power of the bias RF signal and / or bias DC signal. The measurement section 46 outputs the measured voltage and current to the control section 2. That is, the measurement section 46 is configured to be able to measure the voltage and current of the bias RF signal and / or bias DC signal output from the bias power supply.

[0111] The high voltage probe 47 is controlled to measure the potential (Vpp) of the susceptor 1110. Further, for example, the relationship between the voltage of the bias RF signal and / or bias DC signal measured by the measurement section 46 and the potential (Vpp) of the susceptor 1110 measured by the high voltage probe 47 can be measured in advance, and thus the high voltage probe 47 can be removed during process execution. In this case, the control section 2 is able to estimate the potential (Vpp) of the susceptor 1110 based on the relationship between the voltage of the bias RF signal and / or bias DC signal measured in advance by the measurement section 46 and the potential (Vpp) of the susceptor 1110 measured in advance.

[0112] In the modification example 6, when adjusting the impedance adjustment mechanism 51, the control section 2 controls the first bias RF generation section 31b, the second bias RF generation section 31c, and / or the bias DC generation section 32a based on the voltage and current input from the measurement section 46. That is, the first bias RF generation section 31b, the second bias RF generation section 31c, and / or the bias DC generation section 32a control (feedback control) the power of the bias RF signal and / or bias DC signal based on the voltage and current measured by the measurement section 46, so that the potential of the first bias electrode 34 and the second bias electrode 35 becomes a set value set in advance. Here, the set value set in advance is, for example, a value in a case where the potential (Vpp) of the susceptor 1110 measured by the high voltage probe 47 becomes a desired potential. Further, in the modification example 6, it can be considered that the potential of the first bias electrode 34 and the second bias electrode 35 is substantially equal to the potential (Vpp) of the susceptor 1110 and the potential (Vdc) of the wafer W and the ring assembly 112.

[0113] That is, the plasma processing apparatus 1 further includes a measurement unit 46 configured to be able to measure a voltage and a current of the bias RF signal output from at least one of the first bias power supply (the first bias RF generation unit 31b) and the second bias power supply (the second bias RF generation unit 31c). The bias power supply is configured to control a power of the bias RF signal based on the voltage and the current measured by the measurement unit 46 to make the potential of the first bias electrode 34 and the second bias electrode 35 a set value set in advance when the impedance adjustment mechanism 51 is adjusted. In addition, the plasma processing apparatus 1 further includes a measurement unit 46 configured to be able to measure a voltage and a current of the bias DC signal output from at least one of the first bias power supply and the second bias power supply (the bias DC generation unit 32a). The bias power supply is configured to control a power of the bias DC signal based on the voltage and the current measured by the measurement unit 46 to make the power supplied to the first bias electrode 34 and the second bias electrode 35 a set value set in advance when the impedance adjustment mechanism 51 is adjusted.

[0114] (Second Embodiment)

[0115] In the above-described first embodiment, the second bias electrode 35 is always connected with the susceptor 1110, but a switch can be provided to switch on / off according to the frequency of the bias RF signal, and an embodiment regarding this case will be described as a second embodiment. In addition, the plasma processing apparatus in the second embodiment is the same as the above-described first embodiment except that a switch is provided to the electrically conductive body 37b connecting between the susceptor 1110 and the second bias electrode 35, so the description of the repeated structure and operation thereof is omitted.

[0116] Figure 19 is a view showing an example of the structure of the plasma processing apparatus in the second embodiment. As shown in Figure 19 The plasma processing apparatus 1a of the second embodiment is provided with a switch 37c to the electrically conductive body 37b in the first embodiment.

[0117] The switch 37c is provided to the electrically conductive body 37b connecting between the susceptor 1110 and the second bias electrode 35. The switch 37c is provided, for example, between the connection portion connected with the susceptor 1110 and the opening portion of the through-hole 37a in the electrically conductive body 37b. In the case where the LF1 electric power is supplied, the switch 37c is controlled to be on, and the LF1 electric power is supplied to the second bias electrode 35. On the other hand, in the case where the LF2 electric power is supplied, the switch 37c is controlled to be off, and the LF2 electric power is not supplied to the second bias electrode 35. That is, the LF1 electric power is supplied to the first bias electrode 34 and the second bias electrode 35, and the LF2 electric power is supplied to the first bias electrode 34 but not to the second bias electrode 35.

[0118] Figure 20 is a graph showing an example of independent control of the edge ring side in the second embodiment. Figure 20 Table 90 shown below summarizes the control of the sheath potential at the on / off of the switch 37c in the case where the LF2 electric power of 12.88 MHz, 20 W is supplied. In Table 90, as shown in the connection example, the case where the adjustment electrode 50A having the inner peripheral side and the adjustment electrode 50B having the outer peripheral side are provided as the impedance adjustment electrode 50 is investigated. Further, in Table 90, the adjustment electrode 50A and 50B are denoted as adjustment electrodes A and B, respectively, and the second bias electrode 35 is denoted as an ER bias electrode. Further, in Table 90, since the switch is not provided on the adjustment electrode 50B, the adjustment electrode 50B is in a state connected to the impedance adjustment mechanism 51 (indicated as "on" in Table 90). Further, in Table 90, the first bias electrode 34 and the second bias electrode 35 are at the same potential.

[0119] In Table 90, the sheath potential (Vdc) in the case where both the switch 37c and the switch 51b are on (indicated as "on" of the adjustment electrode A and the ER bias electrode in Table 90) is shown by a graph 91. In the graph 91, the sheath potential at the upper portion of the substrate W is shown by a graph 92, and the sheath potential at the upper portion of the edge ring of the ring assembly 112 is shown by a graph 93. Comparing the graph 92 and the graph 93, it is found that the shapes of the graphs are the same, and the sheath potential at the upper portion of the substrate W also changes following the change of the sheath potential at the upper portion of the edge ring of the ring assembly 112. It is considered that this is because the impedance between the second bias electrode 35 and the adjustment electrodes 50A and 50B is extremely small at the LF2 electric power of 12.88 MHz. That is, it is found that in the LF2 electric power, even if the electrostatic capacitance C of the impedance adjustment mechanism 51 is changed to adjust the sheath potential at the upper portion of the edge ring of the ring assembly 112, there is no independent control of the sheath potential at the upper portion of the substrate W. Further, when both the switch 37c and the switch 51b are on, the impedance between the second bias electrode 35 and the adjustment electrodes 50A and 50B is high in the case where the LF1 electric power (400 kHz) is supplied. Therefore, in the case where the LF1 electric power is supplied, the sheath potential at the upper portion of the edge ring of the ring assembly 112 can be independently controlled. Further, the impedance adjustment mechanism 51 of the second embodiment can include only a variable capacitor, or can be a combination circuit of a variable capacitor, a resistor, and an inductor, as in the first embodiment.

[0120] In Table 90, the sheath potential (Vdc) in the case where both the switch 37c and the switch 51b are turned off (indicated by "off" of the adjustment electrode A, the ER bias electrode in Table 90) is represented by graph 94. In the graph 94, the sheath potential at the upper portion of the substrate W is represented by graph 95, and the sheath potential at the upper portion of the edge ring of the ring assembly 112 is represented by graph 96. Comparing the graph 95 and the graph 96, it is found that the slope of the graph 95 is different from the slope of the graph 96, and the sheath potential at the upper portion of the edge ring of the ring assembly 112 can be controlled independently of the sheath potential at the upper portion of the substrate W. Further, even in the case where the switch 51b is turned on, the sheath potential at the upper portion of the edge ring of the ring assembly 112 can be controlled independently of the sheath potential at the upper portion of the substrate W. In addition, the case where the LF1 electric power (400 kHz) is supplied in the case where both the switch 37c and the switch 51b are turned off is also investigated, and on the side of the ring assembly 112, the second bias electrode 35 is floating, so it is supplied from the pedestal 1110. Therefore, the impedance between the pedestal 1110 and the adjustment electrodes 50A, 50B is high. Therefore, it is considered that even in the case where the LF1 electric power is supplied, the sheath potential at the upper portion of the edge ring of the ring assembly 112 can be controlled independently.

[0121] Thus, in the plasma processing apparatus 1a of the second embodiment, in the case where the first bias RF signal (the LF1 electric power) is supplied, the switch 37c is controlled to be turned on, and in the case where the second bias RF signal (the LF2 electric power) is supplied, the switch 37c is controlled to be turned off. Thereby, the controllability of the plurality of bias RF signals different in frequency can be improved.

[0122] Further, each of the above embodiments and modified examples can be appropriately combined within a range not in contradiction. For example, the first embodiment and the second embodiment can be combined, and the modified examples 1 to 6 of the first embodiment can be combined in the second embodiment.

[0123] According to the first embodiment, the plasma processing apparatus 1 includes: a chamber (plasma processing chamber 10); a first bias power supply (first bias RF generator 31b) configured to supply a first bias signal; a second bias power supply (second bias RF generator 31c) configured to supply a second bias signal; a substrate support (substrate support portion 11) that supports a substrate W and an edge ring (ring assembly 112) in the chamber; an impedance adjustment mechanism 51; and an electric path 38. The substrate support is configured to have: a first region (central region 111a) that supports the substrate W; a second region (ring-shaped region 111b) that supports the edge ring, which is provided around the first region; a first bias electrode 34 that is provided in the first region; a second bias electrode 35 that is provided in the second region; and an impedance adjustment electrode 50 that is provided in the second region and is grounded. The impedance adjustment mechanism 51 has: a first impedance adjustment mechanism (first variable capacitor 52) that controls the first bias signal; an isolator 54 that is connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism, blocks the second bias signal; and a second impedance adjustment mechanism (second variable capacitor 53) that controls the second bias signal, the isolator 54 and the first impedance adjustment mechanism are connected in parallel to the second impedance adjustment mechanism, and are connected to the impedance adjustment electrode 50. The electric path 38 is configured to connect the first bias power supply and the second bias power supply to the first bias electrode 34 and the second bias electrode 35. As a result, controllability of a plurality of bias signals (for example, bias RF signals) having different frequencies can be improved.

[0124] In addition, according to the second embodiment, the electric path 38 is provided with a switch 37c between the first bias power supply and the second bias power supply and the second bias electrode 35, the switch 37c is controlled to be on in the case of supplying the first bias signal, and the switch 37c is controlled to be off in the case of supplying the second bias signal. As a result, a sheath potential of an upper portion of the edge ring of the ring assembly 112 can be controlled independently with respect to a sheath potential of an upper portion of the substrate W.

[0125] In addition, according to each of the embodiments, the first impedance adjustment mechanism is configured from at least one of a variable resistor, a variable capacitor, and a variable inductor. In addition, the second impedance adjustment mechanism is configured from at least one of a variable resistor, a variable capacitor, and a variable inductor. As a result, a potential of the impedance adjustment electrode can be adjusted.

[0126] Further, according to the first embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal, the first impedance adjustment mechanism is constituted by the first variable capacitor 52, and the second impedance adjustment mechanism is constituted by the second variable capacitor 53. The variable range of the capacitance of the first variable capacitor 52 is larger than the variable range of the capacitance of the second variable capacitor 53. As a result, the controllability of the sheath potential on the side of the ring assembly 112 can be improved for either of the first bias signal and the second bias signal.

[0127] Further, according to the first embodiment, the isolator 54 includes a resonance circuit having a resonance frequency of the frequency of the second bias signal. As a result, the second bias signal can be blocked from the first variable capacitor 52.

[0128] Further, according to the second embodiment, the plasma processing apparatus 1a includes: a chamber (the plasma processing chamber 10); a first bias power supply (the first bias RF generation section 31b) configured to be able to supply a first bias signal; a second bias power supply (the second bias RF generation section 31c) configured to be able to supply a second bias signal; a substrate support (the substrate support section 11) that supports a substrate W and an edge ring (a ring assembly 112) in the chamber; an impedance adjustment mechanism 51; and an electric path 38. The substrate support is configured to have: a first region (a central region 111a) that supports the substrate W; a second region (a ring-shaped region 111b) that supports the edge ring, which is provided around the first region; a first bias electrode 34 that is provided in the first region; a second bias electrode 35 that is provided in the second region; and an impedance adjustment electrode 50 that is provided in the second region and is grounded. The impedance adjustment mechanism 51 is configured to be connected to the impedance adjustment electrode 50. The electric path 38 is configured to be able to connect the first bias power supply and the second bias power supply to the first bias electrode 34 and the second bias electrode 35, and a switch 37c is provided between the first bias power supply and the second bias power supply and the second bias electrode 35, the switch 37c is controlled to be on in the case where the first bias signal is supplied, and the switch 37c is controlled to be off in the case where the second bias signal is supplied. As a result, the sheath potential of the upper portion of the edge ring of the ring assembly 112 can be controlled independently of the sheath potential of the upper portion of the substrate W.

[0129] Further, according to the first embodiment, the impedance adjustment mechanism 51 has: a first impedance adjustment mechanism (the first variable capacitor 52) that controls the first bias signal; an isolator 54 that is connected between the impedance adjustment electrode 50 and the first impedance adjustment mechanism and blocks the second bias signal; and a second impedance adjustment mechanism (the second variable capacitor 53) that controls the second bias signal, the isolator 54 and the first impedance adjustment mechanism and the second impedance adjustment mechanism are connected in parallel. As a result, the controllability of a plurality of bias signals (for example, bias RF signals) having different frequencies can be improved.

[0130] Further, according to each embodiment, the frequency of the first bias signal is lower than the frequency of the second bias signal. As a result, controllability of the electric potential can be improved at the frequency of both the first bias signal and the second bias signal (e.g., the first bias RF signal and the second bias RF signal).

[0131] Further, according to the first embodiment and the modified example 1, the impedance adjustment mechanism 51 is adjusted from a low impedance to a high impedance in accordance with an increase in the consumption amount of the edge ring. As a result, controllability of a plurality of bias signals (e.g., bias RF signals) having different frequencies can be improved, and the life of the edge ring can be extended.

[0132] Further, according to the modified example 2, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via the conductive strip 56. Further, the conductive strip 56 is configured in a manner of following the inner periphery side of the second region, has a first connection portion 56a connected to the impedance adjustment mechanism 51 and a second connection portion 56b connected to the impedance adjustment electrode 50, and the first connection portion 56a and the second connection portion 56b are adjacent in the circumferential direction via an unconnected portion (gap 56c) in the circumferential direction. As a result, a deviation in the etching rate of the substrate W in the circumferential direction can be suppressed.

[0133] Further, according to the modified example 5, the conductive strip 56e is configured in the lower portion of the base 1110 of the substrate support, and functions as an open loop resonator. As a result, power loss of the RF electric power (and / or pulsed DC electric power) can be suppressed, and a deviation in the etching rate of the substrate W in the circumferential direction can be suppressed.

[0134] According to the modified example 5, the resonant frequency of the open loop resonator is the frequency of the second bias signal. As a result, spatial propagation of the RF electric power (and / or pulsed DC power) to the conductive strip 56e can be suppressed.

[0135] Further, according to the modified example 3, the impedance adjustment mechanism 51a is connected to a plurality of impedance adjustment electrodes 50 via the conductive strips (first conductive strip 57, second conductive strip 58). The conductive strips have the first conductive strip 57 configured in the circumferential direction in a manner of following the inner periphery side of the second region, and a plurality of second conductive strips 58 configured in a manner of going from the first conductive strip 57 to the center of the base 1110 of the substrate support. The plurality of second conductive strips 58 have first connection portions 58a respectively connected to the impedance adjustment mechanism 51a. The first conductive strip 57 has a plurality of second connection portions 57b connected to the plurality of impedance adjustment electrodes 50 at connection portions 57a respectively connected to the plurality of second conductive strips 58. As a result, a deviation in the etching rate of the substrate W in the circumferential direction can be suppressed.

[0136] Further, according to Modification Example 4, the impedance adjustment mechanism 51 is connected to the impedance adjustment electrode 50 via the conductive strip 59, which is arranged along the second region in a manner having a plurality of turns. As a result, it is possible to suppress the variation in the etching rate of the substrate W in the circumferential direction.

[0137] Further, according to Modification Example 6, the plasma processing apparatus 1 further includes a measurement section 46 configured to be able to measure the voltage and current of the bias RF signal output from at least one of the first bias power supply (first bias RF generation section 31b) and the second bias power supply (second bias RF generation section 31c). The bias power supply is configured to control the power of the bias RF signal based on the voltage and current measured by the measurement section 46 so as to make the potential of the first bias electrode 34 and the second bias electrode 35 a set value set in advance, when adjusting the impedance adjustment mechanism 51. As a result, by controlling the bias RF electric power, it is possible to suppress the variation in the etching rate when the value of Vc is varied.

[0138] Further, according to Modification Example 6, the plasma processing apparatus 1 further includes a measurement section 46 configured to be able to measure the voltage and current of the bias DC signal output from at least one of the first bias power supply and the second bias power supply (bias DC generation section 32a). The bias power supply is configured to control the power of the bias DC signal based on the voltage and current measured by the measurement section 46 so as to make the power supplied to the first bias electrode 34 and the second bias electrode 35 a set value set in advance, when adjusting the impedance adjustment mechanism 51. As a result, by controlling the bias DC electric power, it is possible to suppress the variation in the etching rate when the value of Vc is varied.

[0139] It should be understood that the embodiments disclosed herein are illustrative in all respects, rather than restrictive. Various modifications and changes can be made to the embodiments disclosed in the above description without departing from the scope thereof, which is set forth in the appended claims.

[0140] Further, in each of the above-described embodiments, the plasma processing apparatus 1, 1a that uses an inductively coupled plasma as a plasma source to perform etching or the like on the substrate W is exemplified, but the disclosed technology is not limited thereto. As long as it is an apparatus that uses plasma to process the substrate W, the plasma source is not limited to an inductively coupled plasma, and for example, any plasma source such as a capacitively coupled plasma, a microwave plasma, a magnetron plasma, or the like can be used.

[0141] Further, the present disclosure can also take the following structure.

[0142] (1) A plasma processing apparatus comprising:

[0143] a chamber;

[0144] a first bias power supply configured to supply a first bias signal;

[0145] a second bias power supply configured to supply a second bias signal;

[0146] a substrate support configured to support a substrate and an edge ring in the chamber;

[0147] an impedance adjustment mechanism; and

[0148] an electrical path,

[0149] the substrate support is configured to have:

[0150] a first region configured to support the substrate;

[0151] a second region configured to support the edge ring disposed around the first region;

[0152] a first bias electrode disposed in the first region;

[0153] a second bias electrode disposed in the second region; and

[0154] an impedance adjustment electrode disposed in the second region and grounded,

[0155] the impedance adjustment mechanism is configured to have:

[0156] a first impedance adjustment mechanism configured to control the first bias signal;

[0157] an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism and blocking the second bias signal; and

[0158] a second impedance adjustment mechanism configured to control the second bias signal,

[0159] the isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and connected to the impedance adjustment electrode,

[0160] the electrical path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode.

[0161] (2) The plasma processing apparatus according to the above (1), wherein

[0162] the electrical path is provided with a switch between the first bias power supply and the second bias power supply and the second bias electrode, the switch is controlled to be on in a case where the first bias signal is supplied, and the switch is controlled to be off in a case where the second bias signal is supplied.

[0163] (3) The plasma processing apparatus according to any one of (1) or (2) above, wherein

[0164] The first impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor,

[0165] The second impedance adjustment mechanism is composed of at least one of a variable resistor, a variable capacitor, and a variable inductor.

[0166] (4) The plasma processing apparatus according to (3) above, wherein

[0167] The frequency of the first bias signal is lower than the frequency of the second bias signal,

[0168] The first impedance adjustment mechanism is composed of a first variable capacitor,

[0169] The second impedance adjustment mechanism is composed of a second variable capacitor,

[0170] The variable range of the capacitance of the first variable capacitor is larger than the variable range of the capacitance of the second variable capacitor.

[0171] (5) The plasma processing apparatus according to any one of (1) to (4) above, wherein

[0172] The isolator includes a resonant circuit whose resonant frequency is the frequency of the second bias signal.

[0173] (6) A plasma processing apparatus comprising:

[0174] a chamber;

[0175] a first bias power supply configured to supply a first bias signal;

[0176] a second bias power supply configured to supply a second bias signal;

[0177] a substrate support configured to support a substrate and an edge ring in the chamber;

[0178] an impedance adjustment mechanism; and

[0179] an electrical path,

[0180] The substrate support is configured to have:

[0181] a first region configured to support the substrate;

[0182] a second region configured to support the edge ring disposed around the first region;

[0183] a first bias electrode disposed in the first region;

[0184] a second bias electrode provided in the second region; and

[0185] an impedance adjustment electrode provided in the second region and grounded,

[0186] the impedance adjustment mechanism is configured to be connected to the impedance adjustment electrode,

[0187] the electric path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode, a switch is provided between the first bias power supply and the second bias power supply and the second bias electrode, the switch is controlled to be on in the case where the first bias signal is supplied, and the switch is controlled to be off in the case where the second bias signal is supplied.

[0188] (7) The plasma processing apparatus according to the above (6), wherein

[0189] the impedance adjustment mechanism has:

[0190] a first impedance adjustment mechanism that controls the first bias signal;

[0191] an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, which blocks the second bias signal; and

[0192] a second impedance adjustment mechanism that controls the second bias signal,

[0193] the isolator and the first impedance adjustment mechanism are connected in parallel to the second impedance adjustment mechanism.

[0194] (8) The plasma processing apparatus according to the above (7), wherein

[0195] the first impedance adjustment mechanism is constituted by at least one of a variable resistor, a variable capacitor, and a variable inductor,

[0196] the second impedance adjustment mechanism is constituted by at least one of a variable resistor, a variable capacitor, and a variable inductor.

[0197] (9) The plasma processing apparatus according to any one of the above (1) to (8), wherein

[0198] a frequency of the first bias signal is lower than a frequency of the second bias signal.

[0199] (10) The plasma processing apparatus according to any one of the above (1) to (9), wherein

[0200] the impedance adjustment mechanism is adjusted from a low impedance to a high impedance in accordance with an increase in a consumption amount of the edge ring.

[0201] (11) The plasma processing apparatus according to any one of (1) to (10) above, wherein

[0202] the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive strip,

[0203] the conductive strip is disposed along an inner circumferential side of the second region, has a first connection portion connected to the impedance adjustment mechanism and a second connection portion connected to the impedance adjustment electrode, and has an unconnected portion in a circumferential direction between the first connection portion and the second connection portion.

[0204] (12) The plasma processing apparatus according to (11) above, wherein

[0205] the conductive strip is disposed in a lower portion of a base of the substrate holder and functions as an open loop resonator.

[0206] (13) The plasma processing apparatus according to (12) above, wherein

[0207] a resonant frequency of the open loop resonator is a frequency of the second bias signal.

[0208] (14) The Doppler processing apparatus according to any one of (1) to (10) above, wherein

[0209] the impedance adjustment mechanism is connected to a plurality of the impedance adjustment electrodes via a conductive strip,

[0210] the conductive strip has a first conductive strip disposed in a circumferential direction along an inner circumferential side of the second region, and a plurality of second conductive strips disposed in a manner going from the first conductive strip toward a center of a base of the substrate holder,

[0211] the plurality of second conductive strips each have a first connection portion connected to the impedance adjustment mechanism,

[0212] the first conductive strip has a plurality of second connection portions connected to the plurality of impedance adjustment electrodes at connection portions connected to the plurality of second conductive strips, respectively.

[0213] (15) The plasma processing apparatus according to any one of (1) to (10) above, wherein

[0214] the impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive strip,

[0215] the conductive strip is disposed along the second region in a manner having a plurality of turns.

[0216] (16) The plasma processing apparatus according to any one of (1) to (15) above, wherein

[0217] Further comprising a measurement section configured to be capable of measuring a voltage and a current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply,

[0218] The bias power supply is configured to control an electric power of the bias RF signal based on the voltage and the current measured by the measurement section when adjusting the impedance adjustment mechanism, so as to make the potentials of the first bias electrode and the second bias electrode be set values set in advance.

[0219] (17) The plasma processing apparatus according to any one of (1) to (15) above, wherein

[0220] Further comprising a measurement section configured to be capable of measuring a voltage and a current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply,

[0221] The bias power supply is configured to control an electric power of the bias DC signal based on the voltage and the current measured by the measurement section when adjusting the impedance adjustment mechanism, so as to make the electric power supplied to the first bias electrode and the second bias electrode be set values set in advance.

[0222] Explanation of Reference Numerals

[0223] 1, 1a Plasma processing apparatus

[0224] 10 Plasma processing chamber

[0225] 11 Substrate support section

[0226] 31a

[0227] 31b First bias RF generation section

[0228] 31c Second bias RF generation section

[0229] 34 First bias electrode

[0230] 35 Second bias electrode

[0231] 37c Switch

[0232] 38 Electric path

[0233] 50 Impedance adjustment electrode

[0234] 51, 51a Impedance adjustment mechanism

[0235] 52 First variable capacitor (first impedance adjustment mechanism)

[0236] 53 second variable capacitor (second impedance adjustment mechanism)

[0237] 54 isolator

[0238] 56, 56e, 59 conductive strip

[0239] 56a, 58a first connection portion

[0240] 56b, 57b second connection portion

[0241] 56c gap

[0242] 57 first conductive strip

[0243] 57a connection portion

[0244] 58 second conductive strip

[0245] 112 ring assembly

[0246] 111a, 111c, 111d central region

[0247] 111b annular region

[0248] 1110 base

[0249] 1111, 1111c, 1111d electrostatic chuck

[0250] W substrate

Claims

1. A plasma processing apparatus characterized by comprising: including: a chamber; a first bias power supply configured to supply a first bias signal; a second bias power supply configured to supply a second bias signal; a substrate support configured to support a substrate and an edge ring in the chamber; an impedance adjustment mechanism; and an electric path, the substrate support is configured to have: a first region configured to support the substrate; a second region configured to support the edge ring disposed around the first region; a first bias electrode disposed in the first region; a second bias electrode disposed in the second region; and an impedance adjustment electrode disposed in the second region and grounded, the impedance adjustment mechanism is configured to have: a first impedance adjustment mechanism configured to control the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism to block the second bias signal; and a second impedance adjustment mechanism configured to control the second bias signal, the isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and with the impedance adjustment electrode, the electric path is configured to connect the first bias power supply and the second bias power supply with the first bias electrode and the second bias electrode.

2. The plasma processing apparatus according to claim 1, wherein: the electric path is provided with a switch between the first bias power supply and the second bias power supply and the second bias electrode, the switch is controlled to be on in a case where the first bias signal is supplied, and the switch is controlled to be off in a case where the second bias signal is supplied.

3. The plasma processing apparatus according to claim 1 or 2, wherein: the first impedance adjustment mechanism is configured from at least one of a variable resistor, a variable capacitor, and a variable inductor, the second impedance adjustment mechanism is configured from at least one of a variable resistor, a variable capacitor, and a variable inductor.

4. The plasma processing apparatus according to claim 3, wherein: a frequency of the first bias signal is lower than a frequency of the second bias signal, the first impedance adjustment mechanism is configured from a first variable capacitor, the second impedance adjustment mechanism is configured from a second variable capacitor, a variable range of a capacitance of the first variable capacitor is larger than a variable range of a capacitance of the second variable capacitor.

5. The plasma processing apparatus according to claim 1, wherein: the isolator includes a resonance circuit, a resonance frequency of the resonance circuit is the frequency of the second bias signal. including: a chamber; 6. A plasma processing apparatus characterized by comprising: a first bias power supply configured to supply a first bias signal; a second bias power supply configured to supply a second bias signal; a substrate support configured to support a substrate and an edge ring in the chamber; an impedance adjustment mechanism; and an electric path, the substrate support is configured to have: a first region configured to support the substrate; a second region configured to support the edge ring disposed around the first region; a first bias electrode disposed in the first region; a second bias electrode disposed in the second region; and an impedance adjustment electrode disposed in the second region and grounded, the impedance adjustment mechanism is configured to have: a first impedance adjustment mechanism configured to control the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism to block the second bias signal; and a second impedance adjustment mechanism configured to control the second bias signal, the isolator and the first impedance adjustment mechanism are connected in parallel with the second impedance adjustment mechanism and with the impedance adjustment electrode, the electric path is configured to connect the first bias power supply and the second bias power supply with the first bias electrode and the second bias electrode. The impedance adjustment mechanism is connected to the impedance adjustment electrode, The electric path is configured to connect the first bias power supply and the second bias power supply to the first bias electrode and the second bias electrode, a switch is provided between the first bias power supply and the second bias power supply and the second bias electrode, the switch is controlled to be on in the case of supplying the first bias signal, and the switch is controlled to be off in the case of supplying the second bias signal.

7. The plasma processing apparatus according to claim 6, wherein: The impedance adjustment mechanism has: a first impedance adjustment mechanism that controls the first bias signal; an isolator connected between the impedance adjustment electrode and the first impedance adjustment mechanism, which blocks the second bias signal; and a second impedance adjustment mechanism that controls the second bias signal, The isolator and the first impedance adjustment mechanism are connected in parallel to the second impedance adjustment mechanism.

8. The plasma processing apparatus according to claim 7, wherein: The first impedance adjustment mechanism is configured from at least one of a variable resistor, a variable capacitor, and a variable inductor, The second impedance adjustment mechanism is configured from at least one of a variable resistor, a variable capacitor, and a variable inductor.

9. The plasma processing apparatus according to claim 1 or 6, wherein: The frequency of the first bias signal is lower than the frequency of the second bias signal.

10. The plasma processing apparatus according to claim 1 or 6, wherein: The impedance adjustment mechanism is adjusted from a low impedance to a high impedance in accordance with an increase in the consumption amount of the edge ring.

11. The plasma processing apparatus according to claim 1 or 6, wherein: The impedance adjustment mechanism is connected to the impedance adjustment electrode via a conductive strip, The conductive strip is disposed along the inner circumferential side of the second region, has a first connection portion connected to the impedance adjustment mechanism and a second connection portion connected to the impedance adjustment electrode, and has an unconnected portion in the circumferential direction between the first connection portion and the second connection portion, the first connection portion and the second connection portion being adjacent in the circumferential direction.

12. The plasma processing apparatus according to claim 11, wherein: The conductive strip is disposed in the lower portion of the pedestal of the substrate holder and functions as an open loop resonator.

13. The plasma processing apparatus according to claim 12, wherein: The resonant frequency of the open loop resonator is the frequency of the second bias signal.

14. The plasma processing apparatus according to claim 1 or 6, wherein: The impedance adjustment mechanism is connected to a plurality of the impedance adjustment electrodes via a conductive strip, The conductive strip has a first conductive strip disposed in the circumferential direction along the inner circumferential side of the second region, and a plurality of second conductive strips disposed toward the center of the pedestal of the substrate holder from the first conductive strip, The plurality of second conductive strips each have a first connection portion connected to the impedance adjustment mechanism, ​ The first conductive strip has a plurality of second connection portions connected to the plurality of impedance adjustment electrodes at connection portions where the first conductive strip is connected to the plurality of second conductive strips, respectively.

15. The plasma processing apparatus according to any one of claims 1 and 6, wherein: The impedance adjustment mechanism is connected to the impedance adjustment electrodes via a conductive strip, The conductive strip is arranged along the second region in a manner having a plurality of turns.

16. The plasma processing apparatus according to any one of claims 1 and 6, wherein: Further comprising a measurement portion configured to be able to measure a voltage and a current of a bias RF signal output from at least one of the first bias power supply and the second bias power supply, The bias power supply is configured to control an electric power of the bias RF signal based on the voltage and the current measured by the measurement portion to make the electric potential of the first bias electrode and the second bias electrode a set value set in advance when adjusting the impedance adjustment mechanism.

17. The plasma processing apparatus according to any one of claims 1 and 6, wherein: Further comprising a measurement portion configured to be able to measure a voltage and a current of a bias DC signal output from at least one of the first bias power supply and the second bias power supply, The bias power supply is configured to control an electric power of the bias DC signal based on the voltage and the current measured by the measurement portion to make an electric power supplied to the first bias electrode and the second bias electrode a set value set in advance when adjusting the impedance adjustment mechanism.

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