Multilayer electronic component and dielectric material
By controlling the ratio of rare earth elements to Si and Si in the dielectric layer, combining BaTiO3-based dielectric grains and transition metal elements to form a core-shell structure, the problem of insufficient reliability of the dielectric layer during miniaturization and high capacitance is solved, and reliability and insulation resistance are improved in harsh environments are achieved.
Patent Information
- Application Number
- CN202510077122.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-01-22
- Filing Date
- 2025-01-17
- Publication Date
- 2025-07-22
AI Technical Summary
In the process of miniaturization and high capacitance requirements, the reliability of the dielectric layer is difficult to ensure, especially in harsh environments.
By controlling the ratio of rare earth elements to Si in the dielectric layer and the distribution of Si in the grain and grain boundaries, we ensure 1.6≤MRe/MSi≤4.0 and 2.0≤BSi/GSi, BaTiO3-based dielectric grains are used and an appropriate amount of transition metal elements is added to form a core-shell structure to improve reliability.
It improves the reliability and insulation resistance of multi-layer electronic components in harsh environments, reduces charge mobility, enhances the uniformity and energy barrier of the dielectric layer, and prevents abnormal grain growth.
Smart Images

Figure CN120356779A_ABST
Abstract
Description
[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0009522, filed with the Korean Intellectual Property Office on January 22, 2024, the entire disclosure of which is incorporated herein by reference. Technical Field
[0002] The present disclosure relates to a multilayer electronic component. Background Art
[0003] A multilayer ceramic capacitor (MLCC), which is a type of multilayer electronic component, is a chip capacitor that is mounted on a printed circuit board of various electronic products, including image display devices (such as liquid crystal displays (LCDs) and plasma display panels (PDPs)), computers, smartphones, mobile phones, etc., and charges or discharges electricity therefrom.
[0004] Because multilayer ceramic capacitors can have a small size and a high capacitance and can be easily mounted, such multilayer ceramic capacitors can be used as components of various electronic devices. As electronic devices such as computers and mobile devices have been designed to have a reduced size and a high output power, the demand for miniaturization and high capacitance of multilayer ceramic capacitors has also increased.
[0005] To achieve miniaturization and high capacitance of multilayer ceramic capacitors, it is necessary to reduce the thickness of the dielectric layer and the internal electrodes and to increase the number of layers. However, as the thickness of the dielectric layer decreases, the electric field applied to the dielectric layer at the same operating voltage increases, making it necessary to ensure the reliability of the dielectric layer. Summary of the Invention
[0006] Embodiments of the present disclosure are directed to providing a multilayer electronic component having improved reliability.
[0007] Embodiments of the present disclosure are directed to providing a multilayer electronic component having improved reliability in a harsh environment.
[0008] According to an embodiment of the present disclosure, a multilayer electronic component includes: a body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer; and external electrodes disposed on the body, wherein the dielectric layer includes a plurality of grains and grain boundaries disposed between adjacent grains, wherein, in the dielectric layer, when the number of moles of a rare earth element based on 100 moles of Ti is defined as MRe and the number of moles of Si based on 100 moles of Ti is defined as MSi, 1.6 ≤ MRe / MSi ≤ 4.0 is satisfied, and wherein, when the average content of Si included in the grains is defined as GSi and the maximum value of the Si content at the grain boundaries is defined as BSi, 2.0 ≤ BSi / GSi is satisfied.
[0009] According to an embodiment of the present disclosure, a dielectric material includes: BaTiO3-based dielectric grains having grain boundaries therebetween, wherein, in the dielectric material, the ratio of the number of moles of a rare earth element based on 100 moles of Ti to the number of moles of Si based on 100 moles of Ti is in the range of 1.6 to 4.0, and the ratio of the maximum value of the content of Si at the grain boundaries to the average content of Si in the BaTiO3-based dielectric grains is greater than or equal to 2.0. Description of the Drawings
[0010] Through the following specific embodiments in conjunction with the drawings, the above and other aspects, features and advantages of the present disclosure will be more clearly understood. In the drawings: Figure 1 is a perspective view showing a multi-layer electronic component according to an embodiment of the present disclosure; Figure 2 is along Figure 1 the cross-sectional view taken along the line I-I' in Figure 3 is along Figure 1 the cross-sectional view taken along the line II-II' in Figure 4 is a view showing Figure 1 the exploded view of the main body in Figure 5 is a view showing Figure 2 the region K1 in Figure 6 is a scanning image obtained using a scanning electron microscope (SEM); and Figure 7 is a graph obtained by performing line scan analysis along the line L1 in Figure 6 Detailed Description of the Embodiments
[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.
[0012] These embodiments have been described in sufficient detail to enable those skilled in the art to practice the present disclosure. It should be understood that the various embodiments of the present disclosure, although different, are not necessarily mutually exclusive. For example, without departing from the spirit and scope of the present disclosure, the structures, shapes and dimensions described as examples in the embodiments of the present disclosure can be implemented in another embodiment. In addition, without departing from the spirit and scope of the present disclosure, the position or arrangement of the elements in the embodiments can be modified. Therefore, the following specific embodiments should not be regarded as having a limiting meaning, and the scope of the present disclosure is only defined by the appended claims (properly interpreted) and the full scope of the equivalents given by the claims.
[0013] In the drawings, like elements will be denoted by like reference numerals. Further, redundant descriptions and detailed descriptions of known functions and elements that may unnecessarily obscure the gist of the present disclosure will be omitted. In the drawings, some elements may be exaggerated, omitted, or shown briefly, and the dimensions of the elements do not necessarily reflect the actual dimensions of these elements. The terms “comprising,” “including,” “configured to,” etc. in the specification are used to indicate the presence of features, quantities, steps, operations, elements, parts, or combinations thereof, and do not preclude the possibility of the presence or addition of one or more other features, quantities, steps, operations, elements, parts, or combinations thereof.
[0014] In the drawings, the first direction may be defined as the thickness direction (T), the second direction may be defined as the length direction (L), and the third direction may be defined as the width direction (W).
[0015] Multi-layer electronic component Figure 1 is a perspective view showing a multilayer electronic component according to an embodiment.
[0016] Figure 2 is along Figure 1 a cross-sectional view taken along line I-I' in
[0017] Figure 3 is along Figure 1 a cross-sectional view taken along line II-II' in
[0018] Figure 4 is a view showing Figure 1 an exploded view of the main body in
[0019] Figure 5 is a view showing Figure 2 region K1 in
[0020] Figure 6 is a scanning image obtained using a scanning electron microscope (SEM).
[0021] Figure 7 is a graph obtained by performing line scan analysis along line L1 in Figure 6
[0022] Hereinafter, the multilayer electronic component 100 according to an embodiment will be described in more detail with reference to Figures 1 to 7 A multilayer ceramic capacitor will be described as an example of the multilayer electronic component, but the embodiments thereof are not limited thereto, and the embodiments of the present disclosure can be applied to various multilayer electronic components such as inductors, piezoelectric elements, varistors, or thermistors.
[0023] The multi-layer electronic component 100 may include: a main body 110 including a dielectric layer 111 and inner electrodes 121 and 122 alternately disposed with the dielectric layer 111; and outer electrodes 131 and 132 disposed on the main body 110. The dielectric layer 111 includes a plurality of crystal grains 111a and grain boundaries 111b disposed between adjacent crystal grains. In the dielectric layer 111, when the number of moles of a rare earth element based on 100 moles of Ti is defined as MRe and the number of moles of Si based on 100 moles of Ti is defined as MSi, 1.6 ≤ MRe / MSi ≤ 4.0 may be satisfied, and when the average content of Si included in the crystal grains is defined as GSi and the maximum value of the content of Si at the grain boundaries is defined as BSi, 2.0 ≤ BSi / GSi may be satisfied.
[0024] Hereinafter, each component included in the multi-layer electronic component 100 according to the embodiment will be described.
[0025] In the main body 110, the dielectric layer 111 and the inner electrodes 121 and 122 may be alternately laminated.
[0026] The shape of the main body 110 may not be limited to any specific shape, but as Figure 1 shown, the main body 110 may have a hexahedral shape or a shape similar to a hexahedral shape. Due to the shrinkage of the ceramic powder included in the main body 110 or the polishing of the corners during the firing process, the main body 110 may not have an exact hexahedral shape formed by straight lines, but may generally have a hexahedral shape.
[0027] The main body 110 may have a first surface 1 and a second surface 2 opposite to each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and opposite to each other in a second direction, and a fifth surface 5 and a sixth surface 6 connected to the first surface 1 and the second surface 2 and the third surface 3 and the fourth surface 4 and opposite to each other in a third direction. The first surface 1 may be set as the mounting surface opposite to the substrate when the multi-layer electronic component 100 is mounted on the substrate.
[0028] Since the edge regions of the dielectric layer 111 where the inner electrodes 121 and 122 are not provided are stacked in the first direction, a step difference can be formed by the thickness of the inner electrodes 121 and 122, and when viewed from the first surface or the second surface, the corners connecting the first surface to the third to sixth surfaces and / or the corners connecting the second surface to the third to sixth surfaces may have a shape that is centrally contracted in the first direction toward the main body 110. Optionally, due to the shrinkage behavior during the process of sintering the main body, when viewed from the first surface or the second surface, the corners connecting the first surface 1 to the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6 and / or the corners connecting the second surface 2 to the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6 may have a shape that is centrally contracted in the first direction toward the main body 110. Optionally, in order to prevent cracking defects, the corners connecting the surfaces of the main body 110 can be rounded by performing a specific process. Therefore, the corners connecting the first surface to the third to sixth surfaces and / or the corners connecting the second surface to the third to sixth surfaces may have a rounded shape.
[0029] To suppress the step difference caused by the inner electrodes 121 and 122, after lamination, cutting is performed so that the inner electrodes are exposed on the two side surfaces in the third direction (width direction) of the capacitance forming portion Ac, and a single dielectric layer or two or more dielectric layers are laminated on the two side surfaces in the third direction (width direction) of the capacitance forming portion Ac to form the edge portions 114 and 115. In this case, the corners connecting the first surface to the fifth and sixth surfaces and the corners connecting the second surface to the fifth and sixth surfaces may not have a contracted form.
[0030] The multiple dielectric layers 111 forming the main body 110 may be in a fired state, and the boundaries between adjacent dielectric layers 111 may be integrated with each other, making it difficult to identify the boundaries between them without using a scanning electron microscope (SEM). There may be no specific limitation on the number of stacked dielectric layers, and the number of stacked layers can be determined by considering the size of the multilayer electronic component. For example, the main body can be formed by stacking 400 or more layers of dielectric layers.
[0031] The dielectric layer 111 can be formed by the following method: preparing a ceramic slurry including ceramic powder, organic solvent, additives, and a binder, preparing a ceramic green sheet by coating the ceramic slurry on a carrier film and drying it, and firing the ceramic green sheet. The ceramic powder is not limited to any specific example as long as sufficient electrostatic capacitance can be obtained. For example, barium titanate (BaTiO3)-based dielectric powder can be used as the ceramic powder. The ceramic powder can be BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-yCa y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1) and Ba(Ti 1-y Zr y )O3 (0 < y < 1) or more of these.
[0032] Therefore, the dielectric layer 111 may include BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1) and Ba(Ti 1-y Zr y )O3 (0 < y < 1) or more of these.
[0033] The dielectric layer 111 may include BaTiO3 as a main component.
[0034] The dielectric layer 111 may include a plurality of crystal grains 111a and grain boundaries 111b disposed between adjacent crystal grains. In the dielectric layer, when the number of moles of a rare earth element based on 100 moles of Ti is defined as MRe and the number of moles of Si based on 100 moles of Ti is defined as MSi, 1.6 ≤ MRe / MSi ≤ 4.0 is satisfied, and when the average content of Si included in the crystal grains is defined as GSi and the maximum value of the content of Si at the grain boundaries is defined as BSi, 2.0 ≤ BSi / GSi may be satisfied.
[0035] A multilayer ceramic capacitor (MLCC), a type of multilayer electronic component, has been designed to have a high capacitance and a reduced thickness. To reduce the thickness of the dielectric layer, it may be necessary to increase the grain boundary resistance of the dielectric grains by reducing the dielectric grain size to prevent charge transfer.
[0036] The Si element has a large energy band gap and excellent electrical insulation effect. According to an embodiment, by controlling the ratio of the rare earth element included in the dielectric layer 111 to the Si element and controlling the distribution of the Si element in the crystal grains 111a and the grain boundaries 111b, the reliability of the multilayer electronic component 100 can be improved. Therefore, uniform crystal grains can be ensured and grain growth can be prevented, thereby suppressing abnormal grain growth. In addition, Si may be located at the grain boundaries, which can increase the energy barrier, thereby causing a reduction in mobility through the hopping or tunneling effect of charge carriers.
[0037] When a rare earth element is added to a main component of barium titanate (BaTiO3), the rare earth element can act as a donor by substituting the Ba site, so that the concentration of oxygen vacancies can be reduced and the reliability can be improved.
[0038] When 1.6 ≤ MRe / MSi ≤ 4.0 is not satisfied or BSi / GSi is less than 2.0, the above effects may be insufficient, resulting in a possible reduction in reliability.
[0039] In this case, the upper limit of BSi / GSi is not limited to any specific example. For example, BSi / GSi can be 5.0 or less.
[0040] The method for controlling MRe / MSi and BSi / GSi is not limited to any specific example, and MRe / MSi and BSi / GSi can be controlled by, for example, adjusting the composition of the green ceramic sheet, the firing temperature during sintering, and the reducing atmosphere.
[0041] Referring to Figure 5 , the grain boundary 111b can surround the grain 111a.
[0042] In an embodiment, the number of moles MRe of the rare earth element based on 100 moles of Ti included in the dielectric layer 111 can be in the range from 0.1 mole to 6.0 moles.
[0043] In an embodiment, the number of moles MSi of Si based on 100 moles of Ti included in the dielectric layer 111 can be in the range from 1.0 mole to 3.5 moles.
[0044] The average content GSi of Si included in the grain 111a and the maximum value BSi of the Si content at the grain boundary 111b are not limited to any specific example.
[0045] In an embodiment, the average content GSi of Si included in the grain 111a can be in the range from 0.3 at% to 0.9 at%.
[0046] In an embodiment, the maximum value BSi of the Si content at the grain boundary 111b can be in the range from 1.5 at% to 3.5 at%.
[0047] In an embodiment, the rare earth element included in the dielectric layer 111 can include one or more of Gd, La, Sm, Dy, Tb, Ho, Y, Yb, and Sc.
[0048] More preferably, the rare earth element included in the dielectric layer 111 can include Dy and Y.
[0049] In an embodiment, the dielectric layer 111 may further include a first sub-component, and the first sub-component may be one or more of V, Zr, Mn, Cr, Ti, Ni, Co, and W.
[0050] Transition metal elements may have variable electron valences (multivalent), and may lower the firing temperature and may improve the high-temperature withstand voltage property. In addition, when a transition metal element is added to the main component based on barium titanate (BaTiO3), it may replace the Ti site.
[0051] More preferably, the first sub-component may be V and Mn.
[0052] In this case, the dielectric layer 111 may include the first sub-component in an amount in the range of 0.5 mol to 3.0 mol based on 100 mol of Ti.
[0053] In an embodiment, the dielectric layer 111 may further include a second sub-component, and the second sub-component may be Mg. Mg may be a sintering aid element that promotes the sintering process, and may form a core-shell structure by controlling grain growth.
[0054] In this case, the dielectric layer 111 may include the second sub-component in an amount in the range of 0.1 mol to 3.0 mol based on 100 mol of Ti.
[0055] In an embodiment, when the thickness of the grain boundary 111b is defined as Tgb, Tgb may be 8.0 nm or greater. Therefore, the effect of improving reliability by controlling MRe / MSi and BSi / GSi may be improved.
[0056] The upper limit of Tgb is not limited to any specific example. For example, Tgb may satisfy 15.0 nm or less. Therefore, in an embodiment, Tgb may satisfy 8.0 nm ≤ Tgb ≤ 15.0 nm.
[0057] TEM-EDS may be used to analyze the content of each element included in the dielectric layer 111 to analyze the composition in the dielectric grains in the central portion of the wafer. Specifically, an analysis sample with a reduced thickness is prepared in a region including the dielectric layer in a cross-section of the body that has undergone the sintering process using a focused ion beam (FIB) device. The damaged layer of the sample with the reduced thickness is removed using Ar ion milling, and thereafter, each component is mapped and quantitatively analyzed in the image obtained using TEM-EDS. In this case, a quantitative analysis map of each component may be obtained with the mass fraction of each element (which may be expressed as a mole fraction or an atomic fraction).
[0058] In addition, the multi-layer electronic component is pulverized, the internal electrodes are removed, the dielectric part is selected, and equipment such as an inductively coupled plasma optical emission spectrometer (ICP-OES) or an inductively coupled plasma mass spectrometer (ICP-MS) can be used to analyze the dielectric composition.
[0059] In addition, line scan analysis can be performed using a transmission electron microscope (TEM) to measure the average content GSi of Si included in the crystal grains 111a, the maximum content BSi of Si at the grain boundaries 111b, and the thickness Tgb of the grain boundaries 111b. Specifically, an image as shown in Figure 6 can be obtained by scanning, using a transmission electron microscope (TEM), the central portion of a cross-section in the first and second directions cut from the center of the main body 110 in the third direction, and the content (at%) of Si can be measured by line scanning along a line L1 that is 100 nm perpendicular to between the crystal grains to obtain a graph as shown in Figure 7 . In Figure 7 , the maximum content (at%) of Si can be BSi, the average content (at%) of Si in the crystal grains can be GSi, and the distance (for example, the maximum peak width of the peak where the maximum Si content is located) between the points where GSi is reached from the left and right sides based on the maximum content (at%) of Si can be the grain boundary thickness Tgb.
[0060] In addition, BSi, GSi, and Tgb can be obtained in Figure 6 by measuring the content (at%) of Si in line scans on 10 lines that are 100 nm perpendicular to between the crystal grains, and the average value can be obtained to generalize these values.
[0061] The main body 110 may include a capacitance forming portion Ac that forms a capacitor, and covering portions 112 and 113. The capacitance forming portion Ac includes a first internal electrode 121 and a second internal electrode 122 that are disposed in the main body 110 and face each other, and a dielectric layer 111 is interposed between the first internal electrode 121 and the second internal electrode 122. The covering portions 112 and 113 are formed in the upper and lower portions of the capacitance forming portion Ac in the first direction.
[0062] In addition, the capacitance forming portion Ac can contribute to forming the capacitance of the capacitor, and can be formed by repeatedly laminating a plurality of first internal electrodes 121 and a plurality of second internal electrodes 122 and interposing the dielectric layer 111 between the first internal electrode 121 and the second internal electrode 122.
[0063] The covering portions 112 and 113 may include an upper covering portion 112 disposed on the upper portion of the capacitance forming portion Ac in the first direction and a lower covering portion 113 disposed on the lower portion of the capacitance forming portion Ac in the first direction.
[0064] The upper covering part 112 and the lower covering part 113 can be formed by laminating a single dielectric layer or two or more dielectric layers on the upper surface and the lower surface in the thickness direction of the capacitor forming part Ac respectively, and can prevent damage to the internal electrode caused by physical stress and / or chemical stress.
[0065] The upper covering part 112 and the lower covering part 113 do not include an internal electrode, and can include the same material as that of the dielectric layer 111.
[0066] That is to say, the upper covering part 112 and the lower covering part 113 can include a ceramic material, for example, a barium titanate (BaTiO3) ceramic material.
[0067] The thickness of the covering parts 112 and 113 is not limited to any specific example. However, in order to easily achieve miniaturization and high capacitance of the multilayer electronic component, the thickness tc of the covering parts 112 and 113 can be less than or equal to 15 μm.
[0068] The average thickness tc of the covering parts 112 and 113 can refer to the dimension in the first direction, and can be the average value of the dimensions in the first direction of the covering parts 112 and 113 measured at five equally spaced points on the upper part or the lower part of the capacitor forming part Ac.
[0069] In addition, the edge parts 114 and 115 can be arranged on the side surface of the capacitor forming part Ac.
[0070] The edge parts 114 and 115 can include a first edge part 114 arranged on one side surface of the capacitor forming part Ac in the third direction (width direction) and a second edge part 115 arranged on the other side surface of the capacitor forming part Ac in the third direction (width direction). That is to say, the edge parts 114 and 115 can be respectively arranged on the two side surfaces of the capacitor forming part Ac in the width direction.
[0071] The edge parts 114 and 115 can represent: in the cross-section in the width direction - thickness direction (W-T) of the main body 110 as shown in Figure 3 shown, the regions between the two ends of the first internal electrode 121 and the second internal electrode 122 and the outer surface of the main body 110.
[0072] The edge parts 114 and 115 can basically prevent damage to the internal electrode caused by physical stress and / or chemical stress.
[0073] The edge parts 114 and 115 can be formed by forming an internal electrode by coating a conductive paste on the regions on the ceramic green sheet except for the regions where the edge parts will be formed.
[0074] In addition, in order to prevent step differences caused by the inner electrodes 121 and 122, the edge portions 114 and 115 can be formed by the following method: after lamination, by performing cutting to expose the inner electrodes on the two side surfaces of the capacitance forming portion Ac in the third direction (width direction), and laminating a single dielectric layer or two or more dielectric layers on the two side surfaces of the capacitance forming portion Ac in the third direction (width direction).
[0075] The widths of the edge portions 114 and 115 are not limited to any specific examples. However, in order to easily achieve miniaturization and high capacitance of the multilayer electronic component, the average widths of the edge portions 114 and 115 can be less than or equal to 15 μm.
[0076] The average widths of the edge portions 114 and 115 can refer to the average dimension MW1 in the third direction of the region where the inner electrode is spaced apart from the fifth surface and the average dimension MW2 in the third direction of the region where the inner electrode is spaced apart from the sixth surface, and can be the average value of the dimensions of the edge portions 114 and 115 in the third direction measured at five equally spaced points on the side surfaces of the capacitance forming portion Ac.
[0077] Therefore, in the embodiment, the average dimensions MW1 and MW2 in the third direction of the regions where the inner electrodes 121 and 122 are respectively spaced apart from the fifth surface and the sixth surface can be 15 μm or less.
[0078] The inner electrodes 121 and 122 can include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 can be alternately arranged opposite to each other and the dielectric layer 111 included in the main body 110 is interposed between the first inner electrode 121 and the second inner electrode 122, and the first inner electrode 121 and the second inner electrode 122 can be respectively exposed on the third surface 3 and the fourth surface 4 of the main body 110.
[0079] The first inner electrode 121 can be spaced apart from the fourth surface 4 and can be exposed through the third surface 3, and the second inner electrode 122 can be spaced apart from the third surface 3 and can be exposed through the fourth surface 4.
[0080] That is to say, the first inner electrode 121 is not connected to the second outer electrode 132 and can be connected to the first outer electrode 131, and the second inner electrode 122 is not connected to the first outer electrode 131 and can be connected to the second outer electrode 132. Therefore, the first inner electrode 121 can be spaced apart from the fourth surface 4 by a predetermined distance, and the second inner electrode 122 can be spaced apart from the third surface 3 by a predetermined distance. In addition, the first inner electrode 121 and the second inner electrode 122 can be spaced apart from the fifth surface and the sixth surface of the main body 110.
[0081] The conductive metal included in the inner electrodes 121 and 122 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, In, Sn, Al, Ti, and their alloys, but the embodiments are not limited thereto.
[0082] The average thickness td of the dielectric layer 111 may not be limited to any specific example and may be, for example, from 0.1 μm to 10 μm. The average thickness te of the inner electrodes 121 and 122 may not be limited to any specific example and may be, for example, from 0.05 μm to 3.0 μm. Furthermore, the average thickness td of the dielectric layer 111 and the average thickness te of the inner electrodes 121 and 122 may be arbitrarily determined according to desired properties or applications. For example, in the case of a micro IT electronic component, in order to achieve miniaturization and high capacitance, the average thickness td of the dielectric layer 111 may be 0.4 μm or less, and the average thickness te of the inner electrodes 121 and 122 may be 0.4 μm or less.
[0083] The average thickness td of the dielectric layer 111 and the average thickness te of the inner electrodes 121 and 122 may respectively refer to the dimensions of the dielectric layer 111 and the inner electrodes 121 and 122 in the first direction. The average thickness td of the dielectric layer 111 and the average thickness te of the inner electrodes 121 and 122 may be measured in an image obtained by scanning a cross-section of the main body 110 in the first and second directions at a magnification of 10,000 using a scanning electron microscope (SEM). More specifically, the average thickness of the dielectric layer 111 may be obtained by measuring the thicknesses of the dielectric layer 111 at a plurality of equally spaced points (e.g., 30 points) in the second direction in the obtained image. Furthermore, the average thickness of the inner electrodes 121 and 122 may be obtained by measuring the thicknesses of one of the inner electrodes 121 and 122 at a plurality of equally spaced points (e.g., 30 points) in the second direction in the obtained image. As an example, 30 equally spaced points may be specified in the capacitance forming portion. In addition, by measuring the thicknesses of 10 dielectric layers 111 and 10 inner electrodes 121 and 122 and taking the average, the average thickness of the dielectric layer 111 and the average thickness of the inner electrodes 121 and 122 may be made more general.
[0084] The outer electrodes 131 and 132 may be provided on the third surface 3 and the fourth surface 4 of the main body 110.
[0085] The outer electrodes 131 and 132 may be respectively provided on the third surface 3 and the fourth surface 4 of the main body 110, and may include a first outer electrode 131 and a second outer electrode 132 respectively connected to the first inner electrode 121 and the second inner electrode 122.
[0086] In an embodiment, the multilayer electronic component 100 may have two external electrodes 131 and 132, but the number or shape of the external electrodes 131 and 132 may vary according to the shape of the internal electrodes 121 and 122 or other purposes.
[0087] The external electrodes 131 and 132 may be formed of any conductive material such as a metal, and a specific material may be determined in consideration of electrical characteristics and structural stability, and the external electrodes 131 and 132 may have a multilayer structure.
[0088] For example, the external electrodes 131 and 132 may include an electrode layer provided on the main body 110 and a plating layer provided on the electrode layer.
[0089] For a more specific example of the electrode layers 131a and 132a, the electrode layers 131a and 132a may be fired electrodes including a conductive metal and glass, and / or resin electrodes including a conductive metal and a resin.
[0090] In addition, in the electrode layers 131a and 132a, a fired electrode and a resin electrode may be sequentially formed on the main body. In addition, the electrode layers 131a and 132a may be formed by transferring a sheet including a conductive metal to the main body, or may be formed by transferring a sheet including a conductive metal to the fired electrode.
[0091] A material having excellent conductivity may be used as the conductive metal included in the electrode layers 131a and 132a, and is not limited to any specific example. For example, the conductive metal may be one or more of nickel (Ni), copper (Cu), and their alloys.
[0092] The plating layers 131b and 132b may improve the mounting characteristics. The type of the plating layers 131b and 132b is not limited to any specific example, and may be a plating layer including one or more of Ni, Sn, Pd, and their alloys, and may be formed into multiple layers.
[0093] For a more specific example of the plating layers 131b and 132b, the plating layers 131b and 132b may be Ni plating layers or Sn plating layers, or may be Ni plating layers and Sn plating layers sequentially formed on the electrode layers 131a and 132a, or may be Sn plating layers, Ni plating layers, and Sn plating layers sequentially formed on the electrode layers 131a and 132a. In addition, the plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.
[0094] The size of the multilayer electronic component 100 is not limited to any specific example.
[0095] However, in order to achieve both miniaturization and high capacitance, it may be necessary to reduce the thickness of the dielectric layer and the internal electrodes to increase the number of stacked layers. Therefore, in the multilayer electronic component 100 having a size of 1005 (length × width, 1.0 mm × 0.5 mm) or smaller, the improvement effects of reliability and insulation resistance according to the embodiment may be prominent.
[0096] Therefore, considering manufacturing errors and the size of the external electrodes, when the length of the multilayer electronic component 100 is 1.1 mm or smaller and the width is 0.55 mm or smaller, the improvement effect of reliability according to the embodiment may be prominent. Here, the length of the multilayer electronic component 100 may refer to the size of the multilayer electronic component 100 in the second direction, and the width of the multilayer electronic component 100 may refer to the size of the multilayer electronic component 100 in the third direction.
[0097] (Experimental Example) Prepare a green sheet of ceramic including barium titanate (BaTiO3) as the main component and yttrium oxide (Y2O3), dysprosium oxide (Dy2O3), silicon oxide (SiO2), vanadium pentoxide (V2O5), and magnesium oxide (MgO) as sub-components. In this case, the sub-components are added to satisfy the content of each element in Table 1 below, and the content of each element in Table 1 below may refer to the number of moles of the corresponding element based on 100 moles of Ti.
[0098] Print a conductive paste for the internal electrodes on the green sheet of ceramic, stack and press the green sheets of ceramic to manufacture a laminate. Thereafter, manufacture a unit sheet by cutting the laminate into unit sheet sizes, first calcine the unit sheet in an air atmosphere at 400 °C for 12 hours, and then secondarily calcine it in an inert gas atmosphere at 850 °C for 4 hours. Thereafter, manufacture the main body by sintering at 1200 °C for 2 hours in a predetermined reducing atmosphere and performing an oxidation treatment in an O2 atmosphere. Thereafter, apply a Cu paste to the main body, and heat-treat the main body at 700 °C to form an external electrode, thereby manufacturing a sample sheet.
[0099] Measure BSi, GSi, and Tgb by performing line scan analysis on a cross-section in the first and second directions cut from the center of the main body in the third direction using a transmission electron microscope.
[0100] In a highly accelerated life test (HALT), apply a voltage of 100 V to the sample sheet of each test number at 150 °C, and measure the time until the insulation resistance becomes 1 / 1000 of the initial value.
[0101] [Table 1]
[0102] In Comparative Example 1, MRe / MSi and BSi / GSi do not satisfy the conditions of the examples, and HALT deteriorates.
[0103] In Comparative Example 2 and Comparative Example 3, BSi / GSi satisfies the conditions of the examples, but MRe / MSi does not satisfy the conditions of the examples, resulting in HALT deterioration.
[0104] In Comparative Example 4, MRe / MSi satisfies the conditions of the examples, but BSi / GSi does not satisfy the conditions of the examples, resulting in HALT deterioration.
[0105] In Invention Examples 1 to 3, 1.6 ≤ MRe / MSi ≤ 4.0 and 2.0 ≤ BSi / GSi are satisfied, resulting in excellent HALT.
[0106] Furthermore, for Invention Examples 1 to 3, it is ensured that the thickness of the grain boundary is greater than that of the grain boundaries in Comparative Examples 1 to 4.
[0107] According to the foregoing embodiments, by controlling the ratio of the rare earth element included in the dielectric layer to Si and the distribution of Si, the reliability of the multilayer electronic component can be improved.
[0108] The scope of the embodiments is not limited to specific embodiments. Instead, modifications, equivalents, and substitutions included in the disclosed concept and technical scope of this specification can be adopted. Throughout the specification, the same reference numerals are used for the same elements.
[0109] In the embodiments, the term "embodiment" does not refer to the same embodiment and can be provided to describe and emphasize the different unique features of each embodiment. The embodiments as proposed above can be implemented, but the possibility of combining the features with other embodiments is not excluded. For example, even if the features described in an embodiment are not described in other embodiments, unless otherwise stated, the description can be understood as being related to other embodiments.
[0110] Expressions used in the singular cover plural expressions unless they have a clearly different meaning in the context.
[0111] Although the embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations can be made without departing from the scope of the present disclosure defined by the appended claims.
Claims
1. A multi-layer electronic component, comprising: a main body including a dielectric layer and internal electrodes alternately arranged with the dielectric layer; and external electrodes provided on the main body, wherein the dielectric layer includes a plurality of crystal grains and grain boundaries disposed between adjacent crystal grains, wherein, in the dielectric layer, when the number of moles of a rare earth element based on 100 moles of Ti is defined as MRe, and the number of moles of Si based on 100 moles of Ti is defined as MSi, 1.6 ≤ MRe / MSi ≤ 4.0, and wherein, when the average content of Si included in the crystal grains is defined as GSi and the maximum value of the Si content at the grain boundaries is defined as BSi, 2.0 ≤ BSi / GSi.
2. The multi-layer electronic component according to claim 1, wherein, MRe is in the range of 0.1 mole to 6.0 moles.
3. The multi-layer electronic component according to claim 1, wherein, MSi is in the range of 1.0 mole to 3.5 moles.
4. The multilayer electronic component according to claim 1, wherein, GSi is in the range of 0.3 at% to 0.9 at%.
5. The multilayer electronic component according to claim 1, wherein, BSi is in the range of 1.5 at% to 3.5 at%.
6. The multilayer electronic component according to claim 1, wherein, The rare earth element includes one or more of Gd, La, Sm, Dy, Tb, Ho, Y, Yb, and Sc.
7. The multilayer electronic component according to claim 1, wherein, The rare earth elements include Dy and Y.
8. The multi-layer electronic component according to claim 1, wherein, The dielectric layer includes one or more of BaTiO3, (Ba 1-x Ca x )TiO3, Ba(Ti 1-y Ca y )O3, (Ba 1-x Ca x )(Ti 1-y Zr y )O3, and Ba(Ti 1-y Zr y )O3, where 0 < x < 1 and 0 < y < 1.
9. The multi-layer electronic component according to claim 1, Among them, the dielectric layer further includes a first secondary component, and wherein the first secondary component is one or more of V, Zr, Mn, Cr, Ti, Ni, Co, and W.
10. The multi-layer electronic component according to claim 9, wherein, The dielectric layer includes an amount of the first secondary component in the range of greater than or equal to 0.5 mole and less than or equal to 3.0 moles based on 100 moles of Ti.
11. The multi-layer electronic component according to claim 1, Among them, the dielectric layer further includes a second secondary component, and wherein the second secondary component is Mg.
12. The multilayer electronic component according to claim 11, wherein, The dielectric layer includes an amount of the second secondary component in the range of 0.1 mole to 3.0 moles based on 100 moles of Ti.
13. The multi-layer electronic component according to claim 1, wherein, When the average thickness of the grain boundaries is defined as Tgb, Tgb is 8.0 nm or greater.
14. The multilayer electronic component according to claim 13, wherein, Tgb satisfies 8.0 nm ≤ Tgb ≤ 15.0 nm.
15. The multi-layer electronic component according to claim 1, wherein, BSi and GSi satisfy 2.0 ≤ BSi / GSi ≤ 5.
0.
16. A dielectric material, comprising: BaTiO3-based dielectric crystal grains having grain boundaries therebetween, wherein, in the dielectric material, the ratio of the number of moles of a rare earth element based on 100 moles of Ti to the number of moles of Si based on 100 moles of Ti is in the range of 1.6 to 4.0, and the ratio of the maximum value of the Si content at the grain boundaries to the average content of Si in the BaTiO3-based dielectric crystal grains is greater than or equal to 2.
0.
17. The dielectric material according to claim 16, wherein, The number of moles of the rare earth element based on 100 moles of Ti is in the range of 0.1 to 6.0, and the number of moles of Si based on 100 moles of Ti is in the range of 1.0 to 3.
5.
18. The dielectric material according to claim 16, wherein, The average content of Si in the BaTiO3-based dielectric crystal grains is in the range of 0.3 at% to 0.9 at%.
19. The dielectric material according to claim 16, the dielectric material further includes an amount of a first secondary component in the range of greater than or equal to 0.5 mole and less than or equal to 3.0 moles based on 100 moles of Ti, Among them, The first secondary component is one or more of V, Zr, Mn, Cr, Ti, Ni, Co, and W.
20. The dielectric material according to claim 16, wherein the dielectric material further comprises a second secondary component, and the second secondary component comprises Mg.
Citation Information
Patent Citations
Earthquake proofing con, material, facility, measure, remicon, concrete, system and construction method
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