Heric inverter circuit and photovoltaic inverter

Abstract

The invention discloses a Helic inverter circuit and a photovoltaic inverter, and the Helic inverter circuit comprises a DC voltage module, a Helic high-frequency tube module, a Helic follow current loop module and an AC voltage module. The dynamic control parameter of the first high-frequency control switch during switching state conversion is different from the dynamic control parameter of the fourth high-frequency control switch during switching state conversion; and / or the dynamic control parameter of the second high-frequency control switch during switching state conversion is different from the dynamic control parameter of the third high-frequency control switch during switching state conversion. By setting the dynamic control parameter difference between the two high-frequency control switches which are arranged diagonally, the voltage change rate can be accurately adjusted, so that the peak voltage of the follow current tube is effectively inhibited, the damage phenomenon possibly caused by the fact that the follow current tube bears the overlarge peak voltage is avoided, the risk that the electromagnetic compatibility exceeds the standard is further reduced, and the service life of the follow current tube is prolonged. Meanwhile, high efficiency and high reliability are realized.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic inverters, and particularly to a Heric (Highly Efficient Reliable Inverter Concept, non-isolated photovoltaic inverter) inverter circuit and a photovoltaic inverter. Background Art

[0002] With the rapid development of new energy technologies, the application fields of light energy are expanding day by day, especially in single-phase photovoltaic inverters. Non-isolated single-phase photovoltaic inverters have gradually become the market mainstream due to their high efficiency and low cost. Among them, the Heric topology has been widely used because of its good leakage current suppression effect, as well as advantages such as high efficiency and high power density.

[0003] The Heric topology in related technologies adds two freewheeling switching tubes on the basis of the traditional full-bridge circuit to achieve better freewheeling characteristics. However, the problem of the freewheeling tube spike voltage has become a major technical bottleneck in its operation. Specifically, first, the spike voltage generated by the freewheeling tube will apply excessive voltage stress to the freewheeling tube. When it exceeds the breakdown voltage limit of the device, it may cause damage to the freewheeling tube, thus triggering a failure of the photovoltaic inverter and affecting the stability and reliability of the system. Second, the rapid voltage change rate (dv / dt) caused by the spike voltage will generate strong electromagnetic interference (EMI), resulting in the system not meeting the electromagnetic compatibility standard and possibly interfering with the normal operation of surrounding electronic devices. Finally, to suppress the spike voltage, an absorption circuit or other protection mechanisms need to be introduced, which will increase additional power losses and reduce the system efficiency.

[0004] In summary, the Heric topology circuit in related technologies has the technical problem of a relatively high spike voltage of the freewheeling switching tube. Summary of the Invention

[0005] The main object of the present invention is to provide a Heric inverter circuit and a photovoltaic inverter, aiming to at least solve the technical problem of a relatively high spike voltage of the freewheeling switching tube existing in the Heric topology circuit in related technologies.

[0006] To achieve the above object, the technical solution of the present invention is as follows:

[0007] In a first aspect of the present invention, a Heric inverter circuit is provided. The Heric inverter circuit includes a DC voltage module, a Heric high-frequency tube module, a Heric freewheeling loop module, and an AC voltage module connected in sequence;

[0008] The Heric high-frequency tube module includes a first branch and a second branch in a parallel relationship. The first branch includes a first high-frequency control switch and a second high-frequency control switch in a series relationship. The second branch includes a third high-frequency control switch and a fourth high-frequency control switch in a series relationship. The first high-frequency control switch and the fourth high-frequency control switch are diagonally arranged, and the second high-frequency control switch and the third high-frequency control switch are diagonally arranged;

[0009] Wherein, when the Heric inverter circuit performs a circuit state conversion, the dynamic control parameters when the first high-frequency control switch performs a switch state conversion are different from the dynamic control parameters when the fourth high-frequency control switch performs a switch state conversion, and / or the dynamic control parameters when the second high-frequency control switch performs a switch state conversion are different from the dynamic control parameters when the third high-frequency control switch performs a switch state conversion.

[0010] In a second aspect of the present invention, a photovoltaic inverter is provided, including an inverter main body and the Heric inverter circuit as described in the first aspect built in the inverter main body.

[0011] The Heric inverter circuit and the photovoltaic inverter of the present invention, through the difference in dynamic control parameters (for example, turn-on speed, turn-on timing) between the first high-frequency control switch and the fourth high-frequency control switch, and between the second high-frequency control switch and the third high-frequency control switch, enable the voltage change rate to be precisely adjusted during the circuit state conversion process, thereby effectively suppressing the freewheeling diode spike voltage, avoiding the damage phenomenon that may be caused by the freewheeling diode bearing excessive spike voltage, further reducing the risk of electromagnetic compatibility exceeding the standard, and compared with the traditional Heric topology, there is no need to additionally introduce an absorption circuit or increase high-voltage-resistant components, reducing the complexity and cost of the system while achieving high efficiency and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0013] Figure 1 It is a circuit connection schematic diagram of the Heric inverter circuit provided by the embodiment of the present application;

[0014] Figure 2 It is a circuit connection schematic diagram of the first switch drive module and the first high-frequency control switch in the Heric inverter circuit of the embodiment of the present application;

[0015] Figure 3 Schematic diagram of the circuit connection between the fourth switch driving module and the fourth high-frequency control switch in the Heric inverter circuit according to the embodiment of the present application;

[0016] Figure 4 Schematic diagram of the circuit connection between the second switch driving module and the second high-frequency control switch in the Heric inverter circuit according to the embodiment of the present application;

[0017] Figure 5 Schematic diagram of the circuit connection between the third switch driving module and the third high-frequency control switch in the Heric inverter circuit according to the embodiment of the present application;

[0018] Figure 6 Internal circuit schematic diagram when the high-frequency control switch in the Heric inverter circuit according to the embodiment of the present application is a MOS transistor.

[0019] The realization, functional characteristics and advantages of the object of the present invention will be further described with reference to the embodiments and the accompanying drawings. Detailed implementation manners

[0020] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0021] It should be noted that related terms such as "first", "second", etc. can be used to describe various components, but these terms do not limit the components. These terms are only used to distinguish one component from another. For example, without departing from the scope of the present invention, the first component can be called the second component, and similarly, the second component can also be called the first component. The term "and / or" refers to any combination of one or more of the related items and the described items.

[0022] In the related art, in order to solve the technical problem of the relatively high peak voltage of the freewheeling diode in the Heric topology circuit, the commonly used methods are to reduce the turn-on speed of the high-frequency transistor and deepen the peak absorption parameter of the freewheeling diode.

[0023] Although the above two solutions have improved the peak voltage of the freewheeling diode, they still have the following disadvantages:

[0024] (1) The high-frequency transistors in Heric are all in the hard-switching state. Reducing the turn-on speed of the high-frequency transistor will increase the turn-on loss of the high-frequency transistor, resulting in low system efficiency and the need to increase the heat dissipation capacity of the machine.

[0025] (2) Deepening the absorption parameter of the switching transistor will increase the power loss of the absorption circuit, which also results in low system efficiency. The additional absorption circuit will also increase the device cost and the need to consider the heat dissipation problem for the absorption circuit.

[0026] As described above, there is a technical bottleneck between improving system performance and controlling peak voltage in the related art, and it is difficult to achieve the best balance of high efficiency, low loss, and low cost.

[0027] The working principle of the Heric topology circuit with a freewheeling loop module and the reason for the generation of peak voltage will be specifically described below:

[0028] In addition, according to the working principle of the Heric topology, the high-frequency transistors on the diagonal and one of the freewheeling diodes are high-frequency complementary switches. Therefore, a dead time is also set for this pair of complementary switches. When the main power current switches from the freewheeling loop module to the Heric high-frequency transistor module, first, the driving signal of the freewheeling diode in this high-frequency complementary pair needs to be turned off to turn off the main channel of the freewheeling diode. Then, before the high-frequency transistor closes, that is, within the dead time, the main power current will still rely on the body diode of the freewheeling diode (the freewheeling diode uses MOSFET) or the diode integrated inside the freewheeling diode (the freewheeling diode uses IGBT). After the dead time ends, the diagonal high-frequency transistor starts to close until the channels of the diagonal switching transistors are completely closed. At this time, the current of the body diode or integrated diode of the freewheeling diode drops to zero, and the Heric high-frequency transistor module takes over the main power current of the freewheeling module. It is during the switching process of the main power current that if the two switching transistors on the diagonal in the high-frequency module close simultaneously, then the bus voltage will be applied across the two ends of the freewheeling diode. Due to the parasitic capacitance existing between the DS poles of the semiconductor device switching transistor (the freewheeling diode is MOSFET) or between the CE poles (the freewheeling diode is IGBT), plus the parasitic inductance in the circuit, there will be a resonant peak voltage applied across the two ends of the freewheeling diode. At the same time, due to the reverse recovery phenomenon existing in the body diode or integrated diode, a peak voltage will also be generated and superimposed across the two ends of the freewheeling diode. The peak voltages generated by these reasons are all affected by the voltage change rate across the two ends of the freewheeling diode, that is, the larger the dv / dt across the two ends of the freewheeling diode, the larger the generated peak voltage. The voltage change rate of the diagonal high-frequency transistor determines the voltage change rate across the two ends of the freewheeling diode. Moreover, the closing speed of semiconductor switching devices is usually very fast. Therefore, when the diagonal high-frequency transistors close simultaneously, the full bus voltage will be applied across the power ends of the freewheeling diode in a short time, resulting in a large peak voltage phenomenon. That is, the Heric topology circuit in the related art has problems such as excessive voltage stress on the freewheeling diode, and thus increased system losses, inability to meet electromagnetic compatibility standards, and reduced system efficiency.

[0029] To better solve the above technical problems, please refer to Figure 1 , an embodiment of the present application provides a Heric inverter circuit, which includes a DC voltage module 10, a Heric high-frequency transistor module 20, a Heric freewheeling loop module 30, and an AC voltage module 40 connected in sequence.

[0030] The Heric high-frequency tube module 20 includes a first branch and a second branch in a parallel relationship. The first branch includes a first high-frequency control switch Q1 and a second high-frequency control switch Q2 in a series relationship. The second branch includes a third high-frequency control switch Q3 and a fourth high-frequency control switch Q4 in a series relationship. The first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 are diagonally arranged, and the second high-frequency control switch Q2 and the third high-frequency control switch Q3 are diagonally arranged.

[0031] The working process of the Heric inverter circuit includes an input stage, a high-frequency conversion stage, and an output stage. In the input stage, a stable DC power supply is provided by the DC voltage module 10. In the high-frequency conversion stage, the DC voltage passes through the Heric high-frequency tube module 20, and each high-frequency control switch Q1, Q2, Q3, Q4 is switched according to a specific timing sequence to convert the DC voltage into a high-frequency AC signal. The freewheeling loop module 30 provides a freewheeling path for the inverter inductor. In the output stage, through the AC voltage module 40, the filtered high-frequency AC signal is converted into a standard AC voltage (such as 50Hz / 60Hz alternating current) and output to the load or the power grid.

[0032] Among them, the Heric inverter circuit includes at least two working states: a DC input state and an AC output state. In the DC input state, the inverter receives a DC power input and converts it into an AC output voltage through the control switch. In the AC output state, the inverter converts the change of the high-frequency switch signal into an AC current to drive the load or connect to the grid.

[0033] When the Heric inverter circuit performs a circuit state conversion (conversion between the AC output state and the DC input state), each high-frequency control switch also performs a switch state conversion. Here, it is preset that the dynamic control parameters when the first high-frequency control switch performs a switch state conversion are different from the dynamic control parameters when the fourth high-frequency control switch performs a switch state conversion, and / or the dynamic control parameters when the second high-frequency control switch performs a switch state conversion are different from the dynamic control parameters when the third high-frequency control switch performs a switch state conversion.

[0034] It should be noted here that "the dynamic control parameters when the first high-frequency control switch performs a switching state transition are different from those of the fourth high-frequency control switch when it performs a switching state transition, and / or, the dynamic control parameters when the second high-frequency control switch performs a switching state transition are different from those of the third high-frequency control switch when it performs a switching state transition." This includes multiple parallel implementation manners. The first implementation manner A is that "the dynamic control parameters when the first high-frequency control switch performs a switching state transition are different from those of the fourth high-frequency control switch when it performs a switching state transition", the second implementation manner B is that "the dynamic control parameters when the second high-frequency control switch performs a switching state transition are different from those of the third high-frequency control switch when it performs a switching state transition", and the third implementation manner C is "the above first implementation manner and the second implementation manner".

[0035] In the embodiments of the present application, through the difference in dynamic control parameters between the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4, and between the second high-frequency control switch Q2 and the third high-frequency control switch Q3, that is, two high-frequency switch tubes that turn on and off simultaneously on the diagonal line in the H-bridge circuit structure inside the Heric high-frequency tube module are set with different dynamic control parameters, so that during the state transition process of the circuit, the voltage change rate can be accurately adjusted, thereby effectively suppressing the peak voltage of the freewheeling diode in the Heric freewheeling loop module 30, avoiding the damage phenomenon that may be caused by the freewheeling diode bearing excessive peak voltage, further reducing the risk of electromagnetic compatibility exceeding the standard, and compared with the traditional Heric topology, there is no need to additionally introduce an absorption circuit or increase high-voltage withstand components, reducing the complexity and cost of the system while achieving high efficiency and high reliability.

[0036] In an alternative implementation manner of the embodiments of the present application, the dynamic control parameters include at least one of the turn-on speed and the turn-on timing.

[0037] Specifically, the dynamic control parameter can be the turn-on speed, or the turn-on timing, or the turn-on speed + the turn-on timing. Then there are multiple corresponding parallel implementation manners, which are as follows:

[0038] The first implementation manner is that "the turn-on speed of the first high-frequency control switch is different from that of the fourth high-frequency control switch".

[0039] The second implementation manner is that "the turn-on speed of the second high-frequency control switch is different from that of the third high-frequency control switch".

[0040] The third implementation manner is that "the turn-on speed of the first high-frequency control switch is different from that of the fourth high-frequency control switch, and the turn-on speed of the second high-frequency control switch is different from that of the third high-frequency control switch".

[0041] The fourth implementation mode is that "the turn-on timing of the first high-frequency control switch is different from that of the fourth high-frequency control switch".

[0042] The fifth implementation mode is that "the turn-on timing of the second high-frequency control switch is different from that of the third high-frequency control switch".

[0043] The sixth implementation mode is that "the turn-on timing of the first high-frequency control switch is different from that of the fourth high-frequency control switch, and the turn-on timing of the second high-frequency control switch is different from that of the third high-frequency control switch".

[0044] The seventh implementation mode is that "the turn-on timing and turn-on speed of the first high-frequency control switch are correspondingly different from those of the fourth high-frequency control switch".

[0045] The eighth implementation mode is that "the turn-on timing and turn-on speed of the second high-frequency control switch are correspondingly different from those of the third high-frequency control switch".

[0046] The ninth implementation mode is that "the turn-on timing and turn-on speed of the first high-frequency control switch are correspondingly different from those of the fourth high-frequency control switch, and the turn-on timing and turn-on speed of the second high-frequency control switch are correspondingly different from those of the third high-frequency control switch".

[0047] As can be seen from the above various implementation modes, the implementation modes of the diagonal high-frequency tubes in the embodiments of the present application that turn on at different speeds include not only "different turn-on speeds" but also "turn-on timing". Among them, the turn-on speed has a relatively greater impact on the effect of suppressing the peak voltage of the freewheeling diode, while the turn-on timing has a relatively smaller impact on the effect of suppressing the peak voltage of the freewheeling diode.

[0048] It should also be noted that in the related art, the diagonal high-frequency tubes turn on at the same speed, and the full bus voltage (the voltage provided by the DC voltage module) is all applied to the DS or CE ends of the freewheeling diode of the Heric freewheeling circuit module at once. However, the diagonal high-frequency tubes in the embodiments of the present application turn on at different speeds, which can significantly reduce the voltage change rate at both ends of the freewheeling diode DS or CE. Therefore, it is friendly to the resonant voltage of the freewheeling diode and the reverse recovery phenomenon of the body diode or integrated diode. Thus, it can suppress the peak voltage of the freewheeling diode of the Heric freewheeling circuit module. Compared with the traditional method of reducing the turn-on speed of the high-frequency tube and increasing the absorption parameter of the freewheeling diode, the effect of suppressing the peak voltage of the freewheeling diode is better, and it will not reduce the turn-on speed of the high-frequency tube and thus affect the efficiency.

[0049] In an alternative embodiment of the present embodiment, the first end of the first high-frequency control switch Q1 is electrically connected to the positive electrode of the DC voltage module 10 and the first end of the third high-frequency control switch Q3 at the same time. The second end of the first high-frequency control switch Q1 is electrically connected to the first end of the second high-frequency control switch Q2, the first end of the Heric freewheeling circuit module 30, and the first end of the AC voltage module 40 at the same time. The second end of the second high-frequency control switch Q2 is electrically connected to the negative electrode of the DC voltage module 10 and the second end of the fourth high-frequency control switch Q4 at the same time. The second end of the third high-frequency control switch Q3 is electrically connected to the first end of the fourth high-frequency control switch Q4, the second end of the Heric freewheeling circuit module 30, and the second end of the AC voltage module 40 at the same time. Among them, the first high-frequency control switch Q1, the second high-frequency control switch Q2, the third high-frequency control switch Q3, and the fourth high-frequency control switch Q4 can suppress the spike voltage generated by the switching tube in the Heric freewheeling circuit module 30 by setting different turn-on speeds and / or turn-on timings.

[0050] Specifically, each high-frequency switch is configured with a control terminal. After receiving the corresponding conduction or disconnection instruction, the control terminal performs the corresponding conduction and disconnection operations to control the connection state between the first end and the second end of the switching tube, so that the high-frequency switch realizes the conduction or disconnection state. By setting different turn-on speeds for the high-frequency switches, on the one hand, by precisely controlling the switching states and turn-on speeds of the high-frequency control switches, the Heric inverter circuit can efficiently perform power conversion under different working conditions, ensuring the stable operation of the system under various loads and input conditions. On the other hand, the differences in the turn-on speeds of the switches contribute to their coordinated operation, making the current switching of different branches (the first branch and the second branch) smoother, avoiding the impact during the switching of the high-frequency switches, reducing the transient process and voltage spikes in the circuit, and suppressing the spike voltage generated by the freewheeling switching tube.

[0051] In an alternative embodiment of the present embodiment, the Heric freewheeling circuit module 30 includes a first freewheeling switch tube Q5 and a second freewheeling switch tube Q6. The first end of the first freewheeling switch tube Q5 is electrically connected to the second end of the first high-frequency control switch Q1, the first end of the second high-frequency control switch Q2, and the first end of the AC voltage module 40 at the same time. The second end of the first freewheeling switch tube Q5 is electrically connected to the second end of the second freewheeling switch tube Q6. The first end of the second freewheeling switch tube Q6 is electrically connected to the second end of the third high-frequency control switch Q3, the first end of the fourth high-frequency control switch Q4, and the second end of the AC voltage module 40 at the same time.

[0052] Specifically, the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 suppress the spike voltage generated by the first freewheeling switch Q5 by setting different turn-on speeds and / or turn-on timings. The second high-frequency control switch Q2 and the third high-frequency control switch Q3 suppress the spike voltage of the second freewheeling switch Q6 by setting different turn-on speeds and / or turn-on timings. The corresponding principle is as follows: In the entire Heric inverter circuit, the first freewheeling switch Q5 and the second freewheeling switch Q6 are in different freewheeling paths. When the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 perform on or off operations (disconnecting or conducting, or state switching), they jointly affect the first freewheeling switch Q5 in the freewheeling path. Specifically, the operations of the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 directly change the voltage distribution and dynamic behavior across the first freewheeling switch Q5. Therefore, the spike voltage of the first freewheeling switch Q5 can be effectively suppressed. Correspondingly, the switching actions of the second high-frequency control switch Q2 and the third high-frequency control switch Q3 have a direct impact on the voltage change across the second freewheeling switch Q6. Therefore, by setting different turn-on speeds and / or turn-on timings of the second high-frequency control switch Q2 and the third high-frequency control switch Q3, the spike voltage of the second freewheeling switch Q6 can be correspondingly suppressed.

[0053] Please refer to Figure 2 and Figure 3 , the Heric inverter circuit further includes a first switch driving module ( Figure 2 ) and a fourth switch driving module ( Figure 3 ).

[0054] The first switch driving module is used to drive the first high-frequency control switch Q1, and the fourth switch driving module is used to drive the fourth high-frequency control switch Q4.

[0055] The first switch driving module includes an MCU module 201, a first PWM signal transmission module 202, and a first driving module 203 connected in sequence. The fourth switch driving module includes an MCU module 201, a fourth PWM signal transmission module 302, and a fourth driving module 303 connected in sequence.

[0056] Among them, when the first switch driving module ( Figure 2 ) and the fourth switch driving module ( Figure 3 ) are implemented, the MCU module 201 is used to generate high-frequency control signals, and these signals are transmitted to the first driving module 203 and the fourth driving module 303 in the form of pulse width modulation through the first PWM signal transmission module 202 and the fourth PWM signal transmission module 302. The driving module further drives the control operations of the corresponding first high-frequency control switch and fourth high-frequency control switch according to the transmitted signals.

[0057] Specifically, the driving parameters of the first driving device in the first driving module 203 are different from those of the fourth driving device in the fourth driving module 303, such that the turn-on speed of the first high-frequency control switch is different from that of the fourth high-frequency control switch. That is, through the setting of differentiated driving parameters, fine control of the turn-on speeds of the first high-frequency control switch and the fourth high-frequency control switch is achieved.

[0058] In the first driving module 203, it specifically includes a control IC chip, a first driving resistor Ron1, and a first driving capacitor Cgs1. The PWM input terminal of the control IC chip is electrically connected to the output terminal of the first PWM signal transmission module 202. The first output terminal of the control IC chip is electrically connected to the first end of the first driving resistor Ron1. The second end of the first driving resistor Ron1 is simultaneously electrically connected to the first end of the first driving capacitor Cgs1 and the control signal input terminal of the first high-frequency control switch. The second end of the first driving capacitor Cgs1 is simultaneously electrically connected to the reference terminal of the first high-frequency control switch and the second output terminal of the control IC chip. Correspondingly, in the fourth driving module 303, it specifically includes a control IC chip, a fourth driving resistor Ron2, and a fourth driving capacitor Cgs2. The PWM input terminal of the control IC chip is electrically connected to the output terminal of the fourth PWM signal transmission module 302. The first output terminal of the control IC chip is electrically connected to the first end of the fourth driving resistor Ron2. The second end of the fourth driving resistor Ron2 is simultaneously electrically connected to the first end of the fourth driving capacitor Cgs2 and the control signal input terminal of the fourth high-frequency switch tube Q8. The second end of the fourth driving capacitor Cgs2 is simultaneously electrically connected to the reference terminal of the fourth high-frequency switch tube Q8 and the second output terminal of the control IC chip.

[0059] Specifically, the first driving device in the first driving module 203 includes the first driving resistor Ron1 and / or the first driving capacitor Cgs1, and the fourth driving device in the fourth driving module 303 includes the fourth driving resistor Ron2 and / or the fourth driving capacitor Cgs2. The resistance value of the first driving resistor Ron1 is different from that of the fourth driving resistor Ron2, or the capacitance value of the first driving capacitor Cgs1 is different from that of the fourth driving capacitor Cgs2, or both the resistance and the capacitance are different. When the first driving module 203 and the fourth driving module 303 are driving, in the entire driving module, except for the different resistance values of the driving resistors and the different capacitance values of the driving capacitors, the other devices are the same. Therefore, through the setting of different resistance values of the driving resistors and different capacitance values of the driving capacitors, fine control of the turn-on and turn-off speeds of the first high-frequency control switch and the fourth high-frequency control switch is achieved, that is, correspondingly, the difference in the turn-on speeds of the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 is formed, and finally the spike voltage generated by the first freewheeling switch tube Q5 is suppressed.

[0060] In addition, it should also be noted that: in the embodiments of the present application, different driving resistors and different driving capacitor schemes are selected as examples for elaboration. There are also other schemes that can equally adjust the turn-on speed. For example, different driving voltages can also achieve this. At the same time, the RC time constant of the first driving module 203 can be different from the RC time constant of the fourth driving module 303 (that is, in the two driving modules being compared, the internal different resistors and capacitors may have the same product of the two time constants, one with a large resistor and a small capacitor, and the other with a small resistor and a large capacitor, but the turn-on speed will be the same).

[0061] Please refer to Figure 4 and Figure 5 , the Heric inverter circuit further includes a second switch driving module ( Figure 4 ) and a third switch driving module ( Figure 5 ).

[0062] The function of the second switch driving module is to drive the second high-frequency control switch Q2, and the third switch driving module is used to drive the third high-frequency control switch Q3.

[0063] The second switch driving module includes an MCU module 201, a second PWM signal transmission module 402, and a second driving module 403 connected in sequence. And the third switch driving module includes an MCU module 201, a third PWM signal transmission module 502, and a third driving module 503 connected in sequence.

[0064] Among them, when the second switch driving module ( Figure 4 ) and the third switch driving module ( Figure 5 ) are implemented, the MCU module 201 is used to generate high-frequency control signals. These signals are transmitted to the second driving module 403 and the third driving module 503 in the form of pulse width modulation through the second PWM signal transmission module 402 and the third PWM signal transmission module 502. The driving module further drives the control operations of the corresponding second high-frequency control switch Q2 and third high-frequency control switch Q3 according to the transmitted signals.

[0065] Specifically, the driving parameters of the second driving device in the second driving module 403 are different from the driving parameters of the third driving device in the third driving module 503, so that the turn-on speed of the second high-frequency control switch is different from the turn-on speed of the third high-frequency control switch. That is, by setting different driving parameters, the turn-on speed difference between the second high-frequency control switch Q2 and the third high-frequency control switch Q3 is achieved.

[0066] In the second driving module 403, it specifically includes a control IC chip, a second driving resistor Ron3, and a second driving capacitor Cgs3. The PWM input terminal of the control IC chip is electrically connected to the output terminal of the second PWM signal transmission module 402. The first output terminal of the control IC chip is electrically connected to the first end of the second driving resistor Ron3. The second end of the second driving resistor Ron3 is simultaneously electrically connected to the first end of the second driving capacitor Cgs3 and the control signal input terminal of the second high-frequency control switch. The second end of the second driving capacitor Cgs3 is simultaneously electrically connected to the reference terminal of the second high-frequency control switch and the second output terminal of the control IC chip. Correspondingly, in the third driving module 503, it specifically includes a control IC chip, a third driving resistor Ron4, and a third driving capacitor Cgs4. The PWM input terminal of the control IC chip is electrically connected to the output terminal of the third PWM signal transmission module 502. The first output terminal of the control IC chip is electrically connected to the first end of the third driving resistor Ron4. The second end of the third driving resistor Ron4 is simultaneously electrically connected to the first end of the third driving capacitor Cgs4 and the control signal input terminal of the third high-frequency control switch. The second end of the third driving capacitor Cgs4 is simultaneously electrically connected to the reference terminal of the third high-frequency switch Q10 and the second output terminal of the control IC chip.

[0067] Specifically, the second driving devices in the second driving module 403 include the second driving resistor Ron3 and / or the second driving capacitor Cgs3. The third driving devices in the third driving module 503 include the third driving resistor Ron4 and / or the third driving capacitor Cgs4. The resistance value of the second driving resistor Ron3 is different from that of the third driving resistor Ron4, or the capacitance value of the second driving capacitor Cgs3 is different from that of the third driving capacitor Cgs4, or both the resistance and the capacitance are different. When the second driving module 403 and the third driving module 503 are driving, in the entire driving module, except for the different resistance values of the driving resistors and the different capacitance values of the driving capacitors, the other devices are the same. Therefore, by setting the different resistance values of the driving resistors and the different capacitance values of the driving capacitors, the fine control of the turn-on speed and turn-off speed of the second high-frequency control switch and the third high-frequency control switch is realized, so as to ensure the difference in the turn-on speed between the second high-frequency control switch Q2 and the third high-frequency control switch Q3, that is, the difference in the turn-on speed between the second high-frequency control switch and the third high-frequency control switch is correspondingly formed, and finally the spike voltage generated by the second freewheeling switch Q6 is suppressed.

[0068] In addition, it should be noted that: in the embodiments of the present application, different driving resistors and different driving capacitor schemes are selected as examples for illustration. There are other schemes that can also adjust the turn-on speed, for example, different driving voltages can also achieve this; at the same time, the RC time constant of the second driving module can be different from the RC time constant of the third driving module (that is, in the two driving modules being compared, the internal different resistors and capacitors may have the same two time constants, one with a large resistor and a small capacitor, and the other with a small resistor and a large capacitor, but the product is the same, and the turn-on speed will be the same).

[0069] Please return to and refer to Figure 2 and Figure 3 As shown in FIGS. 2 and 3, the first PWM signal transmission module 202 includes a first transmission resistor R1 and a first transmission capacitor C3. The first end of the first transmission resistor R1 is electrically connected to the output end of the MCU module 201. The second end of the first transmission resistor R1 is simultaneously electrically connected to the input end of the first driving module 203 and the first end of the first transmission capacitor C3. The second end of the first transmission capacitor C3 is grounded. Correspondingly, the fourth PWM signal transmission module 302 includes a fourth transmission resistor R2 and a fourth transmission capacitor C4. The first end of the fourth transmission resistor R2 is electrically connected to the output end of the MCU module 201. The second end of the fourth transmission resistor R2 is simultaneously electrically connected to the input end of the fourth driving module 303 and the first end of the fourth transmission capacitor C4. The second end of the fourth transmission capacitor C4 is grounded. Among them, the RC parameter between the first transmission resistor R1 and the first transmission capacitor C3 is the product of R1 and C3, and the RC parameter between the fourth transmission resistor R2 and the fourth transmission capacitor C4 is the product of R2 and C4. The RC parameter between the first transmission resistor R1 and the first transmission capacitor C3 is different from the RC parameter between the fourth transmission resistor R2 and the fourth transmission capacitor C4, so that the turn-on timing of the first high-frequency control switch is different from the turn-on timing of the fourth high-frequency control switch.

[0070] Specifically, in the first PWM signal transmission module 202 and the fourth PWM signal transmission module 302, different RC values can be used to control the charge and discharge time constants of the PWM signal. For example: a larger RC value will cause an increase in the charge and discharge time constant of the signal, thereby introducing a more significant signal delay; on the contrary, a smaller RC value will shorten the signal delay time. Thus, by designing different RC parameters in different PWM signal transmission modules, the asynchronous turn-on (asynchronous turn-off and conduction) of the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 is further controlled, and finally the spike voltage generated by the first freewheeling switch tube Q5 is suppressed.

[0071] Please refer to Figure 4 and Figure 5, the second PWM signal transmission module 402 includes a second transmission resistor R3 and a second transmission capacitor C5. The first end of the second transmission resistor R3 is electrically connected to the output end of the MCU module 201. The second end of the second transmission resistor R3 is simultaneously electrically connected to the input end of the second drive module 403 and the first end of the second transmission capacitor R3. The second end of the second transmission capacitor C5 is grounded; correspondingly, the third PWM signal transmission module 502 includes a third transmission resistor R4 and a third transmission capacitor C6. The first end of the third transmission resistor R4 is electrically connected to the output end of the MCU module 201. The second end of the third transmission resistor R4 is simultaneously electrically connected to the input end of the third drive module 503 and the first end of the third transmission capacitor C6. The second end of the third transmission capacitor C6 is grounded. The RC parameters between the second transmission resistor R3 and the second transmission capacitor C5 are different from the RC parameters between the third transmission resistor R4 and the third transmission capacitor C6, so that the turn-on timing of the second high-frequency control switch is different from the turn-on timing of the third high-frequency control switch.

[0072] Among them, the RC parameter refers to the product between the resistor and the capacitor. Specifically, in the second PWM signal transmission module 402 and the third PWM signal transmission module 502, different RC values can be used to control the charge and discharge time constant of the PWM signal. For example: a larger RC value will cause an increase in the charge and discharge time constant of the signal, thereby introducing a more significant signal delay; on the contrary, a smaller RC value will shorten the signal delay time. Thus, by differentiating the design of the RC parameters in different PWM signal transmission modules, the second high-frequency control switch Q2 and the third high-frequency control switch Q3 are enabled to turn on asynchronously (disconnect and conduct asynchronously), and finally the spike voltage generated by the second freewheeling switch tube Q6 is suppressed.

[0073] In an alternative embodiment of this embodiment, a delay time is set between the PWM signal of the first high-frequency control switch and the PWM signal of the fourth high-frequency control switch, and / or a delay time is set between the PWM signal of the second high-frequency control switch and the PWM signal of the third high-frequency control switch.

[0074] Specifically, for the MCU module 201, it can be controlled internally by software configuration or a hardware timer. When generating a drive signal, a certain time offset is introduced, so that different signals are generated by different output pins of an MCU module and are transmitted to the corresponding PWM signal transmission module at different times. That is, the PWM signal transmission module transmits the corresponding PWM signal to the corresponding drive module at different times, so that there is a delay time between the PWM signal of the first high-frequency control switch and the PWM signal of the fourth high-frequency control switch. That is, the first high-frequency control switch and the fourth high-frequency control switch are asynchronously controlled by software, and accordingly, the asynchronous disconnection or asynchronous conduction of the first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 is realized, and finally the spike voltage generated by the first freewheeling switch tube Q5 is suppressed.

[0075] Similarly, for the MCU module 401, it can also be controlled internally by software configuration or a hardware timer. When generating an MCU signal, a certain time offset is introduced, so that there is a delay time between the PWM signal of the second high-frequency control switch and the PWM signal of the third high-frequency control switch, realizing asynchronous control of the second high-frequency switch tube Q9 and the third high-frequency switch tube Q10, and accordingly, the asynchronous disconnection or asynchronous conduction of the second high-frequency control switch Q2 and the third high-frequency control switch Q3 is realized, and finally the spike voltage generated by the second freewheeling switch tube Q6 is suppressed.

[0076] It should be noted that for Q1, Q2, Q3, Q4, Q5, Q6 in the embodiments of the present application, according to the actual usage scenario, IGBT type switch tubes or MOSFET type switch tubes (including silicon MOSFET, silicon carbide MOSFET, gallium nitride MOSFET) can be selected.

[0077] Please refer to Figure 6 , which shows the internal structure of the high-frequency control switches (Q1, Q2, Q3, Q4). When the high-frequency control switch is a MOS tube, there is an equivalent internal drive resistance R inside its gate g_int , and there are parasitic capacitances C gs , C gd , C ds between the three pins of the MOS tube gate G, source S, and drain D pairwise. And generally, for MOS tubes, it is defined that C RSS = C gd , C ISS = C gs + C gd , C OSS = C gd + C ds .

[0078] Please go back and refer to Figure 2 andFigure 3 , R g_ext C is the driving resistor placed on the external driving circuit of the MOS tube. gs_ext It is the capacitor placed outside the MOS tube at both ends of G and S. If the switch tube here is an IGBT, then there will be an external drive resistor R g_ext and external drive capacitor C ge_ext .

[0079] Specifically, the MOS tube also includes the following relationship:

[0080] (1)V gs is the driving voltage of the MOS tube, and V gs From 0V to the MOS tube turn-on threshold voltage V gs_th The first time t1 is:

[0081]

[0082] (2) V gs_mil is the voltage value of the Miller platform driven by the MOS tube, and the driving voltage V gs From 0V to V gs_mil The second time t2 is:

[0083]

[0084] (3)Q gd is the charge between the gate and drain of the MOS tube, V ds is the voltage across the MOS tube DS, I D The MOS tube conducts the current flowing through both ends of DS, R ds _ on is the on-resistance of the MOS tube, then the maintenance time t3 of the driving voltage at the Miller platform is:

[0085]

[0086] or:

[0087]

[0088] (4) When the MOSFET driving voltage reaches the Miller platform voltage, the corresponding drain-source voltage Vds of the MOS tube begins to decrease. During the period when the driving voltage is maintained at the Miller platform, the Vds of the MOS tube continues to decrease until its Vds voltage approaches 0V at the end of the Miller platform. At this time, the MOS tube is turned on.

[0089] In an alternative embodiment of the present application, the diagonal high-frequency tube is made to have different turn-on speeds to achieve the effect of suppressing the peak voltage of the freewheeling diode. Combining steps (1) to (4), it can be seen that only by setting the t2 time of one of the MOS transistors in the two switching transistors in a diagonal position relationship to exceed the total time of t2 + t3 of the other MOS transistor can the effect of suppressing the peak voltage of the freewheeling diode be achieved. Because although the two MOS transistors start to turn on at the same time, their turn-on speeds are different. When the driving voltage of one of the MOS transistors has ended the maintenance time t3 of the Miller plateau, the Vds of this MOS transistor is close to 0V at this time. However, the other MOS transistor has just reached the Miller plateau voltage at time t2, and at this moment, the Vds of this MOS transistor is just about to drop. Thus, different turn-on rates of the diagonal MOS transistors are achieved, and finally, the effect of suppressing the peak voltage of the Heric freewheeling diode is achieved.

[0090] It can be seen that by making the two MOS transistors on the diagonal of the Heric high-frequency module 20 correspond to their respective external driving resistors R g_ext , external capacitors C gs_ext , driving voltages V gs , internal driving resistors R g_int , internal capacitors C iss , internal capacitors C oss , internal charge amounts Q gd , Miller plateau voltages V gs_mil These circuit parameters are set, and as long as one or more different parameter combinations of these driving circuits satisfy the condition that the time t2 of one MOS transistor is greater than the total time of t2 + t3 of the other MOS transistor, the effect of suppressing the peak voltage of the Heric freewheeling diode can be achieved.

[0091] In summary of the above embodiments, the present application designs the external driving parameters (different driving capacitance values and different driving resistance values) of the two high-frequency control switches arranged diagonally to achieve different turn-on speeds of the two high-frequency control switches, and realizes the asynchronous conduction and disconnection (different turn-on timings) of the two high-frequency control switches through different RC parameters of the PWM signal transmission modules of the two high-frequency control switches, and realizes the asynchronous conduction and disconnection of the two high-frequency control switches through different generation speeds of the MCU signals inside the two high-frequency control switches, so as to finally suppress the peak voltage generated by the switching transistors in the Heric freewheeling loop module 30.

[0092] In the above embodiment, the specific working principle is: making the high-frequency tubes on the diagonal turn on at different speeds, for example Figure 1The first high-frequency control switch Q1 and the fourth high-frequency control switch Q4 in it turn on at different speeds, the second high-frequency control switch Q2 and the third high-frequency control switch Q3 turn on at different speeds. Among the two high-frequency transistors on the diagonal, one has a relatively fast turn-on speed and the other has a relatively slow turn-on speed. Then the switch transistor with a fast turn-on speed closes first, while the other switch transistor is still in the off state or is in the process of turning on. At the same time, due to the conduction of the body diode or integrated diode of the freewheeling diode (Q5, Q6), the DS ends or CE ends of the freewheeling diode will be short-circuited, making the voltage across its two ends very small, close to the conduction voltage drop of the diode. When the current in the freewheeling diode is zero, the voltage across the DS or CE ends of the high-frequency transistor with a fast turn-on speed will drop to a relatively low value or even close to 0V. Since the current change rate in the switch transistor is very high during the turn-on operation, and the current on the same line is equal, a very large current change rate di / dt will also exist on the line. Parasitic inductances exist on the line connecting the positive pole of the bus to the high-frequency transistor module, the line connecting the negative pole of the bus to the high-frequency transistor module, the line connecting the Heric high-frequency transistor module to the Heric freewheeling circuit module, the line connecting the switch transistors inside the high-frequency transistor module, and the line connecting the switch transistors inside the freewheeling module. These parasitic inductances L will generate an induced voltage U L, due to the bus voltage clamping effect, the total line voltage remains unchanged. Most of the remaining voltage, except for the induced voltage on the line parasitic inductance, is applied across the high-frequency transistors that turn on slowly and are on the same diagonal line until the current in the slowly turning-on high-frequency transistors rises from 0 A to the steady state, completing the switching of the main power current of the system from the freewheeling loop to the high-frequency transistor loop. At this time, the current change rate on the entire line will decrease significantly, resulting in the induced voltage on the line parasitic inductance no longer rising and then decreasing to 0 V. At this moment, since the current in the freewheeling diode drops to 0 A, the voltage across the DS or CE terminals of the freewheeling diode begins to build up. And the voltage applied across the DS or CE terminals of the freewheeling diode at this time is less than half of the bus voltage induced by the line parasitic inductance. Then until the voltage across the slowly turning-on high-frequency transistors also begins to drop, and the decreasing voltage is applied to the freewheeling diode. However, the voltage applied to the freewheeling diode at this time starts with an induced voltage lower than half of the bus voltage and then is the slowly decreasing voltage of the slowly turning-on high-frequency transistors. Compared with the circuit where the high-frequency transistors on the diagonal of the Heric high-frequency module turn on at the same speed, the voltage applied to the freewheeling diodes (Q5, Q6) is very low and is added slowly later, rather than applying the full bus voltage all at once across the DS or CE terminals of the freewheeling diodes as the high-frequency transistors on the diagonal turn on at the same speed. Therefore, the present patented technology can reduce the dv / dt across the DS terminals of the freewheeling diodes, which is friendly to the resonant voltage of the freewheeling diodes (Q5, Q6) and the reverse recovery phenomenon of the body diodes or integrated diodes. So it can play a role in suppressing the spike voltage of the freewheeling diodes. Compared with the traditional method of reducing the turning-on speed of the high-frequency transistors and increasing the absorption parameters of the freewheeling diodes, the effect of suppressing the spike voltage of the freewheeling diodes is better, and it will not affect the turning-on speed of the high-frequency transistors, that is, the efficiency, too much.

[0093] The embodiment of the present application also provides a photovoltaic inverter, including an inverter main body and a Heric inverter circuit as described in the above embodiment built in the inverter main body.

[0094] Through the Heric inverter circuit and the photovoltaic inverter provided by the embodiment of the present application, due to the difference in the turning-on speeds between the first high-frequency control switch and the fourth high-frequency control switch, and between the second high-frequency control switch and the third high-frequency control switch, during the state conversion process of the circuit, the voltage change rate can be precisely adjusted, thereby effectively suppressing the spike voltage of the freewheeling diodes, avoiding the damage phenomenon that may be caused by the freewheeling diodes suffering from excessive spike voltage, further reducing the risk of electromagnetic compatibility exceeding the standard, and compared with the traditional Heric topology, there is no need to additionally introduce an absorption circuit or increase high-voltage withstand components, reducing the complexity and cost of the system while achieving high efficiency and high reliability.

[0095] In the above embodiments, the descriptions of each embodiment have their own focuses. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0096] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of the present invention.

Claims

1. A Heric inverter circuit, characterized in that, The described Heric inverter circuit includes a DC voltage module, a Heric high-frequency tube module, a Heric freewheeling loop module, and an AC voltage module that are connected in sequence; The Heric high-frequency tube module includes a first branch and a second branch in a parallel relationship. The first branch includes a first high-frequency control switch and a second high-frequency control switch in a series relationship. The second branch includes a third high-frequency control switch and a fourth high-frequency control switch in a series relationship. The first high-frequency control switch and the fourth high-frequency control switch are diagonally arranged, and the second high-frequency control switch and the third high-frequency control switch are diagonally arranged; Among them, when the Heric inverter circuit performs a circuit state conversion, the dynamic control parameters when the first high-frequency control switch performs a switching state conversion are different from the dynamic control parameters when the fourth high-frequency control switch performs a switching state conversion, and / or the dynamic control parameters when the second high-frequency control switch performs a switching state conversion are different from the dynamic control parameters when the third high-frequency control switch performs a switching state conversion.

2. The Heric inverter circuit according to claim 1, wherein, The dynamic control parameters include at least one of the turn-on speed and the turn-on timing.

3. The Heric inverter circuit according to claim 2, characterized in that, The first end of the first high-frequency control switch is electrically connected to the positive pole of the DC voltage module and the first end of the third high-frequency control switch at the same time. The second end of the first high-frequency control switch is electrically connected to the first end of the second high-frequency control switch, the first end of the Heric freewheeling loop module, and the first end of the AC voltage module at the same time. The second end of the second high-frequency control switch is electrically connected to the negative pole of the DC voltage module and the second end of the fourth high-frequency control switch at the same time. The second end of the third high-frequency control switch is electrically connected to the first end of the fourth high-frequency control switch, the second end of the Heric freewheeling loop module, and the second end of the AC voltage module at the same time; The first high-frequency control switch and the fourth high-frequency control switch suppress the spike voltage of the switch tube in the Heric freewheeling loop module by setting different turn-on speeds and / or turn-on timings; The second high-frequency control switch and the third high-frequency control switch suppress the spike voltage of the switch tube in the Heric freewheeling loop module by setting different turn-on speeds and / or turn-on timings.

4. The Heric inverter circuit according to claim 3, wherein, The Heric freewheeling loop module includes a first freewheeling switch tube and a second freewheeling switch tube. The first end of the first freewheeling switch tube is electrically connected to the second end of the first high-frequency control switch, the first end of the second high-frequency control switch, and the first end of the AC voltage module at the same time. The second end of the first freewheeling switch tube is electrically connected to the second end of the second freewheeling switch tube. The first end of the second freewheeling switch tube is electrically connected to the second end of the third high-frequency control switch, the first end of the fourth high-frequency control switch, and the second end of the AC voltage module at the same time; The first high-frequency control switch and the fourth high-frequency control switch suppress the spike voltage generated by the first freewheeling switch tube by setting different turn-on speeds and / or turn-on timings. The second high-frequency control switch and the third high-frequency control switch suppress the spike voltage of the second freewheeling switch tube by setting different turn-on speeds and / or turn-on timings.

5. The Heric inverter circuit according to claim 4, wherein The Heric inverter circuit further includes a first switch driving module and a fourth switch driving module; The first switch driving module is used to drive the first high-frequency control switch, and the fourth switch driving module is used to drive the fourth high-frequency control switch; The first switch driving module includes an MCU module, a first PWM signal transmission module, and a first driving module connected in sequence; The fourth switch driving module includes an MCU module, a fourth PWM signal transmission module, and a fourth driving module connected in sequence; Wherein, the driving parameters of the first driving device in the first driving module are different from those of the fourth driving device in the fourth driving module, so that the turn-on speed of the first high-frequency control switch is different from that of the fourth high-frequency control switch.

6. The Heric inverter circuit according to claim 5, characterized in that, The Heric inverter circuit further includes a second switch driving module and a third switch driving module; The second switch driving module is used to drive the second high-frequency control switch, and the third switch driving module is used to drive the third high-frequency control switch; The second switch driving module includes an MCU module, a second PWM signal transmission module, and a second driving module connected in sequence; The third switch driving module includes an MCU module, a third PWM signal transmission module, and a third driving module connected in sequence; Wherein, the driving parameters of the second driving device in the second driving module are different from those of the third driving device in the third driving module, so that the turn-on speed of the second high-frequency control switch is different from that of the third high-frequency control switch.

7. The Heric inverter circuit according to claim 5, characterized in that, The first driving device includes a first driving resistor and / or a first driving capacitor, and the fourth driving device includes a fourth driving resistor and / or a fourth driving capacitor; The second driving device includes a second driving resistor and / or a second driving capacitor, and the third driving device includes a third driving resistor and / or a third driving capacitor.

8. The Heric inverter circuit according to claim 5, wherein The first PWM signal transmission module includes a first transmission resistor and a first transmission capacitor. The first end of the first transmission resistor is electrically connected to the output end of the MCU module. The second end of the first transmission resistor is simultaneously electrically connected to the input end of the first driving module and the first end of the first transmission capacitor. The second end of the first transmission capacitor is grounded; The fourth PWM signal transmission module includes a fourth transmission resistor and a fourth transmission capacitor. The first end of the fourth transmission resistor is electrically connected to the output end of the MCU module. The second end of the fourth transmission resistor is simultaneously electrically connected to the input end of the fourth driving module and the first end of the fourth transmission capacitor. The second end of the fourth transmission capacitor is grounded; Among them, the RC parameters between the first transmission resistor and the first transmission capacitor are different from the RC parameters between the fourth transmission resistor and the fourth transmission capacitor, so that the turn-on timing of the first high-frequency control switch is different from the turn-on timing of the fourth high-frequency control switch; The second PWM signal transmission module includes a second transmission resistor and a second transmission capacitor. The first end of the second transmission resistor is electrically connected to the output end of the MCU module. The second end of the second transmission resistor is simultaneously electrically connected to the input end of the second drive module and the first end of the second transmission capacitor. The second end of the second transmission capacitor is grounded; The third PWM signal transmission module includes a third transmission resistor and a third transmission capacitor. The first end of the third transmission resistor is electrically connected to the output end of the MCU module. The second end of the third transmission resistor is simultaneously electrically connected to the input end of the third drive module and the first end of the third transmission capacitor. The second end of the third transmission capacitor is grounded; Among them, the RC parameters between the second transmission resistor and the second transmission capacitor are different from the RC parameters between the third transmission resistor and the third transmission capacitor, so that the turn-on timing of the second high-frequency control switch is different from the turn-on timing of the third high-frequency control switch.

9. The Heric inverter circuit according to claim 2, wherein A delay time is set between the PWM signal of the first high-frequency control switch and the PWM signal of the fourth high-frequency control switch, and / or a delay time is set between the PWM signal of the second high-frequency control switch and the PWM signal of the third high-frequency control switch.

10. A photovoltaic inverter, characterized in that, It includes an inverter main body and the Heric inverter circuit according to any one of claims 1 to 9 built in the inverter main body.

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