Silicon optical chip and 800G 2*DR4 optical engine

Abstract

A first side edge of the silicon optical chip is provided with a first input waveguide and a plurality of first output waveguides, a second side edge of the silicon optical chip is provided with a second input waveguide, the second input waveguide is coupled with an MPD, and a third side edge of the silicon optical chip is provided with a second output waveguide; the first input waveguide splits light into the second output waveguide, and other light is split into the plurality of first output waveguides at an equal ratio. According to the 800G 2 * DR4 optical engine, two silicon optical chips are distributed side by side and adjacently, and a second output waveguide of one silicon optical chip is coupled with a second input waveguide of the other silicon optical chip. The beneficial effects are that when light enters the first input waveguides of the two silicon optical chips, the MPD of one silicon optical chip has light current, and the MPD of the other silicon optical chip does not have light current, the two silicon optical chips can be distinguished, and by monitoring the high-low temperature and the light current change condition during long-term work of the MPD, the real-time monitoring of the MPD can be realized, and the real-time monitoring of the MPD can be realized. And whether relative displacement exists between the two silicon optical chips can be known.

Description

Technical Field

[0001] The present invention relates to the technical field of optical engines, and particularly relates to a silicon photonics chip and an 800G 2×DR4 optical engine. Background Art

[0002] To ensure the yield and compatibility with 400G DR4 silicon photonics chips, traditional 800G 2×DR4 optical engines are made of two 400G DR4 silicon photonics chips. The structure is as Figure 1 shown, which includes: two 400G DR4 silicon photonics chips, two optical transmitting ends, and two multi-channel fiber arrays. Each 400G DR4 silicon photonics chip has an input waveguide and four output waveguides. The input waveguide is coupled to the input of a first 1×2 coupler. The two outputs of the first 1×2 coupler are each coupled to the input of a second 1×2 coupler. The two outputs of each second 1×2 coupler are each coupled to an output waveguide through an MZM modulator. The first 1×2 coupler and the two second 1×2 couplers all split light in equal proportion, so that the light entering the input waveguide is split into four output waveguides in an equal ratio. Each optical transmitting end is coupled to the input waveguide of a 400G DR4 silicon photonics chip, and each multi-channel fiber array is coupled to the four output waveguides of a 400G DR4 silicon photonics chip. The optical transmitting end includes: a laser chip, a collimating lens, an optical isolator, and a focusing lens that are sequentially coupled along the light propagation direction. The focusing lens is coupled to the input waveguide, and the laser chip is located on a ceramic heat sink. The defect of this type of 800G 2×DR4 optical engine is that the module firmware cannot distinguish between the two silicon photonics chips, which is disadvantageous for performance debugging, monitoring, etc. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a silicon photonics chip and an 800G 2×DR4 optical engine to overcome the above deficiencies in the prior art.

[0004] The technical solution of the present invention to solve the above technical problems is as follows: A silicon photonics chip has a first side, a second side and a third side adjacent to the first side and distributed in a relative form. A first input waveguide and a plurality of first output waveguides are provided on the first side. A second input waveguide is provided on the second side. The second input waveguide is coupled to an MPD. A second output waveguide is provided on the third side. The first input waveguide splits part of the light to the second output waveguide, and the other light is split into a plurality of first output waveguides in an equal ratio.

[0005] The beneficial effects of the present invention are as follows: When this type of silicon photonics chip is applied to an 800G 2×DR4 optical engine, since the two silicon photonics chips have the same structure, and the two silicon photonics chips are arranged side by side and adjacent to each other, and the second output waveguide of one of the two silicon photonics chips is coupled to the second input waveguide of the other silicon photonics chip, when light enters the first input waveguides of the two silicon photonics chips, there will be a photocurrent in the MPD of one of the silicon photonics chips, while there is no photocurrent in the MPD of the other silicon photonics chip. Thus, the firmware can distinguish the two silicon photonics chips. In addition, by monitoring the change of the photocurrent of the MPD at high and low temperatures and during long-term operation, it can be clearly known whether there is a relative displacement between the two silicon photonics chips, thereby effectively monitoring the product reliability.

[0006] Based on the above technical solutions, the present invention can be further improved as follows.

[0007] Further, there are multiple mark points on the upper surface of the silicon photonics chip.

[0008] The beneficial effect of adopting the above is that the two silicon photonics chips can be aligned and pasted at the mark points to ensure that the two silicon photonics chips can be accurately coupled.

[0009] Furthermore, the multiple mark points on the upper surface of the silicon photonics chip are arranged in rows along the direction parallel to the first side edge.

[0010] Further, 2% of the light in the first input waveguide is split to the second output waveguide.

[0011] Further, the number of the first output waveguides is four.

[0012] Further, the first input waveguide is coupled to the input of a first 1×2 coupler, the two outputs of the first 1×2 coupler are respectively coupled to the inputs of a second 1×2 coupler, and the two outputs of each second 1×2 coupler are respectively coupled to a first output waveguide through an MZM modulator.

[0013] Based on the above technical solutions, the present invention also provides an 800G 2×DR4 optical engine, including: two silicon photonics chips, the two silicon photonics chips are arranged side by side and adjacent to each other, and the second output waveguide of one of the silicon photonics chips is coupled to the second input waveguide of the other silicon photonics chip.

[0014] The further beneficial effects are as follows: Since the two silicon photonics chips have the same structure, and the two silicon photonics chips are arranged side by side and adjacent to each other, and the second output waveguide of one of the two silicon photonics chips is coupled to the second input waveguide of the other silicon photonics chip, when light enters the first input waveguides of the two silicon photonics chips, there will be a photocurrent in the MPD of one of the silicon photonics chips, while there is no photocurrent in the MPD of the other silicon photonics chip. Thus, the firmware can distinguish the two silicon photonics chips. In addition, by monitoring the change of the photocurrent of the MPD at high and low temperatures and during long-term operation, it is possible to clearly know whether there is a relative displacement between the two silicon photonics chips, thereby effectively monitoring the product reliability.

[0015] Further, the first input waveguide of each silicon photonics chip is coupled to a light emitting end respectively.

[0016] Further, the light emitting end includes: a laser chip, a collimating lens, an optical isolator, and a focusing lens that are coupled in sequence along the light propagation direction. The focusing lens is coupled to the first input waveguide, and the laser chip is located on a ceramic heat sink.

[0017] Further, each of the multiple first output waveguides of each silicon photonics chip is coupled to a multi-channel fiber array respectively. Description of the Drawings

[0018] Figure 1 is a structural diagram of an 800G 2×DR4 optical engine in the prior art; Figure 2 is a structural diagram of the silicon photonics chip in the present invention; Figure 3 is a structural diagram of an 800G 2×DR4 optical engine in the present invention.

[0019] In the drawings, the list of components represented by each reference numeral is as follows: 1. Silicon photonics chip, 110. First input waveguide, 120. First output waveguide, 130. Second input waveguide, 140. MPD, 150. Second output waveguide, 160. Mark point, 170. First 1×2 coupler, 180. Second 1×2 coupler, 190. MZM modulator, 2. Light emitting end, 210. Laser chip, 220. Collimating lens, 230. Optical isolator, 240. Focusing lens, 250. Ceramic heat sink, 3. Multi-channel fiber array. Detailed Embodiments

[0020] The principles and features of the present invention are described below with reference to the drawings. The examples given are only used to explain the present invention and are not intended to limit the scope of the present invention.

[0021] Example 1 As Figure 2As shown, a silicon photonic chip has a first side, a second side, and a third side. The second side and the third side are adjacent to the first side, and the second side and the third side are distributed in a relative form. There is a first input waveguide 110 and multiple first output waveguides 120 on the first side. There is a second input waveguide 130 on the second side, and the second input waveguide 130 is coupled to the MPD 140. There is a second output waveguide 150 on the third side. The first input waveguide 110 splits part of the light towards the second output waveguide 150, and the other light is split towards the multiple first output waveguides 120 in a geometric progression. Usually, the first input waveguide 110 splits 1% - 3% of the light towards the second output waveguide 150. For example, the first input waveguide 110 splits 2% of the light towards the second output waveguide 150, and the other 98% of the light is split towards the multiple first output waveguides 120 in a geometric progression.

[0022] When this type of silicon photonic chip is applied to an 800G 2×DR4 optical engine, since the structures of the two silicon photonic chips 1 are the same, and the two silicon photonic chips 1 are arranged side by side and adjacent to each other, and the second output waveguide 150 of one of the two silicon photonic chips 1 (denoted as silicon photonic chip A) is coupled to the second input waveguide 130 of the other silicon photonic chip 1 (denoted as silicon photonic chip B). When light enters the first input waveguides 110 of the two silicon photonic chips 1, there will be a photocurrent in the MPD 140 of one of the silicon photonic chips 1, and there will be no photocurrent in the MPD 140 of the other silicon photonic chip 1 (the principle is that after light enters the first input waveguide 110 of silicon photonic chip A, the first input waveguide 110 will split part of the light towards the second output waveguide 150. Since the second output waveguide 150 of silicon photonic chip A is coupled to the second input waveguide 130 of silicon photonic chip B, light will enter the second input waveguide 130 of silicon photonic chip B and be monitored by the MPD 140 of silicon photonic chip B, so that there will be a photocurrent in the MPD 140 of silicon photonic chip B). Thus, the firmware can distinguish the two silicon photonic chips 1. In addition, by monitoring the change of the photocurrent of the MPD 140 at high and low temperatures and during long-term operation, it is possible to clearly know whether there is a relative displacement between the two silicon photonic chips 1, thereby effectively monitoring the product reliability.

[0023] Embodiment 2 As Figure 2 shown, this embodiment is a further improvement based on Embodiment 1, specifically as follows: The upper surface of the silicon photonics chip 1 has a plurality of mark points 160. The term "plurality" can refer to two, three, four, five, six, etc. In the accompanying drawings shown here, there are four. Of course, four is just an exemplary expression, and the quantity can be adjusted during actual application. The two silicon photonics chips 1 are exactly the same, and mark points 160 are designed on the silicon photonics chip 1. The two silicon photonics chips 1 are pasted with the mark points 160 aligned. Since the silicon photonics chip 1 is cut from a wafer and has a uniform thickness, it is only necessary to ensure that the pasting accuracy is within ±10 μm.

[0024] Furthermore, the plurality of mark points 160 on the upper surface of the silicon photonics chip 1 are distributed in rows along the direction parallel to the first side edge.

[0025] Embodiment 3 As Figure 2 shown, this embodiment is a further improvement based on Embodiment 1 or 2, and the specific content is as follows: The first input waveguide 110 can be designed to split 2% of the light to the second output waveguide 150. Of course, this is just an exemplary expression here, and in actual application, it does not exclude splitting other proportions of light to the second output waveguide 150, such as 1%, 3%, etc.

[0026] Embodiment 4 As Figure 2 shown, this embodiment is a further improvement based on any one of Embodiments 1 to 3, and the specific content is as follows: The number of the first output waveguides 120 is preferably four. At this time, this type of silicon photonics chip is a 400G DR4 silicon photonics chip.

[0027] Furthermore, the first input waveguide 110 is coupled to the input of a first 1×2 coupler 170. The two outputs of the first 1×2 coupler 170 are each coupled to the input of a second 1×2 coupler 180, that is, there are two second 1×2 couplers 180. The two outputs of each second 1×2 coupler 180 are each coupled to a first output waveguide 120 through an MZM modulator 190, that is, there are four MZM modulators 190. The first 1×2 coupler 170 and the two second 1×2 couplers 180 all split the light in equal proportion, so as to realize that the light entering the first input waveguide 110 is split to the four first output waveguides 120 in an equal ratio form.

[0028] Embodiment 5 As Figure 2 、 Figure 3As shown in the figure, an 800G 2×DR4 optical engine includes: two silicon photonics chips 1 as described in any one of Embodiments 1 to 4. The two silicon photonics chips 1 are arranged side by side and adjacent to each other, and the second output waveguide 150 of one of the two silicon photonics chips 1 is coupled to the second input waveguide 130 of the other silicon photonics chip 1.

[0029] Since the two silicon photonics chips 1 have the same structure, and the two silicon photonics chips 1 are arranged side by side and adjacent to each other, and the second output waveguide 150 of one of the two silicon photonics chips 1 (denoted as silicon photonics chip A) is coupled to the second input waveguide 130 of the other silicon photonics chip 1 (denoted as silicon photonics chip B). When light enters the first input waveguides 110 of the two silicon photonics chips 1, there will be a photocurrent in the MPD 140 of one of the silicon photonics chips 1, while there is no photocurrent in the MPD 140 of the other silicon photonics chip 1 (the principle is that: after light enters the first input waveguide 110 of silicon photonics chip A, the first input waveguide 110 will split part of the light towards the second output waveguide 150, and since the second output waveguide 150 of silicon photonics chip A is coupled to the second input waveguide 130 of silicon photonics chip B, so there will be light entering the second input waveguide 130 of silicon photonics chip B and being monitored by the MPD 140 of silicon photonics chip B, thus enabling the MPD 140 of silicon photonics chip B to have a photocurrent). Therefore, the firmware can distinguish the two silicon photonics chips 1. In addition, by monitoring the change of the photocurrent of the MPD 140 at high and low temperatures and during long-term operation, it is possible to clearly know whether there is a relative displacement between the two silicon photonics chips 1, thereby effectively monitoring the product reliability.

[0030] Embodiment 6 As Figure 3 shown in the figure, this embodiment is a further improvement based on Embodiment 5, specifically as follows: The first input waveguide 110 of each silicon photonics chip 1 is coupled to a light emitting end 2 respectively, that is, the light emitted by each light emitting end 2 is coupled into the first input waveguide 110 of a silicon photonics chip 1.

[0031] Furthermore, the light emitting end 2 includes: a laser chip 210, a collimating lens 220, an optical isolator 230, and a focusing lens 240 that are coupled in sequence along the light propagation direction. The focusing lens 240 is coupled to the first input waveguide 110, and the laser chip 210 is located on a ceramic heat sink 250, that is, the light emitted by the laser chip 210 is coupled into the first input waveguide 110 of the silicon photonics chip 1 after passing through the collimating lens 220, the optical isolator 230, and the focusing lens 240 in sequence.

[0032] The multiple first output waveguides 120 of each silicon photonics chip 1 are each coupled to a multi-channel fiber array 3.

[0033] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A silicon photonics chip, characterized in that, It has a first side, a second side and a third side that are adjacent to the first side and distributed in a relative form. A first input waveguide (110) and a plurality of first output waveguides (120) are provided on the first side. A second input waveguide (130) is provided on the second side. The second input waveguide (130) is coupled to an MPD (140). A second output waveguide (150) is provided on the third side. The first input waveguide (110) splits part of the light to the second output waveguide (150), and the other light is split to the plurality of first output waveguides (120) in a geometric progression.

2. A silicon photonic chip according to claim 1, wherein There are a plurality of mark points (160) on its upper surface.

3. The silicon photonic chip according to claim 2, characterized in that, The plurality of mark points (160) on its upper surface are distributed in rows along a direction parallel to the first side.

4. A silicon photonics chip according to claim 1, characterized in that The first input waveguide (110) splits 2% of the light to the second output waveguide (150).

5. A silicon photonics chip according to claim 1, wherein, The number of the first output waveguides (120) is four.

6. A silicon photonics chip according to claim 1, characterized in that, The first input waveguide (110) is coupled to the input of a first 1×2 coupler (170). The two outputs of the first 1×2 coupler (170) are respectively coupled to the inputs of a second 1×2 coupler (180). The two outputs of each second 1×2 coupler (180) are respectively coupled to a first output waveguide (120) via an MZM modulator (190).

7. An 800G 2×DR4 optical engine, characterized in that, Comprising: Two silicon photonics chips (1) as described in any one of claims 1 to 6. The two silicon photonics chips (1) are arranged side by side and adjacent to each other, and the second output waveguide (150) of one silicon photonics chip (1) is coupled to the second input waveguide (130) of the other silicon photonics chip (1).

8. An 800G 2×DR4 optical engine according to claim 7, characterized in that, The first input waveguide (110) of each silicon photonics chip (1) is respectively coupled to an optical emission end (2).

9. The 800G 2×DR4 optical engine according to claim 8, wherein, The optical emission end (2) includes: a laser chip (210), a collimating lens (220), an optical isolator (230) and a converging lens (240) that are sequentially coupled along the light propagation direction. The converging lens (240) is coupled to the first input waveguide (110), and the laser chip (210) is located on a ceramic heat sink (250).

10. An 800G 2×DR4 optical engine according to claim 7, wherein, The plurality of first output waveguides (120) of each silicon photonics chip (1) are respectively coupled to a multi-channel fiber array (3).

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