Method and device for preparing substrate comprising silicon carbide layer

Abstract

The invention relates to the technical field of semiconductors, and discloses a method and device for preparing a substrate containing a silicon carbide layer. A method of preparing a substrate including a silicon carbide layer includes forming an atmosphere including a carbide gas around a substrate including a surface silicon layer, and heating the substrate including the surface silicon layer to cause the surface silicon layer to generate a silicon carbide layer.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and particularly to a method and apparatus for preparing a substrate including a silicon carbide layer. Background Art

[0002] Currently, SiC single crystals are commonly used commercially as substrates for manufacturing wide-bandgap semiconductor devices. Then, a SiC epitaxial layer is grown on the SiC single-crystal substrate to further fabricate power devices such as Schottky diodes and MOSFETs; or a GaN epitaxial layer is grown on the SiC single-crystal substrate to further fabricate microwave radio-frequency devices. Compared with Si, SiC has 10 times the breakdown field strength, 2 - 3 times the bandgap width, 2 times the electron saturation drift rate, and 2 - 3 times the cooling capacity.

[0003] However, the preparation of 4H-SiC or 6H-SiC single-crystal substrates that can be commercially applied is difficult and costly. On the one hand, SiC ingots are very sensitive to process conditions. Even a slight fluctuation in conditions will result in a large number of defects and a large number of low-quality SiC ingots. On the other hand, defects are also easily generated during the processing of SiC ingot cutting, polishing, etc. The product yield is low and the cost is high.

[0004] To reduce the cost of SiC substrates, there are mainly two routes:

[0005] One route is to epitaxially grow a SiC thin film on a Si substrate to obtain a SiC / Si composite substrate. Compared with 4H-SiC or 6H-SiC, although the 3C-SiC single crystal, another crystal form of SiC material, cannot be obtained by traditional crystal growth processes, it can be prepared on a silicon wafer. Compared with developing larger-diameter 4H-SiC or 6H-SiC wafers, preparing 3C-SiC on a silicon wafer has the potential to more quickly expand the wafer size and can greatly reduce the preparation cost of SiC single-crystal substrates.

[0006] Currently, the CVD method is generally used to prepare 3C-SiC on a silicon wafer. However, due to the large lattice mismatch between Si and SiC, crystal defects will be caused in the obtained SiC thin film. To ensure the quality of 3C-SiC, there are certain requirements for the thickness of 3C-SiC. Only when the thickness reaches a certain value, such as more than 1 um, can the crystal quality improve. However, after the thickness increases, the large thermal mismatch between Si and SiC will cause problems such as cracking and warping during the cooling process after the SiC is prepared. Therefore, it is difficult to form high-quality 3C-SiC on Si in the prior art.

[0007] Another route is to bond a high-quality single-crystalline SiC layer and a low-quality SiC layer to obtain a composite substrate, or to obtain a composite SiC substrate by directly growing a polycrystalline SiC layer on a high-quality SiC layer. This approach can reduce the usage cost of high-quality single-crystalline SiC materials, but still requires the use of a certain amount of high-quality single-crystalline SiC. Summary of the Invention

[0008] The present disclosure provides a method for preparing a substrate comprising a silicon carbide layer, comprising:

[0009] forming an atmosphere containing a carbide gas around a substrate comprising a surface silicon layer, and

[0010] heating the substrate comprising a surface silicon layer to cause the surface silicon layer to form a silicon carbide layer.

[0011] The present disclosure provides an apparatus for preparing a substrate comprising a silicon carbide layer, comprising:

[0012] a housing including an accommodation space;

[0013] an air inlet provided on the housing for introducing a carbide gas into the accommodation space;

[0014] an air outlet provided on the housing; and

[0015] a gas-permeable chamber assembly provided in the accommodation space for placing at least one substrate comprising a surface silicon layer. Description of the Drawings

[0016] To more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only one embodiment of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0017] Figure 1 A schematic structural diagram of an apparatus for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0018] Figure 2 A photograph of a substrate comprising a silicon carbide layer prepared by the method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0019] Figure 3 A reflection high-energy electron diffraction (RHEED) image of a substrate comprising a silicon carbide layer prepared by the method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0020] Figure 4Show the X-ray diffraction (XRD) test results of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0021] Figure 5 Show an optical microscope photograph of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0022] Figure 6 Show an AFM (atomic force microscope) scan of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0023] Figure 7 Show an SEM (scanning electron microscope) image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0024] Figure 8 Show a partially enlarged SEM image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0025] Figure 9 Show an optical microscope photograph of a silicon-based silicon carbide patterned substrate with surface holes somewhat suppressed, prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0026] Figure 10 Show an AFM scan of a substrate comprising a silicon carbide layer with surface holes somewhat suppressed, prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0027] In the above figures, each reference numeral respectively represents:

[0028] 100 - Device for preparing a substrate comprising a silicon carbide layer

[0029] 110 - Outer shell

[0030] 111 - Accommodating space

[0031] 120 - Inlet

[0032] 130 - Outlet

[0033] 140 - Permeable chamber assembly

[0034] 141 - Graphite box

[0035] 14101 - Bearing step

[0036] 14102 - Stacking step

[0037] 14103 - Silicon powder placement area

[0038] 141a - Graphite bottom box

[0039] 141b - Graphite elevation box

[0040] 142 - Lid

[0041] 200 - Substrate including a surface silicon layer Detailed implementation manners

[0042] Some embodiments of the present disclosure will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only exemplary embodiments of the present disclosure, rather than all embodiments.

[0043] In the description of the present disclosure, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings. These are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present disclosure. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. In the description of the present disclosure, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", "coupled" should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the communication inside two elements. In the description of the present disclosure, the distal end or the far side refers to the end or side that penetrates into the vacuum environment (for example, the vacuum chamber), and the proximal end or the near side is the end or side opposite to the distal end or the far side (for example, the end or side away from the vacuum chamber, or the end or side near the vacuum chamber wall inside the vacuum chamber, etc.). For those of ordinary skill in the art, the specific meanings of the above terms in the present disclosure can be understood according to specific situations.

[0044] A method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure may include: forming an atmosphere containing a carbide gas around the substrate including a surface silicon layer, and heating the substrate including a surface silicon layer to cause the surface silicon layer to generate a silicon carbide layer.

[0045] In some embodiments of the present disclosure, the method for preparing a substrate comprising a silicon carbide layer may further include evacuating the air around the substrate comprising a surface silicon layer, and then introducing a carbide-containing gas. For example, the substrate comprising a surface silicon layer may be placed in a vacuum furnace, the air may be evacuated, and then the carbide-containing gas may be supplied to form an atmosphere of the carbide-containing gas around the substrate comprising a surface silicon layer and form a certain air pressure. Subsequently, by heating the substrate comprising a surface silicon layer, a silicon carbide (3C-SiC) layer is formed on the surface silicon layer.

[0046] In some embodiments of the present disclosure, the surface silicon layer in the substrate comprising a surface silicon layer is a single crystal silicon layer.

[0047] In some embodiments of the present disclosure, the substrate comprising a surface silicon layer may be a silicon wafer or a silicon polished wafer. The silicon wafer may include any crystal plane (such as 111 crystal plane, 100 crystal plane, 110 crystal plane, etc.), silicon wafers of any size, or may also be a substrate comprising a surface silicon layer obtained by depositing or bonding a silicon layer on the surface of other matrix materials. The techniques that can be used for depositing a silicon layer on the surface of the matrix material include but are not limited to: vapor phase epitaxy, liquid phase epitaxy, sol-gel method, plasma chemical vapor deposition method, and methods such as molecular beam epitaxy, magnetron sputtering, vacuum arc evaporation, and ion beam sputtering. The method for bonding a silicon layer on the surface of the matrix material will be introduced in detail later.

[0048] Those skilled in the art can understand that the matrix material does not participate in the process of forming silicon carbide on the surface silicon layer. The selection of the matrix material is mainly limited by its melting point. The matrix material includes but is not limited to sapphire, quartz, graphite, tungsten, iron, titanium, platinum, zirconium, molybdenum, corundum, metal carbide, various steels and alloys, ceramics, cermets, etc.

[0049] In some embodiments of the present disclosure, the surface silicon layer in the substrate comprising a surface silicon layer includes a Si(111) crystal plane.

[0050] In some embodiments of the present disclosure, while the surface Si layer provides Si atoms for the generated SiC layer, it also continuously leaves vacancies in the Si matrix due to the formation of SiO gas. These nano-scale vacancies continuously increase and accumulate into micron-scale silicon point vacancies, forming silicon point vacancies at the interface between silicon and silicon carbide. These silicon point vacancies significantly reduce the total contact area between the SiC layer and the Si layer, making the obtained SiC composite substrate have a certain elasticity, which is beneficial to the stress release of the substrate-film lattice mismatch and suitable for the epitaxial growth of more semiconductor materials. For example, crack-free AlN and GaN samples can be obtained.

[0051] The method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure may include: pre-annealing after heating the substrate comprising a surface silicon layer, while evacuating the generated silicon vapor from the reaction zone.

[0052] In some embodiments of the present disclosure, the method for preparing a substrate comprising a silicon carbide layer may further include evacuating the air around the substrate comprising a surface silicon layer, and then pre-annealing the substrate comprising a surface silicon layer after heating. For example, the substrate comprising a surface silicon layer may be placed in a vacuum furnace, and after evacuating the air, pre-annealing is performed at a certain temperature (e.g., 1200 - 1400 °C).

[0053] In some embodiments of the present disclosure, pre-annealing under vacuum conditions forms a large number of thermal vacancies in the near-surface region of the silicon crystal, so that before chemical vacancies are formed in the interaction between the carbide-containing gas and Si, the surface silicon layer already contains a large number of non-equilibrium thermal vacancies. In this region, the chemical bonds inside the silicon are strongly weakened, the silicon lattice is in an unstable state, and the gas can easily penetrate into the silicon. Thus, a relatively thick SiC layer, such as 0.5 - 5 μm, can be obtained.

[0054] In some embodiments of the present disclosure, the carbide-containing gas includes carbon monoxide and / or carbon dioxide, or a mixed gas of carbon monoxide and / or carbon dioxide and an inert gas.

[0055] In some embodiments of the present disclosure, the carbide-containing gas may include only carbon monoxide (CO), or only carbon dioxide (CO2), or a mixed gas of carbon monoxide and carbon dioxide, or a mixed gas of carbon monoxide and an inert gas (such as nitrogen, argon, etc.), or a mixed gas of carbon dioxide and an inert gas, or a mixed gas of carbon monoxide, carbon dioxide and an inert gas. For example, by mass fraction, the carbide-containing gas includes 45% carbon monoxide, 50% argon and 5% nitrogen.

[0056] In some embodiments of the present disclosure, the atmosphere of the carbide-containing gas may further include a silicon-containing gas.

[0057] The silicon atoms in the silicon-containing gas can prevent the surface evaporation of silicon atoms during the formation of silicon carbide, and can achieve high crystallinity perfection of SiC and the absence of defects such as etch pits.

[0058] In some embodiments of the present disclosure, forming the atmosphere of the carbide-containing gas includes: heating silicon powder to generate a silicon-containing gas; and / or introducing a silicon-containing gas into the substrate comprising a surface silicon layer.

[0059] In some embodiments of the present disclosure, the silicon-containing gas includes but is not limited to silane (SiH4) and / or disilane (Si2H6) and / or trichlorosilane (SiHCl3).

[0060] In some embodiments of the present disclosure, silicon powder can be heated only to generate silicon-containing gas, so as to avoid the use of dangerous silicon-containing gases such as silane. And after silicon carbide is formed on the surface silicon layer, the surface of the silicon carbide can be etched with silicon vapor to further improve the quality of the silicon carbide surface, because silicon and silicon carbide can react: Si + SiC = Si2C, and the vapor pressure of Si2C is higher than that of SiC, which is beneficial to subsequent epitaxial growth.

[0061] In addition, heating silicon powder only to generate silicon-containing gas not only simplifies the process but also can achieve the purpose of automatically balancing the vapor pressure on the surface of the silicon wafer. The chemical reaction formula for preparing the silicon carbide film is Si + CO = SiO + SiC. Excessively high silicon vapor pressure will prevent the silicon carbide formation reaction from proceeding, but too low silicon vapor pressure will cause the generation of surface holes. In some embodiments of the present disclosure, by heating silicon powder only to generate silicon-containing gas, since the silicon powder has a larger surface area than the substrate including the surface silicon layer, at the same temperature, the silicon vapor pressure generated by the silicon powder is slightly higher than the vapor pressure on the surface of the substrate including the surface silicon layer, so that the silicon evaporation on the surface of the substrate including the surface silicon layer can be inhibited, and the generation of holes can be inhibited. At the same time, because at the same temperature, the vapor pressure of Si is much lower than that of SiO, the silicon carbide formation reaction will not be hindered due to excessively high silicon vapor pressure.

[0062] In some embodiments of the present disclosure, the ambient air pressure around the substrate including the surface silicon layer is controlled at 10 - 800 Pa; heating the substrate including the surface silicon layer includes heating the ambient temperature of the substrate including the surface silicon layer to 950 - 1400 °C to form silicon carbide on the surface silicon layer.

[0063] In some embodiments, the ambient air pressure around the substrate including the surface silicon layer can be controlled, for example, at 20 - 100 Pa, 70 - 250 Pa, 200 - 600 Pa, 100 Pa, 300 Pa, etc. In some embodiments, heating the substrate including the surface silicon layer includes heating the ambient temperature of the substrate including the surface silicon layer to, for example, 950 - 1200 °C, 1000 - 1300 °C, 1200 - 1400 °C, etc. to form silicon carbide on the surface silicon layer.

[0064] At a lower pressure, such as less than 10 Pa, and a lower temperature, such as less than 950 °C, the rate of forming silicon carbide on the surface silicon layer is very low, and almost no silicon carbide will be formed. At higher pressures and temperatures, such as a pressure higher than 800 Pa and a temperature higher than 1400 °C, the rate of forming silicon carbide on the surface silicon layer is too high, so that the silicon carbide film has a blocky structure.

[0065] In some embodiments of the present disclosure, pre-annealing after heating the substrate including a surface silicon layer comprises: placing the substrate in a vacuum furnace, evacuating the air, heating the substrate including the surface silicon layer to 1200 - 1400 °C, and maintaining for 1 - 150 minutes under a pressure of < 25 Pa, along with extracting the generated silicon vapor from the reaction zone. After pre-annealing, a carbide-containing gas is supplied into the vacuum furnace to form an atmosphere of the carbide-containing gas around the substrate including the surface silicon layer, causing silicon carbide to be formed on the surface silicon layer.

[0066] In some embodiments, the substrate including the surface silicon layer can be heated to, for example, 1200 - 1300 °C, 1250 - 1400 °C, 1300 °C, 1350 °C, etc., and maintained for 1 - 150 minutes under pressures of < 10 Pa, < 5 Pa, < 1 Pa, < 0.1 Pa, etc., along with extracting the generated silicon vapor from the reaction zone. After pre-annealing, a carbide-containing gas is supplied into the vacuum furnace to form an atmosphere of the carbide-containing gas around the substrate including the surface silicon layer, causing silicon carbide to be formed on the surface silicon layer.

[0067] In some embodiments of the present disclosure, the thickness of the SiC layer will depend on the evaporation rate of silicon, and the evaporation rate of silicon is determined by temperature, vacuum degree, and reaction time. At temperatures below 1200 °C, the evaporation rate of silicon will not be very high, so the thickness of the SiC layer will not be very large either. If the evaporated silicon is not extracted, it will quickly diffuse back from the surface and the vacancies will be "healed".

[0068] Figure 1 FIG. 100 shows a schematic structural diagram of a device 100 for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0069] As Figure 1 shown, the device 100 for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure may include a housing 110, an inlet 120, an outlet 130, and a permeable chamber assembly 140. The housing 110 may include a receiving space 111. The inlet 120 is disposed on the housing 110 for introducing a carbide-containing gas into the receiving space 111. The outlet 130 is disposed on the housing 110. The permeable chamber assembly 140 is disposed in the receiving space 111 for placing at least one substrate 200 including a surface silicon layer.

[0070] In some embodiments of the present disclosure, the receiving space 111 can be evacuated to a pressure of < 25 Pa. For example, in some embodiments, the receiving space 111 can be evacuated to a pressure of ≤ 20 Pa, or evacuated to a pressure of ≤ 5 Pa, or evacuated to a pressure of 10 - 2 Pa.

[0071] In some embodiments of the present disclosure, the breathable chamber assembly 140 may further include at least one graphite box 141 for placing at least one substrate 200 including a surface silicon layer.

[0072] In some embodiments of the present disclosure, at least one graphite box 141 may include a plurality of stacked graphite boxes. For example, it may include eight stacked graphite boxes as Figure 1 shown. Those skilled in the art can understand that although Figure 1 only eight graphite boxes are shown, at least one graphite box 141 may further include other numbers of graphite boxes.

[0073] In some embodiments of the present disclosure, the graphite box 141 may include a flange or a bearing step 14101 formed on the inner wall, a stacking step 14102 formed on the outer wall of the bottom, and a silicon powder placement area 14103. The flange or the bearing step 14101 formed on the inner wall is used to bear the substrate 200 including the surface silicon layer. The stacking step 14102 formed on the outer wall of the bottom is used for stacking with adjacent graphite boxes. The silicon powder placement area 14103 is used for placing silicon powder. For example, for the eight stacked graphite boxes as Figure 1 shown, each graphite box may include a flange or a bearing step 14101 formed on the inner wall, a stacking step 14102 formed on the outer walls of the bottom and the top, and a silicon powder placement area 14103.

[0074] In some embodiments of the present disclosure, the silicon powder placement area 14103 may be provided at the bottom of the graphite box.

[0075] As Figure 1 shown, in some embodiments of the present disclosure, the breathable chamber assembly 140 may further include a lid 142 provided on the top of at least one graphite box 141.

[0076] As Figure 1 shown, in some embodiments of the present disclosure, the lid 142 may be provided on the top of the topmost stacked graphite box among the plurality of stacked graphite boxes. For example, it may be adapted to the stacking step 14102 on the top of the topmost stacked graphite box, and the lid 142 is provided on the stacking step 14102 on the top of the topmost stacked graphite box. However, this is only exemplary, and those skilled in the art can understand that the lid 142 can also be placed in other ways.

[0077] As Figure 1As shown, in some embodiments of the present disclosure, at least one graphite box 141 includes a graphite bottom box 141a and a graphite elevation box 141b. The upper end of the graphite bottom box 141a includes a bearing step 14101 for bearing the substrate 200 including a surface silicon layer. The lower end of the graphite elevation box 141b includes a step adapted to the bearing step 14101 for stacking on the graphite bottom box 141a without affecting the substrate 200 including a surface silicon layer. For example, the upper end of the graphite bottom box 141a includes a Z-shaped bearing step 14101, and the lower end of the graphite elevation box 141b includes a small Z-shaped step with a height less than that of the Z-shaped bearing step 14101. The small Z-shaped step can be stacked on the graphite bottom box 141a while leaving a placement space for the substrate 200 including a surface silicon layer. Those skilled in the art can understand that it is only exemplary that at least one graphite box 141 includes a graphite bottom box 141a and a graphite elevation box 141b, and at least one graphite box 141 can also be integrally formed.

[0078] The apparatus for preparing a substrate including a silicon carbide layer according to any embodiment of the present disclosure can be used to prepare a substrate including a silicon carbide layer.

[0079] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may include the following steps:

[0080] Step 1: Make the accommodation space inside the housing of the apparatus for preparing a substrate including a silicon carbide layer a vacuum environment, heat it to a temperature T1, for example, 900 °C, so that the internal air pressure P1 of the apparatus for preparing a substrate including a silicon carbide layer is less than 0.1 Pa. The surface of the substrate including a surface silicon layer in the air-permeable chamber is in the silicon vapor pressure generated by high-purity silicon powder at the bottom of the air-permeable chamber, and surface deoxidation is achieved at a relatively low temperature, which is beneficial to suppressing defects formed by high-temperature deoxidation;

[0081] Step 2: Continue to heat to a temperature T2, for example, 1000 °C - 1300 °C, and introduce a carbide-containing gas (such as CO gas) to convert the silicon on the surface into silicon carbide (2Si + CO = SiO + SiC). The silicon vapor generated by the silicon powder is greater than the silicon evaporation amount on the surface of the single-crystal silicon wafer, effectively suppressing the generation of holes on the silicon surface;

[0082] Step 3: Stop introducing the carbide-containing gas (such as CO gas) to complete the conversion of silicon carbide.

[0083] In some embodiments, since pure silicon is extremely prone to forming SiO2 after being exposed to the atmosphere, surface deoxidation treatment is first required. In some embodiments, the temperature can be first raised from room temperature to 300 °C, and the internal air pressure P1 of the device for preparing the substrate including the silicon carbide layer is made less than 0.02 Pa (if the air pressure is greater than 0.02 Pa, then maintain 300 °C until the air pressure is less than 0.02 Pa), continue to heat up to 900 °C, and make the internal air pressure P1 of the device for preparing the substrate including the silicon carbide layer less than 0.1 Pa (if the air pressure at 900 °C is greater than 0.1 Pa, then continue to maintain 900 °C until the air pressure is less than 0.1 Pa). Since the substrate including the surface silicon layer in the permeable chamber is exposed to the silicon vapor pressure, through the reaction of Si + SiO2 = 2SiO, it is beneficial to inhibit the defects formed by high-temperature deoxidation, and surface deoxidation can be achieved at a relatively low temperature.

[0084] In some embodiments, a carbide-containing gas (such as CO gas) can be introduced at a flow rate of 10 - 50 sccm to raise the air pressure to 70 - 250 Pa. After the air pressure in the device is stabilized, continue to heat the inside of the device to a temperature of 1000 °C - 1300 °C and maintain it at this air pressure and temperature for a certain period of time, such as 5 - 60 minutes. The silicon on the surface will gradually be converted into silicon carbide (2Si + CO = SiO + SiC). During this process, the silicon vapor generated by the silicon powder is greater than the silicon evaporation amount on the surface of the single-crystal silicon wafer, and it will continue to play a role in inhibiting the generation of holes on the silicon surface.

[0085] In some embodiments, stop introducing the carbide-containing gas (such as CO gas), extract the carbide gas inside the device and other gases generated by the reaction, and at the same time stop heating. After the temperature inside the device drops to room temperature, take out the sample whose surface has completed the conversion of silicon carbide.

[0086] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include step 4: continue to heat to a temperature T3, where T3 is higher than T2 but less than 1415 °C, for example, T3 is higher than 1000 °C - 1300 °C but less than 1415 °C, and use the silicon vapor pressure generated by the bottom silicon powder to etch the surface of the silicon carbide. To further improve the surface quality of the silicon carbide, which is beneficial for subsequent epitaxy.

[0087] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: simultaneously or after the surface deoxidation of the silicon wafer in step 1, generating silicon point vacancies inside the silicon. By controlling the heating temperature and heating time, the thickness of the silicon layer where the silicon point vacancies are generated can be controlled, thereby controlling the subsequent silicon carbide conversion thickness to control the thickness of the silicon carbide layer.

[0088] The device for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure can, due to the vapor pressure higher than the silicon evaporation on the silicon wafer surface generated by the silicon powder at the bottom of the permeable chamber where the substrate including the silicon carbide layer is located, suppress the generation of hole defects on the silicon wafer surface while generating internal silicon point vacancies. Therefore, by using the device for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, not only can a thicker silicon carbide film be produced, but also the surface quality of the silicon carbide film is higher.

[0089] In some embodiments of the present disclosure, a method for preparing a substrate including a silicon carbide layer can guide the generation of holes with regular shapes and uniform distributions on the silicon carbide surface by controlling the reaction temperature and the carbide atmosphere pressure to form a silicon carbide patterned substrate. The patterned substrate obtained according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure is a process of self-assembling to obtain a silicon-based silicon carbide patterned substrate.

[0090] A silicon carbide patterned substrate is formed according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, and the same obtained image substrate is characterized. Figure 5 An optical microscope photograph of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure is shown. Figure 6 An AFM (Atomic Force Microscope) scan image of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure is shown, with a scanning range of 50μm * 50μm. Figure 7 An SEM (Scanning Electron Microscope) image of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure is shown. Figure 8 A partially enlarged SEM image of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure is shown.

[0091] As Figures 5 - 8 shown, according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, a patterned substrate with a triangular pattern shape can be obtained.

[0092] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer can also suppress the generation of surface holes by adjusting the silicon vapor pressure to obtain a silicon-based silicon carbide patterned substrate with surface holes being somewhat suppressed.

[0093] A silicon-based silicon carbide patterned substrate with surface holes being somewhat suppressed is obtained according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, and the same obtained image substrate is characterized. Figure 9An optical microscope photograph showing a silicon-based silicon carbide patterned substrate with suppressed surface voids prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure. Figure 10 An AFM scan of a substrate including a silicon carbide layer with suppressed surface pores prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown, with a scanning range of 50 μm*50 μm.

[0094] In some embodiments of the present disclosure, the shape of the graphics formed in the graphic substrate includes, but is not limited to, triangles, hexagons, etc.

[0095] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: bonding a low-quality SiC substrate to a silicon layer to form a substrate including a surface silicon layer.

[0096] Those skilled in the art will understand that in some embodiments of the present disclosure, low-quality SiC refers to SiC with various defects and impurities, for example, SiC with more crystal defects, such as dislocations, stacking faults, etc.; and / or SiC containing higher impurity elements, such as iron, titanium, aluminum, etc.; and / or SiC with a rough surface and more microcracks and defects.

[0097] In some embodiments of the present disclosure, forming a substrate including a surface silicon layer may include the following steps:

[0098] The back surface of the single crystal silicon wafer and the front surface of the low-quality single crystal silicon carbide layer are directly contact-bonded to obtain a substrate including a surface silicon layer.

[0099] In some embodiments of the present disclosure, the thickness of the bonding layer formed by direct contact bonding is less than or equal to 5 nm.

[0100] In some embodiments of the present disclosure, the back surface of the single crystal silicon wafer and the front surface of the low-quality silicon carbide layer are surface treated so that the roughness of the back surface of the single crystal silicon wafer and the front surface of the low-quality silicon carbide layer is less than or equal to 0.5 nm, thereby improving the step bonding effect.

[0101] In some embodiments of the present disclosure, the obtained substrate including the surface silicon layer is subjected to the method in some embodiments of the present disclosure so that silicon carbide is partially generated on the surface silicon layer.

[0102] In some embodiments of the present disclosure, the thickness of the single crystal silicon wafer may be 50-300 μm, and the thickness of the silicon carbide layer obtained after the surface silicon layer partially generates silicon carbide (3C-SiC) is 10-5000 nm. If the 3C-SiC layer is relatively thick, it can be directly separated from Si and subsequently transferred to other substrates (such as sapphire) to obtain a silicon carbide composite substrate.

[0103] In some embodiments of the present disclosure, forming a substrate including a surface silicon layer may include the following steps:

[0104] 1) Inject ions from the back surface of a single-crystalline silicon wafer so that the injected ions reach a preset depth, forming a defect layer at the preset depth, and forming a first single-crystalline silicon layer on the side of the defect layer facing the back surface of the single-crystalline silicon wafer;

[0105] 2) Directly bond the back surface of the single-crystalline silicon wafer and the front surface of a low-quality single-crystalline silicon carbide layer to form a first composite structure including the bonded single-crystalline silicon wafer, the low-quality single-crystalline silicon carbide layer, and a bonding layer between the single-crystalline silicon wafer and the low-quality silicon carbide layer;

[0106] 3) Apply stress to the first composite structure so that the first single-crystalline silicon layer in the first composite structure peels off along the defect layer, obtaining a second composite structure and a remaining single-crystalline silicon wafer. The second composite structure includes the bonded first single-crystalline silicon layer and the low-quality silicon carbide layer, and a damaged layer separated from the defect layer;

[0107] 4) Perform surface treatment on the surface of the first single-crystalline silicon layer away from the low-quality silicon carbide layer to remove the damaged layer, obtaining a substrate including a surface silicon layer.

[0108] In some embodiments of the present disclosure, the ions in step 1) may be hydrogen ions and / or helium ions.

[0109] In some embodiments of the present disclosure, the preset depth in step 1) is generally less than or equal to 1 μm, and may be, for example, 0.1 μm, 0.15 μm, 0.2 μm, 0.5 μm, or 1 μm.

[0110] In some embodiments of the present disclosure, the thickness of the bonding layer formed by direct contact bonding in step 2) is less than or equal to 5 nm.

[0111] In some embodiments of the present disclosure, perform surface treatment on the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide layer so that the roughness of the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide layer is less than or equal to 0.5 nm, thereby improving the bonding effect of the step.

[0112] In some embodiments of the present disclosure, the method of applying stress in step 3) includes heat treatment and / or mechanical separation.

[0113] In some embodiments of the present disclosure, the method of removing the damaged layer in step 4) includes, but is not limited to, at least one of wet cleaning, plasma activation, high-temperature annealing, chemical mechanical polishing, mechanical polishing, reactive ion etching, ion beam etching, or ion beam grazing incidence polishing.

[0114] In some embodiments of the present disclosure, the doping of the single-crystalline silicon wafer is not specifically limited. For example, it can be a p-type silicon wafer doped with boron or an n-type silicon wafer doped with antimony.

[0115] In some embodiments of the present disclosure, the obtained substrate including the surface silicon layer is processed by the method in some embodiments of the present disclosure to completely form silicon carbide on the surface silicon layer, thereby obtaining a 3C-SiC / low-quality SiC composite substrate.

[0116] In some embodiments of the present disclosure, 3C-SiC in the 3C-SiC / low-quality SiC composite substrate is used as a seed layer and grown by the PVT (Physical Vapor Transport) method to obtain a 3C-SiC single crystal ingot material.

[0117] In some embodiments of the present disclosure, forming a substrate including a surface silicon layer may include the following steps:

[0118] S1. In an ultra-high vacuum environment, use a Fast Atom Beam (FAB) to clean the surface of the SiC wafer, such as removing the oxide layer and contaminants on the surface of the SiC wafer;

[0119] S2. After cleaning the surface of the SiC wafer, use a Si target for FAB sputtering to deposit a Si layer of about 10 nanometers on the SiC wafer;

[0120] S3. Perform FAB irradiation on the Si wafer; at the same time, the surface of the SiC wafer is activated again by FAB irradiation, and about 3 nanometers of the Si layer deposited on the SiC is etched;

[0121] S4. Directly bond the SiC wafer and the Si wafer under a pressure of about 4 MPa for 180 seconds to obtain a substrate including a surface silicon layer.

[0122] In some embodiments of the present disclosure, during the surface cleaning of the SiC layer in step S1 and the sputtering deposition of the Si layer in step S2, the voltage and current of the FAB source are 1 kV and 100 mA respectively. The base pressure is 5.0×10 -6 Pa.

[0123] In some embodiments of the present disclosure, the fast atom beam in steps S1, S2, and S3 includes an Argon Fast Atom Beam (Ar-FAB).

[0124] By forming a substrate including a surface silicon layer through steps S1 to S4 in some embodiments of the present disclosure, the ion beam implantation and stripping process is not required, and the crystal quality will not be damaged. Therefore, subsequent processes such as annealing are not required for repair, and the quality of the formed substrate including the surface silicon layer is better.

[0125] In some embodiments of the present disclosure, the obtained substrate including a surface silicon layer is processed by the method in some embodiments of the present disclosure to partially form silicon carbide in the surface silicon layer.

[0126] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include bonding low-quality SiC to a silicon layer and then thinning the silicon layer.

[0127] In some embodiments of the present disclosure, the silicon layer is thinned to less than 200 nm.

[0128] In some embodiments of the present disclosure, after thinning the silicon layer, the entire surface silicon layer is formed into silicon carbide by the method in some embodiments of the present disclosure.

[0129] In some embodiments of the present disclosure, the process for thinning the silicon layer on the surface of the SiC wafer includes but is not limited to: ultra-precision grinding, lapping, chemical mechanical polishing (CMP), dry polishing, electrochemical etching, wet etching, plasma-assisted chemical etching (PACE), atmospheric downstream plasma etching (ADPE).

[0130] In some embodiments of the present disclosure, annealing is performed during the process of forming silicon carbide in the surface silicon layer, or annealing is performed after forming silicon carbide, converting the amorphous silicon in the Si layer deposited on the surface of the SiC layer during the sputtering process into silicon carbide, and obtaining a 3C-SiC / SiC composite substrate.

[0131] In some embodiments of the present disclosure, the obtained 3C-SiC / SiC composite substrate can be directly used according to actual needs, or can be used after the 3C-SiC layer is further thickened subsequently.

[0132] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include thickening the silicon carbide layer.

[0133] The process for thickening the silicon carbide layer includes but is not limited to: chemical vapor deposition (CVD), physical vapor deposition (PVD), physical chemical vapor deposition (PCVD), and vacuum sublimation epitaxy, etc. For example, in some embodiments of the present disclosure, using vacuum sublimation epitaxy, the 3C-SiC layer can be further thickened to about 1 mm.

[0134] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include epitaxially growing on the silicon carbide layer to form an epitaxial III-V layer.

[0135] In some embodiments of the present disclosure, the epitaxial III-V layer may include gallium nitride (GaN).

[0136] In some embodiments of the present disclosure, the substrate including a surface silicon layer is a single crystal silicon wafer. By the method in some embodiments of the present disclosure, silicon carbide is formed on at least one surface silicon layer of the single crystal silicon wafer to obtain a 3C-SiC / Si composite substrate.

[0137] In some embodiments of the present disclosure, the substrate including a surface silicon layer is a diamond, sapphire or ceramic with a silicon layer on its surface. By the method in some embodiments of the present disclosure, the silicon layer on the surface of the diamond, sapphire or ceramic is entirely converted into silicon carbide to obtain composite substrates such as 3C-SiC / diamond, 3C-SiC / sapphire, 3C-SiC / ceramic, etc.

[0138] Figure 2 A photograph of a substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0139] As Figure 2 shown, the substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure has no problems such as cracking and warping.

[0140] Figure 3 A reflection high energy electron diffraction (RHEED) image of a substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0141] From Figure 3 it can be seen that the atomic arrangement periodicity in the plane of the substrate including a silicon carbide layer prepared is single crystal.

[0142] Figure 4 An X-ray diffraction (XRD) test result of a substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0143] From Figure 4 it can be seen that for the substrate including a silicon carbide layer obtained by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure, the atomic arrangement periodicity in the direction perpendicular to the film is such that on the surface silicon layer, i.e., on silicon, pure SiC is obtained rather than other compositions of SixCy (x:y≠1:1), and at the same time, there are no peaks of other crystal orientations of SiC except for the Si substrate, indicating that single crystal SiC is obtained.

[0144] The methods for preparing substrates comprising a silicon carbide layer according to some embodiments of the present disclosure can bring beneficial technical effects. For example, in some embodiments of the present disclosure, the method for preparing a substrate comprising a silicon carbide layer is to convert the surface silicon layer into a SiC layer based on the principle of replacing silicon atoms with carbon atoms, overcoming problems such as dislocations and cracks caused by lattice mismatch, different thermal expansion coefficients, etc.

[0145] For another example, in some embodiments of the present disclosure, inexpensive low-quality silicon carbide and inexpensive single-crystalline silicon wafers are used to obtain composite substrates such as 3C-SiC / Si, thereby reducing the cost of SiC substrates. For yet another example, in some embodiments of the present disclosure, after bonding low-quality silicon carbide to single-crystalline silicon, the single-crystalline silicon is then converted into 3C-SiC, and there is no problem of impurity diffusion throughout the process, and the obtained SiC substrate has better quality.

[0146] Those skilled in the art can understand that the methods and apparatuses for preparing substrates comprising a silicon carbide layer according to some embodiments of the present disclosure are not limited to forming substrates only, but can also be used to form various semiconductor structures or semiconductor devices.

[0147] It should be noted that the above are only exemplary embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A method for preparing a substrate comprising a silicon carbide layer, characterized in that, Comprising: Forming an atmosphere of carbide-containing gas around a substrate including a surface silicon layer, and Heating the substrate including the surface silicon layer to form a silicon carbide layer on the surface silicon layer.

2. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, Further comprising: Pre-annealing after heating the substrate including the surface silicon layer, along with extracting the generated silicon vapor from the reaction zone.

3. The method for preparing a substrate including a silicon carbide layer according to claim 1, wherein The carbide-containing gas includes: carbon monoxide and / or carbon dioxide, or a mixed gas of carbon monoxide and / or carbon dioxide and an inert gas; and / or The silicon carbide layer has self-assembled silicon carbide patterns.

4. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, wherein The atmosphere of the carbide-containing gas further includes a silicon-containing gas, and forming the atmosphere of the carbide-containing gas includes: Heating silicon powder to generate a silicon-containing gas; and / or Introducing a silicon-containing gas into the substrate including the surface silicon layer.

5. The method for preparing a substrate comprising a silicon carbide layer according to claim 4, characterized in that, The silicon-containing gas includes silane and / or disilane and / or trichlorosilane.

6. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, Forming an atmosphere of carbide-containing gas around a substrate including a surface silicon layer includes: Controlling the ambient air pressure around the substrate including the surface silicon layer to be 10 - 800 Pa; and Heating the ambient temperature of the substrate including the surface silicon layer to 950 - 1400 °C to form a silicon carbide layer on the surface silicon layer.

7. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 2-6, characterized in that, Pre-annealing after heating the substrate including the surface silicon layer includes: Placing the substrate in a vacuum furnace and extracting air; and Heating the substrate including the surface silicon layer to 1200 - 1400 °C and maintaining for 1 - 150 minutes under a pressure of < 25 Pa, along with extracting the generated silicon vapor from the reaction zone.

8. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-6, characterized in that, Thickening the silicon carbide layer.

9. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-6, characterized in that, Further comprising: Heating the substrate including the surface silicon layer in a silicon vapor pressure for surface deoxidation; and / or Heating the substrate including the silicon carbide layer with temperature increase in a silicon vapor pressure to etch the silicon carbide layer.

10. The method for preparing a substrate comprising a silicon carbide layer according to claim 9, characterized in that, Further comprising: During or after surface deoxidation, controlling the silicon thickness generating silicon point vacancies by controlling the heating temperature and heating time to control the thickness of the silicon carbide layer.

11. An apparatus for preparing a substrate comprising a silicon carbide layer, characterized in that, Comprising: A housing including a receiving space; An air inlet provided on the housing for introducing a carbide-containing gas into the receiving space; An air outlet provided on the housing; And A breathable chamber assembly provided in the receiving space for placing at least one substrate including a surface silicon layer.

12. The apparatus for preparing a substrate comprising a silicon carbide layer according to claim 11, wherein, The breathable chamber assembly includes at least one graphite box for placing at least one substrate including a surface silicon layer.

13. The device for preparing a substrate comprising a silicon carbide layer according to claim 12, characterized in that, At least one graphite box includes a plurality of stacked graphite boxes, and the graphite box includes: A flange or a bearing step formed on the inner wall for bearing the substrate including the surface silicon layer; A stacking step formed on the outer walls at the bottom and top for stacking with an adjacent graphite box; and A silicon powder placement area for placing silicon powder.

14. The apparatus for preparing a substrate comprising a silicon carbide layer according to claim 13, characterized in that, The graphite box includes: A graphite bottom box, the upper end of which includes the bearing step for bearing the substrate including the surface silicon layer; and A graphite spacer box, the lower end of which includes a step adapted to the bearing step for stacking on the graphite bottom box.

15. The apparatus for preparing a substrate comprising a silicon carbide layer according to claim 13, characterized in that, The breathable chamber assembly further includes a lid provided on the top of at least one graphite box.

Images