Method and apparatus for preparing substrate comprising silicon carbide layer, and semiconductor device

Abstract

The invention relates to the technical field of semiconductors, in particular to a method and device for preparing a substrate containing a silicon carbide layer and a semiconductor device. The method for preparing the substrate containing the silicon carbide layer comprises the following steps: bonding a low-quality silicon carbide substrate with a monocrystalline silicon wafer to form a substrate containing a surface silicon layer; forming an atmosphere containing a carbide gas around the substrate comprising the surface silicon layer, the atmosphere containing the carbide gas further comprising a silicon-containing gas; a substrate including a surface silicon layer is heated to generate a single crystal silicon carbide layer on the surface silicon layer.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and particularly to a method, an apparatus, and a semiconductor device for preparing a substrate including a silicon carbide layer. Background Art

[0002] In the rapid development of semiconductor technology, the wide bandgap material SiC (silicon carbide) is gradually becoming the core of high-performance electronic devices. However, although the SiC material has great potential, the preparation technology and cost issues of its single crystal substrate are still the key factors restricting its wide application. Summary of the Invention

[0003] The present disclosure provides a method for preparing a substrate including a silicon carbide layer, comprising:

[0004] Bonding a low-quality silicon carbide substrate to a single crystal silicon wafer to form a substrate including a surface silicon layer;

[0005] Forming an atmosphere containing carbide gas around the substrate including the surface silicon layer, the atmosphere containing carbide gas further including a silicon-containing gas, and forming the atmosphere containing carbide gas includes:

[0006] Heating silicon powder to generate a silicon-containing gas; and / or

[0007] Introducing a silicon-containing gas into the substrate including the surface silicon layer;

[0008] Heating the substrate including the surface silicon layer to cause the surface silicon layer to form a single crystal silicon carbide layer.

[0009] The present disclosure provides a semiconductor device including a substrate including a silicon carbide layer obtained by the method for preparing a substrate including a silicon carbide layer according to any embodiment of the present disclosure. Brief Description of the Drawings

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only one embodiment of the present disclosure, and those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts.

[0011] Figure 1 A flowchart showing a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0012] Figure 2A A flowchart showing a method for bonding a low-quality silicon carbide substrate to a single crystal silicon wafer to form a substrate including a surface silicon layer according to some embodiments of the present disclosure.

[0013] Figure 2BSchematic diagram of a process for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer according to some embodiments of the present disclosure.

[0014] Figure 3A Flowchart of a method for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer according to some other embodiments of the present disclosure.

[0015] Figure 3B Schematic diagram of a process for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer according to some other embodiments of the present disclosure.

[0016] Figure 4 Schematic structural diagram of an apparatus for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0017] Figure 5 Photograph of a substrate including a silicon carbide layer prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0018] Figure 6 Reflection high energy electron diffraction (RHEED) image of a substrate including a silicon carbide layer prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0019] Figure 7 X-ray diffraction (XRD) test results of a substrate including a silicon carbide layer prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0020] Figure 8 Optical microscope photograph of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0021] Figure 9 AFM (atomic force microscope) scan of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0022] Figure 10 SEM (scanning electron microscope) image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0023] Figure 11 Partial enlarged SEM image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0024] Figure 12Optical microscope photograph of a silicon-based silicon carbide patterned substrate with surface holes inhibited to a certain extent, prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0025] Figure 13 AFM scan of a substrate including a silicon carbide layer with surface holes inhibited to a certain extent, prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0026] In the above figures, each reference numeral represents:

[0027] 10 - single crystal silicon ingot

[0028] 11 - back surface of the single crystal silicon ingot

[0029] 12 - front surface of the single crystal silicon ingot

[0030] 13 - defect layer

[0031] 131 - damaged layer

[0032] 14, 14a - single crystal silicon wafers

[0033] 20, 20a - low-quality silicon carbide substrates

[0034] 30 - silicon layer

[0035] 30a - etched deposited silicon layer

[0036] 40a, 40b - fast atom beams

[0037] A - composite structure

[0038] 100 - apparatus for preparing a substrate including a silicon carbide layer

[0039] 110 - housing

[0040] 111 - accommodation space

[0041] 120 - air inlet

[0042] 130 - air outlet

[0043] 140 - breathable chamber assembly

[0044] 141 - graphite box

[0045] 14101 - bearing step

[0046] 14102 - stacking step

[0047] 14103 - silicon powder placement area

[0048] 141a - graphite bottom box

[0049] 141b - Graphite spacer box

[0050] 142 - Lid

[0051] 200 - Substrate comprising a surface silicon layer Detailed implementation manners

[0052] Some embodiments of the present disclosure will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only exemplary embodiments of the present disclosure, rather than all embodiments.

[0053] In the description of the present disclosure, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", "top", "bottom", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In the description of the present disclosure, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", "coupled" should be understood in a broad sense. For example, it can be a fixed connection or a detachable connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the communication inside two elements. In the description of the present disclosure, the distal end or the far side refers to the end or side that extends deep into the vacuum environment (for example, the vacuum chamber), and the proximal end or the near side is the end or side opposite to the distal end or the far side (for example, the end or side away from the vacuum chamber, or the end or side close to the vacuum chamber wall inside the vacuum chamber, etc.). For those of ordinary skill in the art, the specific meanings of the above terms in the present disclosure can be understood according to specific situations.

[0054] Figure 1 A flowchart showing a method S100 for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0055] As Figure 1 shown, a method S100 for preparing a substrate comprising a silicon carbide (SiC) layer according to some embodiments of the present disclosure may include: in step S110, bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate comprising a surface silicon layer; in step S120, forming an atmosphere containing a carbide gas around the substrate comprising a surface silicon layer; and in step S130, heating the substrate comprising a surface silicon layer to cause the surface silicon layer to generate a single-crystalline silicon carbide layer.

[0056] In some embodiments of the present disclosure, the atmosphere containing a carbide gas may further include a silicon-containing gas.

[0057] In some embodiments of the present disclosure, silicon atoms in the silicon-containing gas can prevent the surface evaporation of silicon atoms during the formation of silicon carbide, enabling high crystallinity perfection of SiC and almost no defects such as etch pits.

[0058] As Figure 1 shown, in some embodiments of the present disclosure, in step S120, forming an atmosphere of carbide-containing gas may include: heating silicon powder to generate a silicon-containing gas; and / or introducing a silicon-containing gas into a substrate including a surface silicon layer.

[0059] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include evacuating the air around the substrate including a surface silicon layer and then introducing a carbide-containing gas. For example, the substrate including a surface silicon layer can be placed in a vacuum furnace, the air can be evacuated, and then a carbide-containing gas can be supplied to form an atmosphere of carbide-containing gas around the substrate including a surface silicon layer and form a certain air pressure. Subsequently, by heating the substrate including a surface silicon layer, a silicon carbide (3C-SiC) layer is formed on the surface silicon layer.

[0060] In some embodiments of the present disclosure, the surface silicon layer in the substrate including a surface silicon layer is a single-crystalline silicon layer.

[0061] In some embodiments of the present disclosure, the surface silicon layer in the substrate including a surface silicon layer includes a Si(111) crystal plane.

[0062] Those skilled in the art can understand that low-quality SiC refers to SiC with lower quality compared to the SiC layer formed according to some embodiments of the present disclosure. Low-quality SiC may include SiC with various defects and impurities, such as SiC with more crystal defects, such as dislocations and stacking faults; and / or SiC containing higher impurity elements, such as iron, titanium, aluminum, etc.; and / or SiC with a relatively rough surface, more microcracks and defects.

[0063] In some embodiments of the present disclosure, while the surface Si layer provides Si atoms for the generated SiC layer, it also continuously leaves vacancies in the Si matrix due to the formation of SiO gas. These nanoscale vacancies continuously increase and accumulate into micron-scale silicon point vacancies, forming silicon point vacancies at the interface between silicon and silicon carbide. These silicon point vacancies significantly reduce the total contact area between the SiC layer and the Si layer, making the obtained SiC composite substrate have a certain elasticity, facilitating the stress release of the substrate-film lattice mismatch, and being suitable for the epitaxial growth of more semiconductor materials. For example, crack-free AlN and GaN samples can be obtained.

[0064] In some embodiments of the present disclosure, the method S100 for preparing a substrate comprising a silicon carbide layer may further include pre-annealing after heating the substrate comprising a surface silicon layer, along with extracting the generated silicon vapor from the reaction zone.

[0065] In some embodiments of the present disclosure, the method S100 for preparing a substrate comprising a silicon carbide layer may further include extracting the air around the substrate comprising a surface silicon layer, and then pre-annealing after heating the substrate comprising a surface silicon layer. For example, the substrate comprising a surface silicon layer can be placed in a vacuum furnace, and after extracting the air, pre-annealing can be carried out at a certain temperature (such as 1200 - 1400 °C).

[0066] In some embodiments of the present disclosure, pre-annealing under vacuum conditions will form a large number of thermal vacancies in the near-surface region of the silicon crystal, so that before chemical vacancies are formed in the interaction between the carbide-containing gas and Si, the surface silicon layer already contains a large number of non-equilibrium thermal vacancies. In this region, the chemical bonds inside the silicon are strongly weakened, the silicon lattice is in an unstable state, and the gas can easily penetrate into the silicon, so that a relatively thick SiC layer can be obtained, such as a SiC layer of 0.5 - 5 μm.

[0067] In some embodiments of the present disclosure, bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate comprising a surface silicon layer may include: directly contacting and bonding the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide substrate to obtain a substrate comprising a surface silicon layer.

[0068] In some embodiments of the present disclosure, "direct contact bonding" means that the surfaces of two objects are directly fitted together and then bonded through a bonding process, and no intermediate substance is required as a solder for bonding.

[0069] In some embodiments of the present disclosure, bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate comprising a surface silicon layer may further include: surface treating the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide substrate. In some embodiments of the present disclosure, the surface treatment may include one or more processes selected from wet cleaning, chemical activation, plasma activation, high-temperature annealing, chemical mechanical polishing (CMP), chemical polishing (CP), mechanical polishing, reactive ion etching, ion beam etching, or ion beam grazing incidence polishing.

[0070] In some embodiments of the present disclosure, the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide layer are surface treated to make the roughness of the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide layer less than or equal to 0.5 nm, thereby improving the bonding effect of the steps.

[0071] In some embodiments of the present disclosure, after surface treatment of the back surface of a single-crystalline silicon wafer and the front surface of a low-quality silicon carbide substrate, the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide substrate are directly contact-bonded to obtain a substrate including a surface silicon layer.

[0072] Those skilled in the art can understand that a bonding layer will be naturally formed during the process of directly contact-bonding the back surface of a single-crystalline silicon wafer and the front surface of a low-quality silicon carbide substrate.

[0073] In some embodiments of the present disclosure, the thickness of the bonding layer formed by direct contact bonding is less than or equal to 5 nm. For example, the thickness of the bonding layer can be controlled to be 1 nm, 2 nm, 3 nm, or 4 nm, etc. by controlling the time of direct contact bonding, so as to reduce the influence of the bonding layer on the performance of the composite substrate.

[0074] In some embodiments of the present disclosure, bonding a low-quality silicon carbide substrate and a single-crystalline silicon wafer to form a substrate including a surface silicon layer may include: forming a transition layer on the back surface of the single-crystalline silicon wafer or the front surface of the low-quality silicon carbide substrate; bonding the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide substrate through the transition layer to obtain a substrate including a surface silicon layer.

[0075] In some embodiments of the present disclosure, the bonding effect is better when the low-quality silicon carbide substrate and the single-crystalline silicon wafer are bonded through a transition layer.

[0076] In some embodiments of the present disclosure, the total thickness of the bonding layer between the low-quality silicon carbide substrate and the transition layer, the transition layer, and the bonding layer between the single-crystalline silicon wafer and the transition layer does not exceed 100 nm, so as to reduce the influence on the performance of the composite substrate.

[0077] In some embodiments of the present disclosure, the transition layer can be formed by, for example, a sputtering process.

[0078] In some embodiments of the present disclosure, the material of the transition layer can include, for example, insulating dielectrics such as SiO2 (silicon oxide), Si3N4 (silicon nitride), Al2O3 (aluminum oxide), or conductive dielectrics such as SiC (silicon carbide), or metals such as Pt (platinum), Au (gold), or composite multilayer materials of the above-mentioned various materials.

[0079] Figure 2A The flowchart of method S110 for bonding a low-quality silicon carbide substrate and a single-crystalline silicon wafer to form a substrate including a surface silicon layer according to some embodiments of the present disclosure is shown. Figure 2B The schematic diagram of the process for bonding a low-quality silicon carbide substrate 20 and a single-crystalline silicon wafer 14 to form a substrate including a surface silicon layer according to some embodiments of the present disclosure is shown.

[0080] Next, takingFigure 2B Taking the schematic diagram of the process of bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer as an example, the method S110 for forming a substrate including a surface silicon layer according to some embodiments of the present disclosure will be further described.

[0081] As Figure 2A and 2B shown, in some embodiments of the present disclosure, the method S110 for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer may include: in step S111, ions are implanted from the back surface 11 of the single-crystalline silicon ingot 10 to form a defect layer 13 at a preset depth, and a single-crystalline silicon wafer 14 is formed on the side of the defect layer 13 facing the back surface of the single-crystalline silicon ingot; in step S112, the back surface 11 of the single-crystalline silicon ingot 10 and the front surface of the low-quality silicon carbide substrate 20 are bonded to form a composite structure A; in step S113, stress is applied to the composite structure A so that the single-crystalline silicon wafer 14 in the composite structure A is peeled off along the defect layer 13 to obtain a substrate including a surface silicon layer.

[0082] As Figure 2A and 2B shown, in some embodiments of the present disclosure, in some embodiments of the present disclosure, the method S110 for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer may further include: in step S114, the surface of the single-crystalline silicon 14 in the substrate including a surface silicon layer away from the low-quality silicon carbide substrate 20 is surface-treated to remove the damaged layer 131 when the defect layer 13 is peeled off. For example, in some embodiments of the present disclosure, one or more of wet cleaning, plasma activation, high-temperature annealing, CMP, CP, mechanical polishing, reactive ion etching, ion beam etching, or ion beam grazing incidence polishing may be used to treat the surface of the single-crystalline silicon wafer 14 in the substrate including a surface silicon layer away from the low-quality silicon carbide substrate 20 to remove the damaged layer 131.

[0083] In some embodiments of the present disclosure, in step S111, the ions may be hydrogen ions and / or helium ions.

[0084] In some embodiments of the present disclosure, by adjusting the preset depth, the thickness of the single-crystalline silicon wafer can be adjusted. During the hydrogen ion implantation process, the depth at which the implanted ions reach the preset depth can be adjusted by adjusting the energy of the hydrogen ion implantation.

[0085] In some embodiments of the present disclosure, in step S111, the preset depth is generally less than or equal to 1 μm, and for example, it may be 0.1 μm, 0.15 μm, 0.2 μm, 0.5 μm, or 1 μm.

[0086] In some embodiments of the present disclosure, in step S113, the way of applying stress may include heat treatment and / or mechanical separation.

[0087] Figure 3A The flowchart of method S110a for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer according to some other embodiments of the present disclosure is shown. Figure 3B The schematic diagram of the process for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer according to some other embodiments of the present disclosure is shown.

[0088] Below, taking Figure 3B the schematic diagram of the process for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer as shown as an example, method S110a for forming a substrate including a surface silicon layer according to some other embodiments of the present disclosure will be further described.

[0089] As Figure 3A and 3B shown, in some embodiments of the present disclosure, method S110a for bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate including a surface silicon layer may include: in step S111a, depositing a silicon layer 30 on the low-quality silicon carbide substrate 20a; in step S112a, irradiating the surface of the low-quality silicon carbide substrate 20a with a fast atom beam 40a to etch the deposited silicon layer 30 to obtain an etched silicon layer 30a; in step S113a, irradiating the single-crystalline silicon wafer 14a with a fast atom beam 40b; in step S114a, bonding the side of the low-quality silicon carbide substrate 20a and the single-crystalline silicon wafer 14a that has been irradiated with the fast atom beam 40b through the etched deposited silicon layer 30a to obtain a substrate including a surface silicon layer.

[0090] In some embodiments of the present disclosure, the execution order of step S112a and step S113a is not time-sequential, and they can be executed independently of each other or simultaneously. For example, step S112a can be executed first, or step S113a can be executed first, or step S112a and step S113a can be executed simultaneously.

[0091] For example, in some other embodiments of the present disclosure, before step S111a, in an ultra-high vacuum environment, the surface of the SiC wafer can be cleaned using a Fast Atom Beam (FAB), such as removing the oxide layer and contaminants on the surface of the SiC wafer. In step S111a, after cleaning the surface of the SiC wafer, FAB sputtering can be performed using a Si target to deposit a Si layer of about 10 nanometers on the SiC wafer. In step S112a, the surface of the SiC wafer is irradiated and activated again by FAB, and about 3 nanometers of the Si layer deposited on the SiC is etched. In step S113a, the Si wafer is irradiated by FAB. In step S114a, the SiC wafer and the Si wafer are directly bonded under a pressure of about 4 MPa for 180 seconds to obtain a substrate including a surface silicon layer.

[0092] In some embodiments of the present disclosure, during the surface cleaning of the SiC layer and the sputtering deposition of the Si layer in step S111a, the voltage and current of the FAB source are 1 kV and 100 mA respectively, and the base pressure is 5.0×10 -6 Pa.

[0093] In some embodiments of the present disclosure, the fast atom beam may include an Argon Fast Atom Beam (Ar-FAB).

[0094] By adopting the steps of S111a - S114a in some embodiments of the present disclosure to form a substrate including a surface silicon layer, there is no need to use an ion beam implantation and stripping process, which will not cause damage to the crystal quality. Therefore, subsequent processes such as annealing are not required for repair, and the quality of the formed substrate including the surface silicon layer is better.

[0095] In some embodiments of the present disclosure, the thickness of the single-crystal silicon wafer can be 50 - 300 μm.

[0096] In some embodiments of the present disclosure, the thickness of the single-crystal silicon carbide layer can be 10 - 5000 nm.

[0097] In some embodiments of the present disclosure, if the 3C-SiC layer is relatively thick, it can be directly separated from the Si, and then transferred to other substrates (such as sapphire) later to obtain a silicon carbide composite substrate.

[0098] In some embodiments of the present disclosure, the method S100 for preparing a substrate including a silicon carbide layer may further include: bonding a low-quality silicon carbide substrate with a single-crystal silicon wafer, and then thinning the single-crystal silicon wafer.

[0099] In some embodiments of the present disclosure, the silicon layer is thinned to less than 200 nm.

[0100] In some embodiments of the present disclosure, after thinning the silicon layer, the entire surface silicon layer is converted into silicon carbide by the method in some embodiments of the present disclosure.

[0101] In some embodiments of the present disclosure, the process of thinning the silicon layer on the SiC wafer surface includes, but is not limited to: ultra-precision grinding, lapping, chemical mechanical polishing (CMP), dry-polishing, electrochemical-etching, wet-etching, plasma-assisted chemical etching (PACE), atmospheric-downstream-plasma-etching (ADPE).

[0102] In some embodiments of the present disclosure, the carbide-containing gas includes carbon monoxide and / or carbon dioxide, or a mixed gas of carbon monoxide and / or carbon dioxide and an inert gas.

[0103] In some embodiments of the present disclosure, the carbide-containing gas may include only carbon monoxide (CO), or only carbon dioxide (CO2), or a mixed gas of carbon monoxide and carbon dioxide, or a mixed gas of carbon monoxide and an inert gas (such as nitrogen, argon, etc.), or a mixed gas of carbon dioxide and an inert gas, or a mixed gas of carbon monoxide, carbon dioxide and an inert gas. For example, by mass fraction, the carbide-containing gas includes 45% carbon monoxide, 50% argon and 5% nitrogen.

[0104] In some embodiments of the present disclosure, the silicon-containing gas includes, but is not limited to, silane (SiH4) and / or disilane (Si2H6) and / or trichlorosilane (SiHCl3).

[0105] In some embodiments of the present disclosure, silicon powder can be heated only to generate silicon-containing gas to avoid the use of dangerous silicon-containing gases such as silane. And after the silicon carbide is formed on the surface silicon layer, the surface of the silicon carbide can be etched with silicon vapor to further improve the quality of the silicon carbide surface, because silicon can react with silicon carbide: Si + SiC = Si2C, and the vapor pressure of Si2C is higher than that of SiC, which is beneficial to subsequent epitaxial growth.

[0106] In addition, by only heating silicon powder to generate silicon-containing gas, not only the process is simplified, but also the purpose of automatically balancing the vapor pressure on the surface of the silicon wafer can be achieved. The chemical reaction formula for preparing the silicon carbide film is Si + CO = SiO + SiC. An excessively high silicon vapor pressure will hinder the progress of the silicon carbide formation reaction, but an excessively low silicon vapor pressure will cause the generation of surface pores. In some embodiments of the present disclosure, by only heating silicon powder to generate silicon-containing gas, since the silicon powder has a larger surface area than the substrate including the surface silicon layer, at the same temperature, the silicon vapor pressure generated by the silicon powder is slightly higher than the vapor pressure on the surface of the substrate including the surface silicon layer, thereby suppressing the silicon evaporation on the surface of the substrate including the surface silicon layer and inhibiting the generation of pores. At the same time, because at the same temperature, the vapor pressure of Si is much lower than the vapor pressure of SiO, the silicon carbide formation reaction will not be hindered due to an excessively high silicon vapor pressure.

[0107] In some embodiments of the present disclosure, the silicon carbide layer has self-assembled silicon carbide patterns.

[0108] In some embodiments of the present disclosure, a method for preparing a substrate including a silicon carbide layer can guide the generation of pores with regular shapes and uniform distributions on the surface of the silicon carbide by controlling the reaction temperature and the carbide atmosphere pressure to form a patterned silicon carbide substrate. The patterned substrate obtained according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure is a process of self-assembling to obtain a silicon-based silicon carbide patterned substrate.

[0109] Form a patterned silicon carbide substrate according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, and characterize the same obtained image substrate. Figure 8 Show an optical microscope photograph of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure. Figure 9 Show an AFM (atomic force microscope) scan of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, with a scanning range of 50μm * 50μm. Figure 10 Show an SEM (scanning electron microscope) image of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure. Figure 11 Show a partial enlarged SEM image of a silicon-based silicon carbide patterned substrate prepared by the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure.

[0110] As Figures 8 - 11 shown, according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, a patterned substrate with a triangular pattern shape can be obtained.

[0111] In some embodiments of the present disclosure, a method for preparing a substrate including a silicon carbide layer can also suppress the generation of surface holes by adjusting the silicon vapor pressure, and obtain a silicon-based silicon carbide patterned substrate with surface holes being somewhat suppressed.

[0112] A method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure obtains a silicon-based silicon carbide patterned substrate with surface holes being somewhat suppressed, and characterizes the same obtained image substrate. Figure 12 An optical micrograph showing a silicon-based silicon carbide patterned substrate with surface holes being somewhat suppressed prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure. Figure 13 An AFM scan of a substrate including a silicon carbide layer with surface holes being somewhat suppressed prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure, with a scanning range of 50μm * 50μm.

[0113] In some embodiments of the present disclosure, the shapes of the patterns in the formed patterned substrate include, but are not limited to, for example, triangles, hexagons, etc.

[0114] In some embodiments of the present disclosure, the ambient air pressure around the substrate including a surface silicon layer is controlled at 10 - 800 Pa; the ambient temperature of the substrate including a surface silicon layer is heated to 950 - 1400 °C to form a single-crystal silicon carbide layer on the surface silicon layer.

[0115] In some embodiments, the ambient air pressure around the substrate including a surface silicon layer can be controlled at, for example, 20 - 100 Pa, 70 - 250 Pa, 200 - 600 Pa, 100 Pa, 300 Pa, etc. In some embodiments, heating the substrate including a surface silicon layer can include heating the ambient temperature of the substrate including a surface silicon layer to, for example, 950 - 1200 °C, 1000 - 1300 °C, 1200 - 1400 °C, etc. to form silicon carbide on the surface silicon layer.

[0116] At a lower pressure, for example, below 10 Pa, and a lower temperature, for example, below 950 °C, the rate of silicon carbide formation on the surface silicon layer is very low, and hardly any silicon carbide is formed. At higher pressures and temperatures, for example, a pressure above 800 Pa and a temperature above 1400 °C, the rate of silicon carbide formation on the surface silicon layer is too high, such that the silicon carbide film has a bulk structure.

[0117] In some embodiments of the present disclosure, pre-annealing after heating the substrate including a surface silicon layer includes: placing the substrate in a vacuum furnace and evacuating the air; heating the substrate including a surface silicon layer to 1200 - 1400 °C and maintaining it for 1 - 150 minutes at a pressure of < 25 Pa, while extracting the generated silicon vapor from the reaction zone.

[0118] In some embodiments of the present disclosure, after pre-annealing, a carbide-containing gas is supplied into a vacuum furnace to form an atmosphere of the carbide-containing gas around a substrate including a surface silicon layer, so that silicon carbide is formed on the surface silicon layer.

[0119] In some embodiments, the substrate including the surface silicon layer can be heated to, for example, 1200 - 1300 °C, 1250 - 1400 °C, 1300 °C, 1350 °C, etc., and maintained for 1 - 150 minutes under pressures of < 10 Pa, < 5 Pa, < 1 Pa, < 0.1 Pa, etc., while silicon vapor generated is extracted from the reaction zone. After pre-annealing, a carbide-containing gas is supplied into the vacuum furnace to form an atmosphere of the carbide-containing gas around the substrate including the surface silicon layer, so that silicon carbide is formed on the surface silicon layer.

[0120] In some embodiments of the present disclosure, the thickness of the SiC layer will depend on the evaporation rate of silicon, and the evaporation rate of silicon is determined by temperature, vacuum degree, and reaction time. At temperatures below 1200 °C, the evaporation rate of silicon will not be very large, so the thickness of the SiC layer will not be very large either. If the evaporated silicon is not extracted, it will quickly diffuse back from the surface, and the vacancies will be "healed".

[0121] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: thickening the single-crystal silicon carbide layer.

[0122] In some embodiments of the present disclosure, the process for thickening the silicon carbide layer includes but is not limited to: chemical vapor deposition (CVD), physical vapor deposition (PVD), physical-chemical vapor deposition (PCVD), and vacuum sublimation epitaxy, etc. For example, in some embodiments of the present disclosure, using vacuum sublimation epitaxy, the 3C-SiC layer can be continuously thickened to about 1 mm.

[0123] Figure 4 The structural schematic diagram of a device 100 for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0124] As Figure 4 shown, the device 100 for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure may include a housing 110, an air inlet 120, an air outlet 130, and a breathable chamber assembly 140. The housing 110 may include a receiving space 111. The air inlet 120 is provided on the housing 110 for introducing a carbide-containing gas into the receiving space 111. The air outlet 130 is provided on the housing 110. The breathable chamber assembly 140 is disposed in the receiving space 111 for placing at least one substrate 200 including a surface silicon layer.

[0125] In some embodiments of the present disclosure, the accommodation space 111 can be evacuated to a pressure < 25 Pa. For example, in some embodiments, the accommodation space 111 can be evacuated to a pressure ≤ 20 Pa, or evacuated to a pressure ≤ 5 Pa, or evacuated to a pressure of 10 - 2 Pa.

[0126] In some embodiments of the present disclosure, the breathable chamber assembly 140 may further include at least one graphite box 141 for placing at least one substrate 200 including a surface silicon layer.

[0127] In some embodiments of the present disclosure, at least one graphite box 141 may include a plurality of stacked graphite boxes. For example, it may include eight stacked graphite boxes as shown in Figure 4 . Those skilled in the art can understand that although only eight graphite boxes are shown, at least one graphite box 141 may further include other numbers of graphite boxes. Figure 4

[0128] Figure 4 In some embodiments of the present disclosure, the graphite box 141 may include a flange or a bearing step 14101 formed on the inner wall, a stacking step 14102 formed on the outer wall of the bottom, and a silicon powder placement area 14103. The flange or the bearing step 14101 formed on the inner wall is used to bear the substrate 200 including the surface silicon layer. The stacking step 14102 formed on the outer wall of the bottom is used for stacking with adjacent graphite boxes. The silicon powder placement area 14103 is used for placing silicon powder. For example, in the eight stacked graphite boxes as shown in , each graphite box may include a flange or a bearing step 14101 formed on the inner wall, a stacking step 14102 formed on the outer walls of the bottom and the top, and a silicon powder placement area 14103.

[0129] In some embodiments of the present disclosure, the silicon powder placement area 14103 may be provided at the bottom of the graphite box.

[0130] Figure 4 As shown in , in some embodiments of the present disclosure, the breathable chamber assembly 140 may further include a lid 142 disposed on the top of at least one graphite box 141.

[0131] Figure 4 As shown in , in some embodiments of the present disclosure, the lid 142 may be disposed on the top of the topmost stacked graphite box among a plurality of stacked graphite boxes. For example, it may be adapted to the stacking step 14102 on the top of the topmost stacked graphite box, and the lid 142 is disposed on the stacking step 14102 on the top of the topmost stacked graphite box. However, this is only exemplary, and those skilled in the art can understand that the lid 142 can also be placed in other ways.

[0132] Figure 4 ​​As shown, in some embodiments of the present disclosure, at least one graphite box 141 includes a graphite bottom box 141a and a graphite elevation box 141b. The upper end portion of the graphite bottom box 141a includes a bearing step 14101 for bearing a substrate 200 including a surface silicon layer. The lower end portion of the graphite elevation box 141b includes a step adapted to the bearing step 14101 for stacking on the graphite bottom box 141a without affecting the substrate 200 including the surface silicon layer. For example, the upper end portion of the graphite bottom box 141a includes a Z-shaped bearing step 14101, and the lower end portion of the graphite elevation box 141b includes a small Z-shaped step with a height less than that of the Z-shaped bearing step 14101. The small Z-shaped step can be stacked on the graphite bottom box 141a while leaving a placement space for the substrate 200 including the surface silicon layer. Those skilled in the art can understand that at least one graphite box 141 including the graphite bottom box 141a and the graphite elevation box 141b is only exemplary, and at least one graphite box 141 can also be integrally formed.

[0133] The apparatus for preparing a substrate including a silicon carbide layer according to any embodiment of the present disclosure can be used to prepare a substrate including a silicon carbide layer.

[0134] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may include the following steps:

[0135] Step 1: Make the accommodation space inside the housing of the apparatus for preparing a substrate including a silicon carbide layer a vacuum environment, heat it to a temperature T1, for example, 900 °C, so that the internal air pressure P1 of the apparatus for preparing a substrate including a silicon carbide layer is less than 0.1 Pa. The surface of the substrate including the surface silicon layer in the permeable chamber is in the silicon vapor pressure generated by the high-purity silicon powder at the bottom of the permeable chamber, and surface deoxidation is achieved at a relatively low temperature, which is beneficial to suppressing defects formed by high-temperature deoxidation;

[0136] Step 2: Continue to heat to a temperature T2, for example, 1000 °C - 1300 °C, and introduce a carbide-containing gas (such as CO gas) to convert the silicon on the surface into silicon carbide (2Si + CO = SiO + SiC). The silicon vapor generated by the silicon powder is greater than the silicon evaporation amount on the surface of the single-crystal silicon wafer, effectively suppressing the generation of holes on the silicon surface;

[0137] Step 3: Stop introducing the carbide-containing gas (such as CO gas) to complete the conversion of silicon carbide.

[0138] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: heating the substrate including the surface silicon layer in the silicon vapor pressure for surface deoxidation.

[0139] In some embodiments of the present disclosure, since pure silicon is extremely likely to form SiO2 after being exposed to the atmosphere, surface deoxidation treatment is first required.

[0140] In some embodiments of the present disclosure, in the silicon vapor pressure, through the reaction of Si + SiO2 = 2SiO, it is beneficial to inhibit the defects formed by high-temperature deoxidation, and surface deoxidation can be achieved at a relatively low temperature.

[0141] In some embodiments, it can be first heated from room temperature to 300 °C, and the internal pressure P1 of the device for preparing the substrate including the silicon carbide layer is made less than 0.02 Pa (if the pressure is greater than 0.02 Pa, then maintain 300 °C until the pressure is less than 0.02 Pa), and then continue to heat up to 900 °C, and the internal pressure P1 of the device for preparing the substrate including the silicon carbide layer is made less than 0.1 Pa (if the pressure at 900 °C is greater than 0.1 Pa, then continue to maintain 900 °C until the pressure is less than 0.1 Pa). Since the substrate including the surface silicon layer in the air-permeable chamber is exposed to the silicon vapor pressure, through the reaction of Si + SiO2 = 2SiO, it is beneficial to inhibit the defects formed by high-temperature deoxidation, and surface deoxidation can be achieved at a relatively low temperature.

[0142] In some embodiments, a carbide-containing gas (such as CO gas) can be introduced at a flow rate of 10 - 50 sccm to increase the pressure to 70 - 250 Pa. After the pressure inside the device is stabilized, continue to heat the inside of the device to a temperature of 1000 °C - 1300 °C and maintain it for a certain period of time, such as 5 - 60 minutes. The silicon on the surface will gradually be converted into silicon carbide (2Si + CO = SiO + SiC). During this process, the silicon vapor generated by the silicon powder is greater than the silicon evaporation amount on the surface of the single-crystal silicon wafer, and it will continue to play a role in inhibiting the generation of holes on the silicon surface.

[0143] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: during or after surface deoxidation, by controlling the heating temperature and heating time, controlling the silicon thickness that generates silicon point vacancies to control the thickness of the silicon carbide layer. For example, in some embodiments of the present disclosure, during or after surface deoxidation of the silicon wafer in step 1, silicon point vacancies are generated inside the silicon. By controlling the heating temperature and heating time, the silicon thickness that generates silicon point vacancies is controlled, thereby controlling the subsequent silicon carbide conversion thickness to control the thickness of the silicon carbide layer.

[0144] In some embodiments of the present disclosure, after surface deoxidation of the silicon wafer, the silicon wafer can be pre-annealed.

[0145] In some embodiments, stop introducing the carbide-containing gas (such as CO gas), evacuate the carbide gas inside the device and other gases generated by the reaction, and at the same time stop heating. After the temperature inside the device drops to room temperature, take out the sample whose surface has completed the silicon carbide conversion.

[0146] In some embodiments of the present disclosure, after a silicon-containing gas generated from silicon powder reacts with single-crystalline silicon to obtain a substrate including a silicon carbide layer, the substrate including the silicon carbide layer is continuously heated. By using the silicon vapor pressure generated from the silicon powder, the surface of the silicon carbide is etched, which can further improve the surface quality of the silicon carbide and is beneficial for subsequent epitaxy.

[0147] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include step 4: continuously heating to a temperature T3, where T3 is higher than T2 but less than 1415 °C. For example, T3 is higher than 1000 °C - 1300 °C but less than 1415 °C. By using the silicon vapor pressure generated from the silicon powder at the bottom, the surface of the silicon carbide is etched.

[0148] In the device for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, because the vapor pressure generated by the silicon powder at the bottom of the gas-permeable chamber where the substrate including the silicon carbide layer is located is higher than the silicon evaporation on the surface of the silicon wafer, it is possible to generate internal silicon point vacancies while suppressing the generation of hole defects on the surface of the silicon wafer. Therefore, by using the device for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, not only can a thicker silicon carbide film be generated, but also the surface quality of the silicon carbide film is higher.

[0149] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: annealing during the process of generating silicon carbide on the surface silicon layer, or annealing after generating silicon carbide, converting the amorphous silicon in the Si layer deposited on the surface of the SiC layer during the sputtering process into silicon carbide, for example, to obtain a 3C-SiC / SiC composite substrate.

[0150] The 3C-SiC / SiC composite substrate obtained in some embodiments of the present disclosure can be directly used according to actual needs, or can be used after the 3C-SiC layer is further thickened subsequently.

[0151] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include epitaxially growing on the silicon carbide layer to form an epitaxial III-V layer.

[0152] In some embodiments of the present disclosure, the epitaxial III-V layer may include gallium nitride (GaN).

[0153] In some embodiments of the present disclosure, the substrate including a surface silicon layer is a single-crystalline silicon wafer. By using the method in some embodiments of the present disclosure, silicon carbide is generated on at least one side surface silicon layer of the single-crystalline silicon wafer to obtain a 3C-SiC / Si composite substrate.

[0154] In some embodiments of the present disclosure, the substrate including a surface silicon layer is a diamond, sapphire or ceramic with a silicon layer on its surface. By the method in some embodiments of the present disclosure, the silicon layer on the surface of the diamond, sapphire or ceramic is entirely converted into silicon carbide, respectively obtaining composite substrates such as 3C-SiC / diamond, 3C-SiC / sapphire, 3C-SiC / ceramic, etc.

[0155] Figure 5 The photograph of the substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0156] As Figure 5 shown, the substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure has no problems such as cracking and warping.

[0157] Figure 6 The reflection high energy electron diffraction (RHEED) image of the substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0158] From Figure 6 it can be seen that the atomic arrangement periodicity in the plane of the substrate including a silicon carbide layer prepared is single crystal.

[0159] Figure 7 The X-ray diffraction (XRD) test result of the substrate including a silicon carbide layer prepared by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure is shown.

[0160] From Figure 7 it can be seen that for the substrate including a silicon carbide layer obtained by the method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure, the atomic arrangement periodicity in the direction perpendicular to the film is such that pure SiC is obtained on the surface silicon layer, i.e., silicon, rather than SixCy with other compositions (x:y≠1:1), and at the same time, there are no peaks of other crystal orientations of SiC except for the Si substrate, indicating that single crystal SiC is obtained.

[0161] The method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure can bring beneficial technical effects. For example, in some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer converts the surface silicon layer into a SiC layer based on the principle of replacing silicon atoms with carbon atoms, overcoming problems such as dislocations and cracks caused by lattice mismatch, different thermal expansion coefficients, etc.

[0162] For another example, in some embodiments of the present disclosure, inexpensive low-quality silicon carbide and inexpensive single-crystalline silicon wafers are used to obtain composite substrates such as 3C-SiC / Si, thereby reducing the cost of the SiC substrate. For still another example, in some embodiments of the present disclosure, after bonding low-quality silicon carbide to single-crystalline silicon, the single-crystalline silicon is then converted into 3C-SiC, and there is no problem of impurity diffusion throughout the process, and the obtained SiC substrate has better quality.

[0163] Those skilled in the art can understand that the method and apparatus for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure are not limited to forming substrates, but can also be used to form various semiconductor structures or semiconductor devices.

[0164] In some embodiments of the present disclosure, a semiconductor device includes a substrate including a silicon carbide layer obtained by the method for preparing a substrate including a silicon carbide layer according to any one of the embodiments of the present disclosure.

[0165] It should be noted that the above are only exemplary embodiments of the present disclosure, and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A method for preparing a substrate comprising a silicon carbide layer, characterized in that, Comprising: Bonding a low-quality silicon carbide substrate to a single-crystalline silicon wafer to form a substrate comprising a surface silicon layer; Forming an atmosphere containing a carbide gas around the substrate comprising the surface silicon layer, the atmosphere containing the carbide gas further comprising a silicon-containing gas, and forming the atmosphere containing the carbide gas includes: Heating silicon powder to generate a silicon-containing gas; and / or Introducing a silicon-containing gas into the substrate comprising the surface silicon layer; Heating the substrate comprising the surface silicon layer to cause the surface silicon layer to form a single-crystalline silicon carbide layer.

2. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, wherein Bonding the low-quality silicon carbide substrate to the single-crystalline silicon wafer to form the substrate comprising the surface silicon layer includes: Directly contacting and bonding the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide substrate to obtain the substrate comprising the surface silicon layer; or Bonding the low-quality silicon carbide substrate to the single-crystalline silicon wafer to form the substrate comprising the surface silicon layer includes: Forming a transition layer on the back surface of the single-crystalline silicon wafer or the front surface of the low-quality silicon carbide substrate; and Bonding the back surface of the single-crystalline silicon wafer and the front surface of the low-quality silicon carbide substrate through the transition layer to obtain the substrate comprising the surface silicon layer.

3. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, Bonding the low-quality silicon carbide substrate to the single-crystalline silicon wafer to form the substrate comprising the surface silicon layer includes: Injecting ions from the back surface of a single-crystalline silicon ingot to form a defect layer at a preset depth, and a single-crystalline silicon wafer is formed on one side of the defect layer facing the back surface of the single-crystalline silicon ingot; Bonding the back surface of the single-crystalline silicon ingot and the front surface of the low-quality silicon carbide substrate to form a composite structure; and Applying stress to the composite structure such that the single-crystalline silicon wafer in the composite structure peels off along the defect layer to obtain the substrate comprising the surface silicon layer.

4. The method for preparing a substrate comprising a silicon carbide layer according to claim 3, characterized in that, Bonding the low-quality silicon carbide substrate to the single-crystalline silicon wafer to form the substrate comprising the surface silicon layer further includes: Performing surface treatment on the surface of the single-crystalline silicon wafer in the substrate comprising the surface silicon layer that is away from the low-quality silicon carbide substrate to remove the damaged layer during defect layer peeling.

5. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, Bonding the low-quality silicon carbide substrate to the single-crystalline silicon wafer to form a substrate comprising a surface silicon layer includes: Depositing a silicon layer on the low-quality silicon carbide substrate; Performing fast atom beam irradiation on the surface of the low-quality silicon carbide substrate to etch the deposited silicon layer; Performing fast atom beam irradiation on the single-crystalline silicon wafer; and Bonding the low-quality silicon carbide substrate and the single-crystalline silicon wafer through the etched deposited silicon layer to obtain the substrate comprising the surface silicon layer.

6. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, wherein The thickness of the single-crystalline silicon wafer is 50 - 300 μm; and / or The thickness of the single-crystalline silicon carbide layer is 10 - 5000 nm.

7. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, Further comprising: After bonding the low-quality silicon carbide substrate to the single-crystalline silicon wafer, thinning the single-crystalline silicon wafer.

8. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, wherein The carbide gas includes carbon monoxide and / or carbon dioxide, or a mixed gas of carbon monoxide and / or carbon dioxide and an inert gas; and / or The silicon carbide layer has self-assembled silicon carbide patterns.

9. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, The silicon-containing gas includes silane and / or disilane and / or trichlorosilane.

10. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, wherein, The ambient air pressure around the substrate including the surface silicon layer is controlled at 10 - 800 Pa; and The ambient temperature of the substrate including the surface silicon layer is heated to 950 - 1400 °C to form a single-crystal silicon carbide layer on the surface silicon layer.

11. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-10, characterized in that, It further includes: Performing pre-annealing after heating the substrate including the surface silicon layer, along with extracting the generated silicon vapor from the reaction zone.

12. The method for preparing a substrate comprising a silicon carbide layer according to claim 11, characterized in that, Performing pre-annealing after heating the substrate including the surface silicon layer, including: Placing the substrate in a vacuum furnace and evacuating the air; and Heating the substrate including the surface silicon layer to 1200 - 1400 °C and maintaining it for 1 - 150 minutes under a pressure of < 25 Pa, along with extracting the generated silicon vapor from the reaction zone.

13. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-10, characterized in that, Thickening the single-crystal silicon carbide layer.

14. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-10, characterized in that, It further includes: Heating the substrate including the surface silicon layer in the silicon vapor pressure for surface deoxidation; and / or Heating the substrate including the silicon carbide layer while raising the temperature in the silicon vapor pressure to etch the silicon carbide layer.

15. The method for preparing a substrate comprising a silicon carbide layer according to claim 14, characterized in that, It further includes: During or after surface deoxidation, controlling the silicon thickness that generates silicon point vacancies by controlling the heating temperature and heating time to control the thickness of the silicon carbide layer.

16. A semiconductor device, characterized in that, Including the substrate including the silicon carbide layer obtained by the method for preparing a substrate including a silicon carbide layer according to any one of claims 1 - 15.

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