Resonator device and method for manufacturing resonator device

By forming a second wiring and a cover layer with a small surface roughness in the through hole of the semiconductor device, and forming a first wiring with a thick thickness in combination with the electroplating process, the problems of easy disconnection and poor bonding in the prior art are solved, and a high-reliability vibration device manufacturing is achieved.

CN120377814APending Publication Date: 2025-07-25SEIKO EPSON CORP
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Patent Information

Application Number
CN202510100532.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-01-24
Filing Date
2025-01-22
Publication Date
2025-07-25

AI Technical Summary

Technical Problem

In the prior art, the wiring of the semiconductor device is prone to breaking in the through hole and the vibrating element and wiring are poorly bonded, making it difficult to simultaneously suppress the broken wire and good bonding.

Method used

A second wiring with a small surface roughness is formed in the through hole, a cover layer is formed by sputtering, and a bonding member is bonded to the vibrating element, and a first wiring with a thicker thickness is formed in combination with an electroplating process to improve connection reliability.

Benefits of technology

The disconnection in the through hole is effectively suppressed, the good connection between the vibration element and the wiring is ensured, and the reliability and mechanical strength of the vibration device are improved.

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Abstract

The invention provides a vibration device and a manufacturing method of the vibration device. This resonator device is provided with: a semiconductor substrate having a first surface and a second surface, and in which a through-hole penetrating the first surface and the second surface is formed; a semiconductor circuit disposed on the second surface side and including a conductive layer exposed in the through hole; a first wiring disposed on the inner peripheral surface of the through hole and electrically connected to the conductive layer; a second wiring disposed on the first surface and including a wiring layer having a surface roughness smaller than that of the first wiring and a cover layer covering the wiring layer; and a vibration element which is located on the first surface side and is bonded to the second wiring by means of a bonding member.
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Description

Technical Field

[0001] The present invention relates to a vibration device and a method for manufacturing the vibration device. Background Art

[0002] For example, the semiconductor device described in Patent Document 1 includes: a semiconductor substrate having an upper surface and a lower surface that are in a positive and negative relationship with each other, and through holes penetrating the upper surface and the lower surface; a first conductive layer disposed on the lower surface of the semiconductor substrate and exposed in the through holes; an insulating layer disposed on the inner wall of the through holes; an organic insulating layer disposed on the insulating layer; and a wiring disposed on the organic insulating layer and electrically connected to the first conductive layer through a second opening portion of the organic insulating layer. In addition, the wiring extends from inside the through holes to the upper surface of the semiconductor substrate.

[0003] Prior Art Documents

[0004] Patent Document 1: Japanese Patent Application Laid-Open No. 2018-113466

[0005] When applying a semiconductor device having such a structure to an oscillator that oscillates a specified frequency signal, the oscillator has a structure having: the above-described semiconductor device; a vibration element located on the upper surface side of the semiconductor device and bonded to the wiring on the upper surface by a bonding member; and a lid bonded to the upper surface of the semiconductor substrate, and hermetically sealing the vibration element between the lid and the semiconductor substrate. However, in the semiconductor device described in Patent Document 1, the portion of the wiring disposed in the through holes and the portion disposed on the upper surface are both formed by copper plating and have the same structure, so that disconnection of the wiring in the through holes or poor bonding between the vibration element and the wiring is likely to occur. That is, it is difficult to satisfactorily bond the vibration element to the wiring while suppressing disconnection of the wiring. Summary of the Invention

[0006] The vibration device of the present invention includes:

[0007] a semiconductor substrate having a first surface and a second surface that are in a positive and negative relationship with each other, and through holes penetrating the first surface and the second surface;

[0008] a semiconductor circuit disposed on the second surface side of the semiconductor substrate and having a conductive layer exposed in the through holes;

[0009] a first wiring disposed on the inner peripheral surface of the through holes and electrically connected to the conductive layer;

[0010] a second wiring disposed on the first surface and having a wiring layer with a smaller surface roughness than the first wiring and a covering layer covering the wiring layer; and

[0011] A vibration element is located on the first surface side of the semiconductor substrate and is bonded to the second wiring by a bonding member.

[0012] The method for manufacturing a vibration device according to the present invention includes the following steps:

[0013] A preparation step of preparing a semiconductor device having a semiconductor substrate and a semiconductor circuit, where the semiconductor substrate has a first surface and a second surface in a front-back relationship with each other, and a through hole penetrating the first surface and the second surface is formed, and the semiconductor circuit is disposed on the second surface side of the semiconductor substrate and includes a conductive layer exposed in the through hole;

[0014] A first wiring formation step of forming a first wiring electrically connected to the conductive layer in the through hole by plating;

[0015] A second wiring formation step of forming a second wiring on the first surface by sputtering, where the second wiring includes a wiring layer having a smaller surface roughness than the first wiring and a covering layer covering the wiring layer; and

[0016] A vibration element bonding step of bonding a vibration element to the second wiring by a bonding member. Description of the Drawings

[0017] Figure 1 It is a cross-sectional view showing a vibration device according to the first embodiment.

[0018] Figure 2 It is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate.

[0019] Figure 3 It is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate.

[0020] Figure 4 It is a top view showing the upper surface of a semiconductor device.

[0021] Figure 5 It is a cross-sectional view of a semiconductor device.

[0022] Figure 6 It is a top view showing a vibration element.

[0023] Figure 7 It is a cross-sectional view for explaining a method of forming a bonding member.

[0024] Figure 8 It is a cross-sectional view for explaining problems in plating.

[0025] Figure 9 It is a flowchart showing the manufacturing process of a vibration device.

[0026] Figure 10 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0027] Figure 11 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0028] Figure 12 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0029] Figure 13 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0030] Figure 14 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0031] Figure 15 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0032] Figure 16 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0033] Figure 17 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0034] Figure 18 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0035] Figure 19 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0036] Figure 20 It is a cross-sectional view for explaining a manufacturing method of a vibration device.

[0037] Figure 21 It is a cross-sectional view showing the vibration device according to the second embodiment.

[0038] Figure 22 It is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate.

[0039] Figure 23 It is an enlarged cross-sectional view of a through hole formed in a semiconductor substrate.

[0040] Reference numeral description

[0041] 1: Vibration device; 2: Semiconductor device; 3: Vibration element; 31: Vibration substrate; 321: Excitation electrode; 322: Excitation electrode; 323: Terminal; 324: Terminal; 325: Wiring; 326: Wiring; 4: Cover body; 40: Bonding component; 41: Recess; 5: Semiconductor substrate; 5a: Upper surface; 5b: Lower surface; 5c: Boundary part; 51: Through-hole; 52: Through-hole; 60: Insulating film; 611: First organic resin film; 611a: Recess; 612: First organic resin film; 612a: Recess; 621: Second organic resin film; 622: Second organic resin film; 631: Third organic resin film; 632: Third organic resin film; 7: Semiconductor circuit; 70: Oscillation circuit; 700: Component; 71: Stacked body; 72: Wiring layer; 721: Electrode pad; 722: Electrode pad; 73: Insulating layer; 74: Passivation film; 75: Terminal layer; 751: External terminal; 8A: Wiring; 8B: Wiring; 811: First wiring; 811a: Recess; 812: First wiring; 812a: Recess; 821: Second wiring; 821a: Internal terminal; 821b: Wiring layer; 821c: Covering layer; 822: Second wiring; 822a: Internal terminal; 822b: Wiring layer; 822c: Covering layer; B1: Bonding component; B2: Bonding component; L: Plating solution; M: Mask; P: Package; Q: Abnormal part; S: Accommodation space; S1: Preparation process; S2: First wiring formation process; S3: Second wiring formation process; S4: Bonding component formation process; S5: Vibration element bonding process; S6: Cover body bonding process. Detailed implementation mode

[0042] Hereinafter, based on the embodiments shown in the drawings, the vibration device of the present invention and the manufacturing method of the vibration device will be described in detail.

[0043] First embodiment

[0044] Figure 1 It is a cross-sectional view showing the vibration device according to the first embodiment. Figure 2 And Figure 3 They are enlarged cross-sectional views of the through-holes formed in the semiconductor substrate, respectively. Figure 4 It is a top view showing the upper surface of the semiconductor device. Figure 5 It is a cross-sectional view of the semiconductor device. Figure 6 It is a top view showing the vibration element. Figure 7 It is a cross-sectional view for explaining the formation method of the bonding component. Figure 8 It is a cross-sectional view for explaining the problems in the plating process. Figure 9 It is a flowchart showing the manufacturing process of the vibration device. Figures 10 to 20These are cross-sectional views for explaining a manufacturing method of a vibration device. In addition, for ease of explanation, in each figure, an X-axis, a Y-axis, and a Z-axis perpendicular to each other are illustrated. Further, the side toward which the arrow in the Z-axis direction faces is referred to as "upper", and the opposite side is referred to as "lower". In addition, the top view from the Z-axis direction is simply referred to as "top view".

[0045] As Figure 1 shown, the vibration device 1 includes: a semiconductor device 2; a vibration element 3 disposed on the upper surface of the semiconductor device 2; and a lid 4 that covers the vibration element 3 and is joined to the upper surface of the semiconductor device 2. In such a vibration device 1, a package P is formed by the semiconductor device 2 and the lid 4, and the vibration element 3 is housed in a housing space S that the package P has.

[0046] Semiconductor device 2

[0047] As Figure 1 shown, the semiconductor device 2 has a semiconductor substrate 5. The semiconductor substrate 5 is a silicon substrate. However, the semiconductor substrate 5 is not particularly limited, and for example, a substrate made of a semiconductor material other than silicon such as Ge, GaP, GaAs, or InP may also be used. In addition, the semiconductor substrate 5 has an upper surface 5a as a first surface and a lower surface 5b as a second surface in a front-back relationship. In addition, a pair of through holes 51, 52 penetrating the upper surface 5a and the lower surface 5b are formed in the semiconductor substrate 5. The through holes 51, 52 can be formed by, for example, RIE (reactive ion etching). Thereby, through holes 51, 52 with a high aspect ratio can be formed. However, the formation method of the through holes 51, 52 is not particularly limited.

[0048] In addition, the semiconductor device 2 has insulating films 60 formed on the upper surface 5a and the lower surface 5b of the semiconductor substrate 5. In addition, the insulating film 60 formed on the upper surface 5a enters the through holes 51, 52 and is also formed at the upper end portions of the through holes 51, 52. The insulating film 60 is made of, for example, silicon oxide (SiO2). In addition, the insulating film 60 can be formed by, for example, sputtering. However, the constituent material and the formation method of the insulating film 60 are not particularly limited.

[0049] In addition, the semiconductor device 2 has a semiconductor circuit 7 formed on the lower surface 5b side of the semiconductor substrate 5 and electrically connected to the vibration element 3. The semiconductor circuit 7 includes an oscillation circuit 70 that oscillates the vibration element 3 to generate a reference signal such as a clock signal. Thereby, the vibration device 1 becomes an oscillator, and high versatility and demand can be expected.

[0050] The semiconductor circuit 7 includes: a plurality of elements 700 formed on the lower surface 5b of the semiconductor substrate 5; and a stacked body 71 stacked on the lower surface 5b of the semiconductor substrate 5. The stacked body 71 has: a wiring layer 72 formed on the lower surface 5b of the semiconductor substrate 5; an insulating layer 73 formed on the lower surface of the wiring layer 72; a passivation film 74 formed on the lower surface of the insulating layer 73; and a terminal layer 75 formed on the lower surface of the passivation film 74. Moreover, the plurality of elements 700 are electrically connected to each other by wirings included in the wiring layer 72 and interlayer through electrodes to constitute an oscillation circuit 70. The elements 700 are, for example, transistors, resistors, capacitor elements, etc.

[0051] Thus, by forming the semiconductor circuit 7 on the semiconductor substrate 5, the space of the semiconductor substrate 5 can be effectively utilized. In addition, since the semiconductor circuit 7 can be integrally formed with the vibration device 1, miniaturization of the entire device can also be achieved. In particular, by forming the semiconductor circuit 7 on the lower surface 5b side, the formable area of the semiconductor circuit 7 becomes wider corresponding to the amount of the joint area with the cover body 4 not existing compared with the case of forming the semiconductor circuit 7 on the upper surface 5a side. Therefore, the design freedom of the semiconductor circuit 7 increases.

[0052] In addition, in the present embodiment, the stacked body 71 includes one wiring layer 72, but is not limited thereto, and a plurality of wiring layers 72 may be stacked with an insulating layer 73 interposed therebetween. That is, it may also be that the wiring layer 72 and the insulating layer 73 are alternately stacked a plurality of times between the semiconductor substrate 5 and the passivation film 74. Thereby, the freedom of routing is improved and circuit design becomes easier.

[0053] In addition, the wiring layer 72 has: electrode pads 721, which are conductive layers, overlapping with the through holes 51 and exposed in the through holes 51; and electrode pads 722, which are conductive layers, overlapping with the through holes 52 and exposed in the through holes 52. In addition, the terminal layer 75 has a plurality of external terminals 751 for connecting the semiconductor circuit 7 to an external device. Each external terminal 751 penetrates the insulating layer 73 and the passivation film 74 and is electrically connected to the wiring layer 72.

[0054] Furthermore, as Figures 1 to 3 shown, the semiconductor device 2 has second organic resin films 621 and 622 disposed in the through holes 51 and 52. The second organic resin films 621 and 622 each have insulating properties. In addition, the second organic resin film 621 is disposed on the inner peripheral surface of the through hole 51 and covers the inner peripheral surface of the through hole 51. Similarly, the second organic resin film 622 is disposed on the inner peripheral surface of the through hole 52 and covers the inner peripheral surface of the through hole 52. Thus, by covering the inner peripheral surfaces of the through holes 51 and 52 with the second organic resin films 621 and 622, the first wirings 811 and 812 can be more reliably insulated from the semiconductor substrate 5.

[0055] In addition, the second organic resin films 621 and 622 extend from the upper openings of the through holes 51 and 52 to the upper surface 5a, covering the boundary portions 5c between the through holes 51 and 52 and the upper surface 5a. Moreover, the surfaces of the portions of the second organic resin films 621 and 622 covering the boundary portions 5c have rounded corners. Further, inside the through holes 51 and 52, the inner peripheral surfaces of the second organic resin films 621 and 622 are conical with the inner diameter gradually decreasing from the upper side to the lower side.

[0056] There is no particular limitation on the constituent material of the second organic resin films 621 and 622, and for example, polyimide resin, epoxy resin, etc. can be used.

[0057] As Figures 1 to 3 shown, the semiconductor device 2 further includes first wirings 811 and 812 disposed inside the through holes 51 and 52 and electrically connected to the electrode pads 721 and 722. The first wiring 811 is disposed on the inner peripheral surface of the second organic resin film 621 inside the through hole 51 and is electrically connected to the electrode pad 721 via the lower opening of the through hole 51. The first wiring 811 is disposed in the space surrounded by the inner peripheral surface of the through hole 51. Moreover, inside the through hole 51, the second organic resin film 621 is disposed between the inner peripheral surface of the through hole 51 and the first wiring 811.

[0058] Similarly, the first wiring 812 is disposed on the inner peripheral surface of the second organic resin film 622 inside the through hole 52 and is electrically connected to the electrode pad 722 via the lower opening of the through hole 52. The first wiring 812 is disposed in the space surrounded by the inner peripheral surface of the through hole 52. Moreover, inside the through hole 52, the second organic resin film 622 is disposed between the inner peripheral surface of the through hole 52 and the first wiring 812.

[0059] In addition, the first wirings 811 and 812 extend from the upper openings of the through holes 51 and 52 to the upper surface 5a and extend to positions outside the second organic resin films 621 and 622. Further, as described above, the portions of the second organic resin films 621 and 622 covering the boundary portions 5c have rounded corners, so that formation defects, damage, disconnection, etc. of the first wirings 811 and 812 at the boundary portions 5c can be effectively suppressed. In addition, the first wirings 811 and 812 cover the through holes 51 and 52 and the second organic resin films 621 and 622 disposed in the through holes 51 and 52. Moreover, the portions of the first wirings 811 and 812 extending to the upper surface 5a surround the through holes 51 and 52 and the second organic resin films 621 and 622 in a top view.

[0060] The first wirings 811 and 812 are plated wirings formed by electroplating. Thus, by forming the first wirings 811 and 812 using electroplating, it is easy to form the first wirings 811 and 812 thick, and it is possible to effectively suppress disconnection of the first wirings 811 and 812 in the vias 51 and 52. In addition, high interlayer adhesion can be exhibited. However, as the plating treatment, it is not limited to electroplating, and the first wirings 811 and 812 can also be formed by electroless plating.

[0061] Here, in the electroplating treatment, a seed layer for growing a plating layer is formed in the vias 51 and 52 and on the upper surface 5a by sputtering. Then, in the present embodiment, as described above, the inner peripheral surfaces of the second organic resin films 621 and 622 are made conical, ensuring the coverage range of sputtering when forming the seed layer. Therefore, the seed layer can be formed with a desired thickness over its entire area, and as a result, the first wirings 811 and 812 can be formed with high precision.

[0062] There is no particular limitation on the constituent material of the first wirings 811 and 812. For example, copper (Cu) can be used. In addition, the constituent material being copper (Cu) means using copper (Cu) as the main material, and as long as copper (Cu) is used as the main material, other materials can also be added. In addition, there is no particular limitation on the structure of the seed layer. For example, it can be a laminate of a base layer made of a titanium / tungsten alloy (TiW) and a surface layer made of copper (Cu).

[0063] As Figures 1 to 3 shown, the semiconductor device 2 also has first organic resin films 611 and 612 disposed so as to fill at least a part of the vias 51 and 52. The first organic resin films 611 and 612 each have insulating properties. The first organic resin film 611 is disposed on the first wiring 811 to cover the first wiring 811. Similarly, the first organic resin film 612 is disposed on the first wiring 812 to cover the first wiring 812. Thus, by covering the first wirings 811 and 812 with the first organic resin films 611 and 612, it is possible to effectively suppress deterioration of the electrical characteristics of the first wirings 811 and 812 due to oxidation. In addition, by filling at least a part of the vias 51 and 52 with the first organic resin films 611 and 612, the airtightness of the accommodation space S can also be improved.

[0064] In addition, the first organic resin films 611 and 612 extend from the upper openings of the through holes 51 and 52 to the upper surface 5a, and also cover the portions of the first wirings 811 and 812 located on the upper surface 5a around the through holes 51 and 52. Therefore, a larger range of the first wirings 811 and 812 is covered by the first organic resin films 611 and 612, and the deterioration of the electrical characteristics of the first wirings 811 and 812 caused by oxidation can be more effectively suppressed. In addition, the outer edge portions of the first wirings 811 and 812 are exposed from the first organic resin films 611 and 612 in order to achieve electrical connection with the second wirings 821 and 822 described later. Further, the first organic resin films 611 and 612 cover the through holes 51 and 52 and the portions of the first wirings 811 and 812 disposed in the through holes 51 and 52. Moreover, the portions of the first organic resin films 611 and 612 extending to the upper surface 5a surround the through holes 51 and 52 in plan view.

[0065] In addition, the first organic resin films 611 and 612 have recessed portions 611a and 612a recessed into the through holes 51 and 52 on their surfaces. Here, the film thickness of the first organic resin films 611 and 612 at the central portions of the through holes 51 and 52 is thicker than that at the edge portions of the through holes 51 and 52. Therefore, the recessed portions 611a and 612a are shallower than the through holes 51 and 52 and have a gentle slope. Thereby, the coverage range of sputtering when forming the second wirings 821 and 822 described later can be ensured, and the second wirings 821 and 822 can be formed with high precision. In addition, since the first organic resin films 611 and 612 have the recessed portions 611a and 612a, the film thickness at the recessed portions 611a and 612a is thinner than that around them at the central portions of the first organic resin films 611 and 612. Moreover, the film thickness of the central portions of the first organic resin films 611 and 612 is thicker than that at the edge portions of the through holes 51 and 52 located outside them.

[0066] The constituent material of the first organic resin films 611 and 612 is not particularly limited. For example, like the above-described second organic resin films 621 and 622, polyimide resin, epoxy resin, etc. can be used. In particular, by forming the first organic resin films 611 and 612 and the second organic resin films 621 and 622 from the same material, their coefficients of linear expansion are equal, and for example, delamination between layers can be effectively suppressed.

[0067] As Figures 1 to 3As shown, the semiconductor device 2 also includes second wirings 821 and 822 disposed on the upper surface 5a of the semiconductor substrate 5. The second wiring 821 overlaps with the outer edge portion of the first wiring 811 at the upper surface 5a, that is, the portion exposed from the first organic resin film 611, and is thereby electrically connected to the first wiring 811. Moreover, a single wiring 8A is formed by the first wiring 811 and the second wiring 821. With such a structure, the first wiring 811 and the second wiring 821 can be easily connected. In addition, the portion where the first wiring 811 and the second wiring 821 are joined surrounds the through hole 51 and the second organic resin film 621 in a plan view. Similarly, the second wiring 822 overlaps with the outer edge portion of the first wiring 812 at the upper surface 5a, that is, the portion exposed from the first organic resin film 612, and is thereby electrically connected to the first wiring 812. Moreover, a single wiring 8B is formed by the first wiring 812 and the second wiring 822. With such a structure, the first wiring 812 and the second wiring 822 can be easily connected. In addition, the portion where the first wiring 812 and the second wiring 822 are joined surrounds the through hole 52 and the second organic resin film 622 in a plan view.

[0068] In addition, as Figure 4 shown, the second wirings 821 and 822 have internal terminals 821a and 822a disposed at one end thereof and joined to the vibration element 3.

[0069] In addition, as Figure 2 and Figure 3 shown, the second wirings 821 and 822 are also formed on the first organic resin films 611 and 612 so as to cover the upper openings of the through holes 51 and 52, and cover at least a part of the first wirings 811 and 812 from the first organic resin films 611 and 612. Thereby, the outgassing generated from the first wirings 811 and 812 can be pre-sealed in the through holes 51 and 52 by the second wirings 821 and 822. Therefore, the environmental change of the accommodation space S caused by outgassing can be suppressed, and in particular, the increase in pressure can be suppressed. Therefore, the vibration characteristics of the vibration element 3 are stable, and a highly reliable vibration device 1 is obtained. In particular, in the present embodiment, the second wirings 821 and 822 cover the entire first wirings 811 and 812. Therefore, the above effect becomes more remarkable.

[0070] The second wirings 821 and 822 are sputtering wirings formed by sputtering. In addition, the second wirings 821 and 822 have a smaller surface roughness and a thinner thickness than the first wirings 811 and 812. For example, the surface roughness of the second wirings 821 and 822 is one-tenth or less of the surface roughness of the first wirings 811 and 812. By forming the second wirings 821 and 822 by sputtering, generation of outgassing from the second wirings 821 and 822 can be suppressed. Therefore, environmental changes in the storage space S can be suppressed, and in particular, an increase in pressure can be suppressed. In addition, the second wirings 821 and 822 become dense films, and outgassing generated from the first wirings 811 and 812 can be more reliably sealed in advance in the through-holes 51 and 52. Furthermore, as described above, at least a part of the through-holes 51 and 52 is filled with the first organic resin films 611 and 612, and concave portions 611a and 612a that are shallower and gentler than the through-holes 51 and 52 are formed on the surfaces of the first organic resin films 611 and 612. Therefore, the coverage range of sputtering can be ensured, and the second wirings 821 and 822 can be formed with high precision. Therefore, the second wirings 821 and 822 can more reliably cover the entire area of the first wirings 811 and 812 from above the first organic resin films 611 and 612.

[0071] As Figure 2 well as Figure 3 shown, the second wirings 821 and 822 are composed of a laminate of wiring layers 821b and 822b and covering layers 821c and 822c arranged to cover the wiring layers 821b and 822b. In addition, although not shown, the wiring layers 821b and 822b are composed of a laminate of a base layer made of a titanium / tungsten alloy (TiW) and a wiring layer made of copper (Cu). In addition, although not shown, the covering layers 821c and 822c are composed of a laminate of a base layer made of titanium (Ti) and a surface layer made of gold (Au). In this way, by covering the outermost surface of the second wirings 821 and 822 with a surface layer made of gold (Au), deterioration of the electrical characteristics of the second wirings 821 and 822 due to oxidation can be effectively suppressed.

[0072] As Figure 5As shown, the semiconductor device 2 also has third organic resin films 631 and 632 disposed on the upper surface 5a of the semiconductor substrate 5. The third organic resin films 631 and 632 are respectively insulating. The third organic resin film 631 is interposed between the upper surface 5a and the internal terminal 821a of the second wiring 821. In other words, the internal terminal 821a is formed on the third organic resin film 631 and covers the third organic resin film 631. Similarly, the third organic resin film 632 is interposed between the upper surface 5a and the internal terminal 822a of the second wiring 822. In other words, the internal terminal 822a is formed on the third organic resin film 632 and covers the third organic resin film 632.

[0073] As a constituent material of such third organic resin films 631 and 632, there is no particular limitation. For example, similar to the above-described first organic resin films 611 and 612 and second organic resin films 621 and 622, polyimide resin, epoxy resin, etc. can be used.

[0074] Cover body 4

[0075] As Figure 1 shown, the cover body 4 has a bottomed recess 41 which opens on the lower surface of the cover body 4 and houses the vibration element 3 therein. Moreover, the cover body 4 is joined to the upper surface of the semiconductor device 2, that is, the upper surface 5a of the semiconductor substrate 5, by a joining member 40 at its lower surface. Thereby, a storage space S for housing the vibration element 3 is formed between the cover body 4 and the semiconductor device 2. The storage space S is airtight and is in a decompressed state, preferably in a state closer to a vacuum. Thereby, the viscous resistance is reduced and the oscillation characteristics of the vibration element 3 are improved. However, the atmosphere of the storage space S is not particularly limited.

[0076] The cover body 4 is a silicon substrate similarly to the semiconductor substrate 5. Thus, the coefficient of linear expansion of the semiconductor substrate 5 and the cover body 4 is equal, generation of thermal stress caused by thermal expansion is suppressed, and a vibration device 1 having excellent vibration characteristics is obtained. In addition, since the vibration device 1 can be formed by semiconductor processes, the vibration device 1 can be manufactured with high precision and its miniaturization can be achieved. However, as the cover body 4, there is no particular limitation. For example, a substrate made of a semiconductor material other than silicon such as Ge, GaP, GaAs, InP, etc. can also be used.

[0077] Vibration element 3

[0078] As Figure 6As shown, the vibration element 3 has a vibration substrate 31 and electrodes disposed on the surface of the vibration substrate 31. The vibration substrate 31 has a thickness-shear vibration mode and is formed of an AT-cut quartz substrate in the present embodiment. Since the AT-cut quartz substrate has a third-order frequency-temperature characteristic, the vibration element 3 having excellent temperature characteristics is obtained. In addition, the electrodes include: an excitation electrode 321 disposed on the upper surface of the vibration substrate 31; and an excitation electrode 322 disposed on the lower surface of the vibration substrate 31 so as to face the excitation electrode 321. Further, the electrodes include: a pair of terminals 323 and 324 disposed on the lower surface of the vibration substrate 31; a wiring 325 electrically connecting the terminal 323 and the excitation electrode 321; and a wiring 326 electrically connecting the terminal 324 and the excitation electrode 322.

[0079] In addition, the structure of the vibration element 3 is not limited to the above structure. For example, the vibration element 3 may be a mesa type in which a vibration region sandwiched between the excitation electrodes 321 and 322 protrudes from its surroundings. On the contrary, it may also be an inverted mesa type in which the vibration region is recessed from its surroundings. Further, chamfering for grinding the periphery of the vibration substrate 31 or convex surface processing for making the upper and lower surfaces into convex curved surfaces may be performed.

[0080] In addition, as the vibration element 3, it is not limited to a vibration element vibrating in a thickness-shear vibration mode. For example, it may also be a vibration element in which a plurality of vibration arms bend and vibrate in the in-plane direction. That is, the vibration substrate 31 is not limited to being formed of an AT-cut quartz substrate, and may also be formed of a quartz substrate other than the AT-cut quartz substrate, such as an X-cut quartz substrate, a Y-cut quartz substrate, a Z-cut quartz substrate, a BT-cut quartz substrate, an SC-cut quartz substrate, an ST-cut quartz substrate, or the like. In addition, in the present embodiment, the vibration substrate 31 is made of quartz, but it is not limited thereto. For example, it may also be formed of a piezoelectric single crystal such as lithium niobate, lithium tantalate, lithium tetraborate, lanthanum gallium silicate, potassium niobate, gallium phosphate, or the like, or may also be formed of a piezoelectric single crystal other than them. Further, the vibration element 3 is not limited to a piezoelectric drive type vibration element, and may also be an electrostatic drive type vibration element using electrostatic force.

[0081] As Figure 5 shown, such a vibration element 3 is joined to the internal terminals 821a and 822a by conductive joining members B1 and B2. In addition, the joining member B1 electrically connects the internal terminal 821a and the terminal 323, and the joining member B2 electrically connects the internal terminal 822a and the terminal 324. Thereby, the vibration element 3 and the semiconductor circuit 7 are electrically connected via the joining members B1 and B2 and the wirings 8A and 8B.

[0082] Such bonding components B1 and B2 are micro bumps formed by electroplating. Thus, by forming the bonding components B1 and B2 using electroplating, it is possible to form the minute bonding components B1 and B2. Therefore, miniaturization of the vibration device 1 can be achieved. However, the bonding components B1 and B2 can also be formed by electroless plating. Additionally, although there is no particular limitation on the constituent material of the bonding components B1 and B2, in the present embodiment, gold (Au) is used. As a result, the bonding components B1 and B2 have excellent conductivity while suppressing deterioration of electrical characteristics due to oxidation.

[0083] For example, as Figure 7 shown, the bonding components B1 and B2 are formed through the following process: a mask M having openings at the formation sites of the bonding components B1 and B2 is formed, and then a voltage is applied while the semiconductor device 2 is immersed in the plating solution L. Here, as Figure 8 shown, when the surface roughness of the wiring layers 821b and 822b of the second wirings 821 and 822 is large, the covering layers 821c and 822c cannot be uniformly formed on their surfaces, and abnormal sites Q such as sites where the film thickness of the covering layers 821c and 822c is thin and via holes may be formed. Thus, if abnormal sites Q are formed in the covering layers 821c and 822c, when the semiconductor device 2 is immersed in the plating solution L, the wiring layers 821b and 822b dissolve into the plating solution L via the abnormal sites Q, resulting in copper (Cu), which is the constituent material of the wiring layers 821b and 822b, being mixed into the bonding components B1 and B2. Thus, when copper (Cu) is mixed into the bonding components B1 and B2, the purity of gold (Au) decreases, thereby reducing the bonding strength between the bonding components B1 and B2 and the vibration element 3. As a result, the mechanical strength of the vibration device 1 decreases. For example, such a problem is likely to occur when the wiring layers 821b and 822b are formed by plating.

[0084] In contrast, as in the present embodiment, by forming the wiring layers 821b and 822b using sputtering, the surface roughness of the wiring layers 821b and 822b can be made smaller than the surface roughness of the first wirings 811 and 812 which are plating wirings. Therefore, the surface roughness of the wiring layers 821b and 822b can be suppressed to be small enough, and it is difficult to form abnormal sites Q in the covering layers 821c and 822c. Therefore, the above problems can be effectively suppressed. That is, in the vibration device 1 according to the present embodiment, it is possible to suppress copper (Cu) from being mixed into the bonding components B1 and B2, and it is possible to effectively suppress a decrease in the bonding strength between the bonding components B1 and B2 and the vibration element 3. Therefore, a decrease in the mechanical strength of the vibration device 1 can be suppressed.

[0085] As described above, the structure of the vibration device 1 has been explained. In such a vibration device 1, the wirings 8A and 8B that electrically connect the vibration element 3 and the semiconductor circuit 7 are constituted by the first wirings 811 and 812 and the second wirings 821 and 822 formed separately. Therefore, in the first wirings 811 and 812, a design can be adopted that can sufficiently suppress disconnection in the through-holes 51 and 52, and in the second wirings 821 and 822, a design can be adopted that enables good bonding with the vibration element 3. Therefore, according to the vibration device 1, disconnection of the wirings 8A and 8B in the through-holes 51 and 52 and poor bonding between the vibration element 3 and the wirings 8A and 8B can be effectively suppressed, and high reliability can be achieved.

[0086] Next, a manufacturing method of the vibration device 1 will be described. As Figure 9 shown, the manufacturing method of the vibration device 1 includes: a preparation process S1 of preparing the semiconductor device 2; a first wiring formation process S2 of forming the first wirings 811 and 812 by plating; a second wiring formation process S3 of forming the second wirings 821 and 822 by sputtering; a bonding member formation process S4 of forming the bonding members B1 and B2 by plating; a vibration element bonding process S5 of bonding the vibration element 3 and the semiconductor device 2 with the aid of the bonding members B1 and B2; and a cover body bonding process S6 of bonding the cover body 4 and the semiconductor device 2.

[0087] Preparation process S1

[0088] First, as Figure 10 shown, a semiconductor substrate 5 is prepared, and the semiconductor circuit 7 is formed on the lower surface 5b side. Next, if necessary, the semiconductor substrate 5 is ground and polished from the upper surface 5a side to make the semiconductor substrate 5 thinner to a specified thickness. Next, as Figure 11 shown, through-holes 51 and 52 reaching the electrode pads 721 and 722 are formed in the semiconductor substrate 5. The through-holes 51 and 52 can be formed, for example, by RIE (reactive ion etching). Next, for example, an insulating film 60 is formed by sputtering from the upper surface 5a side of the semiconductor substrate 5, and unnecessary portions of the insulating film 60 are removed by etching, whereby as Figure 12 shown, the electrode pads 721 and 722 are exposed in the through-holes 51 and 52.

[0089] First wiring formation process S2

[0090] Next, an organic resin is coated on the inner peripheral surfaces and the upper surface 5a of the through-holes 51 and 52, and after the coated organic resin is heated and hardened (baked), patterning is performed, whereby as Figure 13As shown, the second organic resin films 621 and 622 are formed. In addition, during coating, the organic resin flows downward due to its own weight, so the inner peripheral surfaces of the formed second organic resin films 621 and 622 become conical. Next, an organic resin is coated on the upper surface 5a, and after the coated organic resin is heated and hardened (baked), patterning is performed, whereby as Figure 14 shown, the third organic resin films 631 and 632 are formed. However, in Figure 14 , the third organic resin film 632 is not shown. In addition, it is not limited thereto, and the second organic resin films 621 and 622 may be formed after the third organic resin films 631 and 632 are formed, or the second organic resin films 621 and 622 and the third organic resin films 631 and 632 may be formed simultaneously.

[0091] Next, as Figure 15 shown, by electroplating treatment from above the second organic resin films 621 and 622, the first wirings 811 and 812 are formed on the inner peripheral surfaces and the upper surface 5a of the through holes 51 and 52. By forming the first wirings 811 and 812 thick, it is possible to effectively suppress disconnection of the first wirings 811 and 812 inside the through holes 51 and 52. In addition, although not shown, the process of forming the first wirings 811 and 812 includes, for example, the following processes: forming a seed layer on the surface of the semiconductor substrate 5 by sputtering; forming a mask having openings corresponding to the first wirings 811 and 812 on the seed layer; growing a plating layer inside the above openings of the mask to form the first wirings 811 and 812; and after removing the mask, etching and removing the unnecessary portions of the seed layer. As described above, since the inner peripheral surfaces of the second organic resin films 621 and 622 are conical, it is possible to ensure the coverage range of sputtering and to form the seed layer with high precision.

[0092] Second wiring formation step S3

[0093] Next, an organic resin is coated on the first wirings 811 and 812, and after the coated organic resin is heated and hardened (baked), patterning is performed, whereby as Figure 16 shown, the first organic resin films 611 and 612 are formed. Thereby, at least a part of the through holes 51 and 52 is filled.

[0094] Next, as Figure 17As shown, the second wirings 821 and 822 are formed on the upper surfaces 5a by sputtering over the first organic resin films 611 and 612, and the first wirings 811 and 812 are covered with the second wirings 821 and 822. Thereby, the outgassing generated from the first wirings 811 and 812 can be pre-sealed in the through-holes 51 and 52. In addition, before this process, the through-holes 51 and 52 have been filled with the first organic resin films 611 and 612, so that the coverage range of sputtering can be ensured in this process, and the second wirings 821 and 822 can be formed with high precision.

[0095] In addition, although not shown, the process of forming the second wirings 821 and 822 includes the following processes: patterning after forming the base layers of the wiring layers 821b and 822b by sputtering; patterning after forming the wiring layers of the wiring layers 821b and 822b by sputtering; patterning after forming the base layers of the covering layers 821c and 822c by sputtering; and patterning after forming the surface layers of the covering layers 821c and 822c by sputtering.

[0096] Bonding component forming process S4

[0097] Next, as Figure 18 shown, the bonding components B1 and B2 are formed on the internal terminals 821a and 822a of the second wirings 821 and 822 by electroplating. However, the bonding component B2 is not shown in Figure 18 . The forming method of the bonding components B1 and B2 is as described above. As described above, since the wiring layers 821b and 822b of the second wirings 821 and 822 are formed by sputtering, the surface roughness of the wiring layers 821b and 822b can be sufficiently reduced. Therefore, abnormal portions Q are difficult to form in the covering layers 821c and 822c on the wiring layers 821b and 822b, and the dissolution of the wiring layers 821b and 822b into the plating solution L can be effectively suppressed. Therefore, copper (Cu) as the material of the second wirings 821 and 822 is difficult to be mixed into the bonding components B1 and B2, and the bonding components B1 and B2 composed of high-purity gold (Au) can be formed.

[0098] Vibration element bonding process S5

[0099] Next, as Figure 19 shown, the vibration element 3 is bonded to the internal terminals 821a and 822a by pressing and crimping the vibration element 3 against the bonding components B1 and B2. At this time, the third organic resin films 631 and 632 formed directly below the internal terminals 821a and 822a function as stress relaxation layers for relaxing the stress generated during pressing. Therefore, the stress applied to the semiconductor device 2 during this process can be reduced, and the breakage of the semiconductor device 2 can be effectively suppressed.

[0100] Cover body joining step S6

[0101] Next, as Figure 20 shown, the cover body 4 is joined to the upper surface 5a of the semiconductor substrate 5 in a reduced pressure state.

[0102] Thereby, the vibration device 1 is obtained. According to such a manufacturing method of the vibration device 1, it is possible to previously enclose the outgassing generated from the first wirings 811 and 812 in the through holes 51 and 52 by the second wirings 821 and 822. Therefore, it is possible to suppress the environmental change of the accommodation space S caused by outgassing, particularly the increase in pressure. Therefore, the vibration characteristics of the vibration element 3 are stable, and the vibration device 1 with high reliability is obtained.

[0103] The vibration device 1 has been described above. As described above, such a vibration device 1 includes: a semiconductor substrate 5 having an upper surface 5a as a first surface and a lower surface 5b as a second surface that are in a front-back relationship with each other, and through holes 51 and 52 penetrating the upper surface 5a and the lower surface 5b are formed; a semiconductor circuit 7 disposed on the lower surface 5b side of the semiconductor substrate 5 and having electrode pads 721 and 722 as conductive layers exposed in the through holes 51 and 52; first wirings 811 and 812 disposed on the inner peripheral surfaces of the through holes 51 and 52 and electrically connected to the electrode pads 721 and 722; second wirings 821 and 822 disposed on the upper surface 5a and having wiring layers 821b and 822b with a smaller surface roughness than the first wirings 811 and 812 and covering layers 821c and 822c covering the wiring layers 821b and 822b; and a vibration element 3 located on the upper surface 5a side of the semiconductor substrate 5 and joined to the second wirings 821 and 822 by joining members B1 and B2. According to such a structure, for example, by forming the first wirings 811 and 812 thick enough, it is possible to effectively suppress the disconnection of the first wirings 811 and 812 in the through holes 51 and 52. In addition, since the surface roughness of the wiring layers 821b and 822b of the second wirings 821 and 822 is smaller than the surface roughness of the first wirings 811 and 812, it is possible to sufficiently improve the joining strength between the second wirings 821 and 822 and the vibration element 3. Therefore, according to the vibration device 1, it is possible to effectively suppress the disconnection of the wirings 8A and 8B in the through holes 51 and 52 and the poor joining between the vibration element 3 and the wirings 8A and 8B, and high reliability can be exhibited.

[0104] In addition, as described above, in the vibration device 1, the first wirings 811 and 812 are plating wirings, and the second wirings 821 and 822 are sputtering wirings. According to such a structure, it is easy to form the first wirings 811 and 812 thick enough. In addition, the surface roughness of the second wirings 821 and 822 can be reduced.

[0105] In addition, as described above, the first wirings 811 and 812 extend to the upper surface 5a, and the second wirings 821 and 822 are connected to the first wirings 811 and 812 at the upper surface 5a. By adopting such a structure, the first wirings 811 and 812 and the second wirings 821 and 822 can be easily connected.

[0106] In addition, as described above, the second wirings 821 and 822 cover the first wirings 811 and 812. According to such a structure, the outgassing generated from the first wirings 811 and 812 can be preliminarily sealed in the through-holes 51 and 52 by the second wirings 821 and 822. Therefore, environmental changes in the accommodation space S, particularly an increase in pressure, caused by outgassing can be suppressed. As a result, the vibration characteristics of the vibration element 3 are stable, and the vibration device 1 with high reliability is achieved.

[0107] In addition, as described above, the vibration device 1 has first organic resin films 611 and 612 interposed between the first wirings 811 and 812 and the second wirings 821 and 822 in the through-holes 51 and 52. By adopting such a structure, the first wirings 811 and 812 are covered by the first organic resin films 611 and 612, and oxidation of the first wirings 811 and 812 is suppressed. Therefore, deterioration of the electrical characteristics of the first wirings 811 and 812, for example, an increase in the resistance value, can be effectively suppressed. In addition, at least a part of the through-holes 51 and 52 can be filled with the first organic resin films 611 and 612, and the airtightness of the accommodation space S can also be improved. Furthermore, by filling at least a part of the through-holes 51 and 52 with the first organic resin films 611 and 612, the coverage range of sputtering when forming the second wirings 821 and 822 can be ensured. Therefore, the second wirings 821 and 822 can be formed with high precision.

[0108] In addition, as described above, the first organic resin films 611 and 612 extend to the upper surface 5a. By adopting such a structure, a larger range of the first wirings 811 and 812 is covered by the first organic resin films 611 and 612, and deterioration of the electrical characteristics of the first wirings 811 and 812 caused by oxidation can be more effectively suppressed.

[0109] In addition, as described above, the vibration device 1 has second organic resin films 621 and 622 interposed between the inner peripheral surfaces of the through-holes 51 and 52 and the first wirings 811 and 812. By adopting such a structure, insulation between the first wirings 811 and 812 and the semiconductor substrate 5 can be made more reliable.

[0110] In addition, as described above, the second organic resin films 621 and 622 extend to the upper surface 5a. With such a structure, the boundary portions 5c between the through holes 51 and 52 and the upper surface 5a are covered with the second organic resin films 621 and 622 and have rounded corners. Therefore, damage, disconnection, etc. of the first wirings 811 and 812 at the boundary portions 5c can be effectively suppressed.

[0111] In addition, as described above, the vibration device 1 has third organic resin films 631 and 632 interposed between the upper surface 5a and the second wirings 821 and 822, and the vibration element 3 is joined to the second wirings 821 and 822 by joining members B1 and B2 at portions overlapping the third organic resin films 631 and 632. With such a structure, the stress generated when joining the vibration element 3 is alleviated by the third organic resin films 631 and 632 and is difficult to be applied to the semiconductor device 2. Therefore, breakage of the semiconductor device 2 can be effectively suppressed.

[0112] In addition, as described above, the semiconductor circuit 7 has an oscillation circuit 70 that oscillates the vibration element 3. With such a structure, the vibration device 1 becomes an oscillator, and high versatility and demand can be expected.

[0113] In addition, as described above, the manufacturing method of the vibration device 1 includes the following steps: a preparation step S1 of preparing a semiconductor device 2 having a semiconductor substrate 5 and a semiconductor circuit 7, the semiconductor substrate 5 having an upper surface 5a as a first surface and a lower surface 5b as a second surface that are in a front-back relationship with each other, and through holes 51 and 52 penetrating the upper surface 5a and the lower surface 5b being formed therein, the semiconductor circuit 7 being disposed on the lower surface 5b side of the semiconductor substrate 5 and including electrode pads 721 and 722 as conductive layers exposed in the through holes 51 and 52; a first wiring formation step S2 of forming first wirings 811 and 812 electrically connected to the electrode pads 721 and 722 in the through holes 51 and 52 by plating; a second wiring formation step S3 of forming second wirings 821 and 822 on the upper surface 5a by sputtering, the second wirings 821 and 822 including wiring layers 821b and 822b having a smaller surface roughness than the first wirings 811 and 812 and covering layers 821c and 822c covering the wiring layers 821b and 822b; and a vibration element bonding step S5 of bonding a vibration element 3 to the second wirings 821 and 822 by means of bonding members B1 and B2. According to such a manufacturing method, for example, by forming the first wirings 811 and 812 thick enough in the first wiring formation step S2, disconnection of the first wirings 811 and 812 in the through holes 51 and 52 can be effectively suppressed. In addition, in the second wiring formation step S3, wiring layers 821b and 822b having a smaller surface roughness than the first wirings 811 and 812 can be formed, and thus, in the vibration element bonding step S5, the second wirings 821 and 822 and the vibration element 3 can be more firmly bonded. Therefore, a vibration device 1 can be obtained that can effectively suppress disconnection of the wirings 8A and 8B in the through holes 51 and 52 and poor bonding between the vibration element 3 and the wirings 8A and 8B, and can exhibit high reliability.

[0114] Second Embodiment

[0115] Figure 21 FIG. is a cross-sectional view showing a vibration device according to the second embodiment. Figure 22 and Figure 23 are enlarged cross-sectional views of through holes formed in a semiconductor substrate, respectively.

[0116] The vibration device 1 according to the present embodiment is the same as the vibration device 1 of the first embodiment described above, except for the structure of the semiconductor device 2. In the following description, regarding the vibration device 1 of the present embodiment, the differences from the first embodiment described above will be mainly described, and the same matters will be omitted. In addition, in the drawings of the present embodiment, the same reference numerals are assigned to the same structures as those in the above-described embodiment.

[0117] AsFigures 21 to 23 As shown, in the semiconductor device 2 of the present embodiment, the first organic resin films 611 and 612 are omitted compared to the above-described first embodiment, and the first wirings 811 and 812 are filled in the through-holes 51 and 52 to compensate for this. Thereby, disconnection of the first wirings 811 and 812 in the through-holes 51 and 52 can be effectively suppressed.

[0118] In addition, in the through-holes 51 and 52, the film thickness of the first wirings 811 and 812 at the central portion of the through-holes 51 and 52 is thicker than that at the edge portion of the through-holes 51 and 52. In addition, the film thickness of the first wirings 811 and 812 at the central portion of the through-holes 51 and 52 is thinner than the depth of the through-holes 51 and 52. Therefore, recessed portions 811a and 812a that are recessed into the through-holes 51 and 52 are formed on the upper surfaces of the first wirings 811 and 812. The recessed portions 811a and 812a are shallower than the through-holes 51 and 52 and have a gentle slope. Therefore, the coverage range of sputtering when forming the second wirings 821 and 822 can be ensured, and the second wirings 821 and 822 can be formed with high precision. In addition, since the first wirings 811 and 812 have the recessed portions 811a and 812a, the film thickness at the recessed portions 811a and 812a is thinner than that around them at the central portion of the first wirings 811 and 812. Moreover, the film thickness at the central portion of the first wirings 811 and 812 is thicker than that at the edge portion of the through-holes 51 and 52 located outside them.

[0119] As described above, in the vibration device 1 of the present embodiment, the film thickness of the first wirings 811 and 812 at the central portion of the through-holes 51 and 52 is thicker than that at the edge portion of the through-holes 51 and 52. By adopting such a structure, disconnection of the first wirings 811 and 812 in the through-holes 51 and 52 can be effectively suppressed. In addition, the coverage range of sputtering when forming the second wirings 821 and 822 can be ensured, and the second wirings 821 and 822 can be formed with high precision.

[0120] According to such a second embodiment, the same effects as those of the above-described first embodiment can also be achieved.

[0121] As described above, the vibration device and the manufacturing method of the vibration device according to the present invention have been described based on the illustrated embodiments, but the present invention is not limited thereto, and the structures and processes of each part can be replaced with any structures and processes having the same functions. In addition, any other structures and processes can be added to the present invention. In addition, two or more embodiments of the present invention can be combined.

[0122] In addition, in the above-described embodiments, an example in which the vibration device 1 is applied to an oscillator has been described. However, the application examples of the vibration device 1 are not particularly limited. For example, it can be applied to inertial sensors such as acceleration sensors and angular velocity sensors. In addition, it can also be applied to any other device.

Claims

1. A vibration device, characterized in that, Comprising: A semiconductor substrate having a first surface and a second surface that are in a front-back relationship with each other, and through holes penetrating the first surface and the second surface are formed; A semiconductor circuit disposed on the second surface side of the semiconductor substrate and having a conductive layer exposed in the through holes; A first wiring disposed on the inner peripheral surface of the through hole and electrically connected to the conductive layer; A second wiring disposed on the first surface and having a wiring layer with a smaller surface roughness than the first wiring and a covering layer covering the wiring layer; And A vibration element located on the first surface side of the semiconductor substrate and joined to the second wiring by a joining member.

2. The vibration device according to claim 1, wherein The first wiring is a plated wiring, The second wiring is a sputtered wiring.

3. The vibration device according to claim 1, wherein The first wiring extends to the first surface, The second wiring is connected to the first wiring at the first surface.

4. The vibration device according to claim 1, wherein The second wiring covers the first wiring.

5. The vibration device according to claim 4, wherein A first organic resin film is provided between the first wiring and the second wiring in the through hole.

6. The vibration device according to claim 5, wherein The first organic resin film extends to the first surface.

7. The vibration device according to claim 3, wherein The vibration device has a second organic resin film between the inner peripheral surface of the through hole and the first wiring.

8. The vibration device according to claim 7, wherein The second organic resin film extends to the first surface.

9. The vibration device according to claim 1, wherein The vibration device has a third organic resin film between the first surface and the second wiring, At a portion overlapping with the third organic resin film, the vibration element is joined to the second wiring by the joining member.

10. The vibration device according to claim 1, wherein The film thickness of the first wiring at the central portion of the through hole is thicker than that at the edge portion of the through hole.

11. The vibration device according to claim 1, wherein The semiconductor circuit has an oscillation circuit for oscillating the vibration element.

12. A manufacturing method of a vibration device, characterized in that, Comprising the following steps: A preparation step of preparing a semiconductor device having a semiconductor substrate and a semiconductor circuit, the semiconductor substrate having a first surface and a second surface that are in a front-back relationship with each other, and through holes penetrating the first surface and the second surface are formed, the semiconductor circuit is disposed on the second surface side of the semiconductor substrate and has a conductive layer exposed in the through holes; A first wiring formation step of forming a first wiring electrically connected to the conductive layer in the through hole by plating treatment; Second wiring formation process: A second wiring is formed on the first surface by sputtering. The second wiring includes a wiring layer having a smaller surface roughness than the first wiring and a covering layer covering the wiring layer; And Vibration element bonding process: A vibration element is bonded to the second wiring by means of a bonding member.

Citation Information

Patent Citations

  • Semiconductor device

    JP2018113466A