Embedded element circuit board and manufacturing method thereof

Abstract

The invention provides a circuit board with embedded components and a manufacturing method thereof. The circuit board comprises a circuit substrate, a plurality of embedded structures arranged in the circuit substrate, a plurality of conductive structures arranged in the embedded structures and a heat dissipation substrate arranged on the surface of the circuit substrate. Each embedded structure includes an electronic component, a circuit layer disposed on the electronic component and directly contacting the electronic component, an insulating material, and heat-conducting pad layers disposed on the electronic component and the circuit layer, respectively. The electronic component and the circuit layer are located between the two heat conduction connecting cushion layers. The insulating material covers the circuit layer, the electronic component and the heat-conducting pad layer, and one end face of the insulating material exposes the heat-conducting pad layer. The conductive structure is connected with the heat conduction pad layer, the embedded structure is electrically connected to the circuit substrate through the conductive structure, and the embedded structure is overlapped with the heat dissipation substrate. Therefore, heat energy generated by the electronic component can be conducted to the heat dissipation substrate more quickly, and the heat dissipation efficiency of the circuit board with the embedded component is further improved.

Description

Technical Field

[0001] The present invention relates to a circuit board, and more particularly to a circuit board with embedded components. Background Art

[0002] With the current technological development, circuit boards can integrate multiple densely distributed electronic components, and the technology of embedded components can set electronic components inside the circuit board. However, when multiple electronic components are densely distributed (usually ranging from 6 to 36) in a multi-layer circuit board structure, it is easy to affect the heat dissipation efficiency. In addition, since electronic components are usually encapsulated by encapsulation materials, and the thermal conductivity coefficient of general encapsulation materials is relatively low, the heat generated by the electronic components accumulates inside the circuit board, thereby reducing the lifespan of the electronic components. Summary of the Invention

[0003] Therefore, the present invention provides an embedded-component circuit board to increase the heat dissipation efficiency of the circuit board.

[0004] The present invention provides a manufacturing method of an embedded-component circuit board to increase the heat dissipation efficiency of the circuit board.

[0005] The present invention provides an embedded-component circuit board, including a circuit substrate, a plurality of embedded structures disposed in the circuit substrate, a plurality of conductive structures, and a heat dissipation substrate. Each of the embedded structures includes a circuit layer, an electronic component, an insulating material, and two thermal conduction pads. The circuit layer is disposed on the electronic component and directly contacts the electronic component. The thermal conduction pads are respectively disposed on the electronic component and the circuit layer, wherein the electronic component and the circuit layer are located between the thermal conduction pads. The insulating material encapsulates the circuit layer, the electronic component, and the thermal conduction pads, and one end surface of the insulating material exposes one of the thermal conduction pads. The conductive structures are respectively disposed in the embedded structures and connect the thermal conduction pads located on opposite sides of the embedded structure, wherein the embedded structure is electrically connected to the circuit substrate through the conductive structure. The heat dissipation substrate is disposed on the surface of the circuit substrate, and the embedded structure overlaps with the heat dissipation substrate.

[0006] In at least one embodiment of the present invention, the thermal expansion coefficient of the insulating material is less than 10 ppm / °C.

[0007] In at least one embodiment of the present invention, it further includes a bonding material located between the embedded structure and the circuit substrate, and there is a bonding material between adjacent ones of the embedded structures.

[0008] In at least one embodiment of the present invention, the thickness range of the thermal conduction pad falls between 100 μm and 400 μm.

[0009] In at least one embodiment of the present invention, one of the heat conduction contact pads of each embedded structure includes a first gate block and a source block, and the first gate block is separated from the source block. The other heat conduction contact pad includes a second gate block and a drain block, and the second gate block is separated from the drain block.

[0010] In at least one embodiment of the present invention, one conductive structure connects the first gate block and the second gate block.

[0011] In at least one embodiment of the present invention, it further includes a metal layer, which is located between the embedded structure and the heat dissipation substrate and connects one of the heat conduction contact pads of the embedded structure and the heat dissipation substrate.

[0012] The present invention also provides a manufacturing method of an embedded component circuit board, which includes providing a first carrier; on the first carrier, arranging a plurality of electronic components, and there is a gap between adjacent ones of the electronic components. These electronic components have opposite first surfaces and second surfaces, and the first surface faces the first carrier; on the second surface of the electronic components, forming a circuit layer; after forming the circuit layer, removing the first carrier to form a plurality of sealed monomers; providing a second carrier; on the second carrier, arranging a plurality of conductive structures and sealed monomers, wherein the sealed monomers and the conductive structures are arranged in an interlaced manner, and the first surface of the electronic components faces the second carrier; after arranging the conductive structures and the sealed monomers, on the circuit layer and the conductive structures, forming a first heat conduction contact pad; after forming the first heat conduction contact pad, removing the second carrier to expose the first surface of the electronic components; on the first surface of the electronic components, forming a second heat conduction contact pad; on the electronic components, arranging an insulating material to form an embedded structure, wherein the insulating material covers the first heat conduction contact pad and the second heat conduction contact pad; providing a substrate; removing a part of the substrate to form a plurality of openings; respectively arranging the embedded structures in the openings; removing a part of each embedded structure to respectively form a plurality of openings, wherein the openings communicate with opposite sides of the substrate; depositing a conductive material inside the openings to form a plurality of conductive structures; and after forming the conductive structures, arranging a heat dissipation substrate on the substrate, wherein the embedded structure overlaps with the heat dissipation substrate.

[0013] In at least one embodiment of the present invention, it further includes, before forming the circuit layer, arranging a sealing layer on the first carrier, the sealing layer is located in the aforementioned gap and covers the second surface of the electronic components; removing a part of the sealing layer to expose the second surface of the electronic components; and after removing the first carrier, cutting the sealing layer along the gap to form sealed monomers.

[0014] In at least one embodiment of the present invention, after forming the opening, a conductive layer is deposited on two third surfaces on opposite sides of the substrate respectively. The conductive layer is electrically connected to the conductive structure, and the electronic components of the embedded structure are electrically connected to the substrate through the conductive structure and the conductive layer.

[0015] Based on the above, the present invention uses the heat-conducting cushion layers located on opposite sides of the electronic component to increase the heat dissipation path of the embedded structure, so that the heat energy generated by the electronic component can be conducted to the heat dissipation substrate faster and dissipated to the external environment. In this way, the heat energy accumulated in the electronic component can be reduced, which helps to increase the lifespan of the electronic component. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] As can be understood from the following detailed description in conjunction with the drawings. It should be noted that various features are not drawn in the proportions of industrial practice standards. In fact, for the sake of clarity and ease of discussion, the dimensions of various features can be arbitrarily increased or decreased.

[0017] Figure 1 A cross-sectional view of an embedded component circuit board according to at least one embodiment of the present invention is shown.

[0018] Figures 2A to 2I A cross-sectional view of a method for manufacturing an embedded component circuit board according to at least one embodiment of the present invention is shown.

[0019] Figures 3A to 3C A cross-sectional view of a method for manufacturing an embedded component circuit board according to at least one embodiment of the present invention is shown. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] The present invention will be described in detail with the following embodiments. It should be noted that the following description of the embodiments of the present invention is only for illustrative purposes here, and is not intended to disclose all implementation aspects in detail or limit the specific implementation aspects of the present invention. For example, the description of "the first feature is formed on the second feature" includes various implementation manners, which cover the direct contact between the first feature and the second feature, and also cover the formation of additional features between the first feature and the second feature so that the two do not directly contact. In addition, the same reference numerals used in the drawings and the specification will denote the same or similar elements as much as possible.

[0021] Spatially relative terms, such as "lower layer", "below", "beneath", "above", "upper", etc., are used herein to simply describe the relationship of an element or feature shown in the figure to another element or feature. These spatially relative terms cover different orientations in addition to the orientation depicted in the figure when the device is in use or operation. In addition, when an element is rotatable (rotated 90 degrees or other angles), the spatially relative descriptive terms used herein can also be interpreted correspondingly.

[0022] Moreover, when describing a number or a range of numbers with terms such as "about" or "approximately", such terms are intended to cover numbers within a reasonable range, taking into account the natural variations that would be understood by a person of ordinary skill in the art during the manufacturing process. A range of numbers covers a reasonable range including the described numbers. For example, within + / - 10% of the described number, based on known manufacturing tolerances, which are related to the characteristics of the manufacturing feature. For example, a material layer with a thickness of "about 5 nanometers" can cover a size range from 4.25 nanometers to 5.75 nanometers, where the manufacturing tolerance of + / - 15% for depositing the material layer is known to a person of ordinary skill in the art. Further, the present invention may repeat reference numerals and / or labels in various examples. This repetition is for the purpose of simplification and clarity and is not intended to indicate a relationship between the various embodiments and / or configurations discussed therein.

[0023] The present invention provides an embedded component circuit board 10. Please refer to Figure 1 , the embedded component circuit board 10 includes a circuit substrate 100, embedded structures 120 and 120', conductive structures 140 and 140', and a heat dissipation substrate 160. The embedded structures 120 and 120' are disposed within the circuit substrate 100, and each embedded structure (such as the embedded structure 120) includes an electronic component 122, a circuit layer 124, thermal conductive contact layers 126a and 126b, and an insulating material 128.

[0024] The circuit layer 124 is disposed on the electronic component 122 and is in direct contact with the electronic component 122. In particular, in this embodiment, the electronic component 122 may be an unpackaged die, where a plurality of electrical contacts 122p are exposed on the surface 122f of the electronic component 122. The circuit layer 124 can be electrically connected to the electronic component 122 through these electrical contacts 122p exposed on the surface 122f. The material of the electrical contacts 122p may include copper, nickel, silver, and since the electrical contacts 122p are directly exposed on the outer surface of the electronic component 122, a heat conduction path for the electronic component 122 is provided, facilitating the conduction of heat generated by the electronic component 122 outward.

[0025] However, the present invention is not limited thereto. In other embodiments, the electronic component 122 may also be a packaged chip. Although in this embodiment, only one electronic component 122 is included in one embedded structure 120, the number of electronic components 122 in a single embedded structure is not limited thereto. In other embodiments, the number of electronic components 122 in the embedded structure 120 may also be two or more.

[0026] Thermal conductive bonding pads 126a and 126b are respectively disposed on the electronic component 122 and the circuit layer 124, where the electronic component 122 and the circuit layer 124 are located between the thermal conductive bonding pad 126a and the thermal conductive bonding pad 126b. In particular, the materials of the thermal conductive bonding pads 126a and 126b may include copper, and the thickness range of the thermal conductive bonding pads 126a and 126b may fall between 100 μm and 400 μm.

[0027] The insulating material 128 covers the circuit layer 124, the electronic component 122, and the thermal conductive bonding pads 126a and 126b. Specifically, the insulating material 128 covers the side surface (not labeled) of the circuit layer 124 and covers a part of the surface of the electronic component 122 (for example, a part of the surfaces 122f and 122s and one of its side surfaces 122w). In this embodiment, the end face 128e of the insulating material 128 exposes the thermal conductive bonding pad 126b. In this way, the heat generated by the electronic component 122 can be sequentially transferred upward to the outside through the circuit layer 124 and the thermal conductive bonding pad 126b. On the other hand, although there is a part of the insulating material 128 between the circuit board 100 and the thermal conductive bonding pad 126a, since the thickness range of the insulating material 128 between the two falls between 100 μm and 400 μm. Therefore, the heat generated by the electronic component 122 can still be sequentially transferred downward to the heat dissipation substrate 160 through the circuit layer 124 and the thermal conductive bonding pad 126a.

[0028] The insulating material 128 may include a material with a coefficient of thermal expansion (CTE) less than 10 ppm / °C (i.e., a low thermal expansion coefficient material). However, in order to avoid misalignment between the electronic component 122 and the insulating material 128 due to too large a difference in the coefficient of thermal expansion (under temperature changes), the choice of the insulating material 128 must depend on the electronic component 122. For example, when the coefficient of thermal expansion of the electronic component 122 falls within the range of 3 ppm / °C to 6 ppm / °C, the insulating material 128 may include a material with a coefficient of thermal expansion in the range of 9 ppm / °C to 10 ppm / °C, such as polyphenylene oxide (PPO), polyphenylene ether (PPE), or the like, but the present invention is not limited thereto.

[0029] It is worth mentioning that, in this embodiment, the buried structures 120 and 120' are structures that are upside down with respect to each other. Specifically, along the direction from the circuit layer 102a to the circuit layer 102b of the circuit board 100, the components in the buried structure 120 are, in sequence, the thermal conductive bonding layer 126a, the electronic component 122, the circuit layer 124, and the thermal conductive bonding layer 126b, while the components in the buried structure 120' are, in sequence, the thermal conductive bonding layer 126b, the circuit layer 124, the electronic component 122, and the thermal conductive bonding layer 126a.

[0030] In this embodiment, the thermal conductive bonding layer 126b of the buried structure 120 (or the buried structure 120') includes a gate block G1 and a source block S, and the gate block G1 is separated from the source block S. On the other hand, the thermal conductive bonding layer 126a includes a gate block G2 and a drain block D, and the gate block G2 is separated from the drain block D.

[0031] The conductive structures 140 and 140' of the buried component circuit board 10 are respectively disposed within the buried structures 120 and 120', and are connected to the thermal conductive bonding layers 126a and 126b located on opposite sides of the buried structure 120 (and the buried structure 120'). Since the conductive structure 140 is electrically connected to the circuit layers 102a and 102b on the circuit board 100, the buried structure 120 (and the buried structure 120') is electrically connected to the circuit board 100 through the conductive structure 140 (and the conductive structure 140'). In this embodiment, the conductive structures 140 and 140' are substantially equivalent to the conductive blind vias in the circuit board 100. In addition, the conductive structure 140 is connected to the gate block G1 and the gate block G2 in the buried structure 120. Therefore, the gate block G1 can be electrically connected to the gate block G2 through the conductive structure 140.

[0032] It is particularly mentioned that the buried component circuit board 10 further includes a bonding material 180. As Figure 1 shown, the bonding material 180 is located between the buried structure 120 and the circuit board 100. Specifically, the bonding material 180 covers the sidewall 120w of the buried structure 120. In addition, there is a bonding material 180 between two adjacent buried structures (for example, between the buried structure 120 and the buried structure 120').

[0033] The heat dissipation substrate 160 is disposed on the surface 100s of the circuit board 100. Among them, the embedded structure 120 (and the embedded structure 120') overlaps with the heat dissipation substrate 160, and there is a partial circuit layer 102a of the circuit board 100 between the heat dissipation substrate 160 and the embedded structure 120 (and the embedded structure 120'). The embedded component circuit board 10 further includes a metal layer 170, which is located between the embedded structure 120 (and the embedded structure 120') and the heat dissipation substrate 160, and connects the heat conduction bonding layer 126b of the embedded structure 120 and the heat dissipation substrate 160. The metal layer 170 may include, for example, copper paste, silver paste or similar conductive heat dissipation materials.

[0034] In this embodiment, the heat dissipation substrate 160 may be a bus bar (BusBar) including a metal block 165 (for example, a copper block), and the embedded structure 120 (and the embedded structure 120') is electrically connected to the heat dissipation substrate 160 through the metal layer 170 and the circuit layer 102a. In other words, the embedded structure 120, the circuit board 100 and the heat dissipation substrate 160 may be electrically connected to each other. However, the present invention is not limited thereto. In other embodiments where the heat dissipation substrate 160 is not a bus bar, the heat dissipation substrate 160 may not be electrically connected to the embedded structure 120. For example, the heat dissipation substrate 160 may be an aluminum nitride (Aluminum Nitride; AlN) ceramic substrate, and its thermal conductivity ranges from 140 W / mk to 180 W / mk.

[0035] It should be particularly mentioned that although not shown in Figure 1 , the circuit board 100 may further include at least one solder mask layer. The solder mask layer covers the circuit layer 102b and exposes a part of the circuit layer 102b. On the other hand, the embedded component circuit board 10 may further include a non-plating through hole 190 (Non Plating Through Hole; NPTH). The non-plating through hole 190 communicates with one side of the circuit board 100 and one side of the heat dissipation substrate 160 for screwing or other similar fixing elements to lock, so that the heat dissipation substrate 160 can be fixed to the circuit board 100.

[0036] The present invention provides a manufacturing method of an embedded component circuit board. Taking the embedded component circuit board 10 as an example, this manufacturing method may include several steps as shown in Figures 2A to 2I and Figures 3A to 3C . First, provide a plurality of embedded structures 120 as shown in Figure 1 . For the formation steps of the embedded structure 120, please refer to Figures 2A to 2I . Please refer to Figure 2A, first provide a carrier board 201, and dispose a plurality of electronic components 122 on the carrier board 201. It is worth mentioning that in various embodiments of the present invention, this step may include attaching an uncut wafer or a plurality of diced dies on the carrier board 201 through, for example, polyethylene terephthalate tape or similar attaching tape (not shown).

[0037] In this embodiment, the electronic components 122 are diced dies, and there is a gap 200t between two adjacent electronic components 122. Each electronic component 122 has opposite surfaces 122f and 122s, and the surface 122s faces the carrier board 201. In addition, in some embodiments of the present invention, Figure 2A the steps shown further include disposing a sealing layer 128a on the carrier board 201. This sealing layer 128a is located in the gap 200t and covers the surface 122f of the electronic component 122. Then, through, for example, a photolithography process, a part of the sealing layer 128a is removed to expose the surface 122f of the electronic component 122 (i.e., expose the electrical contact 122p).

[0038] Please refer to Figure 2B , on the surface 122f of the electronic component 122, a circuit layer 124 is formed. Specifically, the way to form the circuit layer 124 may include: by means of a coating process (such as chemical vapor deposition, physical vapor deposition, electroplating or electroless plating), first form a metal layer (not shown) on the sealing layer 128a and the surface 122f of the electronic component 122, and through photolithography and etching, pattern this metal layer to form the circuit layer 124 on the electrical contact 122p of the electronic component 122. It is particularly mentioned that in this embodiment, the gate region (i.e., the part of the circuit layer 124 located below the gate block G1) and the source region (i.e., the part of the circuit layer 124 located below the source block S) on the circuit layer 124 can be defined through photolithography and etching processes.

[0039] Please refer to Figure 2C , after the circuit layer 124 is formed, the carrier board 201 is removed to form a plurality of sealed units 220. It is particularly mentioned that this step further includes: before removing the carrier board 201, first dispose a sealing layer 128b on the circuit layer 124, and then remove the carrier board 201. After the carrier board 201 is removed, the sealing layer 128a can be cut along the gap 200t (marked in Figure 2A ) through, for example, mechanical or laser cutting, etc., to form a plurality of sealed units 220.

[0040] Then please refer to Figure 2D, a carrier plate 202 is provided, and a plurality of conductive structures 205 and a plurality of sealing units 220 are disposed on the carrier plate 202. Notably, the sealing units 220 and the conductive structures 205 are arranged alternately, and the surface 122s of the electronic component 122 in the sealing unit 220 faces the carrier plate 202. In other words, the sealing units 220 are disposed on the carrier plate 202 in such a manner that the surface 122s of the electronic component 122 faces the carrier plate 202, and the sealing units 220 and the conductive structures 205 are alternately arranged.

[0041] Please refer to Figure 2E , in some embodiments, after the sealing units 220 and the conductive structures 205 are disposed on the carrier plate 202, a sealing layer 128c may be disposed on the sealing units 220 and the conductive structures 205. Subsequently, a part of the sealing layer 128c may be removed by, for example, mechanical grinding or laser cutting to expose the circuit layer 124 and the end face 205e of the conductive structure 205.

[0042] Please refer to Figure 2F , after the conductive structure 205 and the sealing unit 220 are disposed, a thermally conductive bonding layer 126b is formed on the circuit layer 124 and the end face 205e of the conductive structure 205. After the thermally conductive bonding layer 126b is formed, as Figure 2G shown, a sealing layer 128d is disposed on the sealing layer 128c (labeled in Figure 2E ).

[0043] Please refer to Figure 2H , after the sealing layer 128d is disposed, the carrier plate 202 is removed to expose the surface 122s of the electronic component 122. Subsequently, a thermally conductive bonding layer 126a is formed on the surface 122s of the electronic component 122. Notably, the above-described manner of forming the thermally conductive bonding layers 126a and 126b may include, for example, thick copper electroplating.

[0044] Please refer to Figure 2I , after the thermally conductive bonding layer 126a is formed, on the surface 122s of the electronic component 122 and the sealing layer 128c on the same side (labeled in Figure 2E)An insulating material 128’ is provided thereon to form an embedded structure 120 (or an embedded structure 120’), where the insulating material 128’ does not cover the thermal conduction bonding pads 126a and 126b. It is worth mentioning that the above-mentioned sealing layers 128a, 128b, 128c and 128d and the insulating material 128’ may include the same material. In other words, the sealing layers 128a, 128b, 128c and 128d and the insulating material 128’ are substantially equivalent to the insulating material 128 of the embedded structure 120. In addition, in some embodiments, it further includes: after the insulating material 128’ is provided, along the gap 207t (marked in Figure 2E ) between the conductive structure 205 and the sealing monomer 220, the insulating material 128’ is cut by means such as mechanical or laser cutting to form a plurality of embedded structures 120 and embedded structures 120’. So far, the embedded structure 120 (and the embedded structure 120’) as shown in Figure 1 has been roughly formed.

[0045] For the steps after the formation of the embedded structure 120, please continue to refer to Figures 3A to 3C . As shown in Figure 3A , a substrate 300 is provided. The substrate 300 includes an insulating layer 303 and a double-layer metal layer 302’, and the insulating layer 303 is sandwiched between the double-layer metal layers 302’. In this embodiment, these metal layers 302’ may be metal foils (such as copper foils) and are respectively attached to opposite sides of the insulating layer 303. For example, the substrate 300 may be a copper clad laminate (CCL). However, in other embodiments, the double-layer metal layer 302’ may be directly formed on the insulating layer 303 by a coating process.

[0046] The material of the insulating layer 303 may include a composite material composed of, for example, epoxy resin and glass fiber or the like. Then, a part of the substrate 300 is removed to form a plurality of openings (not marked). After the plurality of openings are formed, a tape 307 (for example, a polyethylene terephthalate tape) is attached to one side of the substrate 300. Then, the embedded structures 120 (and the embedded structures 120’) are respectively disposed in the openings. In particular, the embedded structure 120 is disposed on the attached tape 307 and is connected to the inner wall of the opening (not marked) through a bonding material 180. The bonding material 180 may include an insulating material such as epoxy resin.

[0047] Please refer to Figure 3B , after the embedded structure 120 is disposed in the opening, the attached tape 307 is removed (marked in Figure 3A)。Next, by means of mechanical grinding, mechanical drilling, and electroplating, a part of the embedded structure 120 (and the embedded structure 120') is removed to form the opening 340t respectively. The opening 340t communicates with opposite sides of the substrate 300. Specifically, the opening 340t passes through the metal layer 302' and the insulating layer 303 from one side of the substrate 300 and communicates with the other side of the substrate 300.

[0048] Next, a conductive material (not labeled) is deposited on the inner wall of the opening 340t to form the conductive structures 140 and 140'. It should be particularly mentioned that this step also includes: after forming the opening 340t, a conductive layer 308 is deposited on the surfaces 300f and 300s on opposite sides of the substrate 300 respectively. The conductive layer 308 is electrically connected to the conductive structure 140. And since the conductive structure 140 is connected to the heat-conducting pads 126a and 126b on opposite sides of the embedded structure 120, the electronic component 122 of the embedded structure 120 is electrically connected to the substrate 300 through the conductive structure 140 and the conductive layer 308. In addition, although not shown in the figure, after forming the conductive layer 308, it also includes patterning the conductive layer 308 by means such as photolithography and etching to form the Figure 1 circuit layers 102a and 102b of the circuit board 100 as shown. Thus, the circuit board 100 in Figure 1 is also roughly completed.

[0049] Please refer to Figure 3C , after forming the conductive structures 140 and 140', a heat-dissipating substrate 160 is provided on the substrate 300, wherein the embedded structure 120 (and the embedded structure 120') overlaps with the heat-dissipating substrate 160. In some embodiments of the present invention, the heat-dissipating substrate 160 may include, for example, a composite substrate composed of epoxy resin and glass fiber or the like, and the metal block 165 is embedded in this composite substrate. As Figure 3C shown, this step also includes: providing a metal layer 170 on the substrate 300 by means such as screen printing. Then, a bonding film 306 is provided, and the substrate 300 and the heat-dissipating substrate 160 are respectively bonded to opposite sides of the bonding film 306 by means such as thermocompression bonding. It should be particularly mentioned that one of the heat-conducting pads in the embedded structure 120 (for example, the heat-conducting pad 126a) faces the heat-dissipating substrate 160, and the metal layer 170 is located between the substrate 300 and the heat-dissipating substrate 160. Thus, the embedded component circuit board 10 as Figure 1 shown is also roughly completed.

[0050] In summary, heat-conducting connection cushions are provided on both sides of the buried structure, and the two heat-conducting connection cushions are directly in contact with the surface of the electronic component and the circuit layer respectively, so that the heat generated by the electronic component can be directly transferred to the metal block through the heat-conducting connection cushion, or dissipated to the external environment through the circuit layer and the heat-conducting connection cushion, thereby improving the heat dissipation efficiency. In this way, the heat energy accumulated in the electronic component can be reduced, the failure of the electronic component due to temperature rise can be prevented, and the service life of the electronic component can be increased.

[0051] On the other hand, since the circuit layer is electrically connected to the electronic component by directly contacting the electrical contact points on the surface of the electronic component, the situation of misalignment between the electronic component and the circuit layer caused by electrically connecting the electronic component and the circuit layer through conductive micro vias is avoided. In this way, the alignment accuracy between the electronic component and the circuit layer can be improved, and the process yield of the buried component circuit board can be further improved.

[0052] Although the embodiments of the present invention have been disclosed above, they are not intended to limit the embodiments of the present invention. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, the protection scope of the embodiments of the present invention shall be determined by the scope defined by the appended claims.

[0053]

Symbolic Explanation

[0054] 10: Buried component circuit board

[0055] 100: Circuit substrate

[0056] 100s, 122f, 122s, 300f, 300s: Surfaces

[0057] 102a, 102b, 124: Circuit layers

[0058] 120, 120’: Buried structures

[0059] 120w: Side walls

[0060] 122: Electronic components

[0061] 122p: Electrical contact points

[0062] 122w: Side surfaces

[0063] 126a, 126b: Heat-conducting connection cushions

[0064] 128, 128’: Insulating materials

[0065] 128a, 128b, 128c, 128d: Sealing layers

[0066] 128e, 205e: End faces

[0067] 140, 140’, 205: Conductive structure

[0068] 160: Heat dissipation substrate

[0069] 165: Metal block

[0070] 170, 302’: Metal layer

[0071] 180: Bonding material

[0072] 200t, 207t: Gap

[0073] 201, 202: Carrier board

[0074] 220: Sealing unit

[0075] 300: Substrate

[0076] 303: Insulating layer

[0077] 306: Bonding film

[0078] 307: Laminating tape

[0079] 308: Conductive layer

[0080] 340t: Opening

[0081] D: Drain block

[0082] G1, G2: Gate block

[0083] S: Source block.

Claims

1. An embedded component circuit board, characterized in that, Comprising: A circuit board; A plurality of embedded structures disposed within the circuit board, each of the embedded structures comprising: An electronic component; A circuit layer disposed on the electronic component and in direct contact with the electronic component; Two thermally conductive bonding pads respectively disposed on the electronic component and the circuit layer, wherein the electronic component and the circuit layer are located between the thermally conductive bonding pads; And An insulating material covering the circuit layer, the electronic component, and the thermally conductive bonding pads, wherein one end surface of the insulating material exposes one of the thermally conductive bonding pads; A plurality of conductive structures respectively disposed within the embedded structures and connecting the thermally conductive bonding pads located on opposite sides of the embedded structures, wherein the embedded structures are electrically connected to the circuit board through the conductive structures; And A heat dissipation substrate disposed on the surface of the circuit board, wherein the embedded structures overlap with the heat dissipation substrate.

2. The embedded component circuit board according to claim 1, wherein The thermal expansion coefficient of the insulating material is less than 10 ppm / °C.

3. The embedded component circuit board according to claim 1, wherein Further comprising: A bonding material located between the embedded structures and the circuit board, and the bonding material exists between adjacent ones of the embedded structures.

4. The embedded component circuit board according to claim 1, characterized in that, The thickness range of the thermally conductive bonding pads falls between 100 μm and 400 μm.

5. The embedded component circuit board according to claim 1, characterized in that, One of the thermally conductive bonding pads of each of the embedded structures comprises a first gate block and a source block, and the first gate block is separated from the source block, and the other of the thermally conductive bonding pads comprises a second gate block and a drain block, and the second gate block is separated from the drain block.

6. The embedded component circuit board according to claim 5, wherein One of the conductive structures connects the first gate block and the second gate block.

7. The embedded component circuit board according to claim 1, characterized in that Further comprising: A metal layer located between the embedded structures and the heat dissipation substrate and connecting one of the thermally conductive bonding pads of the embedded structures and the heat dissipation substrate.

8. A manufacturing method of a circuit board with embedded components, characterized in that, Comprising: Providing a first carrier; On the first carrier, a plurality of electronic components are disposed, and there is a gap between adjacent ones of the electronic components, wherein the electronic components have opposite first surfaces and second surfaces, and the first surface faces the first carrier; On the second surface of the electronic component, a circuit layer is formed; After forming the circuit layer, the first carrier is removed to form a plurality of sealed monomers; Providing a second carrier; On the second carrier, a plurality of conductive structures and the sealed monomers are disposed, wherein the sealed monomers and the conductive structures are arranged alternately, and the first surface of the electronic component faces the second carrier; After disposing the conductive structures and the sealed monomers, a first thermally conductive bonding pad is formed on the circuit layer and the conductive structures; After forming the first thermally conductive bonding pad, the second carrier is removed to expose the first surface of the electronic component; On the first surface of the electronic component, a second thermally conductive bonding pad is formed; On the electronic component, an insulating material is disposed to form an embedded structure, wherein the insulating material covers the first thermally conductive bonding pad and the second thermally conductive bonding pad; Providing a substrate; Removing a part of the substrate to form a plurality of openings; Inside the opening, the embedded structures are respectively arranged; A part of each of the embedded structures is removed to respectively form a plurality of openings, wherein the openings communicate with opposite sides of the substrate; Inside the openings, a conductive material is deposited to form a plurality of conductive structures; And After forming the conductive structures, a heat dissipation substrate is arranged on the substrate, wherein the embedded structures overlap with the heat dissipation substrate.

9. The method according to claim 8, wherein Further comprising: Before forming the circuit layer, a sealing layer is arranged on the first carrier board, wherein the sealing layer is located in the gap and covers the second surface of the electronic component; A part of the sealing layer is removed to expose the second surface of the electronic component; And After removing the first carrier board, the sealing layer is cut along the gap to form the sealing monomer.

10. The method according to claim 8, characterized in that, Further comprising: After forming the openings, conductive layers are respectively deposited on two third surfaces on opposite sides of the substrate, wherein the conductive layers are electrically connected to the conductive structures, and the electronic components of the embedded structures are electrically connected to the substrate through the conductive structures and the conductive layers.

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