Wafer measuring structure, setting method and wafer
By adding a grating group perpendicular to the external mark in the target layer of the wafer, the problem of phase depth change of metal layer image overprinting error measurement mark after grinding is solved, and the uniformity and accuracy of overprinting measurement are improved.
Patent Information
- Application Number
- CN202411716606.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2025-07-29
AI Technical Summary
In the latter stage process in the integrated circuit wafer manufacturing process, the production of the image incision error measurement mark of the metal layer will cause phase depth changes after mechanical and chemical grinding, affecting the accuracy of the incision measurement.
Add a grating group in the target layer of the wafer and make it perpendicular to the external mark to scatter away the light reflected below the external mark to avoid the effect of phase difference on the overprint measurement.
It improves imaging uniformity and accuracy of overturning measurements, reduces measurement differences caused by mechanical and chemical grinding, and improves measurement stability and accuracy.
Smart Images
Figure CN120388902A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and particularly to a measurement structure of a wafer, a setting method, and a wafer. Background Art
[0002] Currently, in the back-end process of integrated circuit wafer manufacturing (usually referring to the metal connection layer), the production of the Image Base Overlay (IBO) measurement marks for the images of the Metal layer is limited to the Metal layer itself. However, after mechanical and chemical polishing (CMP), the phase depth of the marks will change, thus affecting the accuracy of the overlay error.
[0003] In summary, it is necessary to provide a measurement structure of a wafer, a setting method, and a wafer that can improve the accuracy of overlay measurement. Summary of the Invention
[0004] To solve the above problems, this application proposes a measurement structure of a wafer, a setting method, and a wafer.
[0005] In a first aspect, this application proposes a measurement structure of a wafer, including: at least one target layer in the wafer and at least one grating group in the target layer;
[0006] The target layer is the layer below the first marking layer, and the target layer is a non-zero layer; wherein, the first marking layer is the layer with external marks having overlay measurement marks;
[0007] The grating group is below at least one group of the external marks of the first marking layer;
[0008] Each scattering grating in the grating group is perpendicular to the external marks above the grating group.
[0009] Preferably, the size of the grating group is determined according to the maximum of the minimum line / space of the target layer.
[0010] Preferably, the duty cycle of the grating group is 50%.
[0011] Preferably, the length of the grating group is greater than or equal to the length of the external marks, and the width of the grating group is greater than or equal to the width of the external marks.
[0012] Preferably, the number of the grating groups is the same as the number of the external marks of one overlay measurement mark.
[0013] In a second aspect, this application proposes a setting method of a measurement structure of a wafer, including:
[0014] Form at least one grating group and external and / or internal marks of overlay measurement marks in a target layer of a wafer; wherein, the target layer is a non-zero layer;
[0015] In the layer above the grating group, form an external mark on the grating group and perpendicular to the scattering grating in the grating group.
[0016] Preferably, the forming, in the layer above the grating group, an external mark on the grating group and perpendicular to the scattering grating in the grating group further includes:
[0017] Form internal marks and / or a grating group in the layer above the grating group.
[0018] In a third aspect, the present application proposes a wafer including the measurement structure of the wafer according to any one of the first aspect.
[0019] The advantages of the present application are as follows: By adding at least one grating group in the target layer one layer below the first mark layer, and making this grating group under the external mark of the first mark layer and perpendicular to the external mark, the light reflected from below the external mark is scattered, avoiding the influence of the phase difference between the light reflected from the bottom of the external mark and the light reflected from the top on the overlay measurement accuracy. Description of the Drawings
[0020] By reading the detailed description of the preferred embodiments below, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present application. Moreover, throughout the drawings, the same reference numerals are used to represent the same components.
[0021] In the drawings:
[0022] Figure 1 Schematic diagram of an existing IBO optical measurement system;
[0023] Figure 2 Schematic diagram showing that lights of different wavelengths have different phase differences between the reflected light and the incident light at the same phase difference depth;
[0024] Figure 3 Schematic diagram showing that the effective phase depth of the measurement mark in the back-end process is determined by the distance between the mark and the substrate;
[0025] Figure 4 Schematic diagram showing the unevenness of the wafer and the effective phase depth of the measurement marks at different positions;
[0026] Figure 5 Schematic diagram of a measurement structure of a wafer provided by the present application;
[0027] Figure 6It is a schematic diagram of another measurement structure of a wafer provided by this application;
[0028] Figure 7 It is a schematic diagram of the grating direction between the grating group of a measurement structure of a wafer provided by this application and an external mark;
[0029] Figure 8 It is a schematic diagram of a method for setting a measurement structure of a wafer provided by this application. Detailed implementation manners
[0030] Hereinafter, the exemplary embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be completely conveyed to those skilled in the art.
[0031] The IBO optical measurement system extracts overlay error information based on the measurement mark image. The schematic diagram of the IBO optical measurement system is as Figure 1 shown. The measurement mark generates diffracted light under the illumination of the light source, and the diffracted light is collected by the lens of the measurement machine tool and interferes and forms an image on the imaging surface. After the measurement machine tool obtains the image of the mark, it determines the gravity center of the image of the measurement mark by analyzing the gray scale, and finally obtains the displacement vector (overlay error). Therefore, the imaging quality and stability are very important and directly affect the accuracy of the measurement result.
[0032] The phase difference depth determines the phase difference between the incident light and the reflected light of the measurement mark. When light irradiates on a plane, the reflected light and the incident light will have the same phase. When reflection occurs on the measurement mark, there will be a phase difference between the light reflected from the bottom of the mark and the light reflected from the top, and the magnitude of the phase difference is determined by the phase difference depth, as Figure 2 shown. For lights of different wavelengths at the same phase difference depth, the reflected light and the incident light have different phase differences. Similarly, for lights of the same wavelength at different phase difference depths, there will be different phase differences.
[0033] In the process of manufacturing the existing metal layer IBO measurement mark, CMP will cause the thickness of the dielectric layer of the measurement mark at different positions on the wafer to be different, that is, the phase depth of the mark is different. As Figure 3 shown, in the back-end process, the effective phase depth of the measurement mark (floating mark) is determined by the distance between the mark and the substrate. Among them, for the LK layer (LK dielectric layer), K represents the material extinction coefficient, and LK is a material with a low extinction coefficient. As Figure 4As shown, there is a certain degree of unevenness in the wafer itself. In the CMP process, the thickness of the effective dielectric layer of the measurement marks at different positions on (in) the wafer is different, that is, the effective phase depth is different. In the actual optical measurement process, the measurement light source is light with a certain wavelength range. Different phase depths result in different components of the imaging diffracted light, and the optical paths experienced are also different. This will cause differences in the quality of the final imaging of the optical measurement image of the mark, ultimately leading to overlay errors introducing process-induced errors, thereby affecting the accuracy of overlay measurement. Failing to consider the impact of the change in the phase depth of the mark caused by the change in the thickness of the dielectric layer brought about by mechanical and chemical polishing is unacceptable for further improving the accuracy of overlay errors.
[0034] In a first aspect, to solve the above problems, an embodiment of the present application proposes a measurement structure for a wafer, as Figure 5 shown, including: at least one target layer 100 in the wafer and at least one grating (Scattering Bar) group 10 in the target layer 100; the target layer 100 is the layer below the first mark layer 200, and the target layer 100 is a non-zero layer (Non-Zero Layer); wherein, the first mark layer 200 is the layer of the external mark 20 with an overlay measurement mark; the grating group 10 is below at least one group of external marks 20 of the first mark layer 200; each scattering grating (grating) 1 in the grating group 10 is perpendicular to the external mark 20 above the grating group 10.
[0035] The embodiment of the present application is applicable to the production of metal layer IBO (Image Base Overlay) measurement marks in the semiconductor back-end metal interconnection process. The marks produced by the back-end metal interconnection process are also called Non-Zero marks (non-zero marks). CMP causes differences in the optical measurement of Non-Zero marks at different positions on the wafer. The embodiment of the present application can reduce the measurement differences of the marks brought about by CMP and improve the process robustness and measurement stability of the marks.
[0036] As Figure 6 shown, for overlay measurement, the existing method is usually to make corresponding external marks and internal marks at the non-zero layer. Among them, the zero (Zero) layer is the layer in the wafer specifically used for making marks (Marks), and the non-zero layer includes the layers in the wafer that are not the zero layer and the metal layers (metal non-zero layers) in the back-end process.
[0037] As Figure 7As shown, taking the example where the second metal layer M2 needs to be aligned with the first metal layer M1 in the layer below it, a second internal mark I2 is fabricated at the second metal layer M2, a first external mark O1 is fabricated at the first metal layer M1, and the first metal layer M1 is the current first mark layer. Based on this, the first grating group 30 for the external mark of the first metal layer M1 is to be located in the layer below the first metal layer M1 and overlap with the position where the first external mark O1 of the first metal layer M1 is located, and the first grating group 30 also needs to be perpendicular to the grating direction of the first external mark O1. Therefore, the layer below the first metal layer M1 is taken as the first target layer 300.
[0038] If the third metal layer M3 in the layer above the second metal layer M2 also needs to be aligned with the second metal layer M2, a second external mark O2 also needs to be fabricated in the second metal layer M2 for cooperation with the third internal mark I3 in the third metal layer M3. In this case, the second grating group 40 for the second external mark O2 of the second metal layer M2 is to be located in the layer below the second metal layer M2 and overlap with the position where the second external mark O2 of the second metal layer M2 is located, and the second grating group 40 also needs to be perpendicular to the grating direction of the second external mark O2 of the second metal layer M2. The layer below the third metal layer M3 (the second metal layer M2) is taken as the second target layer 400, and so on.
[0039] Since the external mark is also composed of a line / space structure, therefore, the light passing through the space region of the external mark can be diffracted at a large angle when reaching the bottom through the action of the grating group. The reflected light has too large a diffraction angle, so it will not interfere with the light reflected on the line of the external mark, thereby improving the imaging stability and accuracy of the external mark (measurement mark), and thus improving the measurement performance.
[0040] The grating group perpendicular to the direction of the grid in the external mark effectively scatters the light reflected from below the external mark, so that the clarity of the external mark above the grating group is not affected by the reflected light caused by the change in phase depth, making the external mark clearer, thereby improving the uniformity of the imaging of the overlay measurement and further improving the accuracy and precision of the overlay measurement.
[0041] The size of the grating group is determined according to the maximum value of the minimum line / space of the target layer. The duty cycle of the grating group (the line / space of the gratings in the grating group) is 50%.
[0042] The size of the grating group is the larger one of the minimum line or space (or minimum line / space) specified in the design rule of the layer (the target layer where it is located). Taking the minimum line / space of 48 / 80 as an example, the size of the scattering bar and the space of the grating group is 80 / 80, that is, line 80 / space 80, so as to ensure the lithographic imaging quality and process uniformity of the grating group.
[0043] As Figure 6 shown, the length L1 of the grating group is greater than or equal to the length L2 of the external mark, and the width W1 of the grating group is greater than or equal to the width W2 of the external mark. In this way, the aspect ratio of the overall grating structure of the grating group is a little larger than or equal to that of the external mark. The height of the grating group is determined by the process of the manufacturing layer. Since the length of the grating group is greater than or equal to the length of the external mark, and the width of the grating group is greater than or equal to the width of the external mark, the grating group can effectively scatter the light reflected from below the external mark, so that the external mark on the grating group is not affected by the reflected light with different phase depths, making the external mark clearer, thereby improving the uniformity of the overlay measurement imaging and further improving the accuracy and precision of the overlay measurement.
[0044] The number of grating groups is the same as the number of external marks of an overlay measurement mark.
[0045] As Figure 6 shown, taking 4 groups of external marks as an example, the number of grating groups is also 4 groups. One group of grating groups corresponds to one group of external marks. Among them, Figure 6 the two dashed boxes in are the external mark and the internal mark respectively, and the quantity units of the external mark and the internal mark are both groups. The length of the external mark is the overall length of one group of external marks, and the width of the external mark is the overall width of one group of external marks.
[0046] Since CMP is an indispensable process step in semiconductor processes, it is proposed to place the grating group in the Front End Of Loop (FEOL) to improve the imaging uniformity of the measurement mark. As Figure 6As shown, the grating group is placed below the external mark of the first marking layer. The placement direction of the grating group is perpendicular to the measurement identification grating (Grating) fabricated in the subsequent process, i.e., the direction of the external mark, to avoid affecting the extraction of image registration error information. The grating group increases the diffraction angle of the non-zero order reflected light at the bottom of the measurement identification (external mark), making it impossible for the measurement stage to collect the non-zero order reflected light. As a result, all the final imaging information comes from the high-order diffraction light at the top of the measurement identification, avoiding the influence of phase depth, making the external mark clearer, thus improving the uniformity of the imaging for registration measurement and further enhancing the accuracy and precision of the registration measurement.
[0047] In a second aspect, as Figure 8 shown, according to an embodiment of the present application, a method for setting a measurement structure of a wafer is further provided, including:
[0048] S101, forming at least one grating group and external marks and / or internal marks of the registration measurement mark in the target layer of the wafer; wherein, the target layer is a non-zero layer;
[0049] S102, in the layer above the grating group, forming an external mark on the grating group and perpendicular to the scattering grating in the grating group.
[0050] Forming an external mark on the grating group and perpendicular to the scattering grating in the grating group in the layer above the grating group further includes:
[0051] forming internal marks and / or a grating group in the layer above the grating group.
[0052] Among them, the embodiment of the present application is used in the front end of loop (FEOL) process.
[0053] In a third aspect, according to an embodiment of the present application, a wafer is further provided, including the measurement structure of the wafer according to any one of the first aspect.
[0054] In the embodiments of the present application, at least one grating group is added to the target layer one layer below the first marking layer, and this grating group is under the external marking of the first marking layer and perpendicular to the external marking, so as to scatter the light reflected from below the external marking, avoid the influence of the phase difference between the light reflected from the bottom of the external marking and the light reflected from the top on the accuracy of overlay measurement, effectively remove the influence brought by the phase depth in the overlay measurement imaging, and improve the uniformity of the overlay measurement imaging. By placing a grating group (fabricated in the previous process) below the measurement identification area (the area with external markings) in the first marking layer, the influence brought by the change in the thickness of the Low k (LK) value dielectric layer caused by CMP is reduced, thereby improving the accuracy of overlay error measurement, where K represents the material extinction coefficient, and LK is a material with a low extinction coefficient. Although the instability of overlay error measurement caused by CMP can also be reduced by improving the flatness of wafer fabrication, it is difficult to control the flatness of the wafer. Therefore, on the premise that the CMP process is indispensable and the wafer has a certain degree of unevenness, the embodiments of the present application can improve the process robustness and measurement stability of the measurement identification (external marking) in the back-end process, and meet the requirements for the accuracy of overlay error in advanced nodes.
[0055] As described above, the above are only the preferred specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A measurement structure for a wafer, characterized in that, Comprising: At least one target layer in a wafer and at least one grating group in the target layer; The target layer is the layer next to the first marking layer, and the target layer is a non-zero layer; wherein, the first marking layer is the layer of an external mark having an overlay measurement mark; The grating group is under at least one group of the external marks of the first marking layer; Each scattering grating in the grating group is perpendicular to the external mark above the grating group.
2. The measurement structure according to claim 1, wherein The size of the grating group is determined according to the maximum of the minimum line / space of the target layer.
3. The measurement structure according to claim 2, wherein, The duty cycle of the grating group is 50%.
4. The measurement structure according to claim 1, wherein, The length of the grating group is greater than or equal to the length of the external mark, and the width of the grating group is greater than or equal to the width of the external mark.
5. The measurement structure according to claim 1, characterized in that, The number of the grating groups is the same as the number of the external marks of one overlay measurement mark.
6. A method for setting a measurement structure of a wafer, characterized in that Comprising: Forming at least one grating group and an external mark and / or an internal mark of an overlay measurement mark in a target layer of a wafer; wherein, the target layer is a non-zero layer; In the layer above the grating group, forming an external mark on the grating group and perpendicular to the scattering grating in the grating group.
7. The setting method according to claim 6, characterized in that, The forming, in the layer above the grating group, an external mark on the grating group and perpendicular to the scattering grating in the grating group, further comprises: Forming an internal mark and / or a grating group in the layer above the grating group.
8. A wafer, characterized in that, Comprising the measurement structure of the wafer according to any one of claims 1 to 5.