PFC channel failure fault detection and device protection circuit, method, equipment and medium

Abstract

The invention relates to a PFC channel failure fault detection and device protection circuit, method and device, and a medium. A channel current detection module is used for detecting and comparing three channel currents with a set current threshold value; the PWM wave logical operation module is composed of three trigger integration modules, each trigger integration module is of the same structure and comprises two D triggers, and the two input ends of each trigger integration module receive PWM waves of a driving chip pin and a switching tube control pin of a corresponding channel of the PFC circuit respectively. The trigger integration module carries out logical operation on the PWM waves, and the processor is used for judging the abnormal type of each channel without channel current of the PFC circuit according to a logical operation result and carrying out corresponding adjustment on various abnormities in combination with the total input current. According to the invention, the input current is reduced to be below the bearing current of the open channel by reducing the frequency of the equipment, the PFC channel failure problem is subjected to current control, and the device is prevented from being damaged.

Description

Technical Field

[0001] The present invention belongs to the technical field of PFC circuit protection, and more specifically, relates to a PFC channel failure fault detection and device protection circuit, method, device and medium. Background Art

[0002] In the currently used multi-channel interleaved PFC circuit, the PFC channels are switched on and off alternately at the same time, which increases the current that the unit can carry. However, when some PFC channels fail, all the current will flow only through the remaining channels, causing the current to exceed the device's carrying capacity and eventually explode.

[0003] Current control methods for multi-channel interleaved PFC circuits are divided into software-controlled PFC and hardware-controlled PFC. Software-controlled PFC primarily uses a chip to send PWM control signals, adjusting the duty cycles of the three channels to ensure proper operation. Connecting a simulation device to a computer allows you to observe whether the chip is transmitting PWM waves, but the results are not intuitive and can be cumbersome. Hardware-controlled PFC primarily uses a hardware chip to control the three current channels. This process requires adjusting the parameters of the corresponding peripheral components on the chip based on the values of sampling resistors. Without external test equipment and test points, the PWM output cannot be observed.

[0004] CN116039383A discloses a fast fault protection system, method, and vehicle for an on-board charger, comprising a PFC power circuit, a high-voltage bus capacitor, a bridge-type isolation conversion power circuit, a PFC controller, and a bridge circuit controller. The PFC power circuit is connected to the high-voltage bus capacitor and the PFC controller, respectively. The bridge-type isolation conversion power circuit is connected to the high-voltage bus capacitor and the bridge circuit controller, respectively. The bridge circuit controller and the PFC controller are connected via a hard-wired channel. The PFC controller determines, based on a sampled signal, whether the PFC power circuit is in an abnormal state that causes circuit failure. If so, it outputs a fault protection signal and inputs it to the bridge circuit controller via a hard-wired channel. Upon detecting the fault protection signal output by the PFC controller, the bridge circuit controller stops the output of the bridge-type isolation conversion power circuit. However, the specific fault type cannot be visualized. After a fault is reported, the current cannot be adjusted according to actual usage, but the device is directly shut down, reducing device utilization.

[0005] CN118868585A discloses a control method, device, equipment and storage medium for a multi-channel PFC circuit. The control method includes: updating the fault count value of each PFC in the multi-channel PFC circuit based on the fault detection result of each PFC; in response to the fault count value being greater than or equal to the set count threshold, adjusting the current limiting value of the corresponding PFC. However, the specific fault type cannot be visualized, and it cannot be ensured that there is no abnormality in each PFC after current limiting. If there is a path abnormality, it cannot be ensured that the limited current value meets the allowable threshold of the remaining paths, and there is a risk of damage to path devices. Summary of the Invention

[0006] To solve the deficiencies in the prior art, the present invention provides a fault detection and device protection circuit, method, equipment and medium for PFC channel failure.

[0007] The present invention adopts the following technical solutions.

[0008] In a first aspect of the present invention, a fault detection and device protection circuit for PFC channel failure is proposed, including: a total current detection module, a channel current detection module, a processor, a PWM wave logic operation module, a comparator integration module and several temperature detection modules, specifically: The channel current detection module is used to detect the three-channel currents of the PFC circuit and compare them with the set current threshold, and output the three-channel currents and the current comparison results to the processor; The PWM wave logic operation module is composed of three trigger integration modules. Each trigger integration module has the same structure and includes two D flip-flops. The two D flip-flops are in a cascaded structure with inverted clocks. The two input ends of each trigger integration module respectively receive the PWM waves of the corresponding channel's driver chip pin and switch tube control pin of the PFC circuit. The trigger integration module performs logic operations on the PWM waves and outputs the logic operation results to the processor; Several temperature detection modules respectively detect the temperatures of the three channels of the PFC circuit. Their output ends are respectively connected to the three input ends of the comparator integration module. The comparator integration module compares the temperature detection values of the three channels with the set temperature and outputs the temperature comparison results to the processor; the total current detection module is used to detect the total input current; the processor is used to control whether each trigger integration module and temperature detection module are enabled, and judge the abnormal types of each channel without channel current in the PFC circuit according to the logic operation results. After judging that there are abnormalities in each channel without channel current, then judge whether there is an overload temperature abnormality in each channel with channel current according to the temperature comparison results, and perform corresponding adjustments on various abnormalities in combination with the total input current.

[0009] Preferably, the trigger integration module further includes three inverters, specifically: The PWM wave of the switching transistor control pin of one channel of the PFC circuit is input to the data input terminal of the first D flip-flop after passing through the second inverter, and the PWM wave of the driving chip pin of the corresponding channel is input to the clock input terminal of the first D flip-flop after passing through the first inverter. The clock input terminal is connected to the clock input terminal of the second D flip-flop through the third inverter; the main output terminal of the first D flip-flop is connected to the data input terminal of the second D flip-flop, and the main output terminal of the second D flip-flop outputs the logical operation result to the processor.

[0010] Preferably, the channel current detection module includes three current detection modules and three comparators, specifically: The voltages of the sampling resistors of the three channels of the PFC circuit are respectively input to the input terminals of the three current detection modules. The output terminals of the three current detection modules all output the detected current to the processor, and the output terminals of the three current detection modules are also respectively connected to the first input terminals of the three comparators. The second input terminals of the three comparators all receive the product of the set current threshold and the sampling resistor of the corresponding channel, and the output terminals of the three comparators respectively output the current comparison results of the three-channel currents.

[0011] The second aspect of the present invention proposes a method for detecting faults and protecting devices for PFC channel failures based on the circuit described in the first aspect of the present invention, including: Collect the three-channel currents of the PFC circuit, and judge whether there is current in each channel. If there is current in all channels, control the device equipped with this PFC circuit to operate normally; otherwise, it is considered that there is an abnormality in each channel of the PFC circuit, and reduce the frequency of this device according to the channel current and the total input current of each channel; After reducing the frequency, control the trigger integration module corresponding to each channel without channel current in the PFC circuit to be enabled. The trigger integration module performs logical operations on the PWM waves of the driving chip pin and the switching transistor control pin of the corresponding channel, and judges the type of abnormality of the corresponding channel according to the logical operation result; When the type of abnormality is a driving chip abnormality, judge whether the set temperature detection condition is reached through timing. If it is reached, collect the temperatures of the channels with channel current, compare them with the set temperature, judge whether these channels have overloaded temperature abnormalities, and control whether the device equipped with this PFC circuit continues to operate.

[0012] Preferably, the reducing the frequency of this device according to the channel current and the total input current of each channel is specifically: If there is only one channel without channel current, then reduce the compressor frequency of the device equipped with this PFC circuit f 1 until the total input current I 1 is less than the sum of the set current thresholds of the two channels; if there are two channels without channel current, reduce the frequency of the device equipped with this PFC circuitf 1 decreases until the total input current I 1 is less than the current threshold set for one channel.

[0013] Preferably, the abnormal type of the corresponding channel is judged according to the logical operation result, specifically: When the logical operation result of the trigger integration module is at a high level, the abnormal type of the corresponding channel of the PFC circuit is a driving chip abnormality, and vice versa, the abnormal type is a switching tube abnormality.

[0014] Preferably, the set temperature detection condition is specifically: Start timing from when an abnormality is detected in each channel of the PFC circuit. When the timing is greater than the set time threshold T 1, and no command to terminate the device operation is received during this period, then the set temperature detection condition is reached.

[0015] Preferably, the temperature of each channel collecting the channel current is compared with the set temperature to judge whether these channels have overloaded temperature abnormalities, and control whether the device equipped with this PFC circuit continues to operate, specifically: By comparing the voltage output by each temperature detection module corresponding to each channel with the reference voltage of the set temperature, it is used as the comparison between the temperature of each channel and the set temperature; When the voltage output by the temperature detection module corresponding to a certain channel is greater than the reference voltage of the set temperature, it is considered that the overload temperature abnormality has occurred in this channel, and the device equipped with this PFC circuit is controlled to stop running. If the voltages output by the temperature detection modules corresponding to all channels with channel current are less than or equal to the reference voltage of the set temperature, then continue to run with the current channel currents of each channel.

[0016] The third aspect of the present invention proposes a device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor executes the steps of a fault detection and device protection method for PFC channel failure described in the second aspect of the present invention.

[0017] The fourth aspect of the present invention proposes a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the steps of a fault detection and device protection method for PFC channel failure described in the second aspect of the present invention are used.

[0018] The beneficial effects of the present invention are as follows. Compared with the prior art, the present invention detects the current of each of the three channels. When it is detected that there is current in only one channel or two channels, the device frequency is reduced to decrease the input current, reducing it to below the current that the turned-on channels can withstand, and current control is performed on the PFC channel failure problem to prevent device damage. By using a hardware method to detect the PWM wave of the pin of the drive chip and the control pin of the switching tube of the channel without current, the type of abnormality can be quickly detected. After reporting a drive abnormality, the channel temperature detection is triggered by timing. By detecting the temperature of the channels with channel current, it is determined whether the channels without abnormalities are abnormally heated due to excessive current. If a temperature abnormality occurs, a shutdown command is executed to protect the motherboard devices, not only protecting the failed circuit, but also performing abnormality judgment and protection on the channels without abnormalities that have excessive current due to the failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a structural diagram of the circuit according to an embodiment of the present invention; Figure 2 is a flowchart of the circuit according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments described in this application are only a part of the embodiments of the present invention, rather than all embodiments. Based on the spirit of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0021] As Figure 1 shown, Embodiment 1 of the present invention proposes a fault detection and device protection circuit for PFC channel failure, including: a total current detection module, a channel current detection module, a processor, a PWM wave logic operation module, a comparator integration module, and three temperature detection modules t 1. t 2. t 3. Specifically, The channel current detection module is used to detect the three-channel current of the PFC circuit and compare the three-channel current with a set current threshold, and output the three-channel current and the current comparison result to the processor; in this embodiment, the processor is a DSP processor; Preferably in this embodiment, the channel current detection module includes three current detection modules and three comparators. Specifically, The voltages of the sampling resistors of the three channels of the PFC circuit are respectively input to the input ends of three current detection modules. The output ends of the three current detection modules all output the detected current to the processor, and the output ends of the three current detection modules are also respectively connected to the first input ends of three comparators. The second input ends of the three comparators all receive the product of the set current threshold and the sampling resistor of the corresponding channel. The output ends of the three comparators respectively output the current comparison results of the three-channel currents. When the comparator outputs a high level, it indicates that the current of the corresponding channel is greater than the set current threshold, and at this time, the enable end of the corresponding flip-flop is powered; The PWM wave logic operation module consists of three flip-flop integrated modules. Each flip-flop integrated module has the same structure and contains two D flip-flops. The two input ends of each flip-flop integrated module respectively receive the PWM waves of the corresponding channel driver chip pin and the switch tube control pin of the PFC circuit. The flip-flop integrated module performs logic operations on these PWM waves, and the logic operation results are output to the processor; Preferably in this embodiment, the flip-flop integrated module further includes three inverters, specifically: After the enable end of the flip-flop receives power supply, it starts to perform logic operations on the PWM waves of the corresponding channel driver chip pin and the PWM waves of the switch tube control pin. The PWM wave of the switch tube control pin of one channel of the PFC circuit (the PWM waves of the switch tube control pins of the three channels are PWM1, PWM2, and PWM3 respectively in Figure 1 , that is Figure 1 in V 4 、V 5 、V 6 are respectively equal to PWM1, PWM2, and PWM3) are input to the data input end of the first D flip-flop after passing through the second inverter. The PWM wave of the corresponding channel driver chip pin (the PWM waves of the driver chip pins of the three channels are Figure 1 respectively in V 4 ” 、V 5 ” 、V 6 ” ) are input to the clock input end of the first D flip-flop after passing through the first inverter. This clock input end is connected to the clock input end of the second D flip-flop through the third inverter; the main output end of the first D flip-flop is connected to the data input end of the second D flip-flop, and the main output end of the second D flip-flop outputs the logic operation result to the processor.

[0022] Three temperature detection modules respectively detect the temperatures of the three channels of the PFC circuit. Their output ends are respectively connected to the three input ends of the comparator integrated module. The comparator integrated module is used to compare the output values of the three temperature detection modules with the set temperature and output the temperature comparison result to the processor; the total current detection module is used to detect the total input current; It should be noted that the temperature detection module outputs voltage. Therefore, the comparator integration module compares the output values of the three temperature detection modules with the reference voltage of the set temperature, and the voltage comparison result is the temperature comparison result between the output values of the three temperature detection modules and the set temperature. The processor is used to control the enabling of each flip-flop integration module and whether each temperature detection module is enabled, and determine the types of abnormalities in the channels without channel current in the PFC circuit according to the logical operation result. After determining that there are abnormalities in the channels without channel current, it further determines whether there are overload temperature abnormalities in the channels with channel current according to the temperature comparison result, and performs corresponding adjustments to various abnormalities in combination with the total input current.

[0023] As Figure 2 shown, Embodiment 2 of the present invention proposes a method for fault detection and device protection for PFC channel failure based on the circuit described in the first aspect of the present invention, including: Collect the three-channel currents of the PFC circuit, and determine whether there is current in each channel. If there is current in all channels, control the device equipped with this PFC circuit to operate normally. Otherwise, it is considered that there are abnormalities in the channels of the PFC circuit, and reduce the frequency of this device according to the channel current and total input current of each channel; Specifically, in this embodiment, the device equipped with this PFC circuit is a unit.

[0024] Preferably in this embodiment, the reducing the frequency of this device according to the channel current and total input current of each channel is specifically: If there is only one channel without channel current, then reduce the compressor frequency of the device equipped with this PFC circuit f 1 until the total input current I 1 is less than the sum of the current thresholds set for two channels; if there are two channels without channel current, reduce the frequency of the device equipped with this PFC circuit f 1 until the total input current I 1 is less than the current threshold set for one channel.

[0025] After reducing the frequency, control the enabling of the flip-flop integration modules corresponding to the channels without channel current in the PFC circuit. The flip-flop integration module performs logical operations on the PWM waves of the driving chip pins and the switching tube control pins of the corresponding channels, and determines the types of abnormalities in the corresponding channels according to the logical operation result; Preferably in this embodiment, the determining the types of abnormalities in the corresponding channels according to the logical operation result is specifically: When the logical operation result of the flip-flop integration module is at a high level, the type of abnormality in the corresponding channel of the PFC circuit is a driving chip abnormality, and vice versa, the type of abnormality is a switching tube abnormality.

[0026] When the abnormal type is a driving chip abnormality, it is judged whether the set temperature detection condition is reached through timing. If it is reached, then DSP Send enable EN1, EN2, EN3 to three temperature detection modules respectively, collect the temperatures of the channels with channel currents respectively, compare them with the set temperature, judge whether overload temperature abnormalities have occurred in these channels, and control whether the device equipped with this PFC circuit continues to operate.

[0027] Preferably in this embodiment, the set temperature detection condition is specifically: Start timing from when an abnormality is detected in each channel of the PFC circuit. When the timing is greater than the set time threshold T 1, and no command to terminate the device operation externally is received during this period, then the set temperature detection condition is reached.

[0028] Preferably in this embodiment, the step of collecting the temperatures of the channels with channel currents respectively, comparing them with the set temperature, judging whether overload temperature abnormalities have occurred in these channels, and controlling whether the device equipped with this PFC circuit continues to operate is specifically: By comparing the voltages output by each temperature detection module corresponding to each channel with the reference voltage of the set temperature, it is used as the comparison between the temperature of each channel and the set temperature; When the voltage output by the temperature detection module corresponding to a certain channel is greater than the reference voltage of the set temperature, it is considered that an overload temperature abnormality has occurred in this channel. The main processor sends a shutdown command to the device to force a shutdown, thereby ensuring the safe operation of the device; if the voltages output by the temperature detection modules corresponding to all channels with channel currents are less than or equal to the reference voltage of the set temperature, then continue to operate with the current channel currents of each channel.

[0029] Embodiment 3 of the present invention proposes a device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor executes the steps of a method for fault detection and device protection of PFC channel failure described in Embodiment 2 of the present invention.

[0030] Embodiment 4 of the present invention proposes a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the steps of a method for fault detection and device protection of PFC channel failure described in Embodiment 2 are used.

[0031] This disclosure can be a system, a method, and / or a computer program product. The computer program product can include a computer-readable storage medium having computer-readable program instructions thereon for causing a processor to implement various aspects of this disclosure.

[0032] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications or equivalent substitutions can still be made to the specific embodiments of the present invention, and any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered by the protection scope of the claims of the present invention.

Claims

1. A fault detection and device protection circuit for PFC channel failure, comprising: A total current detection module, a channel current detection module, a processor, a PWM wave logic operation module, a comparator integration module, and several temperature detection modules, characterized in that: The channel current detection module is used to detect the three-channel currents of the PFC circuit and compare them with a set current threshold, and output the three-channel currents and the current comparison results to the processor; The PWM wave logic operation module is composed of three flip-flop integration modules. Each flip-flop integration module has the same structure and includes two D flip-flops. The two D flip-flops are in a cascaded structure with inverted clocks. The two input ends of each flip-flop integration module respectively receive the PWM waves of the corresponding channel's driver chip pin and the switch tube control pin of the PFC circuit. The flip-flop integration module performs logic operations on the PWM waves and outputs the logic operation results to the processor; Several temperature detection modules respectively detect the temperatures of the three channels of the PFC circuit. Their output ends are respectively connected to the three input ends of the comparator integration module. The comparator integration module compares the temperature detection values of the three channels with the set temperature and outputs the temperature comparison results to the processor; The total current detection module is used to detect the total input current; The processor is used to control whether the flip-flop integration modules and the temperature detection modules are enabled, and judge the types of abnormalities of the channels without channel current in the PFC circuit according to the logic operation results. After judging that there are abnormalities in the channels without channel current, it further judges whether there are overload temperature abnormalities in the channels with channel current according to the temperature comparison results, and performs corresponding adjustments on various abnormalities in combination with the total input current.

2. A fault detection and device protection circuit for PFC channel failure according to claim 1, characterized in that: The flip-flop integration module further includes three inverters, specifically: The PWM wave of the switch tube control pin of one channel of the PFC circuit is input to the data input end of the first D flip-flop after passing through the second inverter, and the PWM wave of the corresponding channel's driver chip pin is input to the clock input end of the first D flip-flop after passing through the first inverter. The clock input end is connected to the clock input end of the second D flip-flop through the third inverter; The main output end of the first D flip-flop is connected to the data input end of the second D flip-flop, and the main output end of the second D flip-flop outputs the logic operation result to the processor.

3. A fault detection and device protection circuit for PFC channel failure according to claim 1, characterized in that: The channel current detection module includes three current detection modules and three comparators, specifically: The voltages of the sampling resistors of the three channels of the PFC circuit are respectively input to the input ends of the three current detection modules. The output ends of the three current detection modules all output the detected currents to the processor, and the output ends of the three current detection modules are also respectively connected to the first input ends of the three comparators. The second input ends of the three comparators all receive the product of the set current threshold and the sampling resistor of the corresponding channel. The output ends of the three comparators respectively output the current comparison results of the three-channel currents.

4. A fault detection and device protection method for PFC channel failure based on the circuit according to any one of claims 2-3, characterized in that, Including: Collect the three-channel currents of the PFC circuit, and determine whether there is current in each channel. If there is current in all channels, control the device equipped with this PFC circuit to operate normally; otherwise, it is considered that there is an abnormality in each channel of the PFC circuit, and reduce the frequency of this device according to the channel current and the total input current of each channel. After reducing the frequency, control the trigger integration module corresponding to each channel without channel current in the PFC circuit to be enabled. The trigger integration module performs logical operations on the PWM waves of the driving chip pins and the switching tube control pins of the corresponding channels, and determines the type of abnormality of the corresponding channels according to the logical operation results. When the type of abnormality is a driving chip abnormality, determine whether the set temperature detection condition is reached by timing. If it is reached, collect the temperatures of the channels with channel current, compare them with the set temperature, determine whether these channels have overloaded temperature abnormalities, and control whether the device equipped with this PFC circuit continues to operate.

5. A fault detection and device protection method for PFC channel failure according to claim 4, characterized in that: The reducing the frequency of this device according to the channel current and the total input current of each channel is specifically: If there is only one channel with no channel current, the compressor frequency of the device equipped with this PFC circuit f 1 is decreased until the total input current I 1 is less than the sum of the current thresholds set for the two channels; if there are two channels with no channel current, the frequency of the device equipped with this PFC circuit f 1 is decreased until the total input current I 1 is less than the current threshold set for one channel.

6. A fault detection and device protection method for PFC channel failure according to claim 4, characterized in that: The determining the type of abnormality of the corresponding channel according to the logical operation result is specifically: When the logical operation result of the trigger integration module is at a high level, the type of abnormality of the corresponding channel of the PFC circuit is a driving chip abnormality; otherwise, the type of abnormality is a switching tube abnormality.

7. A fault detection and device protection method for PFC channel failure according to claim 4, characterized in that: The set temperature detection condition is specifically: Start timing when an abnormality is detected in each channel of the PFC circuit. When the elapsed time is greater than the set time threshold T 1, and no command to terminate the device operation externally is received during this period, then the set temperature detection condition is met.

8. A fault detection and device protection method for PFC channel failure according to claim 4, characterized in that: The collecting the temperatures of the channels with channel current, comparing them with the set temperature, determining whether these channels have overloaded temperature abnormalities, and controlling whether the device equipped with this PFC circuit continues to operate is specifically: Compare the voltage output by each temperature detection module corresponding to each channel with the reference voltage of the set temperature as the comparison between the temperature of each channel and the set temperature. When the voltage output by the temperature detection module corresponding to a certain channel is greater than the reference voltage of the set temperature, it is considered that there is an overloaded temperature abnormality in this channel, and control the device equipped with this PFC circuit to stop operating. If the voltages output by the temperature detection modules corresponding to all channels with channel current are less than or equal to the reference voltage of the set temperature, continue to operate with the current channel currents of each channel.

9. A device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the steps of a fault detection and device protection method for PFC channel failure according to any one of claims 4 to 8.

10. A computer-readable storage medium storing a computer program, which when executed by a processor, uses the steps of the method for fault detection and device protection of a PFC channel failure according to any one of claims 4 to 8.

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