Electronic component automatic arrangement mode method based on path planning
By constructing the optimization path of dynamic impedance field and ant colony-crystal hybrid algorithm, the problem of dynamic adjustment and high computational complexity in the automatic arrangement of electronic components is solved, and the efficient, accurate automatic arrangement and electromagnetic compatibility of large-scale electronic components are achieved.
Patent Information
- Application Number
- CN202510562132.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-30
- Publication Date
- 2025-08-08
AI Technical Summary
The prior art has problems such as inflexible dynamic adjustment, high computational complexity, long time and low accuracy in the automatic arrangement of electronic components. Especially when large-scale integrated circuit layout requirements are difficult to meet the high accuracy requirements of automatic arrangement of modern electronic components.
Based on the path planning method, dynamic impedance fields are constructed by obtaining electromagnetic impedance fields, thermal conductivity fields and mechanical stress fields, simulating the growth law of biological vascular fractals, combining the ant colony-crystal hybrid algorithm to optimize the path, using electromagnetic sentinel ant warning for electromagnetic interference, and generating a cloud map of conflict probability for elastic arrangement to improve adaptability and accuracy.
It realizes efficient and accurate automatic arrangement of large-scale electronic components, improves adaptability and electromagnetic compatibility, and reduces failure rate and calculation complexity.
Smart Images

Figure CN120449683A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic component arrangement, and in particular to a method for automatically arranging electronic components based on path planning. Background Art
[0002] In the rapidly developing information age, manual arrangement of electronic components has become outdated, and traditional automatic arrangement methods of electronic components also face bottlenecks in arrangement accuracy and adaptability.
[0003] On the one hand, existing technologies may not be flexible enough in terms of dynamic adjustment. Different fields use different electronic components, and the external forces that affect the automatic arrangement of electronic components are also different. Existing technologies are often unable to adjust the arrangement in real time based on factors such as electromagnetic changes, temperature changes, and mechanical stress.
[0004] On the other hand, although traditional layout methods are effective, such as genetic algorithms, they may have high computational complexity, especially when dealing with large-scale components, which takes a long time. When responding to the layout requirements of large-scale integrated circuits, the automatic layout time is too long and the accuracy is not high, which often fails to meet the high accuracy requirements of automatic layout of modern electronic components.
[0005] Therefore, existing automatic electronic component arrangement technologies are unable to cope with large-scale electronic components and dynamically changing arrangement methods. Summary of the Invention
[0006] In view of the above-mentioned problems, in combination with the first aspect of the present invention, an embodiment of the present invention provides a method for automatically arranging electronic components based on path planning, the method comprising: Acquiring the electromagnetic impedance field, thermal conductivity field, and mechanical stress field of the electronic components, and constructing a dynamic impedance field based on the electromagnetic impedance field, thermal conductivity field, and mechanical stress field, wherein the dynamic impedance field is used to provide global navigation for the automatic arrangement of the electronic components; Simulate the deployment of virtual electronic components, simulate the fractal growth law of biological blood vessels based on dynamic impedance fields, and automatically arrange virtual electronic components based on the fractal growth law of biological blood vessels; When virtual electronic components are automatically arranged, the global path and local path of the virtual electronic component arrangement path are optimized based on the ant colony-crystallization hybrid algorithm to obtain the optimized arrangement path; Obtaining an arrangement folding control information set, wherein the arrangement folding control information set includes an arrangement curvature radius constraint and an arrangement stretch compensation factor, performing path dimension folding on the optimized arrangement path based on the topological transformation rule and the arrangement folding control information set, and obtaining an automatic arrangement result of the virtual electronic components; Obtain the electromagnetic conflict factor, thermal stress index, and mechanical deformation rate of virtual electronic components after arrangement; The electromagnetic conflict factor, thermal stress index and mechanical deformation rate are imported into the pre-trained arrangement conflict model, a conflict probability cloud map is generated based on the arrangement conflict model, and arrangement elasticity resolution is performed based on the conflict probability cloud map to obtain an optimized automatic arrangement result. The electronic components can be arranged based on the optimized automatic arrangement result.
[0007] Based on the above aspects, the embodiment of the present application constructs a dynamic impedance field based on the electromagnetic impedance field, the thermal conductivity field and the mechanical stress field. The dynamic impedance field is used to provide global navigation for the automatic arrangement of electronic components. The coupling effects of electromagnetic, temperature and mechanical deformation are eliminated based on the construction of the dynamic impedance field, and the adaptability of the automatic arrangement of electronic components is improved. The global path and local path of the virtual electronic component arrangement path are optimized based on the ant colony-crystallization hybrid algorithm to obtain the optimized arrangement path. The ant colony-crystallization hybrid algorithm used is compared with the genetic algorithm and other algorithms used in the traditional electronic component automatic arrangement method. It can handle more complex and larger-scale electronic components, and import the electromagnetic conflict factor, thermal stress index and mechanical deformation rate into the pre-trained arrangement conflict model. The arrangement is elastically resolved based on the conflict probability cloud map generated by the arrangement conflict model. The automatic arrangement of virtual electronic components is verified according to the elastic resolution. The arrangement method is more accurate based on the improvement of the adaptability of the automatic arrangement of electronic components, the improvement of the algorithm and the verification process. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 This is a schematic diagram of an execution flow of a method for automatically arranging electronic components based on path planning provided by an embodiment of the present invention; Figure 2 This is a schematic diagram of an execution flow of optimizing a global path and a local path of a virtual electronic component arrangement path in a method for automatically arranging electronic components based on path planning provided by an embodiment of the present invention; Figure 3 Schematic diagram of an automatic arrangement system of electronic components based on path planning provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0009] The present invention will be described in detail below with reference to the accompanying drawings. Figure 1 This is a schematic diagram of an execution flow of a method for automatically arranging electronic components based on path planning provided by an embodiment of the present invention. Figure 2This is a schematic diagram of the execution process of optimizing the global and local paths of virtual electronic component arrangement paths in a method for automatically arranging electronic components based on path planning provided by an embodiment of the present invention. The following is a detailed introduction to the method for automatically arranging electronic components based on path planning.
[0010] Step S1, acquiring the electromagnetic impedance field, thermal conductivity field and mechanical stress field of the electronic components, and constructing a dynamic impedance field based on the electromagnetic impedance field, thermal conductivity field and mechanical stress field, wherein the dynamic impedance field is used to provide global navigation for the automatic arrangement of the electronic components.
[0011] In this embodiment, step S1 includes: Step S11, obtaining material parameters of electronic components, importing the material parameters into the 3D model of the electronic components, performing frequency band coverage on the 3D model of the electronic components, obtaining the sweep frequency range of the electronic components, and performing frequency domain processing on the sweep frequency range to obtain the electromagnetic impedance field.
[0012] Specifically, its material parameters include dielectric constant, magnetic permeability and loss tangent, and the dielectric constant, magnetic permeability and loss tangent are imported into the 3D model of the electronic component, and the 3D model of the electronic component is covered by the frequency band. For example, 5G millimeter wave requires 28~39GHz, which is suitable for impedance changes at different frequencies. Based on the frequency band coverage, the frequency sweep range of the electronic component is obtained, and the frequency sweep range is processed in the frequency domain to obtain the electromagnetic impedance field.
[0013] Step S12, obtaining the material thermal conductivity matrix of the electronic component, importing the material thermal conductivity matrix into the 3D model of the electronic component, defining the heat source of the electronic component and obtaining the heat source intensity of the electronic component, and obtaining the thermal conductivity field based on the material thermal conductivity matrix and the heat source intensity.
[0014] In this embodiment, the material thermal conductivity matrix is imported into the 3D model of the electronic component, the chip power consumption and Joule heat are defined as the heat source of the electronic component, and the heat source intensity of the electronic component is obtained. The thermal conductivity field is obtained based on the material thermal conductivity matrix and the heat source intensity.
[0015] Step S13, obtaining linear elastic data of the electronic component, importing the linear elastic data into the 3D model of the electronic component, performing fixed constraints on the 3D model of the electronic component, obtaining the coordinates of the 3D model of the electronic component based on the fixed constraints, and obtaining the mechanical stress field based on the linear elastic data and the coordinates of the 3D model of the electronic component.
[0016] Specifically, linear elastic data is obtained based on the product of elastic modulus and strain. The elastic modulus represents the ability of a material to resist elastic deformation. The higher the elastic modulus, the harder the material and the stronger its ability to resist deformation. The strain is represented as the ratio of the deformation of the material after being subjected to force to its original length, which is a dimensionless quantity. The coordinates of the 3D model of the electronic component are obtained by fixing the 3D model of the electronic component, and the mechanical stress field is obtained based on the linear elastic data and the coordinates of the 3D model of the electronic component.
[0017] Step S14, performing data standardization on the electromagnetic impedance field, thermal conductivity field, and mechanical stress field, performing dynamic weighted summation based on the electromagnetic impedance field, thermal conductivity field, and mechanical stress field after data standardization, obtaining the dynamic weighted summation result, and constructing the dynamic impedance field based on the dynamic weighted summation result.
[0018] Specifically, the electromagnetic impedance field, thermal conductivity field, and mechanical stress field after data standardization are dynamically weighted and summed. The dynamic weighted summation formula is: ; in, Expressed as the electromagnetic impedance field, Expressed as the thermal conductivity field, Expressed as a mechanical stress field, represents the dynamic impedance field, Expressed as the weight ratio of the electromagnetic impedance field, Expressed as the weight ratio of the thermal conductivity field, It is expressed as the weight ratio of the mechanical stress field, and its weight is configured according to different fields to achieve different control strategies.
[0019] For example, the design of high-frequency digital circuits has a weight ratio of 6:2:2, focusing on signal integrity; the design of power electronic modules has a weight ratio of 3:5:2, prioritizing heat dissipation path optimization; the design of flexible wearable devices has a weight ratio of 2:3:5, enhancing mechanical reliability.
[0020] Step S2, simulating the deployment of virtual electronic components, simulating the fractal growth law of biological blood vessels based on the dynamic impedance field, and automatically arranging the virtual electronic components based on the fractal growth law of biological blood vessels.
[0021] In this embodiment, step S2 includes: Step S21, simulating the fractal growth law of biological blood vessels based on the electromagnetic impedance part, the thermal conductivity part and the mechanical stress part, wherein the fractal growth law of biological blood vessels includes arranging the trunk, arranging the branches and arranging the capillaries, and automatically arranging the virtual electronic components based on the arranging the trunk, arranging the branches and arranging the capillaries.
[0022] In this embodiment, step S21 includes: Step S211 , obtaining a trunk channel based on the arrangement trunk, and automatically arranging virtual electronic components on the trunk channel according to a trunk channel generation rule.
[0023] In this embodiment, the main channel generation rule is represented by starting from the power input and extending along the direction of the maximum impedance gradient to simulate the main channel generation in the fractal growth law of biological blood vessels.
[0024] Step S212 , obtaining a preset bifurcation condition, performing a bifurcation operation based on the preset bifurcation condition, and bifurcating the trunk channel into a branch channel and a capillary channel according to the bifurcation operation.
[0025] In this embodiment, bifurcation is performed according to the generation of the main channel. When the change in the dynamic impedance field in the main channel is greater than or equal to the bifurcation threshold, the bifurcation condition is triggered, and the signal bifurcates from the main channel to the branch channel, and bifurcates with the golden bifurcation angle as the bifurcation angle. When the change in the dynamic impedance field in the branch channel is greater than or equal to the bifurcation threshold, the bifurcation condition is triggered, and the signal bifurcates from the branch channel to the capillary channel, and bifurcates with the golden bifurcation angle as the bifurcation angle.
[0026] For example, the change in the dynamic impedance field in the trunk channel is 8, and its bifurcation threshold is 10. If it is less than the bifurcation threshold, it will continue to extend in the direction of the maximum impedance gradient. When the change in the dynamic impedance field in the trunk channel is greater than or equal to 10, the bifurcation condition is triggered, and the trunk channel bifurcates at the golden bifurcation angle, which is 137.5°. When temperature or mechanical deformation changes the local field distribution, the golden angle structure can maintain stable performance through self-organized fine-tuning.
[0027] Step S213 : Automatically arrange virtual electronic components for the branch channels and capillary channels based on the Voronoi diagram adaptive segmentation.
[0028] For example, power supplies, key load points, or already arranged electronic components are used as fixed seeds. Temporary seeds are inserted as dynamic seeds based on the extreme field strength values. A Voronoi diagram is generated based on the fixed and dynamic seeds. The remaining space is divided into multiple polygonal units, and adaptive subdivision is performed based on trigger conditions, where the trigger conditions are: , Represented as polygonal units, Indicates the minimum safe distance.
[0029] It should be noted that the Voronoi diagram is a space partitioning tool, mainly used to analyze and visualize the relationship between point sets, where point sets are also called generating points. Each point set forms an area around it, which is called a Voronoi cell. Every point in a Voronoi cell is closer to this generating point than to other generating points.
[0030] Step S3 : When the virtual electronic components are automatically arranged, the global path and the local path of the virtual electronic component arrangement path are optimized based on the ant colony-crystallization hybrid algorithm to obtain an optimized arrangement path.
[0031] In this embodiment, step S3 includes: Step S31, obtaining the signal criticality index of the virtual electronic component, wherein the signal criticality index includes the power signal and clock signal of the virtual electronic component, obtaining the path length when the virtual electronic component is automatically arranged, and obtaining the equivalent path length and path power consumption of the virtual electronic component based on the path length.
[0032] Specifically, the power supply signal and clock signal of the obtained virtual electronic components, the path length when the virtual electronic components are automatically arranged, the equivalent path length and path power consumption of the virtual electronic components are all key parameters of the pheromone update rule in the improved ant colony algorithm. The traditional algorithm only optimizes the path length. The improved pheromone update rule adds a signal criticality index, reduces the critical path delay based on the quantified signal timing sensitivity, adds path power consumption, and reduces the total wiring power consumption based on the dynamic calculation of path power consumption.
[0033] In step S32, electromagnetic sentinel ants are introduced into the ant colony algorithm, and electromagnetic data of the global path is collected based on the electromagnetic sentinel ants to obtain electromagnetic data around each virtual electronic component. Each electromagnetic data is compared with a preset electromagnetic threshold value, and the virtual electronic component is marked as high-risk according to the judgment operation.
[0034] In step S33, the pheromone in the ant colony algorithm is updated based on the signal criticality index, equivalent path length, and path power consumption, and path avoidance is performed based on high-risk marking. At the same time, a key signal path is constructed according to the ant colony algorithm, and the virtual electronic component arrangement path is globally optimized through the key signal path.
[0035] Furthermore, when electronic components are working, especially in digital circuits, the rapid changes in current will generate changing electromagnetic fields, which will lead to electromagnetic radiation. At the same time, electronic components operate under high-frequency signals. The higher the frequency, the stronger the electromagnetic radiation. Therefore, the introduction of electronic sentinel ants can solve the blind spot problem of traditional optimization algorithms when planning paths in complex electromagnetic environments. Its core function is to improve the electromagnetic compatibility and signal integrity of the layout design through active perception and early warning mechanisms.
[0036] Specifically, electromagnetic sentinel ants quickly scan the entire area at the beginning of layout, and identify high-risk EMI areas in advance by calculating the electromagnetic field strength distribution. For example, when the distance between adjacent signal lines is too small or the parallel lines are too long, the sentinel ants will mark these areas as restricted areas. At the same time, negative pheromones are released at the boundaries of the restricted areas to form a repulsive effect. Subsequent worker ants will actively avoid these areas when selecting paths to avoid generating high-risk wiring. By dynamically adjusting the negative pheromone concentration in the restricted area, the path is guided to bypass the edge of the restricted area, forming a low-interference safety corridor to ensure the stability of signal transmission. Traditional algorithms rely on iterative electromagnetic simulation feedback, which is inefficient and costly. Electromagnetic sentinel ants are introduced for the automatic arrangement of electronic components. Electromagnetic sentinel ants avoid risks in advance during the path generation stage, thereby reducing the failure rate.
[0037] Furthermore, the pheromone in the ant colony algorithm is improved according to the signal criticality index, equivalent path length and path power consumption. The improved pheromone update rule is: ; in, Expressed as a signal criticality index, including clock signals and power signals, Expressed as the equivalent path length, Expressed as path power consumption, calculated based on the current and resistance in the path, is a constant that represents the total amount of pheromone added by each ant that completes the path. Expressed as the adaptive volatility coefficient, is the pheromone concentration from node i to node j at time t, Represented as the improved information update rule, It is expressed as the number of ants and is dynamically adjusted according to the regional electromagnetic environment.
[0038] The dynamic adjustment formula is expressed as: ; in, Expressed as electromagnetic level, when the electromagnetic level is 1, =0, =0.1, when the electromagnetic level is 2, =1, =0.15, when the electromagnetic level is 3, =2, =0.2.
[0039] Furthermore, compared with the traditional ant colony algorithm, the improved ant colony algorithm dynamically adjusts the electromagnetic environment, slows down the volatilization in areas with low electromagnetic interference, retains high-quality path information, and accelerates the volatilization of pheromones in areas with high electromagnetic interference, forcing ants to explore new paths and avoid repeated inefficient searches, thereby reducing the number of iterations and improving the path convergence speed.
[0040] Step S33 , defining the virtual electronic components as unit cells, classifying each unit cell, performing lattice constraints based on the results of the arrangement classification, and locally optimizing the arrangement path of the virtual electronic components through the lattice constraints.
[0041] It is understandable that the layout of high-density electronic components is more complicated. Traditional layout algorithms have limitations when dealing with the layout of high-density electronic components, including relatively low efficiency, multi-objective imbalance, and local optimal trap problems. The low efficiency specifically means that when dealing with more complex electronic component layouts, the calculation takes a long time. The multi-objective imbalance specifically means that it is difficult to simultaneously optimize multiple goals such as electromagnetic compatibility, thermal management, and mechanical reliability. For example, electromagnetic compatibility may be lost when dealing with mechanical reliability. The local optimal trap problem specifically means that it is difficult to generate a global optimal layout under complex constraints. The crystallization algorithm can break the above limitations by imitating the crystal growth process and mapping the law of crystal growth to the automatic arrangement of electronic components.
[0042] In this embodiment, electronic components are classified according to their basic parameters and are divided into similar and heterogeneous components. Lattice constraints include forming a face-centered cubic close-packed structure among similar components and establishing a repulsive potential barrier between heterogeneous components. The formation of a face-centered cubic close-packed structure among similar components means arranging similar electronic components as closely as possible to maximize the use of space. The establishment of a repulsive potential barrier among heterogeneous components means keeping heterogeneous electronic components away from each other to prevent their interaction forces from affecting the arrangement results.
[0043] Step S4: obtaining an arrangement folding control information set, wherein the arrangement folding control information set includes an arrangement curvature radius constraint and an arrangement stretching compensation factor, and performing path dimension folding on the optimized arrangement path based on the topological transformation rule and the arrangement folding control information set to obtain an automatic arrangement result of the virtual electronic components.
[0044] In this embodiment, step S4 includes: Step S41: Obtain the minimum curvature radius and the flexibility level of the virtual electronic component based on the optimized arrangement path, obtain the arrangement curvature radius constraint according to the minimum curvature radius, obtain the stretching compensation factor according to the flexibility level of the virtual electronic component, and combine the stretching compensation factor and the flexibility level of the virtual electronic component into an arrangement folding control information set.
[0045] Furthermore, the curvature radius constraint is expressed as being greater than or equal to the minimum curvature radius, and the minimum curvature radius is greater than or equal to three times the line width to ensure the mechanical reliability and electrical signal integrity of the wire when it is bent. The stretch compensation factor is expressed as The flexibility level pre-compensates for conductor deformation caused by material stretching to ensure that the circuit remains functional after deformation. The flexibility level can be expressed as the quantitative stretchability of the material. If the flexibility level of the copper wire is 4, the stretch compensation factor of the copper wire is 1.2.
[0046] Step S42 : projecting the three-dimensional arrangement layout of the virtual electronic components onto a two-dimensional arrangement plane based on the topology transformation rule and the arrangement folding control information set, and performing path dimension folding on the optimized arrangement path.
[0047] Specifically, the topology transformation rules include Möbius routing and Klein bottle junctions. Single-layer dual-channel signal transmission is achieved according to the Möbius routing. The actual path length for: ; in, Expressed as the number of twists, the number of twists is usually 1, Expressed as signal wavelength, the phase delay compensation can reach 180°. Expressed as single-sided wiring length.
[0048] Furthermore, the Klein bottle junction achieves dimensional interconnection through self-intersecting knot theory. Its knot theory is expressed as using the Reidemeister moving rule to project the three-dimensional wire path onto a two-dimensional plane to eliminate intersections. Specifically, the trajectory of the wire in three-dimensional space is first represented as a parameterized curve, and its geometric coordinates and connection relationship are recorded. The projection direction is selected and the three-dimensional path is mapped to a two-dimensional plane. At this time, non-intersecting wires in three-dimensional space may form pseudo-intersections in the two-dimensional projection. The Reidemeister moving rule is used to move and eliminate pseudo-intersections. At the same time, two adjacent pseudo-intersections are separated by path sliding to eliminate redundant intersections.
[0049] Step S5 , obtaining the electromagnetic conflict factor, thermal stress index, and mechanical deformation rate of the virtual electronic components after arrangement.
[0050] In this embodiment, step S5 includes: Step S51 , obtaining the operating current, operating signal frequency and spacing between virtual electronic components after arrangement, and obtaining an electromagnetic conflict factor based on the operating current, operating signal frequency and spacing between virtual electronic components.
[0051] Specifically, the electromagnetic conflict factor is obtained based on the product of the operating current and the operating signal frequency of two virtual electronic components divided by the square of the distance between the virtual electronic components. The electromagnetic conflict factor quantifies the electromagnetic interference risk between components or traces, reflecting signal integrity and radiation compliance.
[0052] Step S52 , obtaining characteristic dimensions, temperature gradients, and material thermal expansion coefficient differences of the virtual electronic components after arrangement, and obtaining a thermal stress index based on the characteristic dimensions, temperature gradients, and material thermal expansion coefficient differences of the virtual electronic components.
[0053] Specifically, the material thermal expansion coefficients between multiple virtual electronic components are obtained, and then the difference is taken to obtain the difference, the temperature change of the virtual electronic components after the arrangement is completed is obtained, the temperature gradient is calculated, the characteristic dimensions of the virtual electronic components after the arrangement is completed are obtained, the characteristic dimensions, the temperature gradient and the difference in the material thermal expansion coefficients between the virtual electronic components are multiplied, and the thermal stress index is obtained based on the product. The thermal stress index evaluates the mechanical stress generated by the component due to the temperature gradient, measures the thermal expansion deformation, and monitors the working temperature distribution in real time to predict the fatigue life of the solder joint.
[0054] Step S53 , obtaining the initial size and deformation of the virtual electronic components after arrangement, and obtaining the mechanical deformation rate based on the initial size and deformation.
[0055] Specifically, the initial size and deformation of the virtual electronic component after arrangement are obtained, and its deformation is divided by the initial size of the virtual electronic component. The mechanical deformation rate is obtained based on the ratio of the two. The mechanical deformation rate indicates the degree of deformation of the material under external load and reflects the structural reliability during assembly or use.
[0056] In step S6, the electromagnetic conflict factor, thermal stress index, and mechanical deformation rate are imported into the pre-trained arrangement conflict model, a conflict probability cloud map is generated based on the arrangement conflict model, and arrangement elasticity is resolved based on the conflict probability cloud map to obtain an optimized automatic arrangement result. The electronic components can be arranged based on the optimized automatic arrangement result.
[0057] In this embodiment, step S6 includes: In step S61, after the electromagnetic conflict factor, thermal stress index, and mechanical deformation rate are imported into the pre-trained arrangement conflict model, the electromagnetic conflict probability, thermal stress failure probability, and mechanical deformation exceeding limit probability are obtained. Based on the electromagnetic conflict probability, thermal stress failure probability, and mechanical deformation exceeding limit probability, the multi-field coupling probability is calculated, and a conflict probability cloud map is generated based on the multi-field coupling probability.
[0058] The multi-field coupling probability is calculated by weighted summing of the electromagnetic conflict probability, thermal stress failure probability, and mechanical deformation over-limit probability, with weights of 0.5 for the electromagnetic field, 0.3 for the thermal field, and 0.2 for the mechanical field. A conflict probability cloud map is generated based on the multi-field coupling probability.
[0059] For example, the electromagnetic conflict factor, thermal stress index and mechanical deformation rate of the chip are obtained, and its electromagnetic conflict factor, thermal stress index and mechanical deformation rate are imported into the pre-trained arrangement conflict model to obtain the electromagnetic conflict probability, thermal stress failure probability and mechanical deformation exceeding limit probability, which are 0.85, 0.95 and 0.20 respectively. The multi-field coupling probability of 0.81 is obtained by calculation according to their weight ratio, and a conflict probability cloud map is generated based on the multi-field coupling probability of multiple electronic components.
[0060] Step S62: Compare the multi-field coupling probability with a preset threshold: Setting the multi-field coupling probability below a preset threshold as a low-risk conflict; The multi-field coupling probability greater than or equal to a preset threshold is set as a high-risk conflict.
[0061] Specifically, the conflict probability cloud map is converted into a visual conflict probability cloud map according to the set low-risk conflicts and high-risk conflicts.
[0062] For example, if the preset threshold is 0.5 and the multi-field coupling probability is 0.65, the visual conflict probability cloud map will be displayed in red, indicating a high-risk conflict, and the larger the multi-field coupling probability value, the darker the red. If the multi-field coupling probability is 0.35, the visual conflict probability cloud map will be displayed in green, indicating a low-risk conflict, and the smaller the multi-field coupling probability value, the darker the green.
[0063] Step S63 , performing arrangement elasticity resolution based on low-risk conflicts and high-risk conflicts to obtain an optimized automatic arrangement result.
[0064] Specifically, low-risk conflicts refer to conflicts that have little impact on the overall performance of the system. The equivalent dielectric properties of specific areas can be modified in real time, that is, the virtual value of the dielectric constant of the component can be dynamically adjusted to flexibly resolve the low-risk conflicts and obtain optimized automatic arrangement results.
[0065] Furthermore, high-risk conflicts refer to serious problems that may cause system failure, such as short-circuit risks. By simulating the quantum tunneling effect, detour paths can be intelligently generated around prohibited areas, breaking through traditional wiring limitations. That is, triggering quantum tunneling-type local reconstruction to flexibly resolve high-risk conflicts and obtain optimized automatic arrangement results.
[0066] Figure 3 A schematic diagram of a system for automatically arranging electronic components based on path planning, which is provided in some embodiments of the present application and can realize the concept of the present application, is shown. The system for automatically arranging electronic components based on path planning is introduced in detail below.
[0067] Specifically, a system for automatically arranging electronic components based on path planning includes: An acquisition module is used to acquire the electromagnetic impedance field, thermal conductivity field and mechanical stress field of electronic components, acquire the electromagnetic conflict factor, thermal stress index and mechanical deformation rate of virtual electronic components after arrangement, and acquire the arrangement folding control information set.
[0068] A virtual module is used to simulate the deployment of virtual electronic components and automatically arrange the virtual electronic components.
[0069] The simulation module is used to construct a dynamic impedance field and simulate the fractal growth law of biological blood vessels based on the dynamic impedance field.
[0070] The optimization module can optimize the global path and the local path of the virtual electronic component arrangement path based on the ant colony-crystallization hybrid algorithm to obtain the optimized arrangement path.
[0071] The arrangement module can perform path dimension folding on the optimized arrangement path based on the topology transformation rule and the arrangement folding control information set to obtain the automatic arrangement result of the virtual electronic components.
[0072] The verification module is used to generate a conflict probability cloud map, and perform flexible arrangement resolution based on the conflict probability cloud map to obtain an optimized automatic arrangement result.
[0073] The specific usage and function of this embodiment are described below: First, the electromagnetic impedance field, thermal conductivity field and mechanical stress field of the electronic components are obtained, and a dynamic impedance field is constructed based on the electromagnetic impedance field, thermal conductivity field and mechanical stress field. The dynamic impedance field is used to provide global navigation for the automatic arrangement of electronic components to ensure the adaptability of the automatic arrangement of electronic components. Then, the deployment of virtual electronic components is simulated, and the fractal growth law of biological blood vessels is simulated according to the dynamic impedance field. The virtual electronic components are automatically arranged according to the fractal growth law of biological blood vessels. When the virtual electronic components are automatically arranged, the global path and local path of the virtual electronic component arrangement path are optimized according to the ant colony-crystallization hybrid algorithm to obtain the optimized arrangement path, so that the automatic arrangement result of the electronic components is more accurate. Then, the arrangement folding control information set is obtained, and the path dimension of the optimized arrangement path is folded based on the topological transformation rule and the arrangement folding control information set to obtain the automatic arrangement result of the virtual electronic components. At this time, the automatic arrangement of virtual electronic components has been completed, and the automatic arrangement results of virtual electronic components are verified according to the following method, and the electromagnetic conflict factor, thermal stress index and mechanical deformation rate of the virtual electronic components after the arrangement are obtained. The electromagnetic conflict factor, thermal stress index and mechanical deformation rate are imported into the pre-trained arrangement conflict model, and the electromagnetic conflict probability, thermal stress failure probability and mechanical deformation exceeding limit probability are obtained through the arrangement conflict model. The multi-field coupling probability is calculated based on the electromagnetic conflict probability, thermal stress failure probability and mechanical deformation exceeding limit probability, and a conflict probability cloud map is generated. At the same time, the conflicts are divided into high-risk conflicts and low-risk conflicts through the multi-field coupling probability, and converted into a visual conflict probability cloud map. The high-risk conflicts and low-risk conflicts are flexibly resolved according to the visual conflict probability cloud map to obtain the optimized automatic arrangement results, and the electronic components are arranged based on the optimized automatic arrangement results.
[0074] In addition, an embodiment of the present invention further provides an electronic device, including: At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method proposed in the first embodiment of the present invention.
[0075] The following is a detailed introduction to the various components of electronic equipment: The processor is the control center of an electronic device and can be a single processor or a collective term for multiple processing elements. For example, the processor can be one or more central processing units (CPUs), or an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the first embodiment of the present invention, such as one or more digital signal processors (DSPs) or one or more field programmable gate arrays (FPGAs).
[0076] The processor can execute various functions of the electronic device by running or executing software programs stored in the memory and calling data stored in the memory.
[0077] The memory is used to store the software program for executing the solution of the present invention, and the execution is controlled by the processor. The specific implementation method can refer to the above method embodiment and will not be repeated here.
[0078] The memory may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, a random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only (CD-ROM), or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto. The memory may be integrated with the processor or exist independently and be coupled to the processor via an interface circuit of the electronic device, and this is not specifically limited in the embodiments of the present invention.
[0079] The above embodiments can be implemented in whole or in part via software, hardware (e.g., circuits), firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. When loaded or executed on a computer, the processes or functions described in accordance with the embodiments of the present invention are fully or partially performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wireless communication (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium accessible by a computer, or a data storage device such as a server or data center that contains a collection of one or more available media. The available medium can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media. The semiconductor media can be a solid-state drive.
[0080] It should be understood that the term "and / or" as used herein simply describes an association between related objects, indicating that three possible relationships exist. For example, "A and / or B" can represent the existence of A alone, the existence of both A and B, or the existence of B alone. A and B can be singular or plural. Furthermore, the character " / " as used herein generally indicates an "or" relationship between the related objects, but it may also indicate an "and / or" relationship. For specific understanding, please refer to the context.
[0081] It should be understood that in the embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
[0082] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.
Claims
1. A method for automatically arranging electronic components based on path planning, characterized in that: The method comprises: Acquiring the electromagnetic impedance field, thermal conductivity field, and mechanical stress field of the electronic components, and constructing a dynamic impedance field based on the electromagnetic impedance field, thermal conductivity field, and mechanical stress field, wherein the dynamic impedance field is used to provide global navigation for the automatic arrangement of the electronic components; Simulate the deployment of virtual electronic components, simulate the fractal growth law of biological blood vessels based on dynamic impedance fields, and automatically arrange virtual electronic components based on the fractal growth law of biological blood vessels; When virtual electronic components are automatically arranged, the global path and local path of the virtual electronic component arrangement path are optimized based on the ant colony-crystallization hybrid algorithm to obtain the optimized arrangement path; Obtaining an arrangement folding control information set, wherein the arrangement folding control information set includes an arrangement curvature radius constraint and an arrangement stretch compensation factor, performing path dimension folding on the optimized arrangement path based on the topological transformation rule and the arrangement folding control information set, and obtaining an automatic arrangement result of the virtual electronic components; Obtain the electromagnetic conflict factor, thermal stress index, and mechanical deformation rate of virtual electronic components after arrangement; The electromagnetic conflict factor, thermal stress index and mechanical deformation rate are imported into the pre-trained arrangement conflict model, a conflict probability cloud map is generated based on the arrangement conflict model, and arrangement elasticity resolution is performed based on the conflict probability cloud map to obtain an optimized automatic arrangement result. The electronic components can be arranged based on the optimized automatic arrangement result.
2. The method for automatically arranging electronic components based on path planning according to claim 1, characterized in that: The acquiring of the electromagnetic impedance field, thermal conductivity field, and mechanical stress field of the electronic components, and constructing a dynamic impedance field based on the electromagnetic impedance field, thermal conductivity field, and mechanical stress field, wherein the dynamic impedance field is used to provide global navigation for the automatic arrangement of the electronic components, includes: Obtain material parameters of electronic components, import the material parameters into the 3D model of the electronic components, perform frequency band coverage on the 3D model of the electronic components, obtain the frequency sweep range of the electronic components, and perform frequency domain processing on the frequency sweep range to obtain the electromagnetic impedance field; Obtain the material thermal conductivity matrix of the electronic component, import the material thermal conductivity matrix into the 3D model of the electronic component, define the heat source of the electronic component and obtain the heat source intensity of the electronic component, and obtain the thermal conductivity field based on the material thermal conductivity matrix and the heat source intensity; Obtaining linear elastic data of the electronic component, importing the linear elastic data into a 3D model of the electronic component, applying fixed constraints to the 3D model of the electronic component, obtaining coordinates of the 3D model of the electronic component based on the fixed constraints, and obtaining a mechanical stress field based on the linear elastic data and the coordinates of the 3D model of the electronic component; The electromagnetic impedance field, thermal conductivity field and mechanical stress field are data standardized, and dynamic weighted summation is performed based on the electromagnetic impedance field, thermal conductivity field and mechanical stress field after data standardization to obtain the dynamic weighted summation result, and the dynamic impedance field is constructed according to the dynamic weighted summation result.
3. The method for automatically arranging electronic components based on path planning according to claim 1, characterized in that: The method of simulating the fractal growth law of biological blood vessels based on the dynamic impedance field and automatically arranging virtual electronic components based on the fractal growth law of biological blood vessels includes: The dynamic impedance field includes an electromagnetic impedance part, a thermal conductivity part, and a mechanical stress part. The electromagnetic impedance part corresponds to the chemical gradient in the organism, the thermal conductivity part corresponds to the temperature distribution in the organism, and the mechanical stress part corresponds to the physical constraints on the growth of biological tissues. The fractal growth law of biological blood vessels is simulated based on the electromagnetic impedance part, thermal conductivity part and mechanical stress part. The fractal growth law of biological blood vessels includes arranging the trunk, arranging the branches and arranging the capillaries. The virtual electronic components are automatically arranged based on the arrangement of the trunk, arranging the branches and arranging the capillaries.
4. The method for automatically arranging electronic components based on path planning according to claim 3, characterized in that: Automatically arrange virtual electronic components based on trunk, branch, and capillary arrangements, including: Obtain trunk channels based on the arrangement trunk, and automatically arrange virtual electronic components on the trunk channels according to trunk generation rules; Obtaining a preset bifurcation condition, performing a bifurcation operation based on the preset bifurcation condition, and bifurcating the main channel into a branch channel and a capillary channel according to the bifurcation operation; Automatic arrangement of virtual electronic components in branch channels and capillary channels is performed based on Voronoi diagram adaptive segmentation.
5. The method for automatically arranging electronic components based on path planning according to claim 1, characterized in that: When the virtual electronic components are automatically arranged, the global path and the local path of the virtual electronic component arrangement path are optimized based on the ant colony-crystallization hybrid algorithm to obtain the optimized arrangement path, including: Obtaining a signal criticality index of a virtual electronic component, the signal criticality index including a power signal and a clock signal of the virtual electronic component, obtaining a path length when the virtual electronic component is automatically arranged, and obtaining an equivalent path length and path power consumption of the virtual electronic component based on the path length; Introducing electromagnetic sentinel ants into the ant colony algorithm, collecting electromagnetic data on the global path based on the electromagnetic sentinel ants, obtaining electromagnetic data around each virtual electronic component, performing a judgment operation on each electromagnetic data and a preset electromagnetic threshold, and marking the virtual electronic component as high-risk based on the judgment operation; The pheromone in the ant colony algorithm is updated based on the signal criticality index, equivalent path length, and path power consumption. Path avoidance is performed based on high-risk markings. At the same time, the key signal pathway is constructed based on the ant colony algorithm, and the virtual electronic component arrangement path is globally optimized through the key signal pathway. The virtual electronic components are defined as unit cells, and each unit cell is arranged and classified. Lattice constraints are applied based on the results of the arrangement classification, and the arrangement paths of the virtual electronic components are locally optimized through the lattice constraints.
6. The method for automatically arranging electronic components based on path planning according to claim 1, characterized in that: The obtaining of the arrangement folding control information set, wherein the arrangement folding control information set includes an arrangement curvature radius constraint and an arrangement stretching compensation factor, and performing path dimension folding on the optimized arrangement path based on the topological transformation rule and the arrangement folding control information set to obtain the automatic arrangement result of the virtual electronic components, includes: Based on the optimized arrangement path, a minimum curvature radius and a flexibility level of the virtual electronic component are obtained, an arrangement curvature radius constraint is obtained according to the minimum curvature radius, a stretching compensation factor is obtained according to the flexibility level of the virtual electronic component, and the stretching compensation factor and the flexibility level of the virtual electronic component are combined into an arrangement folding control information set; Based on the topological transformation rules and the arrangement folding control information set, the three-dimensional arrangement layout of virtual electronic components is projected onto the two-dimensional arrangement plane, and the optimized arrangement path is folded in the path dimension.
7. The method for automatically arranging electronic components based on path planning according to claim 1, characterized in that: The obtaining of the electromagnetic conflict factor, thermal stress index, and mechanical deformation rate of the virtual electronic components after arrangement includes: Obtaining the operating current, operating signal frequency, and spacing between virtual electronic components after arrangement, and obtaining an electromagnetic conflict factor based on the operating current, operating signal frequency, and spacing between virtual electronic components; Obtaining characteristic dimensions, temperature gradients, and material thermal expansion coefficient differences of the virtual electronic components after arrangement, and obtaining a thermal stress index based on the characteristic dimensions, temperature gradients, and material thermal expansion coefficient differences of the virtual electronic components; The initial size and deformation of the virtual electronic components after arrangement are obtained, and the mechanical deformation rate is obtained based on the initial size and deformation.
8. The method for automatically arranging electronic components based on path planning according to claim 1, characterized in that: The electromagnetic conflict factor, thermal stress index, and mechanical deformation rate are introduced into a pre-trained arrangement conflict model, a conflict probability cloud map is generated based on the arrangement conflict model, arrangement elasticity resolution is performed based on the conflict probability cloud map, and an optimized automatic arrangement result is obtained. The electronic components can be arranged based on the optimized automatic arrangement result, including: After importing the electromagnetic conflict factor, thermal stress index and mechanical deformation rate into the pre-trained arrangement conflict model, the electromagnetic conflict probability, thermal stress failure probability and mechanical deformation exceeding limit probability are obtained. The multi-field coupling probability is calculated based on the electromagnetic conflict probability, thermal stress failure probability and mechanical deformation exceeding limit probability, and a conflict probability cloud map is generated based on the multi-field coupling probability.
9. The method for automatically arranging electronic components based on path planning according to claim 8, characterized in that: The method further comprises: Compare the multi-field coupling probability with the preset threshold: Setting the multi-field coupling probability below a preset threshold as a low-risk conflict; Setting the probability of multiple field couplings greater than or equal to a preset threshold as a high-risk conflict; Flexible layout resolution is performed based on low-risk conflicts and high-risk conflicts to obtain optimized automatic layout results.