Forward active clamping driving system
By setting up a clamp control circuit in the forward active clamp driving system, the active clamp switch unit is controlled to turn on in the shutdown state, and charging and discharging are achieved, which solves the problem of continuous charging of the active clamp capacitor and improves the reliability of the system.
Patent Information
- Application Number
- CN202510718386.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-30
- Publication Date
- 2025-08-08
AI Technical Summary
In the existing forward-actuated active clamp driving system, the active clamp capacitor is continuously charged in the shutdown state without a discharge process, resulting in the accumulation of capacitance voltage and exceeding the breakdown voltage, causing the main switch and the active clamp switch to repeatedly break down, affecting reliability.
By setting a clamp control circuit on multiple pins of the main control chip and the control end of the active clamp switch unit, the active clamp switch unit is controlled to turn on in the shutdown state, and the charging and discharging process is realized to avoid continuous shutdown.
It effectively avoids continuous charging of the active clamp capacitor in the shutdown state, prevents the accumulation of capacitance voltage, improves the reliability of the main switch and the active clamp switch, and prevents thermal damage.
Smart Images

Figure CN120454465A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power management, and in particular to a forward active clamping drive system. Background Art
[0002] In existing technology, when the main control chip enables shutdown or triggers shutdown logic, the chip determines the need to simultaneously shut down the main switch and active clamp switch. In the shutdown state, the main switch and active clamp switch remain off. The active clamp switch only has a unidirectional conduction path through the body diode, and the active clamp capacitor can only be charged but not discharged.
[0003] In a forward active clamp topology for synchronous rectification applications, when the chip has no PWM drive signal output, the primary and secondary sides of the transformer are not controlled by the main switch's on / off switching. At the moment the power is turned off, the transformer's primary and secondary sides undergo a free resonance process. During this free resonance, the transformer's magnetizing current commutates to the primary side through flux coupling, charging the active clamp capacitor. Due to circuit non-idealities and conduction losses, the free resonance process is a damped resonance with gradually decreasing amplitude, which has minimal impact on circuit reliability. However, when chip-enable shutdown logic is added, the active clamp switch remains off, and the active clamp capacitor only charges but does not discharge. Consequently, the voltage energy in the active clamp capacitor continues to accumulate and rise, eventually exceeding the breakdown voltage of the main and active clamp switches. Discharge occurs through avalanche breakdown of the main and active clamp switches, causing repeated critical breakdown of the main and active clamp switches during repeated switching of the power system, ultimately leading to thermal damage. Summary of the Invention
[0004] The present invention provides a forward active clamping drive system, which enables an active clamping switch unit to remain conductive when the system is in a shutdown state through a clamping control circuit, thereby preventing the active clamping switch unit from being continuously turned off when the system is in a shutdown state, causing the active clamping capacitor to be continuously charged, resulting in a breakdown of the main switch unit or the active clamping switch unit.
[0005] In a first aspect, an embodiment of the present invention provides a forward active clamp drive system, comprising a main control chip, a forward transformer, a control circuit, a self-driven synchronous rectification circuit, and a clamp control circuit;
[0006] The control circuit is arranged on the primary side of the forward transformer, and the self-driven synchronous rectification circuit is arranged on the secondary side of the forward transformer;
[0007] The control circuit includes a main switch unit, an active clamp switch unit and an active clamp capacitor;
[0008] The main control chip includes a first pin and a plurality of second pins;
[0009] The control end of the main switch unit is electrically connected to the first pin, the first end of the main switch unit and the first plate of the active clamping capacitor are connected to the primary side of the forward transformer, and the second end of the main switch unit is electrically connected to the ground end;
[0010] The control end of the active clamp switch unit is electrically connected to the plurality of second pins through the clamp control circuit, the first end of the active clamp switch unit is electrically connected to the second plate of the active clamp capacitor, and the second end of the active clamp switch unit is electrically connected to the ground end. The clamp control circuit is configured to control the active clamp switch unit to be turned on when the forward active clamp drive system is in a shutdown state.
[0011] Optionally, the plurality of second pins include a power supply pin, an enable determination pin and a second output pin;
[0012] The clamp control circuit includes a first switch control unit, a second switch control unit, a third switch control unit, a fourth switch control unit, a first diode and a second diode;
[0013] A first terminal of the first switch control unit is electrically connected to the power supply pin, a control terminal of the first switch control unit is electrically connected to the enable determination pin, and a second terminal of the first switch control unit is electrically connected to the control terminal of the second switch control unit;
[0014] A first end of the second switch control unit is electrically connected to the ground end, a second end of the second switch control unit is electrically connected to a first end of the first diode, and a second end of the first diode is electrically connected to a control end of the active clamping switch unit;
[0015] The control terminal of the third switch control unit is electrically connected to the enable determination pin, the first terminal of the third switch control unit is electrically connected to the ground terminal, and the second terminal of the third switch control unit is electrically connected to the control terminal of the fourth switch control unit;
[0016] The first end of the fourth switch control unit is electrically connected to the second output pin and the first end of the second diode respectively, and the second end of the fourth switch control unit is electrically connected to the second end of the first diode and the second end of the second diode respectively.
[0017] Optionally, the clamp control circuit is configured to control the first switch control unit and the second switch control unit to be turned on, and control the third switch control unit and the fourth switch control unit to be turned off, according to a control signal of the second pin when the forward active clamp drive system is in an off state or a started state;
[0018] The clamp control circuit is further configured to control the first switch control unit and the second switch control unit to be turned off, and control the third switch control unit to be turned on and the fourth switch control unit to be turned on or off according to the control signal of the second pin when the forward active clamp drive system is in the working state.
[0019] Optionally, the first switch control unit includes a first transistor, a first resistor and a second resistor;
[0020] The first end of the first transistor is electrically connected to the power supply pin and the first end of the first resistor respectively, the control end of the first transistor is electrically connected to the enable determination pin through the second resistor, and the second end of the first transistor is electrically connected to the control end of the second switch control unit.
[0021] Optionally, the second switch control unit includes a first transistor and a third resistor;
[0022] The control end of the first transistor is electrically connected to the second end of the first switch control unit, the first end of the first transistor is electrically connected to the ground end, the second end of the first transistor is electrically connected to the first end of the first diode, the first end of the third resistor is electrically connected to the control end of the first transistor, and the second end of the third resistor is electrically connected to the first end of the first transistor.
[0023] Optionally, the third switch control unit includes a second transistor, a fourth resistor and a fifth resistor;
[0024] The control terminal of the second transistor is electrically connected to the first terminal of the fourth resistor, the first terminal of the fifth resistor, and the first terminal of the first diode, respectively; the first terminal of the second transistor is electrically connected to the second terminal of the fourth resistor and the ground terminal, respectively; and the second terminal of the second transistor is electrically connected to the control terminal of the fourth switch control unit;
[0025] A second end of the fifth resistor is electrically connected to the enable determination pin.
[0026] Optionally, the fourth switch control unit includes a second transistor, a sixth resistor and a seventh resistor;
[0027] The control end of the second transistor is electrically connected to the first end of the sixth resistor and the first end of the seventh resistor, respectively; the first end of the second transistor is electrically connected to the second end of the sixth resistor, the first end of the second diode, and the second output pin, respectively; and the second end of the second transistor is electrically connected to the second end of the second diode and the second end of the first diode, respectively;
[0028] The second end of the seventh resistor is electrically connected to the second end of the third switch control unit.
[0029] Optionally, the main switch unit includes a main switch;
[0030] The active clamp switch unit includes an active clamp switch, a first capacitor, a third diode and an eighth resistor;
[0031] The control end of the active clamp switch is electrically connected to the first plate of the first capacitor, the second end of the third diode, and the first end of the eighth resistor, respectively; the first end of the active clamp switch, the second end of the eighth resistor, and the first end of the third diode are all electrically connected to the ground end; and the second end of the active clamp switch is electrically connected to the second plate of the active clamp capacitor;
[0032] The second plate of the first capacitor is electrically connected to the second end of the first diode.
[0033] Optionally, the main switch includes an NMOS transistor, and the active clamp switch includes a PMOS transistor.
[0034] Optionally, the self-driven synchronous rectification circuit includes a first synchronous rectifier, a second synchronous rectifier, an inductor and a second capacitor;
[0035] The secondary side of the forward transformer includes a first secondary side and a second secondary side;
[0036] The control end of the first synchronous rectifier is electrically connected to the first secondary side and the second end of the second synchronous rectifier, respectively; the first end of the first synchronous rectifier is electrically connected to the first end of the second synchronous rectifier and the first plate of the second capacitor, respectively; the second end of the first synchronous rectifier is electrically connected to the control end of the second synchronous rectifier and the second secondary side, respectively; the second end of the second synchronous rectifier is also electrically connected to the first end of the inductor, and the second end of the inductor is electrically connected to the second plate of the second capacitor and the output end of the forward active clamp drive system, respectively;
[0037] The primary side of the forward transformer includes a first primary side and a second primary side.
[0038] The first primary side is electrically connected to the input end of the forward active clamping drive system, and the second primary side is electrically connected to the first plate of the active clamping capacitor point.
[0039] The forward active clamp drive system provided by an embodiment of the present invention includes a main control chip, a forward transformer, a control circuit, a self-driven synchronous rectification circuit, and a clamp control circuit. The control circuit is arranged on the primary side of the forward transformer, and the self-driven synchronous rectification circuit is arranged on the secondary side of the forward transformer. The control circuit includes a main switch unit, an active clamp switch unit, and an active clamp capacitor. The main control chip includes a first pin and multiple second pins. The control end of the main switch unit is electrically connected to the first pin. The first end of the main switch unit and the first plate of the active clamp capacitor are connected to the primary side of the forward transformer. The second end of the main switch unit is electrically connected to the ground end. The control end of the active clamp switch unit is electrically connected to the multiple second pins through the clamp control circuit. The first end of the active clamp switch unit is electrically connected to the second plate of the active clamp capacitor. The second end of the active clamp switch unit is electrically connected to the ground end. The clamp control circuit is used to control the active clamp switch unit to conduct when the forward active clamp drive system is in the off state. In this way, the active clamping switch unit can still be turned on when the system is in the off state through the clamping control circuit, so that the active clamping capacitor can be charged and discharged when the system is in the off state, thereby avoiding the active clamping switch unit being continuously turned off when the system is in the off state, causing the active clamping capacitor to be continuously charged, which affects the reliability of the main switch unit or the active clamping switch unit. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 1 is a schematic structural diagram of a forward active clamping drive system provided by an embodiment of the present invention;
[0041] Figure 2 1 is a schematic structural diagram of another forward active clamping drive system provided by an embodiment of the present invention;
[0042] Figure 3 1 is a structural diagram of another forward active clamping drive system provided by an embodiment of the present invention;
[0043] Figure 4 This is a driving timing diagram of a forward active clamping driving system provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0044] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be fully described below in conjunction with the accompanying drawings of the embodiments of the present invention through specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.
[0045] Figure 1This is a structural diagram of a forward active clamping drive system provided by an embodiment of the present invention, see Figure 1 The forward active clamp drive system includes a main control chip 10, a forward transformer 20, a control circuit 30, a self-driven synchronous rectification circuit 40, and a clamp control circuit 50. The control circuit 30 is arranged on the primary side of the forward transformer 20, and the self-driven synchronous rectification circuit 40 is arranged on the secondary side of the forward transformer 20. The control circuit 30 includes a main switch unit 310, an active clamp switch unit 320, and an active clamp capacitor 330. The main control chip 10 includes a first pin 110 and multiple second pins 120. The control end of the main switch unit 310 is electrically connected to the first pin 110, the first end of the main switch unit 310 and the first plate of the active clamp capacitor 330 are connected to the primary side of the forward transformer 20, and the second end of the main switch unit 310 is electrically connected to the ground terminal GND. The control end of the active clamp switch unit 320 is electrically connected to the plurality of second pins 120 via the clamp control circuit 50. The first end of the active clamp switch unit 320 is electrically connected to the second plate of the active clamp capacitor 330. The second end of the active clamp switch unit 320 is electrically connected to the ground terminal GND. The clamp control circuit 50 is configured to control the active clamp switch unit 320 to be turned on when the forward active clamp drive system is in the shutdown state.
[0046] Specifically, such as Figure 1In the illustrated embodiment, the main control chip 10 may be a JWH3530 chip, but the present invention is not limited thereto. In other embodiments, the main control chip 10 may also be a PWM main control chip. The control circuit 30 is disposed on the primary side of the forward transformer 20 and includes a main switch unit 310, an active clamping switch unit 320, and an active clamping capacitor 330. The main switch unit 310 controls the on / off of the primary side of the forward transformer 20 through high-frequency switching, thereby regulating energy transfer to the secondary side. When the main switch unit 310 is on, the input voltage is applied to the primary side of the forward transformer 20, and energy is transferred from the primary side of the forward transformer 20 to the secondary side. When the main switch unit 310 is off, the primary side current is blocked, halting energy transfer. The active clamping switch unit 320 is configured to turn on when the main switch is off, transferring stored energy to the active clamping capacitor 330 to avoid voltage spikes and assist in magnetic reset of the forward transformer 20. The active clamping capacitor 330 is used to absorb this energy and act as a buffer, while participating in the soft switching process to reduce switching losses. The main control chip 10 is used to send a control signal to the control circuit 30 to control the working state of the forward active clamping drive system through the control circuit 30. Exemplarily, the main control chip 10 includes a first pin 110, and the first pin 110 includes a first output pin OUTM. The control end of the main switch unit 310 is electrically connected to the first pin 110, the first end of the main switch unit 310 and the first plate of the active clamping capacitor 330 are connected to the primary side of the forward transformer 20, and the second end of the main switch unit 310 is electrically connected to the ground terminal GND, thereby controlling the conduction and shutdown of the main switch unit 310 through the control signal of the first pin 110.
[0047] The inventors discovered that in the prior art, when designing a self-driven synchronous rectification solution, the control terminal of the active clamping switch unit is directly electrically connected to a second output pin of the main control chip. Furthermore, the main control chip requires that the active clamping switch unit and the main switch unit be synchronously shut down when the main control chip enables shutdown or triggers shutdown logic. In this case, the active clamping switch unit only has a unidirectional body diode conduction path, and the active clamping capacitor can only charge but not discharge. Furthermore, when the main control chip does not output a PWM drive signal, the primary and secondary sides of the forward transformer are not controlled by the main switch unit's on / off switching. At the moment of power shutdown, the self-driven synchronous rectification circuit located on the secondary side of the forward transformer enters a free resonance process. During this free resonance process, the forward transformer's excitation current is commutated to the primary side through magnetic flux coupling, charging the active clamping capacitor. Because the circuit is non-ideal and exhibits conduction losses, the free resonance process is a damped resonance with a gradually decreasing amplitude, which has minimal impact on circuit reliability. However, when chip-enable shutdown logic is added, the active clamp switch remains continuously off, and the active clamp capacitor only charges but does not discharge. Consequently, the voltage energy in the active clamp capacitor continues to accumulate, increasing until it exceeds the breakdown voltage of the main switch and the active clamp switch, causing discharge through avalanche breakdown of the main switch and the active clamp switch. This causes repeated critical breakdown of the main switch and the active clamp switch during repeated cycling of the power system, ultimately leading to thermal damage.
[0048] To this end, the embodiment of the present invention further provides that the main control chip 10 includes multiple second pins 120, and a clamp control circuit 50 is provided between the multiple second pins 120 and the control end of the active clamp switch unit 320. The clamp control circuit 50 is used to control the potential ultimately output to the control end of the active clamp switch unit 320 according to the control signal output by the multiple second pins 120, thereby controlling the active clamp switch unit 320 to be turned on at least when the forward active clamp drive system is in the off state. At this time, the active clamp capacitor 330 can be discharged through the active clamp switch unit 320. That is, when the forward active clamp drive system is in the off state, the active clamp capacitor 330 has both a charging process and a discharging process, thereby preventing the active clamp switch unit from being continuously turned off when the system is in the off state, causing the active clamp capacitor to be continuously charged, which affects the reliability of the main switch unit or the active clamp switch unit.
[0049] It is understandable that the main switch unit 310 includes an NMOS tube and the active clamp switch unit 320 includes a PMOS tube. Due to the limitations of the working nature, the NMOS tube of the main switch unit 310 and the PMOS tube of the active clamp switch unit 320 cannot be turned on at the same time during operation.
[0050] In summary, the forward active clamp drive system provided by an embodiment of the present invention includes a main control chip, a forward transformer, a control circuit, a self-driven synchronous rectification circuit, and a clamp control circuit. The control circuit is arranged on the primary side of the forward transformer, and the self-driven synchronous rectification circuit is arranged on the secondary side of the forward transformer. The control circuit includes a main switch unit, an active clamp switch unit, and an active clamp capacitor. The main control chip includes a first pin and multiple second pins. The control end of the main switch unit is electrically connected to the first pin. The first end of the main switch unit and the first plate of the active clamp capacitor are connected to the primary side of the forward transformer. The second end of the main switch unit is electrically connected to the ground end. The control end of the active clamp switch unit is electrically connected to the multiple second pins through the clamp control circuit. The first end of the active clamp switch unit is electrically connected to the second plate of the active clamp capacitor. The second end of the active clamp switch unit is electrically connected to the ground end. The clamp control circuit is used to control the active clamp switch unit to conduct when the forward active clamp drive system is in the off state. In this way, the active clamping switch unit can still be turned on when the system is in the off state through the clamping control circuit, so that the active clamping capacitor can be charged and discharged when the system is in the off state, thereby avoiding the active clamping switch unit being continuously turned off when the system is in the off state, causing the active clamping capacitor to be continuously charged, which affects the reliability of the main switch unit or the active clamping switch unit.
[0051] Optionally, based on the above embodiment, Figure 2 FIG is a structural diagram of another forward active clamping drive system provided by an embodiment of the present invention. Figure 2The plurality of second pins 120 include a power supply pin REFA, an enable determination pin FLT / SD, and a second output pin OUTA. The clamp control circuit 50 includes a first switch control unit 510, a second switch control unit 520, a third switch control unit 530, a fourth switch control unit 540, a first diode D1, and a second diode D2. A first terminal of the first switch control unit 510 is electrically connected to the power supply pin REFA, a control terminal of the first switch control unit 510 is electrically connected to the enable determination pin FLT / SD, and a second terminal of the first switch control unit 510 is electrically connected to the control terminal of the second switch control unit 520. A first terminal of the second switch control unit 520 is electrically connected to the ground terminal GND, a second terminal of the second switch control unit 520 is electrically connected to the first terminal of the first diode D1, and a second terminal of the first diode D1 is electrically connected to the control terminal of the active clamp switch unit 320. A control terminal of the third switch control unit 530 is electrically connected to the enable determination pin FLT / SD, a first terminal of the third switch control unit 530 is electrically connected to the ground terminal GND, and a second terminal of the third switch control unit 530 is electrically connected to the control terminal of the fourth switch control unit 540. A first end of the fourth switch control unit 540 is electrically connected to the second output pin OUTA and the first end of the second diode D2 , and a second end of the fourth switch control unit 540 is electrically connected to the second end of the first diode D1 and the second end of the second diode D2 .
[0052] Specifically, the clamp control circuit 50 is configured to control the first switch control unit 510 and the second switch control unit 520 to be turned on, and the third switch control unit 530 and the fourth switch control unit 540 to be turned off, according to a control signal from the second pin 120, when the forward active clamp drive system is in the shutdown state or the startup state. The clamp control circuit 50 is also configured to control the first switch control unit 510 and the second switch control unit 520 to be turned off, and the third switch control unit 530 to be turned on, and the fourth switch control unit 540 to be turned on or off, according to a control signal from the second pin 120, when the forward active clamp drive system is in the operating state.
[0053] For example, when the forward active clamp drive system is in the startup state, the power supply of the main control chip 10 is ahead of the establishment of the enable determination signal. After the power supply of the main control chip 10 is established, the power supply pin REFA normally outputs 5V. Since the enable determination signal is not established, the main control chip 10 determines that the startup condition is not met, and the signal output by the enable determination pin FLT / SD is low. At this time, the first switch control unit 510 and the second switch control unit 520 are turned on. The second switch control unit 520 and the first diode D1 are pulled down, and the output of the clamp control circuit 50 remains low (that is, the control end of the active clamp switch unit 320 remains low). Since the capacitor in the active clamp switch unit 320 (the active clamp switch unit 320 includes an active clamp switch and a capacitor located at the control end of the active clamp switch) is not charged, the voltage across the capacitor in the active clamp switch unit 320 is 0, and the gate-source voltage of the active clamp switch is 0, the active clamp switch is continuously turned off, and due to the pull-down of the second switch control unit 520, the control terminal voltage of the third switch control unit 530 is 0, the third switch control unit 530 is turned off, and the fourth switch control unit 540 is also turned off. In this way, after power supply is established, since the fourth switch control unit 540 is in the off state, that is, the branch of the fourth switch control unit 540 and the first diode D1 is disconnected, at this time, even if the second output pin OUTA outputs a high level (when the second output pin OUTA outputs a high level, it will draw current of the supply voltage output by the power supply pin REFA, thereby causing the supply voltage to be lowered), the pull-down of the fourth switch control unit 540, the first diode D1, and the second switch control unit 520 will not cause the voltage output by the power supply pin REFA to be pulled down, thereby causing the supply voltage to be pulled down, thereby ensuring that the configuration of the clamp control circuit 50 does not affect the normal operation of the forward active clamp drive system.
[0054] When the forward active clamp drive system is in operation, the power supply pin REFA normally outputs 5V. After the enable determination pin FLT / SD is enabled to meet the startup conditions, the signal output by the enable determination pin FLT / SD is flipped to a high level close to 5V, the first switch control unit 510 is turned off, the second switch control unit 520 is turned off, the first diode D1 is cut off, and the first diode D1 branch (i.e., the branch where the first switch control unit 510, the second switch control unit 520, and the first diode D1 are located) is suspended, which does not affect the control terminal voltage of the active clamp switch unit 320 and the control terminal voltage of the third switch control unit 530. The control terminal of the third switch control unit 530 is electrically connected to the enable determination pin FLT / SD, and the third switch control unit 530 is turned on. At this time, when the second output pin OUTA outputs a high level, the fourth switch control unit 540 is turned on. The fourth switch control unit 540 connects the second output pin OUTA to the capacitor in the active clamp switch unit 320. The high level signal output by the second output pin OUTA is directly transmitted to the capacitor in the active clamp switch unit 320 to charge the capacitor. When the second output pin OUTA outputs a low level, the fourth switch control unit 540 is turned off. Because the capacitor in the active clamp switch unit 320 is already charged, with the left side positive and the right side negative, the capacitor is turned on through the branch where the second diode D2 is located. The negative voltage drives the active clamp switch unit 320 to turn on, demagnetizing the primary side of the forward transformer 20. This ensures that the configuration of the clamp control circuit 50 does not affect the normal operation of the forward active clamp drive system.
[0055] When the forward active clamp drive system is in the shutdown state, the power supply of the main control chip 10 remains normal, and the power supply pin REFA normally outputs 5V. Due to input undervoltage during the shutdown process, the enable determination signal is determined to not meet the startup conditions, and the signal output by the enable determination pin FLT / SD flips to a low level. At this time, the first switch control unit 510 and the second switch control unit 520 are turned on. The second switch control unit 520 and the first diode D1 pull down the output of the clamp control circuit 50 and maintain a low level (i.e., the control terminal of the active clamp switch unit 320 remains low). Since the capacitor in the active clamp switch unit 320 has been charged during normal operation, the voltage across the capacitor in the active clamp switch unit 320 is the drive voltage VOUTA, and the gate-source voltage of the active clamp switch in the active clamp switch unit 320 is -. VOUTA, the active clamp switch unit 320 is continuously turned on, and due to the pull-down of the second switch control unit 520, the control terminal voltage of the third switch control unit 530 is 0, the third switch control unit 530 is turned off, and the fourth switch control unit 540 is also turned off. The above working process ensures that during the shutdown process, even if the second output pin OUTA outputs a shutdown signal (when the active clamp switch is a PMOS transistor, the shutdown signal is a high level), the active clamp switch unit 320 can still be turned on, so that the active clamp capacitor 330 can be charged and discharged when the system is in the shutdown state, thereby preventing the active clamp switch unit 320 from being continuously turned off when the system is in the shutdown state, causing the active clamp capacitor 330 to be continuously charged, which would affect the reliability of the main switch unit 310 or the active clamp switch unit 320.
[0056] Optionally, based on the above embodiment, Figure 3 is a structural diagram of another forward active clamping drive system provided by an embodiment of the present invention. Figure 4 This is a driving timing diagram of a forward active clamping driving system provided by an embodiment of the present invention. Figure 3 and Figure 4The first switch control unit includes a first transistor M1, a first resistor R1, and a second resistor R2. The first end of the first transistor M1 is electrically connected to the power supply pin REFA and the first end of the first resistor R1, the control end of the first transistor M1 is electrically connected to the enable determination pin FLT / SD through the second resistor R2, and the second end of the first transistor M1 is electrically connected to the control end of the second switch control unit (the first transistor M2). The second switch control unit includes a first transistor M2 and a third resistor R3. The control end of the first transistor M2 is electrically connected to the second end of the first switch control unit (the second end of the first transistor M1), the first end of the first transistor M2 is electrically connected to the ground terminal GND, the second end of the first transistor M2 is electrically connected to the first end of the first diode D1, the first end of the third resistor R3 is electrically connected to the control end of the first transistor M2, and the second end of the third resistor R3 is electrically connected to the first end of the first transistor M2.
[0057] The third switch control unit includes a second transistor M3, a fourth resistor R4, and a fifth resistor R5. The control terminal of the second transistor M3 is electrically connected to the first end of the fourth resistor R4, the first end of the fifth resistor R5, and the first end of the first diode D1, respectively. The first end of the second transistor M3 is electrically connected to the second end of the fourth resistor R4 and the ground terminal GND, respectively. The second end of the second transistor M3 is electrically connected to the control terminal of the fourth switch control unit. The second end of the fifth resistor R5 is electrically connected to the enable determination pin FLT / SD. The fourth switch control unit includes a second transistor D4, a sixth resistor, and a seventh resistor. The control terminal of the second transistor D4 is electrically connected to the first end of the sixth resistor R6 and the first end of the seventh resistor R7, respectively. The first end of the second transistor D4 is electrically connected to the second end of the sixth resistor R6, the first end of the second diode D2, and the second output pin OUTA, respectively. The second end of the second transistor D4 is electrically connected to the second end of the second diode D2 and the second end of the first diode D1, respectively. The second end of the seventh resistor R7 is electrically connected to the second end of the third switch control unit (the second end of the second transistor M3).
[0058] In addition, the main switch unit includes a main switch Q1, and the active clamp switch unit includes an active clamp switch Q2, a first capacitor C1, a third diode D3, and an eighth resistor R8. The control end of the active clamp switch Q2 is electrically connected to the first plate of the first capacitor C1, the second end of the third diode D3, and the first end of the eighth resistor R8, respectively. The first end of the active clamp switch Q2, the second end of the eighth resistor R8, and the first end of the third diode D3 are all electrically connected to the ground terminal GND. The second end of the active clamp switch Q2 is electrically connected to the second plate of the active clamp capacitor 330, and the second plate of the first capacitor C1 is electrically connected to the second end of the first diode D1.
[0059] Based on the above connection relationship, Figure 3 For example, the main switch Q1 includes an NMOS tube and the active clamp switch Q2 includes a PMOS tube. Figure 4 When the first output pin OUTM outputs a high level, the main switch Q1 is turned on, and when the first output pin OUTM outputs a low level, the main switch Q1 is turned off. The active clamp switch Q2 is turned on when the control terminal is at a low level, and is turned off when it is at a high level.
[0060] For example, Figure 4 As shown, when the forward active clamp drive system is in the startup state, that is, in the time period t1, the power supply of the main control chip 10 is ahead of the establishment of the enable determination signal. After the power supply of the main control chip 10 is established, the power supply pin REFA normally outputs 5V. Since the enable determination signal is not established, the main control chip 10 determines that the startup condition is not met, and the signal output by the enable determination pin FLT / SD continues to be low. At this time, the second resistor R2 is positive at the top and negative at the bottom, and the base current flows through the first transistor M1. The first transistor M1 is turned on, and the gate of the first transistor M2 is the 5V voltage output by the power supply pin REFA. The first transistor M2 is turned on and is pulled down by the first transistor M2 and the first diode D1. The voltage output to the second plate of the first capacitor C1 (i.e., OUTA2) remains low. Since the first capacitor C1 is not charged, the voltage across the first capacitor C1 is 0, the gate-source voltage of the active clamp switch Q2 is 0, and the active clamp switch Q2 is continuously off, and due to the pull-down of the first transistor M2, the gate voltage of the second transistor M3 is zero, the second transistor M3 is turned off, one end of the seventh resistor R7 is left floating, no current flows through the base of the second transistor M4, and the second transistor M4 is turned off. Therefore, after power is established, since the second transistor M4 is in the off state, that is, the branch between the second transistor M4 and the first diode D1 is disconnected, even if the second output pin OUTA outputs a high level (when the second output pin OUTA outputs a high level, it will draw current from the supply voltage output by the power supply pin REFA, thereby causing the supply voltage to drop), the pull-down of the fourth switch control unit 540, the first diode D1, and the second switch control unit 520 will not cause the voltage output by the power supply pin REFA to drop, thereby preventing the supply voltage from being dropped, thereby ensuring that the configuration of the clamp control circuit 50 does not affect the normal operation of the forward active clamp drive system.
[0061] When the forward active clamp drive system is in operation, i.e., during time period t2, the power supply pin REFA normally outputs 5V. After the enable determination meets the startup conditions, the signal output by the enable determination pin FLT / SD flips to a high level close to 5V. The voltage across the second resistor R2 is zero, the first transistor M1 is turned off, the first transistor M2 is turned off, the first diode D1 is cut off, and the first diode D1 branch (i.e., the branch containing the first transistor M1, the first transistor M2, and the first diode D1) is left floating, without affecting the voltage input to the second plate of the first capacitor C1 (i.e., OUTA2) or the gate voltage of the second transistor M3. The left end of the fifth resistor R5 is at a high level. Through voltage division between the fifth resistor R5 and the fourth resistor R4, the gate of the second transistor M3 flips to a high level, turning on the second transistor M3. One end of the seventh resistor R7 is grounded. At this time, when the second output pin OUTA outputs a high level, the seventh resistor R7 is positive at the top and negative at the bottom, and the second transistor M4 is turned on. The second transistor M4 connects the second output pin OUTA to the second plate (OUTA2) of the first capacitor C1. The high level signal output by the second output pin OUTA is directly transmitted to the second plate (OUTA2) of the first capacitor C1 to charge the first capacitor C1. When the second output pin OUTA outputs a low level, the second transistor M4 is turned off. Since the first capacitor C1 is already charged and the left side is positive and the right side is negative (the second plate is positive), the first capacitor C1 is turned on through the branch where the second diode D2 is located. The negative voltage drives the active clamp switch Q2 to turn on, demagnetizing the primary side of the forward transformer 20, thereby ensuring that the configuration of the clamp control circuit 50 does not affect the normal operation of the forward active clamp drive system.
[0062] When the forward active clamp drive system is in the shutdown state, that is, during the t3 period, the power supply of the main control chip 10 remains normal, and the power supply pin REFA normally outputs 5V. Due to the input undervoltage during the shutdown process, the enable determination signal determines that the startup condition is not met, and the signal output by the enable determination pin FLT / SD is flipped to a low level. At this time, the second resistor R2 is positive at the top and negative at the bottom, and the base current flows through the first transistor M1. The first transistor M1 is turned on, and the gate of the first transistor M2 is the 5V voltage output by the power supply pin REFA. The first transistor M2 is turned on, and the first transistor M2 is connected to the second transistor M2. A diode D1 pulls down the supply voltage, and the voltage (OUTA2) output to the second plate of the first capacitor C1 remains low. Since the first capacitor C1 is charged during normal operation, the voltage across the first capacitor C1 is the drive voltage VOUTA. The gate-source voltage of the active clamp switch Q2 is -VOUTA, and the active clamp switch Q2 is continuously turned on. Furthermore, due to the pull-down of the first transistor M2, the gate voltage of the second transistor M3 is zero, and the second transistor M3 is turned off. One end of the seventh resistor R7 is left floating, and no current flows through the base of the second transistor M4, so the second transistor M4 is turned off. In this way, the above working process ensures that during the shutdown process, even if the second output pin OUTA outputs a shutdown signal (when the active clamp switch is a PMOS transistor, the shutdown signal is a high level), the active clamp switch Q2 can still be turned on, so that the active clamp capacitor 330 can be charged and discharged when the system is in the shutdown state, thereby preventing the active clamp switch Q2 from being continuously turned off when the system is in the shutdown state, causing the active clamp capacitor 330 to be continuously charged, which would affect the reliability of the main switch unit 310 or the active clamp switch unit 320.
[0063] Optionally, based on the above embodiment, continue to refer to Figure 3 The self-driven synchronous rectification circuit includes a first synchronous rectifier M5, a second synchronous rectifier M6, an inductor L, and a second capacitor C2. The secondary side of the forward transformer 20 includes a first secondary side 210a and a second secondary side 210b. The control end of the first synchronous rectifier M5 is electrically connected to the first secondary side 210a and the second end of the second synchronous rectifier M6, respectively. The first end of the first synchronous rectifier M5 is electrically connected to the first end of the second synchronous rectifier M6 and the first plate of the second capacitor C2, respectively. The second end of the first synchronous rectifier M5 is electrically connected to the control end of the second synchronous rectifier M6 and the second secondary side 210b, respectively. The second end of the second synchronous rectifier M6 is also electrically connected to the first end of the inductor L. The second end of the inductor L is electrically connected to the second plate of the second capacitor C2 and the output end of the forward active clamp drive system. The primary side of the forward transformer 20 includes a first primary side 220a and a second primary side 220b. The first primary side 220 a is electrically connected to the input end of the forward active clamp driving system, and the second primary side 220 b is electrically connected to the first plate of the active clamp capacitor 330 .
[0064] Specifically, such as Figure 3 As shown, when designing a self-driven synchronous rectification solution, when the main control chip 10 has no PWM drive signal output, the primary and secondary sides of the forward transformer 20 are not controlled by the on / off control of the main switch Q1. At the moment the power is turned off, there is unreleased energy on the second capacitor C2 and the inductor L, and the second capacitor C2 and the inductor L will enter a self-driven synchronous rectification oscillation working state. Since the secondary side of the forward transformer 20, the first synchronous rectifier tube M5, and the second synchronous rectifier tube M6 are in the self-driven synchronous rectification loop, the second capacitor C2 and the inductor L will also excite and demagnetize the forward transformer 20 in synchronization with the resonance process. This process is called the free resonance process. When the first secondary side 210a is at a high level, the first synchronous rectifier M5 is turned on, and the second capacitor C2 and the inductor L excite the secondary side of the forward transformer. When the resonant period is halfway through, the first secondary side 210a is at a low level, the first synchronous rectifier M5 is turned off, and the second secondary side 210b rises to a high level, the second synchronous rectifier M6 is turned on, and the excitation current of the forward transformer is commutated to the primary side through flux coupling to charge the active clamping capacitor 330.
[0065] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations, and substitutions are possible for those skilled in the art without departing from the scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of the present invention. The scope of the present invention is determined by the scope of the appended claims.
Claims
1. A forward active clamp drive system, characterized in that: Including main control chip, forward transformer, control circuit, self-driven synchronous rectification circuit and clamping control circuit; The control circuit is arranged on the primary side of the forward transformer, and the self-driven synchronous rectification circuit is arranged on the secondary side of the forward transformer; The control circuit includes a main switch unit, an active clamp switch unit and an active clamp capacitor; The main control chip includes a first pin and a plurality of second pins; The control end of the main switch unit is electrically connected to the first pin, the first end of the main switch unit and the first plate of the active clamping capacitor are connected to the primary side of the forward transformer, and the second end of the main switch unit is electrically connected to the ground end; The control end of the active clamp switch unit is electrically connected to the plurality of second pins through the clamp control circuit, the first end of the active clamp switch unit is electrically connected to the second plate of the active clamp capacitor, and the second end of the active clamp switch unit is electrically connected to the ground end. The clamp control circuit is configured to control the active clamp switch unit to be turned on when the forward active clamp drive system is in a shutdown state.
2. The forward active clamping drive system according to claim 1, characterized in that: The plurality of second pins include a power supply pin, an enable determination pin and a second output pin; The clamp control circuit includes a first switch control unit, a second switch control unit, a third switch control unit, a fourth switch control unit, a first diode and a second diode; A first terminal of the first switch control unit is electrically connected to the power supply pin, a control terminal of the first switch control unit is electrically connected to the enable determination pin, and a second terminal of the first switch control unit is electrically connected to the control terminal of the second switch control unit; A first end of the second switch control unit is electrically connected to the ground end, a second end of the second switch control unit is electrically connected to a first end of the first diode, and a second end of the first diode is electrically connected to a control end of the active clamping switch unit; The control terminal of the third switch control unit is electrically connected to the enable determination pin, the first terminal of the third switch control unit is electrically connected to the ground terminal, and the second terminal of the third switch control unit is electrically connected to the control terminal of the fourth switch control unit; The first end of the fourth switch control unit is electrically connected to the second output pin and the first end of the second diode respectively, and the second end of the fourth switch control unit is electrically connected to the second end of the first diode and the second end of the second diode respectively.
3. The forward active clamping drive system according to claim 2, characterized in that: The clamp control circuit is configured to control the first switch control unit and the second switch control unit to be turned on, and control the third switch control unit and the fourth switch control unit to be turned off, according to the control signal of the second pin when the forward active clamp drive system is in the shutdown state or the startup state; The clamp control circuit is further configured to control the first switch control unit and the second switch control unit to be turned off, and control the third switch control unit to be turned on and the fourth switch control unit to be turned on or off according to the control signal of the second pin when the forward active clamp drive system is in the working state.
4. The forward active clamping drive system according to claim 2, wherein: The first switch control unit includes a first transistor, a first resistor and a second resistor; The first end of the first transistor is electrically connected to the power supply pin and the first end of the first resistor respectively, the control end of the first transistor is electrically connected to the enable determination pin through the second resistor, and the second end of the first transistor is electrically connected to the control end of the second switch control unit.
5. The forward active clamping drive system according to claim 2, characterized in that: The second switch control unit includes a first transistor and a third resistor; The control end of the first transistor is electrically connected to the second end of the first switch control unit, the first end of the first transistor is electrically connected to the ground end, the second end of the first transistor is electrically connected to the first end of the first diode, the first end of the third resistor is electrically connected to the control end of the first transistor, and the second end of the third resistor is electrically connected to the first end of the first transistor.
6. The forward active clamping drive system according to claim 2, characterized in that: The third switch control unit includes a second transistor, a fourth resistor and a fifth resistor; The control terminal of the second transistor is electrically connected to the first terminal of the fourth resistor, the first terminal of the fifth resistor, and the first terminal of the first diode, respectively; the first terminal of the second transistor is electrically connected to the second terminal of the fourth resistor and the ground terminal, respectively; and the second terminal of the second transistor is electrically connected to the control terminal of the fourth switch control unit; The second end of the fifth resistor is electrically connected to the enable determination pin.
7. The forward active clamping drive system according to claim 2, characterized in that: The fourth switch control unit includes a second transistor, a sixth resistor and a seventh resistor; The control end of the second transistor is electrically connected to the first end of the sixth resistor and the first end of the seventh resistor, respectively; the first end of the second transistor is electrically connected to the second end of the sixth resistor, the first end of the second diode, and the second output pin, respectively; and the second end of the second transistor is electrically connected to the second end of the second diode and the second end of the first diode, respectively; The second end of the seventh resistor is electrically connected to the second end of the third switch control unit.
8. The forward active clamping drive system according to claim 2, wherein: The main switch unit includes a main switch; The active clamp switch unit includes an active clamp switch, a first capacitor, a third diode and an eighth resistor; The control end of the active clamp switch is electrically connected to the first plate of the first capacitor, the second end of the third diode, and the first end of the eighth resistor, respectively; the first end of the active clamp switch, the second end of the eighth resistor, and the first end of the third diode are all electrically connected to the ground end; and the second end of the active clamp switch is electrically connected to the second plate of the active clamp capacitor; The second plate of the first capacitor is electrically connected to the second end of the first diode.
9. The forward active clamping drive system according to claim 8, characterized in that: The main switch includes an NMOS transistor, and the active clamp switch includes a PMOS transistor.
10. The forward active clamping drive system according to claim 1, wherein: The self-driven synchronous rectification circuit includes a first synchronous rectifier, a second synchronous rectifier, an inductor and a second capacitor; The secondary side of the forward transformer includes a first secondary side and a second secondary side; The control end of the first synchronous rectifier is electrically connected to the first secondary side and the second end of the second synchronous rectifier, respectively; the first end of the first synchronous rectifier is electrically connected to the first end of the second synchronous rectifier and the first plate of the second capacitor, respectively; the second end of the first synchronous rectifier is electrically connected to the control end of the second synchronous rectifier and the second secondary side, respectively; the second end of the second synchronous rectifier is also electrically connected to the first end of the inductor, and the second end of the inductor is electrically connected to the second plate of the second capacitor and the output end of the forward active clamp drive system, respectively; The primary side of the forward transformer includes a first primary side and a second primary side; The first primary side is electrically connected to the input end of the forward active clamping driving system, and the second primary side is electrically connected to the first plate of the active clamping capacitor.