A multi-level Class D power amplifier, PA chip and wideband carrier communication system
By using multi-level Class D power amplifier technology, high-frequency sampling and low-frequency filtering of the input signal are performed using multi-phase shifted triangular waves, which solves the problems of high power consumption and low efficiency of Class AB power amplifiers in broadband carrier communication, and realizes high-efficiency and low-power multi-carrier signal transmission.
Patent Information
- Application Number
- CN202510947514.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-10
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2045-07-10
AI Technical Summary
In existing technologies, Class AB power amplifiers used in broadband carrier communication suffer from high power consumption and low efficiency.
A multi-level Class D power amplifier is adopted, which uses N phase-shifted triangular waves with different phase shift angles to compare and amplify the input signal. The drive circuit outputs N+1 levels of PWM signals, and a loop filter is used for filtering to achieve high-frequency sampling and low-frequency filtering, thus avoiding the transistor from operating under low average power conditions.
It reduces switching losses, improves signal transmission efficiency, reduces quantization errors, and ensures accurate transmission and low power consumption of multi-carrier signals.
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Figure CN120512147B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power transmission technology, and in particular to a multi-level Class D power amplifier, a PA chip, and a broadband carrier communication system. Background Technology
[0002] With the rapid development of smart grids, efficient and reliable communication technologies play a crucial role in grid automation, remote monitoring, and smart metering. Broadband carrier communication, as one of the widely used communication technologies in smart grids, directly impacts the grid's intelligence level and operational efficiency. Currently, broadband carrier communication modules generally face the problem of excessive power consumption. This not only significantly increases the energy costs of the grid but also severely limits the stable operation of communication modules in complex grid environments. Since the power consumption of communication modules in smart grids mainly occurs during signal transmission, optimizing transmission power is key to reducing overall power consumption. The performance of the PA chip in the communication module directly determines the efficiency and stability of the transmission power.
[0003] In existing technology, PA chips used in OFDM-based broadband carrier communication systems mostly employ Class AB power amplifiers. These amplifiers utilize a dual-transistor complementary symmetry structure (e.g., NPN and PNP transistors) to amplify the signal. During the positive half-cycle of the input signal, the PNP transistor enters a slightly conducting state, while the NPN transistor is fully conducting to amplify the signal. Conversely, during the negative half-cycle, the NPN transistor also enters a slightly conducting state, and the PNP transistor is fully conducting to amplify the signal. This alternating operation of the two transistors achieves complete signal waveform amplification. This alternating conduction method results in low power consumption for Class AB power amplifiers, with a theoretical energy conversion efficiency of up to 40% when transmitting single-carrier signals. However, in practical applications, to avoid crossover distortion, both transistors remain slightly conducting even when there is no signal input, leading to a constant quiescent current and relatively high power consumption. Meanwhile, in power line carrier communication, existing technologies mostly use OFDM-based methods to achieve broadband carrier signal transmission, which greatly improves the signal transmission rate. When transmitting multi-carrier signals, since the multi-carrier signal is composed of a large number of subcarrier signals, its instantaneous peak power may reach more than 10 times the average power. Therefore, the transistor capacity needs to be designed according to the instantaneous peak power. However, the average power of the signal is much lower than the peak power most of the time. This causes the transistor to operate in a low average power state most of the time. This power back-off linearity leads to a surge in its static power consumption, which in turn causes the energy conversion efficiency to drop significantly to 3%~5%, making it impossible to meet the requirements of smart grids for low power consumption and high efficiency.
[0004] In summary, the application of Class AB power amplifiers in broadband carrier communication modes in the existing technology suffers from high power consumption and low efficiency. Summary of the Invention
[0005] Therefore, the technical problem to be solved by the present invention is to overcome the problems of high power consumption and low efficiency in the application of Class AB power amplifiers to broadband carrier communication mode in the prior art.
[0006] To address the aforementioned technical problems, this invention provides a multi-level Class D power amplifier for use in OFDM-based broadband carrier communication systems, comprising:
[0007] The triangular wave signal module is used to generate N phase-shifted triangular waves with different phase shift angles; where N is an even number and N≥4;
[0008] The comparison module, connected to the triangular wave signal module, is used to compare the input signal with N phase-shifted triangular waves with different phase-shift angles, and output N PWM signals.
[0009] The driving circuit, connected to the comparator module, is used to amplify N PWM signals and output a PWM amplified signal containing N+1 levels.
[0010] The loop filter, connected to the drive circuit, is used to filter the PWM amplified signal to obtain the filtered PWM amplified signal.
[0011] Preferably, the bandwidth of the loop filter is at the same frequency as the bandwidth of the phase-shifted triangular wave;
[0012] N*f1>f, where f1 represents the frequency of a single phase-shifted triangular wave and f represents the maximum frequency of the input signal.
[0013] Preferably, the phase shift angle difference between the nth phase-shifted triangular wave and the (n+1)th phase-shifted triangular wave is 360° / N; where n∈[1,N-1].
[0014] Preferably, N=4.
[0015] Preferably, the driving circuit is an H-bridge structure composed of two half-bridges, each half-bridge including:
[0016] The first bridge arm specifically includes:
[0017] The first transistor has its gate connected to the output of the comparator module and its drain connected to the power supply.
[0018] The second transistor has its gate connected to the output of the comparator module and its drain connected to the source of the first transistor.
[0019] The second bridge arm specifically includes:
[0020] The third transistor has its gate connected to the output of the comparator module and its drain connected to the source of the second transistor as the output of the half-bridge.
[0021] The fourth transistor has its gate connected to the output of the comparator module, its drain connected to the source of the third transistor, and its source grounded.
[0022] Preferably, each half-bridge further includes a flying capacitor, one end of which is connected to the source of the first transistor and the other end of which is connected to the source of the third transistor.
[0023] Preferably, each half-bridge further includes an EMI filter, specifically comprising:
[0024] An inductor, the first end of which is connected to the output of the half-bridge;
[0025] One end of the capacitor is connected to the second end of the inductor as the output terminal of the driving circuit, and the other end is grounded.
[0026] Preferably, the comparison module includes:
[0027] N comparators are used to compare the input signal with N phase-shifted triangular waves with different phase shift angles, and output N PWM signals.
[0028] This application also provides a PA chip, which includes the above-described multilevel Class D power amplifier.
[0029] This application also provides a broadband carrier communication system, which includes the aforementioned PA chip.
[0030] The multi-level Class D power amplifier provided in this application has the following beneficial effects:
[0031] A triangular wave signal module generates N phase-shifted triangular waves with different phase shift angles. A comparison module samples the input signal using these N phase-shifted triangular waves, which is equivalent to high-frequency sampling of the input signal using multiple phase-shifted triangular waves. This allows high-frequency quantization to be achieved using low-frequency triangular waves. Even with a high-bandwidth multi-carrier input signal, this high-frequency sampling method can more densely sample rapid changes in the high-frequency signal, reducing quantization errors. This results in the output of N PWM signals containing input signal variation information and with staggered phases. When the drive circuit amplifies the PWM signals, its internal transistors can exhibit different switching combinations under the control of the N PWM signals, thus outputting an amplified signal containing N+1 levels and including input signal variation information. This method utilizes a stepped voltage synthesis output... The multi-level amplified signal increases the dynamic range of the output signal, enabling accurate representation of minute changes in both high-frequency and low-frequency signals. This allows for a more precise approximation of the input signal waveform, further reducing quantization errors. Finally, a loop filter is used to filter the amplified signal, removing high-frequency carrier components while retaining the input signal. Since the power devices of a Class D amplifier only switch between fully on and fully off states, it avoids the high power consumption problem caused by transistors operating at low average power, possessing inherent advantages of high efficiency and low power consumption. This application further improves the Class D amplifier by using a low-frequency phase-shifted triangular wave to cover the bandwidth of the multi-carrier signal, solving the distortion problem that exists when directly using a traditional Class D amplifier to transmit multi-carrier signals. This effectively amplifies and transmits multi-carrier signals while reducing switching losses and improving efficiency. Attached Figure Description
[0032] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings, wherein:
[0033] Figure 1 The schematic diagram of the multi-level Class D power amplifier circuit provided in this application;
[0034] Figure 2 A schematic diagram of the driving circuit, PWM signal, and amplified signal output by the driving circuit provided in this application; wherein, Figure 2 (a) in the diagram is a schematic diagram of the driving circuit. Figure 2 (b) in the middle is Figure 2 The diagram in (a) shows the amplified signal output by the driving circuit under PWM signal drive;
[0035] Figure 3 Another schematic diagram of the driving circuit provided in this application;
[0036] Figure 4This is a schematic diagram illustrating how the comparison module provided in this application performs triangular wave quantization on the input signal using multiple phase-shifted triangular waves and then outputs a multi-level amplified signal; wherein, Figure 4 (a) in the diagram shows four phase-shifted triangular waves and the input signal. Figure 4 (b) in the diagram is a schematic diagram of a multi-level amplified signal;
[0037] Explanation of the reference numerals in the accompanying drawings: 1. Triangular wave signal module; 2. Comparison module; 3. Drive circuit; 31. Half bridge; 4. Loop filter. Detailed Implementation
[0038] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.
[0039] Unlike Class AB amplifiers, Class D amplifiers are commonly used in audio amplification systems. Their core principle is to compare the input signal with a triangular wave. When the input signal voltage is higher than the triangular wave, the output is high; conversely, it is low. Based on the high and low output signals, a PWM signal with a duty cycle proportional to the instantaneous amplitude of the input signal is obtained. This PWM signal is then amplified using a drive circuit, and finally, a loop filter is used to filter the amplified PWM signal, removing high-frequency carrier waves and retaining only the input signal components. The final amplified analog input signal is obtained. Because its power switch operates only in the on or off state throughout the signal amplification process, theoretically there is no static power consumption, and its efficiency is far higher than that of Class AB amplifiers. Therefore, this application considers applying Class D amplifiers to power line carrier communication systems to solve the problems of high power consumption and low efficiency in broadband carrier communication.
[0040] Furthermore, since the frequency range of input signals in audio applications is generally 20Hz~20kHz, while the frequency of triangular waves is usually between 200kHz and 1MHz, the frequency of the triangular wave in existing Class D power amplifiers is usually much higher than the frequency of the input signal, enabling effective modulation of the input signal. However, in power line communication, the frequency range of the input signal is usually 0.7kHz~12MHz, much higher than the frequency of audio signals. Therefore, the triangular wave in existing Class D power amplifiers cannot cover the bandwidth of multi-carrier signals, meaning that higher-order subcarrier signals in multi-carrier signals cannot be effectively tracked, leading to transmission distortion of multi-carrier signals and affecting the communication quality of broadband carrier communication modules.
[0041] Therefore, although applying Class D power amplifiers to power line carrier communication systems can reduce signal transmission power consumption and improve transmission efficiency, it is still necessary to increase the frequency of the triangular wave to ensure accurate modulation of the input signal, thereby guaranteeing signal transmission quality.
[0042] Generally, the frequency of the triangular wave should be at least higher than the highest frequency of the input signal to avoid modulation distortion. Therefore, for input signals of 0.7MHz to 12MHz, the frequency of the triangular wave needs to be above 12MHz. To generate a high-frequency triangular wave with a frequency of 12MHz or higher, high-speed and high-precision circuit design is required, placing extremely high demands on the performance of components. High-frequency circuits are also more susceptible to noise interference, requiring additional shielding and filtering measures. At the same time, the modulation of high-frequency PWM signals requires higher time resolution to ensure the accuracy of the PWM signal duty cycle, while high-frequency switching leads to higher switching losses. In addition, the frequency of the loop filter also needs to be higher to filter out high-frequency carrier components, resulting in higher performance requirements for the inductors and capacitors in the loop filter. Furthermore, high-frequency signals are more susceptible to attenuation and distortion during transmission, requiring optimization of the signal transmission path and impedance matching. Therefore, designing a higher frequency triangular wave signal to modulate the input signal will greatly increase the cost and design complexity of the entire system.
[0043] To address the aforementioned issues, this application designs a multi-level Class D power amplifier, which amplifies both high-frequency and low-frequency input signals at low switching frequencies. This effectively amplifies and transmits multi-carrier signals while reducing switching losses and improving efficiency.
[0044] Please see Figure 1 , Figure 1 The schematic diagram of the multilevel Class D power amplifier provided in this application is shown. The multilevel Class D power amplifier is applied to a broadband carrier communication system based on OFDM and includes a triangular wave signal module 1, a comparison module 2, a drive circuit 3, and a loop filter 4.
[0045] The triangular wave signal module 1 is used to generate N phase-shifted triangular waves with different phase shift angles; where N is an even number and N≥4.
[0046] Comparison module 2 is connected to triangular wave signal module 1 and is used to compare the input signal with N phase-shifted triangular waves with different phase shift angles respectively, and output N PWM signals.
[0047] The drive circuit 3 is connected to the comparator module 2 and is used to amplify the N PWM signals and output a PWM amplified signal containing N+1 levels.
[0048] The loop filter 4 is connected to the drive circuit 3 and is used to filter the PWM amplified signal to obtain the filtered PWM amplified signal.
[0049] Furthermore, the bandwidth of the loop filter is at the same frequency as the bandwidth of the phase-shifted triangular wave.
[0050] In audio applications, when the triangular wave frequency is 250kHz and the input signal is 20kHz, the loop filter needs to filter out the high-frequency carrier signal (such as the triangular wave signal) in the PWM amplified signal and retain only the input signal component. Therefore, a low-pass filter is usually used, and its cutoff frequency needs to be between the highest frequency of the input signal and the triangular wave frequency, such as 30kHz, so that the input signal below the cutoff frequency can pass through, while filtering out the high-frequency components above the cutoff signal.
[0051] In the multi-level Class D power amplifier provided in this application, although the equivalent sampling frequency of multiple phase-shifted triangular waves is relatively high, the frequency of a single phase-shifted triangular wave is still low. Therefore, as long as the loop filter adopts a bandwidth with the same frequency as a single phase-shifted triangular wave (i.e., a low-frequency high-pass loop filter is adopted), the low-frequency phase-shifted triangular wave signal in the PWM amplification signal can be filtered out, allowing the high-frequency input signal to pass through, thereby achieving a high equivalent bandwidth with a low switching frequency and further reducing power consumption.
[0052] For example, if the input signal in a power line carrier communication system is 0.7MHz to 1MHz, and a high-frequency triangular wave with a frequency of 1.2MHz is directly used to sample the input signal, a high-frequency low-pass loop filter with a cutoff frequency between 1MHz and 1.2MHz needs to be designed to filter out the high-frequency triangular wave signal in the PWM amplified signal and retain the input signal components. However, in the multi-level Class D power amplifier designed in this application, since the frequency of a single phase-shifted triangular wave is still 250kHz, it is only necessary to design a low-frequency high-pass loop filter with a cutoff frequency of 250kHz to filter out the low-frequency triangular wave signal in the PWM amplified signal and retain the high-frequency input signal components.
[0053] Furthermore, N*f1 > f, where f1 represents the frequency of a single phase-shifted triangular wave, and f represents the maximum frequency of the input signal. By using N phase-shifted triangular waves, the sampling frequency can be equivalent to N*f1, meaning that high-frequency sampling can be achieved using low-frequency triangular waves. When the equivalent sampling frequency N*f1 is greater than the maximum frequency of the input signal, changes in the input signal can be accurately captured, avoiding signal distortion.
[0054] This application designs a multi-level Class D power amplifier that achieves high-frequency sampling of the input signal based on the superposition effect of multiple phase-shifted triangular waves. This allows the bandwidth of a multi-carrier signal to be covered with low-frequency phase-shifted triangular waves. Specifically, the equivalent sampling frequency of N triangular waves with different phase-shift angles superimposed is N times the sampling frequency of a single phase-shifted triangular wave. Therefore, even if the input signal is high-frequency, it can be accurately captured by the high-frequency quantization process, avoiding distortion. For example, measuring the length of an object by superimposing four rulers with different scale intervals can yield more precise measurement results. Simultaneously, the N+1 levels of PWM amplified output signal, compared to the two-level PWM signal output of existing Class D power amplifiers, increases the dynamic range of the output signal, enabling accurate representation of minute changes in both high-frequency and low-frequency signals, thus improving signal fidelity. In addition, the high-frequency equivalent quantization achieved by the multi-phase shifted triangular wave is decoupled from the switching frequency of the drive circuit. Therefore, the multi-level Class D power amplifier designed in this application can still process high-frequency signals at low switching frequencies, solving the distortion problem that exists when directly using traditional Class D power amplifiers to transmit multi-carrier signals. It effectively amplifies and transmits multi-carrier signals while reducing switching losses and improving efficiency.
[0055] Optionally, the number N of phase-shifted triangular waves can be 4, 6, 8, 10, 12, 16, etc. As the number of phase-shifted triangular waves increases, the sampling frequency and signal processing accuracy of the input signal also increase, and the number of output PWM signals also increases. Therefore, the structure of the multi-level Class D power amplifier and the control process of the transistors in the drive circuit will become more complex, and the cost of the devices will also increase.
[0056] In practical applications, the number of phase-shifted triangular waves is determined based on the frequency of the input signal. To ensure sampling accuracy, N*f1 > f. For example, when the frequency of the input signal is 10MHz and the frequency of a single phase-shifted triangular wave is 1MHz, the number of N is at least 12.
[0057] Specifically, the comparison module 2 can use a multi-channel analog comparator or a dedicated PWM modulation chip. This type of chip integrates a multi-channel comparator, which can compare the input signal with N phase-shifted triangular wave signals respectively.
[0058] Optionally, in some embodiments of this application, the comparison module 2 may also employ multiple comparators, i.e., the comparison module 2 includes:
[0059] N comparators are used to compare the input signal with N phase-shifted triangular waves with different phase shift angles, and output N PWM signals.
[0060] Furthermore, the phase shift angle difference between the nth phase-shifted triangular wave and the (n+1)th phase-shifted triangular wave is 360° / N; where n∈[1,N-1].
[0061] Specifically, setting the phase difference between adjacent phase-shifted triangular waves to 360° / N allows N phase-shifted triangular waves to be evenly distributed within one cycle, forming a uniform sampling network and minimizing quantization error. When transmitting multi-carrier signals, this uniform sampling network can also effectively suppress intermodulation distortion between subcarrier signals.
[0062] For example, when N is 4, the phase shift angle difference between two adjacent phase-shifted triangular waves is 90°, and when N is 6, the phase shift angle difference between two adjacent phase-shifted triangular waves is 60°.
[0063] Preferably, in some embodiments of this application, N=4.
[0064] Furthermore, the N phase-shifted triangular waves with different phase shift angles include a first phase-shifted triangular wave with a phase shift angle of 90°, a second phase-shifted triangular wave with a phase shift angle of 180°, a third phase-shifted triangular wave with a phase shift angle of 270°, and a fourth phase-shifted triangular wave with a phase shift angle of 360°.
[0065] Specifically, when the number of phase-shifted triangular waves is too large, although the equivalent sampling frequency and signal processing accuracy can be further improved, it will increase the complexity of hardware design, the difficulty and cost of control algorithms; when the number of phase-shifted triangular waves is 4, if the frequency of a single phase-shifted triangular wave is f tri The equivalent sampling frequency can be increased to 4*f tri It can better sample and process input signals, avoiding signal distortion. At the same time, the generated 4-channel PWM signals are symmetrical, and the switching control logic of the drive circuit can also be modularly designed, reducing the complexity of the control algorithm.
[0066] Furthermore, the driving circuit 3 in this application is composed of multiple transistors. The switching combination of the multiple transistors under the control of N PWM signals can enable the driving circuit 3 to output N+1 kinds of amplified signals.
[0067] Optionally, the driving circuit 3 can adopt an H-bridge structure, a cascaded H-bridge structure, a multi-phase parallel H-bridge structure, or a T-type structure. Considering the complexity of the control algorithm, in one embodiment of this application, the driving circuit 3 adopts an H-bridge structure.
[0068] like Figure 2 The diagram shown is a schematic representation of a driving circuit, a PWM signal, and an amplified signal output by the driving circuit, according to an embodiment of this application. Figure 2 (a) in the diagram is a schematic diagram of the driving circuit. Figure 2 (b) in the middle is Figure 2 The diagram in (a) shows the amplified signal output by the driving circuit under PWM signal.
[0069] Specifically, when N=4, the driving circuit 3 is an H-bridge structure composed of two half-bridges 31, each half-bridge 31 including a first bridge arm and a second bridge arm.
[0070] The first bridge arm specifically includes the first transistor Q1 and the second transistor Q2.
[0071] Specifically, such as Figure 2 As shown in (a), the gate of the first transistor Q1 is connected to the output terminal of the comparator module 2, and the drain is connected to the power supply VDD; the gate of the second transistor Q2 is connected to the output terminal of the comparator module 2, and the drain is connected to the source of the first transistor Q1.
[0072] The second bridge arm specifically includes the third transistor Q3 and the fourth transistor Q4.
[0073] Specifically, such as Figure 2 As shown in (a), the gate of the third transistor Q3 is connected to the output terminal of the comparator module 2, and its drain is connected to the source of the second transistor Q2 as the output terminal of the half-bridge 31; the gate of the fourth transistor Q4 is connected to the output terminal of the comparator module 2, and its drain is connected to the source of the third transistor Q3, with the source grounded.
[0074] Specifically, the transistors in the two half-bridge 31 are alternately turned on and off under the control of 4 PWM signals to achieve switching output of power supply VDD. The specific modulation principle includes:
[0075] When the initial PWM signal / target PWM signal of the first channel is high, the first transistor Q1 and the second transistor Q2 in the first half-bridge 31 are turned on, while the third transistor Q3 and the fourth transistor Q4 are turned off.
[0076] When the initial PWM signal / target PWM signal of the second channel is high, the first transistor Q1 and the second transistor Q2 in the first half-bridge 31 are turned off, and the third transistor Q3 and the fourth transistor Q4 are turned on.
[0077] When the initial PWM signal / target PWM signal of the third channel is high, the first transistor Q1 and the second transistor Q2 in the second half-bridge 31 are turned on, while the third transistor Q3 and the fourth transistor Q4 are turned off.
[0078] When the initial PWM signal / target PWM signal of the fourth channel is high, the first transistor Q1 and the second transistor Q2 in the second half-bridge 31 are turned off, while the third transistor Q3 and the fourth transistor Q4 are turned on.
[0079] Specifically, by differentially processing the output signals of the two half-bridge 31, five levels of amplified signals can be generated using different conduction combinations of these transistors. For example, the output signal of the left half-bridge is Vout1, and the output signal of the right half-bridge is Vout2. When Vout1=0V and Vout2=Vdd, the level of the amplified signal output by the driver circuit 3 is -Vdd; when Vout1=VddV and Vout2=0, the level of the amplified signal output by the driver circuit 3 is Vdd; when Vout1=0V and Vout2=0 or Vout1=Vdd and Vout2=Vdd, the level of the amplified signal output by the driver circuit 3 is 0; when Vout1=0.5Vdd and Vout2=0V or Vout1=Vdd and Vout2=0.5Vdd, the level of the amplified signal output by the driver circuit 3 is 0.5Vdd; when Vout1=0V and Vout2=0.5Vdd or Vout1=0.5Vdd and Vout2=Vdd, the level of the amplified signal output by the driver circuit 3 is -0.5Vdd.
[0080] Optionally, such as Figure 2 As shown in (a), each half-bridge 31 also includes a flying capacitor C1, one end of which is connected to the source of the first transistor Q1 and the other end of which is connected to the source of the third transistor Q3. Specifically, the flying capacitor C1 can help maintain the voltage during transistor switching.
[0081] Furthermore, each half-bridge 31 also includes an EMI filter consisting of an inductor L and a capacitor C2.
[0082] Specifically, the first end of inductor L is connected to the output of half-bridge 31; one end of capacitor C2 is connected to the second end of inductor L as the output of drive circuit 3, and the other end is grounded. Specifically, the EMI filter can suppress electromagnetic interference generated by the circuit.
[0083] like Figure 3 The diagram shown is a schematic diagram of another driving circuit provided in an embodiment of this application. The driving circuit consists of MOS transistors M1~M8, capacitors C3~C5, and inductors L1~L2. L2 is connected to C4 as the first output terminal, and L3 is connected to C5 as the second output terminal. By performing differential processing on the output signals of the first output terminal and the second output terminal, five levels of amplified signals can be generated.
[0084] Optionally, in some embodiments, the multi-level Class D power amplifier further includes feedback control, that is, the loop filter feeds back the filtered PWM amplified signal to the comparison module, the comparison module compares the error signal between the filtered PWM amplified signal and the input signal with N phase-shifted triangular waves with different phase shift angles respectively, and outputs N adjusted PWM signals.
[0085] Based on the multi-level Class D power amplifier provided in the above embodiments, this application also provides a PA chip, which includes the aforementioned multi-level Class D power amplifier. Specifically, when the multi-level Class D power amplifier is applied in the PA chip, its connection relationship is the same as that of the Class AB power amplifier. The input terminal of the multi-level Class D power amplifier is connected to the broadband carrier signal to be transmitted, and is used to amplify and transmit the broadband carrier signal. The output terminal is connected to a transmission line, an antenna, or a next-stage signal processing module according to the specific application scenario.
[0086] This application also provides a broadband carrier communication system, which includes the PA chip described above.
[0087] The following example, with N=6, verifies the advantage of six phase-shifted triangular waves over a single triangular wave for sampling high-frequency signals. The input signal frequency is 0.7-1MHz, and the frequency of a single phase-shifted triangular wave is 250kHz.
[0088] If a single phase-shifted triangular wave is used to sample the input signal, the changes in the input signal within a single phase-shifted triangular wave period cannot be fully sampled because the frequency of the input signal is greater than the frequency of the phase-shifted triangular wave, resulting in a large quantization error. Correspondingly, the duty cycle change frequency of the PWM signal generated based on the sampling is the same as the frequency of the single phase-shifted triangular wave. Therefore, the rapid changes in the input signal cannot be tracked by the PWM signal, resulting in distortion.
[0089] If six phase-shifted triangular waves with a 60-degree phase shift are used to sample the input signal, since the six phase-shifted triangular waves are staggered by 60 degrees in time, it is equivalent to sampling six times in each phase-shifted triangular wave cycle. At this time, the rapid changes of the high-frequency input signal can also be sampled more densely, thus significantly reducing the quantization error. At the same time, the duty cycle change frequency of the PWM signal is the equivalent sampling frequency (i.e., 250kHz*6), which can effectively track the rapid changes of the high-frequency input signal and reduce distortion. In addition, the loop filter only needs to filter out the 250kHz PWM carrier signal and retain the 0.7-1MHz input signal, which makes the design of the loop filter relatively flexible and easier to achieve distortion-free filtering.
[0090] like Figure 4 The diagram shows a comparison module provided in this application, which uses multiple phase-shifted triangular waves to quantize the input signal and outputs a multi-level amplified signal; wherein, Figure 4 (a) in the diagram shows four phase-shifted triangular waves and the input signal. Figure 4 (b) in the diagram is a schematic diagram of a multi-level amplified signal.
[0091] from Figure 4As can be seen from (a) in this embodiment, a total of four phase-shifted triangular wave signals with different phase shift angles are included. The phase shift angles of two adjacent phase-shifted triangular wave signals differ by 90°. The input signal is a differential input signal. After the input signal is quantized by the four phase-shifted triangular waves, four PWM signals with interleaved phases are output. The four PWM signals are amplified by the driving circuit to obtain the signal shown in Figure 1. Figure 4 The amplified signal shown in (b) contains five levels: 0V, 6V, -6V, 12V and -12V.
[0092] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.
Claims
1. A multi-level Class D power amplifier, characterized in that, Applications include OFDM-based broadband carrier communication systems, including: The triangular wave signal module is used to generate N phase-shifted triangular waves with different phase shift angles; where N is an even number and N≥4; The comparison module, connected to the triangular wave signal module, is used to compare the input signal with N phase-shifted triangular waves with different phase-shift angles, and output N PWM signals. The driving circuit, connected to the comparator module, is used to combine N PWM signals and output a PWM amplified signal containing N+1 levels to amplify the high-frequency input signal. The driving circuit consists of multiple transistors, and the N PWM signals control the switching combination of the multiple transistors to combine the N PWM signals and output a PWM amplified signal containing N+1 levels. The loop filter is connected to the drive circuit and is used to filter the PWM amplified signal to obtain the filtered PWM amplified signal. Among them, the loop filter is a low-frequency high-pass loop filter. The bandwidth of the loop filter is the same as the bandwidth of the phase-shifted triangular wave, so as to filter out the low-frequency phase-shifted triangular wave signal in the PWM amplified signal. The carrier operating frequency range of the broadband carrier communication system is 0.7MHz to 12MHz; the frequency range of the input signal is within the carrier operating frequency range of the broadband carrier communication system. The minimum frequency of the input signal is greater than the frequency of the phase-shifted triangular wave; N*f1>f, to achieve high-frequency sampling of the input signal; where f1 represents the frequency of a single phase-shifted triangular wave, and f represents the maximum frequency of the input signal.
2. The multi-level Class D power amplifier according to claim 1, characterized in that, The phase shift angle difference between the nth phase-shifted triangular wave and the (n+1)th phase-shifted triangular wave is 360° / N; where n∈[1,N-1].
3. The multi-level Class D power amplifier according to claim 1, characterized in that, N=4。 4. The multi-level Class D power amplifier according to claim 3, characterized in that, The drive circuit is an H-bridge structure composed of two half-bridges, each half-bridge including: The first bridge arm specifically includes: The first transistor has its gate connected to the output of the comparator module and its drain connected to the power supply. The second transistor has its gate connected to the output of the comparator module and its drain connected to the source of the first transistor. The second bridge arm specifically includes: The third transistor has its gate connected to the output of the comparator module and its drain connected to the source of the second transistor as the output of the half-bridge. The fourth transistor has its gate connected to the output of the comparator module, its drain connected to the source of the third transistor, and its source grounded.
5. The multi-level Class D power amplifier according to claim 4, characterized in that, Each half-bridge also includes a flying capacitor, one end of which is connected to the source of the first transistor and the other end of which is connected to the source of the third transistor.
6. The multi-level Class D power amplifier according to claim 4, characterized in that, Each half-bridge also includes an EMI filter, which specifically includes: An inductor, the first end of which is connected to the output of the half-bridge; One end of the capacitor is connected to the second end of the inductor as the output terminal of the driving circuit, and the other end is grounded.
7. The multi-level Class D power amplifier according to claim 1, characterized in that, The comparison module includes: N comparators are used to compare the input signal with N phase-shifted triangular waves with different phase shift angles, and output N PWM signals.
8. A PA chip, characterized in that, The PA chip includes the multi-level Class D power amplifier as described in any one of claims 1 to 7.
9. A broadband carrier communication system, characterized in that, The broadband carrier communication system includes the PA chip as described in claim 8.
Citation Information
Patent Citations
OFDM (orthogonal frequency division multiplexing) power line carrier communication SOC (system on chip)
CN103281103A
Multiphase pulse width modulator for class D audio amplifiers
CN105556836A
Audio amplifier using multi-level pulse width modulation
US20130223651A1