Device power supply assembly and electronic device

Abstract

The application discloses a device power supply component and an electronic device, relates to the technical field of power management, and controls a first rectifier circuit through a control circuit outputting a first pulse width modulation signal to rectify alternating current into direct current of a first target voltage, controls a second rectifier circuit through the control circuit outputting a second pulse width modulation signal to rectify the direct current of the first target voltage into direct current of a second target voltage. In this way, the first rectifier circuit is used as a front-stage rectifier module of the PSU, the circuit is composed of multiple transistors, a traditional diode is not needed, the on-resistance of the transistor is low, heat generation can be reduced, on-resistance loss is reduced, and therefore the overall efficiency of the PSU is effectively improved; meanwhile, the second rectifier circuit is used as a rear-stage rectifier module of the PSU, the number of windings required by a transformer can be reduced, the volume of the PSU can be further reduced, and system integration is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power management, and particularly relates to a device power supply component and an electronic device. BACKGROUND

[0002] With the continuous improvement of server performance such as storage and artificial intelligence, the overall power consumption of the whole machine also increases significantly, and the power demand of the PSU (Power Supply Unit) is continuously improved. In the related art, the front-end rectification of the general PSU usually adopts a diode rectifier bridge combined with a boost type PFC (Power Factor Correction) circuit. However, since the diode has a large forward voltage drop, as the input power of the PSU increases, the power loss of the rectifier bridge also rises. This not only leads to the reduction of the overall efficiency of the high-power PSU, but also puts forward higher requirements for the heat dissipation system, thereby making the PSU larger in size. SUMMARY

[0003] The present application provides a device power supply component and an electronic device to at least solve the problem of low efficiency and large size of the PSU in the related art.

[0004] The present application provides a device power supply component, which comprises: a first rectifier circuit, configured to rectify alternating current into direct current of a first target voltage; a second rectifier circuit, configured to rectify the direct current of the first target voltage into direct current of a second target voltage, wherein the first target voltage is greater than the second target voltage, and the first rectifier circuit and the second rectifier circuit each comprise a plurality of transistors; and a control circuit, configured to output a first pulse width modulation signal and a second pulse width modulation signal, and control the plurality of transistors of the first rectifier circuit by using the first pulse width modulation signal and control the plurality of transistors of the second rectifier circuit by using the second pulse width modulation signal.

[0005] The present application also provides an electronic device, which comprises the device power supply component.

[0006] The application controls the first rectifier circuit by outputting a first pulse width modulation signal from the control circuit to rectify AC power into DC power of a first target voltage, and controls the second rectifier circuit by outputting a second pulse width modulation signal from the control circuit to rectify the DC power of the first target voltage into DC power of a second target voltage. In this way, the first rectifier circuit is used as a front-stage rectifier module of the PSU, and the circuit is composed of multiple transistors without using traditional diodes. Since the on-resistance of the transistors is low, heat generation can be reduced, and on-loss can be reduced, thereby effectively improving the overall efficiency of the PSU. Meanwhile, the second rectifier circuit is used as a rear-stage rectifier module of the PSU, which can reduce the number of windings required by the transformer, and help to further reduce the size of the PSU and improve system integration. BRIEF DESCRIPTION OF DRAWINGS

[0007] In order to more clearly illustrate the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0008] Figure 1 Block diagram of a power supply component according to some embodiments of the present application;

[0009] Figure 2 Circuit diagram of a first rectifier circuit according to some embodiments of the present application;

[0010] Figure 3 Block diagram of a second rectifier circuit according to some embodiments of the present application;

[0011] Figure 4 Circuit diagram of a second rectifier circuit according to some embodiments of the present application;

[0012] Figure 5 Circuit diagram of a controller according to some embodiments of the present application;

[0013] Figure 6 Circuit diagram of a clock sub-circuit according to some embodiments of the present application;

[0014] Figure 7 Circuit diagram of an indicator light sub-circuit according to some embodiments of the present application;

[0015] Figure 8 Circuit diagram of a reset sub-circuit according to some embodiments of the present application;

[0016] Figure 9 Circuit diagram of a burning sub-circuit according to some embodiments of the present application;

[0017] Figure 10 Circuit diagram for a communication sub-circuit according to some embodiments of the present application;

[0018] Figure 11 Circuit diagram for a first sampling sub-circuit according to some embodiments of the present application;

[0019] Figure 12 Circuit diagram for a second sampling sub-circuit according to some embodiments of the present application;

[0020] Figure 13 Circuit diagram for a third sampling sub-circuit according to some embodiments of the present application;

[0021] Figure 14 Circuit diagram for a fourth sampling sub-circuit according to some embodiments of the present application;

[0022] Figure 15 Circuit diagram for a fifth sampling sub-circuit according to some embodiments of the present application;

[0023] Figure 16 Block schematic diagram for a driving circuit according to some embodiments of the present application;

[0024] Figure 17 Circuit diagram for a first driving circuit according to some embodiments of the present application;

[0025] Figure 18 Block schematic diagram for a second driving circuit according to some embodiments of the present application;

[0026] Figure 19 Circuit diagram for a second driving circuit A according to some embodiments of the present application;

[0027] Figure 20 Circuit diagram for a second driving circuit B according to some embodiments of the present application;

[0028] Figure 21 Circuit diagram for a second driving circuit C according to some embodiments of the present application;

[0029] Figure 22 Circuit diagram for a second driving circuit D according to some embodiments of the present application;

[0030] Figure 23 AND gate logic circuit diagram according to some embodiments of the present application;

[0031] Figure 24 Circuit diagram for a first over-current protection circuit according to some embodiments of the present application;

[0032] Figure 25 Circuit diagram for a second over-current protection circuit according to some embodiments of the present application;

[0033] Figure 26 Circuit diagram of a third overcurrent protection circuit according to some embodiments of the application;

[0034] Figure 27 Circuit diagram of a fourth overcurrent protection circuit according to some embodiments of the application;

[0035] Figure 28 Circuit diagram of a fifth overcurrent protection circuit according to some embodiments of the application;

[0036] Figure 29 Circuit diagram of a reference voltage circuit according to some embodiments of the application;

[0037] Figure 30 Circuit diagram of an auxiliary power supply circuit according to some embodiments of the application;

[0038] Figure 31 Block schematic diagram of an electronic device according to some embodiments of the application. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, any other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0040] It should be noted that, in the description of the present application, the terms “comprise”, “contain” or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0041] In order for those skilled in the art to better understand the technical solutions of the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0042] The power supply assembly of the electronic device and the electronic device according to the embodiments of the present application will be described in detail below with reference to the drawings.

[0043] Reference Figure 1The device power supply component 10 of the embodiment of the present application comprises: a first rectifier circuit 2 configured to rectify alternating current into direct current of a first target voltage; a second rectifier circuit 3 configured to rectify the direct current of the first target voltage into direct current of a second target voltage, wherein the first target voltage is greater than the second target voltage, and the first rectifier circuit 2 and the second rectifier circuit 3 each comprise a plurality of transistors; and a control circuit 1 configured to output a first pulse width modulation signal and a second pulse width modulation signal, and control the plurality of transistors of the first rectifier circuit 2 by using the first pulse width modulation signal and control the plurality of transistors of the second rectifier circuit 3 by using the second pulse width modulation signal. The plurality of transistors of the first rectifier circuit 2 and the second rectifier circuit 3 can be MOS transistors (Metal-Oxide-Semiconductor Field-Effect Transistor), which are not specifically limited here.

[0044] Specifically, the control circuit 1 transmits a first pulse width modulation signal, for example, a PWM modulation wave, to the first rectifier circuit 2, and the first rectifier circuit 2 adjusts the working mode of the plurality of transistors in the first rectifier circuit 2 based on the first pulse width modulation signal, that is, controls the flow of energy to realize power conversion, so as to rectify alternating current (for example, 220V alternating current) into direct current of the first target voltage, for example, 400V direct current.

[0045] After the first rectifier circuit 2 generates direct current of the first target voltage, the control circuit 1 transmits a second pulse width modulation signal, for example, a PWM modulation wave, to the second rectifier circuit 3, and the second rectifier circuit 3 adjusts the working mode of the plurality of transistors in the second rectifier circuit 3 based on the second pulse width modulation signal, that is, controls the flow of energy to realize power conversion, so as to rectify the direct current of the first target voltage into direct current of the second target voltage, for example, 12V direct current.

[0046] The present application controls the first rectifier circuit by outputting a first pulse width modulation signal from the control circuit to rectify alternating current into direct current of a first target voltage, and controls the second rectifier circuit by outputting a second pulse width modulation signal from the control circuit to rectify direct current of the first target voltage into direct current of a second target voltage. In this way, the first rectifier circuit is used as a front-stage rectifier module of the PSU, and the circuit is composed of a plurality of transistors, without using traditional diodes. Since the on-resistance of the transistors is low, the generation of heat can be reduced, and the on-loss can be reduced, thereby effectively improving the overall efficiency of the PSU. Meanwhile, the second rectifier circuit is used as a rear-stage rectifier module of the PSU, which can reduce the number of windings required by the transformer, and is helpful to further reduce the volume of the PSU and improve the system integration.

[0047] In some embodiments, referring to Figure 2 , the first rectifier circuit 2 comprises a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4 and an inductor U4, wherein the gate of each of the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 is inputted with a first pulse width modulation signal, the drain of the first transistor Q1 and the drain of the second transistor Q2 are connected to a direct current bus of the first target voltage, the source of each of the third transistor Q3 and the fourth transistor Q4 is grounded, one end of a primary winding U41 of the inductor U4 is connected to a phase line of an alternating current, the other end of the primary winding U41 of the inductor U4 is connected to the source of the first transistor Q1 and the drain of the third transistor Q3, and a neutral line of the alternating current is connected to the source of the second transistor Q2 and the drain of the fourth transistor Q4.

[0048] In some embodiments, a secondary winding U42 of the inductor U4 is connected with a first current sampling resistor R14, and the direct current bus of the first target voltage is connected with a voltage dividing sub-circuit 21 for voltage dividing the first target voltage.

[0049] For example, referring to Figure 2 and Figure 5 , the control circuit 1 comprises four output pins of the first pulse width modulation signal, such as pin 42#, pin 43#, pin 26# and pin 27#, wherein the pin 26# outputs the first pulse width modulation signal MCU_PWM_PWM1, the pin 42# outputs the first pulse width modulation signal MCU_PWM_PWM2, the pin 43# outputs the first pulse width modulation signal MCU_PWM_PWM3, and the pin 27# outputs the first pulse width modulation signal MCU_PWM_PWM4.

[0050] The first pulse width modulation signal MCU_PWM_PWM1 outputted by the pin 26# of the control circuit 1 will be transmitted to the gate of the first transistor Q1 for controlling the working mode of the first transistor Q1, the first pulse width modulation signal MCU_PWM_PWM2 outputted by the pin 42# of the control circuit 1 will be transmitted to the gate of the third transistor Q3 for controlling the working mode of the third transistor Q3, the first pulse width modulation signal MCU_PWM_PWM3 outputted by the pin 43# of the control circuit 1 will be transmitted to the gate of the second transistor Q2 for controlling the working mode of the second transistor Q2, and the first pulse width modulation signal MCU_PWM_PWM4 outputted by the pin 27# of the control circuit 1 will be transmitted to the gate of the fourth transistor Q4 for controlling the working mode of the fourth transistor Q4, so as to control the flow of energy to realize power conversion, and cooperate with the inductor U4 to convert the input alternating current, such as AC_L and AC_N, into direct current of the first target voltage on the direct current bus.

[0051] When current flows through the inductor U4, the secondary winding will induce current, and then through the first current sampling resistor R14, and AC voltage can be generated at both ends of the first current sampling resistor R14, for example, IL_N and IL_P, and the AC input current can be determined according to the voltage at both ends of the first current sampling resistor R14. The first current sampling resistor R14 can be 50Ω, which is not limited here.

[0052] The voltage dividing sub-circuit 21 includes resistors R171 and R157, which are used to divide the first target voltage, for example, into DC_400V_P (high voltage) and DC_400V_N (low voltage).

[0053] The AC input voltage (for example, AC_L and AC_N), the voltage at both ends of the first current sampling resistor R14 (for example, IL_N and IL_P), and the divided DC voltage of the first target voltage (for example, DC_400V_P and DC_400V_N) are input into the corresponding sampling circuit to output the AC input voltage sampling signal ADC_AC_VIN, the AC input current sampling signal ADC_AC_IIN, and the DC output voltage sampling signal ADC_DC_400V_VOUT.

[0054] Further, the AC input voltage sampling signal ADC_AC_VIN, the AC input current sampling signal ADC_AC_IIN, and the DC output voltage sampling signal ADC_DC_400V_VOUT are input into the control circuit 1. For example, the AC input voltage sampling signal ADC_AC_VIN is input into the AD sampling pin 11#, the AC input current sampling signal ADC_AC_IIN is input into the AD sampling pin 14# or pin 20#, and the DC output voltage sampling signal ADC_DC_400V_VOUT is input into the AD sampling pin 10#. The control circuit 1 regenerates the first pulse width modulation signal according to the AC input voltage sampling signal ADC_AC_VIN, the AC input current sampling signal ADC_AC_IIN, and the DC output voltage sampling signal ADC_DC_400V_VOUT, and transmits it to the first rectifier circuit 2 to control the transistor of the first rectifier circuit 2 again, so that the voltage on the DC bus is stabilized at about the first target voltage (for example, 400V).

[0055] In this way, the first rectifier circuit is used as the front-end rectifier module of the PSU, and the circuit is composed of multiple transistors without using traditional diodes. Since the on-resistance of the transistor is low, heat generation can be reduced, and the on-loss can be reduced, thereby effectively improving the overall efficiency of the PSU.

[0056] In some embodiments, reference is made to Figure 3, the second rectification circuit 3 comprises a first rectification module 31, a second rectification module 32 and a first transformer 33, wherein the first rectification module 31 is connected with a primary winding 331 of the first transformer, the second rectification module 32 is connected with a secondary winding 332 of the first transformer, and the first rectification module 31 and the second rectification module 32 each have a transistor input of the second pulse width modulation signal.

[0057] Specifically, after the first rectification circuit 2 generates the direct current of the first target voltage, the control circuit 1 transmits the second pulse width modulation signal to the second rectification circuit 3, for example, transmits the second pulse width modulation signal A to the first rectification module 31 and transmits the second pulse width modulation signal B to the second rectification module 32, and the first rectification module 31 and the second rectification module 32 adjust the working mode of the plurality of transistors in the first rectification module 31 and the second rectification module 32 based on the second pulse width modulation signal A and the second pulse width modulation signal B, that is, control the flow of energy to realize power conversion, rectify the direct current of the first target voltage to the direct current of the second target voltage, for example, the direct current of 12V.

[0058] In some embodiments, referring to Figure 4 , the first rectification module 31 comprises a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7 and an eighth transistor Q8, wherein the drain of the fifth transistor Q5 and the drain of the sixth transistor Q6 are connected with the direct current bus of the first target voltage, the source of the seventh transistor Q7 and the source of the eighth transistor Q8 are grounded, the source of the fifth transistor Q5 and the drain of the seventh transistor Q7 are connected with a first end 1 of the primary winding 331 of the first transformer, and the source of the sixth transistor Q6 and the drain of the eighth transistor Q8 are connected with a second end 2 of the primary winding 331 of the first transformer.

[0059] In some embodiments, continuing to refer to Figure 4 , the second rectification module 32 comprises a ninth transistor Q9, a tenth transistor Q10, an eleventh transistor Q11 and a twelfth transistor Q12, wherein the drain of the ninth transistor Q9 and the drain of the tenth transistor Q10 output the direct current of the second target voltage, the source of the eleventh transistor Q11 and the source of the twelfth transistor Q12 are grounded, the source of the tenth transistor Q10 and the drain of the twelfth transistor Q12 are connected with a third end 3 of the secondary winding 332 of the first transformer, and the source of the ninth transistor Q9 and the drain of the eleventh transistor Q11 are connected with a fourth end 4 of the secondary winding 332 of the first transformer.

[0060] For example, referring to Figure 4 and Figure 5The control circuit 1 comprises four output pins of the second pulse width modulation signal, for example, pin 41#, pin 23#, pin 39# and pin 38#, wherein the pin 41# outputs the second pulse width modulation signal MCU_SYN_PWM1, the pin 23# outputs the second pulse width modulation signal MCU_SYN_PWM2, the pin 39# outputs the second pulse width modulation signal MCU_SYN_PWM3, and the pin 38# outputs the second pulse width modulation signal MCU_SYN_PWM4.

[0061] The second pulse width modulation signal MCU_SYN_PWM1 output by the pin 41# of the control circuit 1 will be transmitted to the gate of the fifth transistor Q5 for controlling the working mode of the fifth transistor Q5, the second pulse width modulation signal MCU_SYN_PWM2 output by the pin 23# of the control circuit 1 will be transmitted to the gate of the seventh transistor Q7 for controlling the working mode of the seventh transistor Q7, the second pulse width modulation signal MCU_SYN_PWM3 output by the pin 39# of the control circuit 1 will be transmitted to the gate of the sixth transistor Q6 for controlling the working mode of the sixth transistor Q6, and the second pulse width modulation signal MCU_SYN_PWM4 output by the pin 38# of the control circuit 1 will be transmitted to the gate of the eighth transistor Q8 for controlling the working mode of the eighth transistor Q8, so as to control the energy flow to realize power conversion, and then convert the first target voltage direct current into alternating current, and the alternating current passes through the primary winding 331 of the first transformer, so that the secondary winding 332 of the first transformer generates alternating current through mutual induction, so that the energy is transmitted to the secondary winding.

[0062] Further, the second pulse width modulation signal MCU_SYN_PWM1 output by the pin 41# of the control circuit 1 will also be transmitted to the gate of the ninth transistor Q9 for controlling the working mode of the ninth transistor Q9, the second pulse width modulation signal MCU_SYN_PWM2 output by the pin 23# of the control circuit 1 will also be transmitted to the gate of the eleventh transistor Q11 for controlling the working mode of the eleventh transistor Q11, the second pulse width modulation signal MCU_SYN_PWM3 output by the pin 39# of the control circuit 1 will also be transmitted to the gate of the tenth transistor Q10 for controlling the working mode of the tenth transistor Q10, and the second pulse width modulation signal MCU_SYN_PWM4 output by the pin 38# of the control circuit 1 will also be transmitted to the gate of the twelfth transistor Q12 for controlling the working mode of the twelfth transistor Q12, so as to control the energy flow to realize power conversion, and then convert the alternating current generated by the secondary winding 332 of the first transformer through mutual induction into direct current of the second target voltage.

[0063] In some embodiments, the drain of each of the ninth transistor Q9 and the tenth transistor Q10 is connected with a second current sampling resistor R169.

[0064] Specifically, referring to Figure 4 , the 12V DC current generates a voltage drop through the second current sampling resistor R169, i.e. the DC voltage DC_12V and DC_12V_R across the second current sampling resistor R169, and the DC current can be determined according to the voltage across the second current sampling resistor R169. The second current sampling resistor R169 can be 0.1 mΩ, which is not specifically limited here.

[0065] Further, the DC voltage DC_12V and DC_12V_R across the second current sampling resistor R169 is input into the corresponding sampling circuit to output a DC output voltage sampling signal ADC_DC_12V_VOUT and a DC output current sampling signal ADC_DC_12V_IOUT. The DC output voltage sampling signal ADC_DC_12V_VOUT and the DC output current sampling signal ADC_DC_12V_IOUT are input into the control circuit 1. For example, the DC output voltage sampling signal ADC_DC_12V_VOUT is input into the AD sampling pin 8#, and the DC output current sampling signal ADC_DC_12V_IOUT is input into the AD sampling pin 9#. The control circuit 1 regenerates the second pulse width modulation signal according to the DC output voltage sampling signal ADC_DC_12V_VOUT and the DC output current sampling signal ADC_DC_12V_IOUT, and transmits it to the second rectifier circuit 3 to control the transistors of the second rectifier circuit 3 again, so that the voltage output by the second rectifier circuit 3 is stabilized around the second target voltage (for example, 12V).

[0066] In this way, the second rectifier circuit is used as the rear rectifier module of the PSU, which can reduce the number of windings required by the transformer, help to further reduce the size of the PSU, and improve the system integration.

[0067] In some embodiments, a capacitor and a resistor are connected in parallel across the drain and the source of each transistor in the first rectifier circuit 2 and the second rectifier circuit 3.

[0068] For example, referring to Figure 2, the first rectifier circuit 2 includes a first transistor Q1, a second transistor Q2, a third transistor Q3 and a fourth transistor Q4, the drain and source of the first transistor Q1 are connected in parallel with a capacitor C19 and a resistor R17, the drain and source of the second transistor Q2 are connected in parallel with a capacitor C20 and a resistor R20, the drain and source of the third transistor Q3 are connected in parallel with a capacitor C27 and a resistor R27, the drain and source of the fourth transistor Q4 are connected in parallel with a capacitor C28 and a resistor R28, the drain and source of each transistor are connected in parallel with a capacitor and a resistor to absorb the peak voltage when the transistor switches. Among them, the capacitor C19, the capacitor C27, the capacitor C20 and the capacitor C28 can be 1nF, the resistor R17, the resistor R27, the resistor R20 and the resistor R28 can be 47Ω, which is not specifically limited here.

[0069] For example, referring to Figure 4 , the second rectifier circuit 3 includes a first rectifier module 31 and a second rectifier module 32, wherein the first rectifier module 31 includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7 and an eighth transistor Q8, the drain and source of the fifth transistor Q5 are connected in parallel with a capacitor C62 and a resistor R82, the drain and source of the sixth transistor Q6 are connected in parallel with a capacitor C63 and a resistor R89, the drain and source of the seventh transistor Q7 are connected in parallel with a capacitor C71 and a resistor R104, the drain and source of the eighth transistor Q8 are connected in parallel with a capacitor C70 and a resistor R105, the drain and source of each transistor are connected in parallel with a capacitor and a resistor to absorb the peak voltage when the transistor switches. Among them, the capacitor C62, the capacitor C70, the capacitor C63 and the capacitor C71 can be 1nF, the resistor R82, the resistor R89, the resistor R104 and the resistor R105 can be 47Ω, which is not specifically limited here.

[0070] For example, referring to Figure 4 , the second rectifier module 32 includes a ninth transistor Q9, a tenth transistor Q10, an eleventh transistor Q11 and a twelfth transistor Q12, the drain and source of the ninth transistor Q9 are connected in parallel with a capacitor C64 and a resistor R87, the drain and source of the tenth transistor Q10 are connected in parallel with a capacitor C65 and a resistor R93, the drain and source of the eleventh transistor Q11 are connected in parallel with a capacitor C73 and a resistor R108, the drain and source of the twelfth transistor Q12 are connected in parallel with a capacitor C72 and a resistor R109, the drain and source of each transistor are connected in parallel with a capacitor and a resistor to absorb the peak voltage when the transistor switches. Among them, the capacitor C64, the capacitor C65, the capacitor C73 and the capacitor C72 can be 1nF, the resistor R87, the resistor R93, the resistor R108 and the resistor R109 can be 47Ω, which is not specifically limited here.

[0071] In some embodiments, a gate of each transistor of the first rectifier circuit 2 and the second rectifier circuit 3 is connected in parallel with a clamping diode.

[0072] For example, referring to Figure 2 , the first rectifier circuit 2 includes a first transistor Q1, a second transistor Q2, a third transistor Q3, and a fourth transistor Q4, wherein the gate of the first transistor Q1 is connected in parallel with a clamping diode D4, the second transistor Q2 is connected in parallel with a clamping diode D5, the gate of the third transistor Q3 is connected in parallel with a clamping diode D8, and the gate of the fourth transistor Q4 is connected in parallel with a clamping diode D9. The clamping diodes connected in parallel at the gate of each transistor prevent the driving voltage from being too high to break down the transistor.

[0073] For example, referring to Figure 4 , the second rectifier circuit 3 includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, a tenth transistor Q10, an eleventh transistor Q11, and a twelfth transistor Q12, wherein the fifth transistor Q5 is connected in parallel with a clamping diode D23, the sixth transistor Q6 is connected in parallel with a clamping diode D24, the seventh transistor Q7 is connected in parallel with a clamping diode D31, the eighth transistor Q8 is connected in parallel with a clamping diode D32, the ninth transistor Q9 is connected in parallel with a clamping diode D25, the tenth transistor Q10 is connected in parallel with a clamping diode D26, the eleventh transistor Q11 is connected in parallel with a clamping diode D33, and the twelfth transistor Q12 is connected in parallel with a clamping diode D34. The clamping diodes connected in parallel at the gate of each transistor prevent the driving voltage from being too high to break down the transistor.

[0074] In some embodiments, the control circuit 1 includes a controller 11, wherein the controller 11 is provided with a plurality of pins, including one or more combinations of an output pin of a pulse width modulation signal, a data sampling pin, a fault input pin, and an output pin of an indicator light control signal. Wherein the controller 11 can be an STM32 single-chip microcomputer, which is not specifically limited here.

[0075] For example, the control circuit 1 includes a controller 11, and the controller 11 is as shown in Figure 5 , the controller 11 includes an output pin of a pulse width modulation signal, such as an output pin of a first pulse width modulation signal and an output pin of a second pulse width modulation signal, wherein the output pin of the first pulse width modulation signal includes pin 42#, pin 43#, pin 26#, and pin 27#, and the output pin of the second pulse width modulation signal includes pin 41#, pin 23#, pin 39#, and pin 38#.

[0076] The controller 11 further comprises data sampling pins, such as AD sampling pin 11#, AD sampling pin 14#, AD sampling pin 20#, sampling pin 10#, AD sampling pin 9# and AD sampling pin 8#, for collecting the voltage sampling signals ADC_AC_VIN, AC input current sampling signal ADC_AC_IIN, DC output voltage sampling signal ADC_DC_400V_VOUT, DC output current sampling signal ADC_DC_12V_IOUT and DC output voltage sampling signal ADC_DC_12V_VOUT output by the sampling circuit 4.

[0077] The controller 11 further comprises a fault input pin, such as pin 52#, which stops power output when detecting a circuit fault signal.

[0078] The controller 11 further comprises output pins for indicating lamp control signals, pin 57# being a control pin for LED2-controller 11 working state indicating lamp sub-circuit 13, and pin 33# being a control pin for LED3-working alarm indicating lamp sub-circuit 13.

[0079] In some embodiments, the control circuit 1 further comprises a combination of one or more of the clock sub-circuit 12, the indicating lamp sub-circuit 13, the reset sub-circuit 14, the burning sub-circuit 15 and the communication sub-circuit 16.

[0080] For example, the control circuit 1 further comprises the clock sub-circuit 12, which is connected to pin 5# and pin 6# of the controller 11, as shown in Figure 5 and Figure 6 .

[0081] The control circuit 1 further comprises the indicating lamp sub-circuit 13, such as LED2-controller working state indicating lamp sub-circuit 131 and LED3-working alarm indicating lamp sub-circuit 132. Referring to Figure 5 and Figure 7 , the LED2-controller working state indicating lamp sub-circuit 131 is connected to pin 57# of the controller 11, which controls the LED2-main control chip working state indicating lamp to be always on when the device power assembly is working normally. The LED3-working alarm indicating lamp sub-circuit 132 is connected to pin 33# of the controller 11, which controls the LED3-working alarm indicating lamp to flash at low frequency when the circuit is working normally, and to flash at high frequency when the circuit is faulty.

[0082] The control circuit 1 further comprises the reset sub-circuit 14, as shown in Figure 5 and Figure 8The reset sub-circuit 14 is connected to the pin 7# of the controller 11, and outputs a low level to the controller 11 to reset the control after the reset button SW1 is pressed.

[0083] The control circuit 1 further comprises a burning sub-circuit 15, which is connected to the pin 15# of the controller 11, and is used for programming or debugging the controller 11. Figure 5 and Figure 9 The burning sub-circuit 15 is connected to the pin 15# of the controller 11, and is used for programming or debugging the controller 11.

[0084] The control circuit 1 further comprises a communication sub-circuit 16, which comprises an asynchronous serial communication sub-circuit 161 and a synchronous serial communication sub-circuit 162. Figure 5 and Figure 10 The asynchronous serial communication sub-circuit 161 is connected to the pins 16# and 17# of the controller 11, and outputs data from the pin 16# to the pin U2_TX of the asynchronous serial communication sub-circuit 161 when the controller 11 needs to send data; outputs data from the pin U2_RX of the asynchronous serial communication sub-circuit 161 to the pin 17# of the controller 11 when the asynchronous serial communication sub-circuit 161 needs to send data.

[0085] Continuing to refer to Figure 5 and Figure 10 The synchronous serial communication sub-circuit 162 is connected to the pins 58# and 59# of the controller 11, and the pin SDA jumps from high level to low level when the pin SCL of the synchronous serial communication sub-circuit 162 is high, indicating that the communication starts; the pin SDA jumps from low level to high level when the pin SCL is high, indicating that the communication ends.

[0086] In some embodiments, the device power supply component 10 further comprises a sampling circuit for collecting one or more of the first target voltage, the input current of the alternating current, the input voltage of the alternating current, the second target voltage, and the current of the direct current.

[0087] Specifically, the alternating current input voltage (e.g., AC_L and AC_N), the voltage across the first current sampling resistor R14 (e.g., IL_N and IL_P), and the voltage division of the direct current voltage of the first target voltage (e.g., DC_400V_P and DC_400V_N) can be input into the corresponding sampling circuit 4 to output the alternating current input voltage sampling signal ADC_AC_VIN, the alternating current input current sampling signal ADC_AC_IIN, and the direct current output voltage sampling signal ADC_DC_400V_VOUT.

[0088] The second target voltage DC voltage DC_12V and DC_12V_R across the second current sampling resistor R169 can be input into the corresponding sampling circuit to output DC output voltage sampling signal ADC_DC_12V_VOUT and DC output current sampling signal ADC_DC_12V_IOUT.

[0089] In some embodiments, the sampling circuit comprises at least one sampling sub-circuit, wherein the sampling sub-circuit is composed of an operational amplifier, a diode, a resistor and a capacitor.

[0090] Specifically, the sampling circuit can comprise a first sampling sub-circuit 41, a second sampling sub-circuit 42, a third sampling sub-circuit 43, a fourth sampling sub-circuit 44 and a fifth sampling sub-circuit 45, each of which is used for sampling the AC input voltage (e.g. AC_L and AC_N), the voltage across the first current sampling resistor R14 (e.g. IL_N and IL_P), the divided voltage of the first target voltage DC voltage (e.g. DC_400V_P and DC_400V_N), the second target voltage DC voltage across the second current sampling resistor R169 (e.g. DC_12V and DC_12V_R) to output the corresponding sampling signal, and input the corresponding sampling signal into the control circuit 1 to adjust the first pulse width modulation signal and the second pulse width modulation signal.

[0091] For example, the first sampling sub-circuit 41 as shown in Figure 11 includes an operational amplifier U19.1, a diode D18, a resistor R63, a resistor R64, a resistor R65, a resistor R66, a resistor R61, a resistor R68, a transformer U9 and a capacitor C54, and the AC input voltage (e.g. AC_L and AC_N) can be input into the first sampling sub-circuit 41 to output the AC input voltage sampling signal ADC_AC_VIN.

[0092] The second sampling sub-circuit 42 as shown in Figure 12 includes an operational amplifier U24.1, a diode D16, a resistor R47, a resistor R49, a resistor R51, a resistor R53, and a capacitor C46, and the voltage across the first current sampling resistor R14 (e.g. IL_N and IL_P) can be input into the second sampling sub-circuit 42 to output the AC input current sampling signal ADC_AC_IIN.

[0093] The third sampling sub-circuit 43 as shown in Figure 13As shown, the third sampling sub-circuit 43 includes an operational amplifier U23.1, a diode D17, a resistor R56, a resistor R57, a resistor R50, a resistor R59, and a capacitor C50, and a DC voltage of the first target voltage (e.g., DC_400V_P and DC_400V_N) can be input into the third sampling sub-circuit 43 to output a DC output voltage sampling signal ADC_DC_400V_VOUT.

[0094] The fourth sampling sub-circuit 44 is as shown in the figure. Figure 14 As shown, the fourth sampling sub-circuit 44 includes an operational amplifier U20.1, a diode D36, a resistor R114, a resistor R119, a resistor R116, a capacitor C81, and a capacitor C82, and a DC voltage of the second target voltage (e.g., DC_12V) can be input into the fourth sampling sub-circuit 44 to output a DC output voltage sampling signal ADC_DC_12V_VOUT.

[0095] The fifth sampling sub-circuit 45 is as shown in the figure. Figure 15 As shown, the fifth sampling sub-circuit 45 includes an operational amplifier U21.1, a diode D39, a resistor R128, a resistor R129, a resistor R124, a resistor R170, and a capacitor C93, and a DC voltage of the second target voltage (e.g., DC_12V and DC_12V_R) across the second current sampling resistor R169 can be input into the fifth sampling sub-circuit 45 to output a DC output current sampling signal ADC_DC_12V_IOUT.

[0096] In some embodiments, the device power supply assembly 10 further includes a driving circuit 5 configured to drive the plurality of transistors of the first rectifier circuit 2 according to the first pulse width modulation signal and drive the plurality of transistors of the second rectifier circuit 3 according to the second pulse width modulation signal.

[0097] Specifically, referring to Figure 16 , the driving circuit 5 includes a first driving circuit 51 and a second driving circuit 52. The first driving circuit 51 is configured to drive the plurality of transistors of the first rectifier circuit 2 according to the first pulse width modulation signal, and specifically, the first driving circuit 51 specifically includes a first driving circuit A and a first driving circuit B. The first driving circuit A is as shown in the figure. Figure 17 The first driving circuit A is configured to drive the first transistor Q1 and the third transistor Q3 according to the first pulse width modulation signal MCU_PWM_PWM1 and the first pulse width modulation signal MCU_PWM_PWM2, respectively. The first driving circuit B is as shown in the figure. Figure 17 The first driving circuit B is configured to drive the second transistor Q2 and the fourth transistor Q4 according to the first pulse width modulation signal MCU_PWM_PWM3 and the first pulse width modulation signal MCU_PWM_PWM4, respectively.

[0098] The second drive circuit 52 is configured to drive the plurality of transistors of the second rectifier circuit 3 according to the second pulse width modulation signals. Specifically, referring to Figure 18 , the second drive circuit 52 includes a second drive circuit A, a second drive circuit B, a second drive circuit C, and a second drive circuit D. The second drive circuit A is configured to drive the fifth transistor Q5 and the seventh transistor Q7 according to the second pulse width modulation signal MCU_SYN_PWM1 and the second pulse width modulation signal MCU_SYN_PWM2, respectively, as shown in Figure 19 . The second drive circuit B is configured to drive the sixth transistor Q6 and the eighth transistor Q8 according to the second pulse width modulation signal MCU_SYN_PWM3 and the second pulse width modulation signal MCU_SYN_PWM4, respectively, as shown in Figure 20 . The second drive circuit C is configured to drive the ninth transistor Q9 and the eleventh transistor Q11 according to the second pulse width modulation signal MCU_SYN_PWM1 and the second pulse width modulation signal MCU_SYN_PWM2, respectively, as shown in Figure 21 . The second drive circuit D is configured to drive the tenth transistor Q10 and the twelfth transistor Q12 according to the second pulse width modulation signal MCU_SYN_PWM3 and the second pulse width modulation signal MCU_SYN_PWM4, respectively, as shown in Figure 22 .

[0099] In some embodiments, in order to turn off the drive signals as soon as overcurrent and overvoltage occur so as to protect the plurality of transistors of the first rectifier circuit 2 from being further damaged, the first pulse width modulation signal MCU_PWM_PWM1, the first pulse width modulation signal MCU_PWM_PWM2, the first pulse width modulation signal MCU_PWM_PWM3, and the first pulse width modulation signal MCU_PWM_PWM4 need to be preprocessed.

[0100] For example, referring to Figure 23The first pulse width modulation signal MCU_PWM_PWM1, the first pulse width modulation signal MCU_PWM_PWM2, the first pulse width modulation signal MCU_PWM_PWM3 and the first pulse width modulation signal MCU_PWM_PWM4 are input into the AND gate logic chip U7, and the 12V DC overvoltage protection signal DC_12V_OVP, the 12V DC overcurrent protection signal DC_12V_OCP, the 400V DC overvoltage protection signal DC_400V_OVP, the AC overcurrent protection signal L_IOUT_OCP and the AC overvoltage protection signal AC_OVP are also input into the AND gate logic chip U7, so as to output the first pulse width modulation signal which has passed the overcurrent protection and the overvoltage protection, for example, the first pulse width modulation signal PWM_PWM1, the first pulse width modulation signal PWM_PWM2, the first pulse width modulation signal PWM_PWM3 and the first pulse width modulation signal PWM_PWM4.

[0101] Then, the first pulse width modulation signal PWM_PWM1 and the first pulse width modulation signal PWM_PWM2 are input into the first drive circuit A to drive the first transistor Q1 and the third transistor Q3 respectively; the first pulse width modulation signal PWM_PWM3 and the first pulse width modulation signal PWM_PWM4 are input into the first drive circuit B to drive the second transistor Q2 and the fourth transistor Q4 respectively.

[0102] The DC output voltage sampling signal ADC_DC_400V_VOUT is input into the first overcurrent protection circuit to output the 400V DC overvoltage protection signal DC_400V_OVP, and the first overcurrent protection circuit is as shown in Figure 24 The AC input current sampling signal ADC_AC_IIN is input into the second overcurrent protection circuit to output the AC overcurrent protection signal L_IOUT_OCP, and the second overcurrent protection circuit is as shown in Figure 25 The voltage sampling signal ADC_AC_VIN is input into the first overvoltage protection circuit to output the AC overvoltage protection signal AC_OVP, and the first overvoltage protection circuit is as shown in Figure 26 The DC output voltage sampling signal ADC_DC_400V_VOUT is input into the first overvoltage protection circuit to output the 400V DC overvoltage protection signal DC_400V_OVP, and the first overcurrent protection circuit is as shown in Figure 27 The DC output current sampling signal ADC_DC_12V_IOUT is input into the third overcurrent protection circuit to output the 12V DC overcurrent protection signal DC_12V_OCP, and the third overcurrent protection circuit is as shown in Figure 28

[0103] ​In some embodiments, the device power supply component 10 further includes: a reference voltage circuit 6 , which is composed of a plurality of operational amplifiers and is used to provide a reference voltage to the device power supply component 10 .

[0104] Specifically, refer to Figure 29 The reference voltage circuit 6 includes an operational amplifier U17 and an operational amplifier U18, which are used to provide a reference voltage to the device power supply component 10, for example, providing a 1.5V reference voltage to the first sampling sub-circuit 41, the second sampling sub-circuit 42, the third sampling sub-circuit 43 and the fifth sampling sub-circuit 45.

[0105] In some embodiments, the device power supply assembly 10 further includes: an auxiliary power supply circuit 7, referring to Figure 30 , including one or more of a rectifier bridge BR1, a pulse width modulation controller U22, a thirteenth transistor Q13, a second transformer T1, a voltage regulator V1 and an optocoupler PC1, wherein the alternating current becomes direct current after passing through the rectifier bridge, and the pulse width modulation controller U22 outputs a third pulse width modulation signal to control the on and off of the thirteenth transistor to convert the direct current into an alternating voltage. The alternating voltage is coupled to multiple secondary windings by the primary winding of the second transformer and rectified into direct current by the subsequent diode. The optocoupler PC1 and the voltage regulator V1 form a feedback loop. When the voltage of P3V3 changes, the internal resistance of the voltage regulator V1 changes, so it can be given as a feedback signal to the pulse width modulation controller U22 for adjusting the duty cycle of the third pulse width modulation signal. The pulse width modulation controller U22 adjusts the duty cycle of the third pulse width modulation signal based on the voltage value fed back by the optocoupler to complete the closed loop, thereby stabilizing the output and obtaining working voltages such as 12V and 3.3V.

[0106] In summary, the present application controls the first rectifier circuit by outputting a first pulse width modulation signal through the control circuit to rectify the alternating current into direct current of a first target voltage, and controls the second rectifier circuit by outputting a second pulse width modulation signal through the control circuit to rectify the direct current of the first target voltage into direct current of a second target voltage. In this way, the first rectifier circuit is used as the front-stage rectifier module of the PSU. The circuit is composed of multiple transistors and does not require the use of traditional diodes. Since the on-resistance of the transistors is low, the heat generation can be reduced, thereby reducing the conduction loss, thereby effectively improving the overall efficiency of the PSU. At the same time, the second rectifier circuit is used as the rear-stage rectifier module of the PSU, which can reduce the number of windings required for the transformer, helping to further reduce the size of the PSU and improve the system integration.

[0107] Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software on a necessary general hardware platform, and of course can also be realized by hardware, but in many cases the former is a better embodiment.

[0108] With reference to Figure 31 The embodiments of the present application also provide an electronic device 100, comprising the device power supply assembly 10.

[0109] The skilled in the art can further realize that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized by electronic hardware, computer software or combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of the examples have been described in the above description in general. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. The skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0110] The above has carried out the detailed introduction to the device power supply assembly and the electronic device provided by the present application. The principle and implementation of the present application are described by applying specific examples in the present application. The above example description is only used to help understand the method and core idea of the present application. It should be pointed out that for the ordinary skilled in the art, some improvements and modifications can be made to the present application without departing from the principle of the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A device power supply assembly, characterized in that: include: a first rectifier circuit, configured to rectify the alternating current into a direct current of a first target voltage; a second rectifier circuit, configured to convert and rectify the direct current of the first target voltage into direct current of a second target voltage, wherein the first target voltage is greater than the second target voltage, and the first rectifier circuit and the second rectifier circuit each include a plurality of transistors; a control circuit configured to output a first pulse width modulation signal and a second pulse width modulation signal, and to control the plurality of transistors of the first rectifier circuit using the first pulse width modulation signal and to control the plurality of transistors of the second rectifier circuit using the second pulse width modulation signal; a sampling circuit, configured to collect the first target voltage, the input current of the alternating current, and the input voltage of the alternating current; The control circuit includes a controller, wherein the controller is provided with a plurality of pins, and the pins include an output pin of a pulse width modulation signal and a data sampling pin; The first rectifier circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and an inductor, wherein the first pulse width modulation signal is input to the gate of each of the first transistor, the second transistor, the third transistor, and the fourth transistor, the source of the first transistor and the source of the second transistor are connected to a DC bus of a first target voltage, the drain of the third transistor and the drain of the fourth transistor are grounded, one end of the primary winding of the inductor is connected to a phase line of an alternating current, the other end of the primary winding of the inductor is connected to the drain of the first transistor and the source of the third transistor, and the neutral line of the alternating current is connected to the drain of the second transistor and the source of the fourth transistor; The secondary winding of the inductor is connected to a first current sampling resistor, and the DC bus of the first target voltage is connected to a voltage dividing sub-circuit, and the voltage dividing sub-circuit is used to divide the first target voltage.

2. The device power supply assembly according to claim 1, characterized in that: The second rectifier circuit includes a first rectifier module, a second rectifier module and a first transformer, wherein the first rectifier module is connected to the primary winding of the first transformer, the second rectifier module is connected to the secondary winding of the first transformer, and the transistors of the first rectifier module and the second rectifier module are respectively input with the second pulse width modulation signal.

3. The device power supply assembly according to claim 2, characterized in that: The first rectifier module includes a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor, wherein the source of the fifth transistor and the sixth transistor is connected to the DC bus of the first target voltage, the drain of the seventh transistor and the eighth transistor is grounded, the drain of the fifth transistor and the source of the seventh transistor are connected to the first end of the primary winding of the first transformer, and the drain of the sixth transistor and the source of the eighth transistor are connected to the second end of the primary winding of the first transformer.

4. The device power supply assembly according to claim 2, characterized in that: The second rectifier module includes a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor, wherein the source of the ninth transistor and the tenth transistor respectively outputs direct current of the second target voltage, the drain of the eleventh transistor and the twelfth transistor respectively is grounded, the drain of the tenth transistor and the source of the twelfth transistor are connected to the third end of the secondary winding of the first transformer, and the drain of the ninth transistor and the source of the eleventh transistor are connected to the fourth end of the secondary winding of the first transformer.

5. The device power supply assembly according to claim 4, characterized in that: A second current sampling resistor is connected to a source of each of the ninth transistor and the tenth transistor.

6. The device power supply assembly according to any one of claims 1 to 5, characterized in that: A capacitor and a resistor are connected in parallel across the drain and source of each transistor in the first rectifier circuit and the second rectifier circuit.

7. The device power supply assembly according to any one of claims 1 to 5, characterized in that: A clamping diode is connected in parallel to the gate of each transistor of the first rectifier circuit and the second rectifier circuit.

8. The device power supply assembly according to claim 1, characterized in that: The control circuit includes a controller, wherein the controller is provided with a plurality of pins, and the pins include one or more combinations of output pins for pulse width modulation signals, data sampling pins, fault input pins, and output pins for indicator light control signals.

9. The device power supply assembly according to claim 8, characterized in that: The control circuit further includes one or more combinations of a clock subcircuit, an indicator light subcircuit, a reset subcircuit, a burning subcircuit and a communication subcircuit.

10. The device power supply assembly according to claim 1, characterized in that: Also includes: The sampling circuit is used to collect one or more of the first target voltage, the input current of the alternating current, the input voltage of the alternating current, the second target voltage and the current of the direct current.

11. The device power supply assembly according to claim 10, characterized in that: The sampling circuit includes at least one sampling sub-circuit, wherein the sampling sub-circuit is composed of an operational amplifier, a diode, a resistor, and a capacitor.

12. The device power supply assembly according to claim 1, characterized in that: Also includes: The driving circuit is configured to drive the plurality of transistors of the first rectifier circuit according to the first pulse width modulation signal, and to drive the plurality of transistors of the second rectifier circuit according to the second pulse width modulation signal.

13. The device power supply assembly according to claim 1, characterized in that: Also includes: A reference voltage circuit, which is composed of a plurality of operational amplifiers and is used to provide a reference voltage to the device power supply component.

14. An electronic device, characterized in that: include: The device power supply assembly according to any one of claims 1 to 13.

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