Power module

By adding a connection layer and spacer structure between the upper substrate and the lower substrate in the power module, the current loop is simplified, and the electrical characteristics and reliability problems caused by the increase in heat at high output are solved, thereby realizing the reduction of module size and improvement of working efficiency.

CN120529628APending Publication Date: 2025-08-22HYUNDAI MOTOR CO LTD +1
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Patent Information

Application Number
CN202411693135.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-02-22
Filing Date
2024-11-25
Publication Date
2025-08-22

AI Technical Summary

Technical Problem

The heat increase of existing power modules under high output requirements leads to deterioration of electrical characteristics and reliability problems, and the current loop is complex, affecting the module size and reliability.

Method used

A structure in which a connecting layer is arranged between the upper substrate and the lower substrate and extends through the spacer, simplifies the current loop and enhances the current superposition effect.

Benefits of technology

The current loop is simplified, the current superposition degree is enhanced, the working efficiency and reliability of the power module are improved, and the module size is reduced.

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Abstract

The invention relates to a power module. The power module includes an upper substrate, a lower substrate, a first semiconductor chip, a first spacer electrically interconnecting a first metal layer of the upper substrate and a second metal layer of the lower substrate, a second spacer electrically interconnecting the first semiconductor chip and the first metal layer, a first connection layer configured to form a current path, and a power lead.
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Description

Technical Field

[0001] The present invention relates to a power module, and in particular, to a power module configured to achieve enhanced operating efficiency by additionally disposing a connection layer between an upper substrate and a lower substrate. Background Art

[0002] With the recent increase in environmental concerns, the use of environmentally friendly vehicles equipped with electric motors as a power source is increasing. Such environmentally friendly vehicles are also called "electrified vehicles." As representative examples of electrified vehicles, there are electric vehicles (EVs) and hybrid electric vehicles (HEVs).

[0003] Such electric vehicles are equipped with an inverter configured to convert DC power into AC power when driving a motor. Typically, the inverter is composed of one or more power modules including semiconductor chips configured to perform switching functions.

[0004] On the other hand, as mentioned above, semiconductor chips configured to perform switching functions and provided in power modules may generate heat because large currents at high voltages flow through the power modules during operation. To ensure stable operation of the power modules, it is necessary to eliminate this heat. To this end, various methods have been employed.

[0005] According to a cooling method applied to the power module, the power module can be classified into a single-sided cooling type, in which heat generated from the semiconductor chip is transferred to one of the upper substrate and the lower substrate to dissipate the generated heat, and a double-sided cooling type, in which heat generated from the semiconductor chip is transferred to both the upper substrate and the lower substrate in a distributed manner to dissipate the generated heat.

[0006] In a double-sided cooling type power module, the size and electrical characteristics of the power module have a great influence on reliability. That is, when the power module has a reduced size and excellent electrical characteristics, the reliability of the power module is enhanced.

[0007] On the other hand, as inverter output requirements continue to increase, the inverter must operate to support this high output, and accordingly, the heat generated by the inverter's semiconductor chips increases. To cope with this increased heat, the main components of the inverter, including the semiconductor chips and substrates, have also increased in size.

[0008] As the size of such power modules increases, their current loops become longer and more complex. This can lead to reliability issues such as degradation of electrical characteristics and substrate warping. Therefore, a solution to these issues is needed.

[0009] The information included in this Background section of the invention is only intended to enhance understanding of the general background of the invention and should not be taken as an acknowledgment or any form of suggestion that this information constitutes the prior art already known to a person skilled in the art. Summary of the Invention

[0010] Various aspects of the present invention are directed to providing a power module configured to enhance a current superposition effect while simplifying a current loop by additionally disposing a connection layer between an upper substrate and a lower substrate.

[0011] The objects of the present invention are not limited to the above objects, and other objects not described in the present invention will be more clearly understood by those skilled in the art through the following detailed description.

[0012] According to one aspect of the present invention, the above and other purposes can be achieved by providing a power module, which includes: an upper substrate including a first metal layer, a lower substrate arranged below the upper substrate (the lower substrate including a second metal layer facing the first metal layer), a first semiconductor chip arranged on the second metal layer, a first spacer that electrically interconnects the first metal layer and the second metal layer while extending vertically, a second spacer that electrically interconnects the first semiconductor chip and the first metal layer while extending vertically, a first connecting layer configured to form a current path between the upper substrate and the lower substrate and between the first spacer and the second spacer in a direction intersecting with the direction of the current path formed by the first spacer and the second spacer, and a power lead arranged on at least one of the first metal layer and the second metal layer.

[0013] The first connection layer may not overlap with the first spacer and the second spacer in a plane.

[0014] The first connection layer may allow at least one of the first spacer and the second spacer to penetrate therethrough.

[0015] The first connection layer may be provided with at least one of a first through hole including a planar area corresponding to a planar area of ​​the first spacer and the first spacer penetrating the first through hole, and a second through hole including a planar area corresponding to a planar area of ​​the second spacer and the second spacer penetrating the second through hole.

[0016] At least one of the first spacer and the second spacer may be divided into an upper portion and a lower portion. A first connection layer may be arranged between the upper portion and the lower portion to interconnect the upper portion and the lower portion of at least one of the first spacer and the second spacer.

[0017] The first connection layer may form a current path in a direction crossing a direction of a current path formed by the first spacer and the second spacer through a pattern formed on a plane.

[0018] The pattern may be formed by a combination of a plurality of separate plates arranged in parallel while being horizontally spaced apart from each other.

[0019] The vertical thickness of the first connection layer may be greater than or equal to the vertical thickness of the power lead.

[0020] The first connection layer may include a substrate corresponding portion overlapping at least a portion of the upper substrate and the lower substrate in a plane, and a lead corresponding portion extending from the substrate corresponding portion to protrude outward from the upper substrate and the lower substrate in the plane. The lead corresponding portion may allow current to be input to and output from the lead corresponding portion.

[0021] The lead corresponding portion may include one of the positive terminal, the negative terminal, and the output terminal, or may be connected to one of the positive terminal, the negative terminal, and the output terminal. The power lead may include one of the remaining terminals of the positive terminal, the negative terminal, and the output terminal.

[0022] The power module may further include a second connection layer arranged vertically spaced apart from the first connection layer and configured to form a current path between the upper substrate and the lower substrate and between the first spacer and the second spacer in a direction intersecting the direction of the current path formed by the first spacer and the second spacer. The second connection layer may include another of the remaining terminals of the positive terminal, the negative terminal, and the output terminal, or may be connected to another of the remaining terminals of the positive terminal, the negative terminal, and the output terminal.

[0023] The lead corresponding portion may be spaced apart upward from the power lead to overlap with the power lead in a plane.

[0024] The lead corresponding portions may be bent downward from the substrate corresponding portions and extend outwardly from the upper and lower substrates so that the lead corresponding portions are arranged parallel to the power leads while being horizontally spaced apart from the power leads.

[0025] The substrate corresponding portion may be arranged parallel to the upper substrate and the lower substrate while being vertically spaced apart from the upper substrate and the lower substrate.

[0026] The power module may further include a third spacer arranged horizontally spaced apart from the second spacer with the first spacer arranged therebetween. The first connection layer may be bonded to at least one of the upper substrate, the lower substrate, the first spacer, the second spacer, and the third spacer.

[0027] The first connection layer may not overlap with the third spacer in a plane.

[0028] The first connection layer may be bent upward or downward between the first spacer and the third spacer and coupled to the upper substrate or the lower substrate.

[0029] The first connection layer may allow the third spacer to penetrate therethrough.

[0030] The first connection layer may be horizontally coupled to a side surface of the third spacer.

[0031] At least one of the first metal layer and the second metal layer may be formed of a plurality of horizontally spaced portions. The first connection layer may extend vertically between the first spacer and the second spacer and be electrically connected to at least one of the plurality of portions.

[0032] According to various embodiments of the present invention as described above, a current loop of a power module can be simplified by additionally disposing a connection layer between an upper substrate and a lower substrate while including a structure through which a spacer extends.

[0033] Furthermore, the current superposition effect can be enhanced by simplifying the current loop via the connection layer.

[0034] Furthermore, the sizes of insulating patterns and via spacers for forming a current loop can be reduced, thereby achieving reduction in module size.

[0035] In addition, the reliability of the power module can be enhanced by simplifying the current loop and reducing the module size.

[0036] The methods and apparatus of the present invention have other features and advantages that will be apparent from or will be described in more detail in the accompanying drawings and subsequent detailed description incorporated herein, which together serve to explain the specific principles of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 is a plan view of a portion of a power module according to an exemplary embodiment of the present invention when viewed in a first axis direction thereof;

[0038] Figure 2 is a side view of a power module according to an exemplary embodiment of the present invention when viewed in the direction of its second axis;

[0039] Figure 3A 、 Figure 3B 、 Figure 3C 、 Figure 3D 、 Figure 3E 、 Figure 3F and Figure 3Gis a schematic diagram illustrating the structure of a first connection layer according to various exemplary embodiments of the present invention;

[0040] Figure 4 、 Figure 5 、 Figure 6 and Figure 7 is a schematic diagram illustrating current loops based on different structures of the first connection layer according to various exemplary embodiments of the present invention;

[0041] Figure 8A 、 Figure 8B and Figure 8C 2 is a schematic diagram illustrating current loops based on different structures of a first metal layer and a second metal layer according to various exemplary embodiments of the present invention.

[0042] It should be understood that the accompanying drawings are not drawn to scale, but rather present a suitably simplified depiction of various features illustrating the basic principles of the present invention. The specific design features of the present invention as included herein (including, for example, specific dimensions, orientations, positions and shapes) will be determined in part by the specific intended application and use environment.

[0043] In the drawings, like reference numbers refer to the same or equivalent parts of the present invention throughout the several figures of the drawing. DETAILED DESCRIPTION

[0044] Reference will now be made in detail to various embodiments of the present invention, examples of which are presented in the accompanying drawings and described below. Although the present invention will be described in conjunction with exemplary embodiments of the present invention, it should be understood that this description is not intended to limit the present invention to those exemplary embodiments of the present invention. On the other hand, the present invention is intended to encompass not only the exemplary embodiments of the present invention, but also various alternative embodiments, modified embodiments, equivalent embodiments, and other embodiments that may be included within the spirit and scope of the present invention as defined by the appended claims.

[0045] For the embodiments of the present invention included herein, the specific structural or functional descriptions are exemplary to merely describe the embodiments of the present invention, and the embodiments of the present invention can be implemented in various forms and should not be construed as limited to the embodiments described in this specification.

[0046] Since various modifications can be made and different embodiments can be applied to the embodiments of the concept according to the present invention, specific embodiments will be described with reference to the accompanying drawings and described in detail herein. However, these specific embodiments should not be interpreted as limiting the embodiments of the concept according to the present invention, but should be interpreted as extending to all modified embodiments, equivalent embodiments, and alternative embodiments included in the concept and technical scope of the present invention.

[0047] Unless otherwise defined, the terms used herein (including technical or scientific terms) have the same meaning as those generally understood by those skilled in the art to which the present invention belongs. The terms used herein should be interpreted not only based on the definitions in any dictionary, but also based on the meanings used in the field to which the present invention belongs. In addition, unless explicitly defined, the terms used herein should not be interpreted as being too idealistic or too formal.

[0048] Hereinafter, various exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, and the same or similar elements are designated by the same reference numerals regardless of the reference numerals in the drawings, and repeated description thereof will be omitted.

[0049] Although "module" or "unit" is suffixed to the constituent elements described in the following description, this is only for the convenience of describing the specification. The suffix itself does not have the meaning or function of distinguishing the constituent elements using the suffix from the constituent elements not using the suffix.

[0050] In the following description of the exemplary embodiments of the present invention, detailed descriptions of known functions and configurations incorporated herein will be omitted when they may obscure the subject matter of the exemplary embodiments of the present invention. In addition, the exemplary embodiments of the present invention will be more clearly understood from the accompanying drawings, and should not be limited by the accompanying drawings, and it should be understood that all changes, equivalents, and substitutions that do not depart from the spirit and technical scope of the present invention are included in the exemplary embodiments of the present invention.

[0051] It should be understood that, although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

[0052] When an element is “connected” or “linked” to another element, it should be understood that the element may be directly connected or linked to the other element, or other elements may exist between them. Conversely, when an element is “directly connected” or “directly linked” to another element, it should be understood that no other elements exist between them.

[0053] Unless clearly used otherwise, singular expressions include a plural meaning.

[0054] In this specification, the terms "comprise", "contain", etc. are intended to indicate the presence of features, values, steps, operations, elements, parts or a combination thereof, and do not exclude other features, values, steps, operations, elements, parts or any combination thereof or any addition thereof.

[0055] In an exemplary embodiment of the present invention, a structure is provided for simplifying the current loop and increasing the degree of current superposition by including a power module including a first connection layer, wherein the first connection layer is configured to form a current path in a direction that intersects with the direction of the current path formed between the upper substrate and the lower substrate and between the multiple spacers through multiple spacers.

[0056] Here, the current loop may be defined as a path where current input from the outside is output to the outside again after passing through constituent elements in the power module, and may be configured by a combination of current paths formed by respective constituent elements of the power module.

[0057] The degree of current overlap can be increased as the current loop becomes narrower. As the degree of current overlap increases, the operating efficiency of the power module can be enhanced based on the mutual inductance.

[0058] On the other hand, for ease of understanding, expressions such as “upper substrate,” “lower substrate,” “above,” “below,” etc. are intended to indicate mutual relationships, and are not intended to indicate absolute orientations.

[0059] In the following, reference will be made to Figure 1 and Figure 2 A description is given of the configuration and structure of a power module having enhanced operating efficiency according to an exemplary embodiment of the present invention.

[0060] Figure 1 is a partial plan view of a power module according to an exemplary embodiment of the present invention when viewed in a first axis direction. Figure 2 is a side view of a power module according to an exemplary embodiment of the present invention when viewed in the second axis direction.

[0061] In more detail, Figure 1 A schematic diagram showing a portion of the power module excluding the upper substrate when viewed from the top side downward along a first axis, Figure 2 Shows the state where the upper substrate is added to the power module part when viewed from the right along the second axis. Figure 1 A schematic diagram of a portion of a power module is shown.

[0062] refer to Figure 1 and Figure 2 Both, the power module according to the exemplary embodiment of the present invention may include an upper substrate 110 , a lower substrate 120 , a first semiconductor chip 201 , a second semiconductor chip 202 , first, second and third spacers 300 , a first connection layer 410 and a power lead 501 .

[0063] Figure 1 and Figure 2Constituent elements associated with the present invention are mainly shown, and in actual practice, the power module may be implemented to include a greater or lesser number of constituent elements than shown.

[0064] Hereinafter, the respective constituent elements as described above and the structure of the power module according to these constituent elements will be described.

[0065] First, refer to Figure 2 The upper substrate 110 includes a first insulating layer 111 and a first metal layer 112 arranged on the lower surface of the first insulating layer 111 .

[0066] The lower substrate 120 may be disposed below the upper substrate 110 in the first axis direction while being spaced apart from the upper substrate 110. The lower substrate 120 includes a second insulating layer 121 and a second metal layer 122 disposed on an upper surface of the second insulating layer 121 while facing the first metal layer 112.

[0067] In addition, the third metal layer 113 may be disposed on the upper surface of the first insulating layer 111 of the upper substrate 110 , and the fourth metal layer 123 may be disposed on the lower surface of the second insulating layer 121 of the lower substrate 120 .

[0068] First insulating layer 111 and second insulating layer 121 may be configured to electrically insulate the interior of the power module from the exterior of the power module, and may receive heat generated from semiconductor chips 201 and 202 via first metal layer 112 and second metal layer 122 disposed within the power module. Furthermore, in the case where third metal layer 113 and fourth metal layer 123 are disposed, first insulating layer 111 and second insulating layer 121 may transfer heat received from first metal layer 112 and second metal layer 122 to third metal layer 113 and fourth metal layer 123.

[0069] The first metal layer 112 and the second metal layer 122 are arranged inside the power module to face each other, and patterns thereof may establish electrical connection between the first semiconductor chip 201 and the second semiconductor chip 202 .

[0070] On the other hand, third metal layer 113 and fourth metal layer 123 can be configured to dissipate heat transferred to third metal layer 113 and fourth metal layer 123 through heat exchange with the outside, thereby cooling the power module. This function can reduce the operating temperature of the power module, thereby enabling stable operation of the power module.

[0071] Furthermore, to enhance the cooling performance of the power module, a cooling channel may be additionally provided outside the third metal layer 113 or the fourth metal layer 123. The cooling channel may be configured, for example, as an air-cooled or water-cooled type. The cooling channel may enhance the cooling performance of the power module by increasing its cooling efficiency through the refrigerant.

[0072] On the other hand, the first to fourth metal layers 112, 122, 113, and 123 may be formed of, for example, copper (Cu), and the first insulating layer 111 and the second insulating layer 121 may be formed of ceramic. In this case, the upper substrate 110 and the lower substrate 120 may be implemented by active metal brazed (AMB) substrates or direct bonded copper (DBC) substrates.

[0073] On the other hand, the first semiconductor chip 201 can be arranged on the second metal layer 122, and the second semiconductor chip 202 can be arranged on the second metal layer 122 while being spaced apart from the first semiconductor chip 201 in the direction of the third axis. Of course, the arrangement of the first semiconductor chip 201 and the second semiconductor chip 202 is not limited to the above. For example, the second semiconductor chip 202 can be arranged in a flipped state on the metal layer 112 while also being spaced apart from the first semiconductor chip 201 in the direction of the first axis.

[0074] Each of the first semiconductor chip 201 and the second semiconductor chip 202 may be turned on / off by a switching signal, and accordingly, whether or not there is conduction between portions disposed above and below thereof may be determined.

[0075] Here, a switching signal may be input in the form of a voltage through a signal pad provided to each of the first semiconductor chip 201 and the second semiconductor chip 202. When the switching signal is input, portions arranged above and below each of the first semiconductor chip 201 and the second semiconductor chip 202 are electrically interconnected, and accordingly, current may flow through a power pad provided together with the switching pad.

[0076] On the other hand, each of the first semiconductor chip 201 and the second semiconductor chip 202 may be, for example, a switching device such as an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), etc. In addition, as a material of the first semiconductor chip 201 and the second semiconductor chip 202, silicon (Si) or silicon carbide (SiC) may be used.

[0077] On the other hand, the first spacer of the spacer 300 (that is, the first spacer 301) can extend in the vertical direction (that is, the first axis direction) and can electrically interconnect the first metal layer 112 and the second metal layer 122, thereby forming a current path so that current can flow vertically along the first axis. In addition, the first spacer 301 can be referred to as a "via spacer".

[0078] The second spacer of the spacer 300 (that is, the second spacer 302) can extend in the vertical direction (that is, the first axis direction) and can electrically interconnect the first semiconductor chip 201 and the first metal layer 112. The second spacer 302 can be arranged on the power pad of the first semiconductor chip 201, and its planar area can be determined in consideration of heat transfer efficiency. Similar to the first spacer 301, the second spacer 302 can form a current path to enable current to flow vertically along the first axis.

[0079] Furthermore, the power module according to the exemplary embodiment of the present invention may include a third spacer (that is, the third spacer 303) of the spacer 300, which is spaced apart from the second spacer 302 in the horizontal direction (the third axis direction) with the first spacer 301 interposed therebetween, while electrically interconnecting the second semiconductor chip 202 and the first metal layer 112. Each of the second spacer 302 and the third spacer 303 may also be referred to as a "chip spacer."

[0080] Each of the first spacer 301 , the second spacer 302 , and the third spacer 303 may be formed of a material having conductivity to electrically interconnect the first metal layer 112 , the second metal layer 122 , the first semiconductor chip 201 , and the like.

[0081] On the other hand, the first connection layer 410 may form a current path in a direction intersecting the direction of the current path formed between the upper substrate 110 and the lower substrate 120 and between the first spacer 301 and the second spacer 302 through the first spacer 301 and the second spacer 302. For example, the current path formed by the first connection layer 410 may enable current to flow in the horizontal direction (the third axis direction).

[0082] In order to form the above-described current path, the first connection layer 410 may be bonded to at least one of the upper substrate 110 , the lower substrate 120 , the first spacer 301 , the second spacer 302 , and the third spacer 303 .

[0083] The first connection layer 410 may be formed not to overlap the first spacer 301 and the second spacer 302 in a plane.

[0084] In more detail, the first connection layer 410 may allow at least one of the first spacer 301 and the second spacer 302 to penetrate therethrough. That is, the first connection layer 410 may allow at least one of the first spacer 301 and the second spacer 302 to penetrate therethrough in the first axis direction.

[0085] To this end, at least one through-hole 413 may be provided in the first connection layer 410 , and the first connection layer 410 may allow at least one of the first spacer 301 and the second spacer 302 to extend through the at least one through-hole 413 .

[0086] In this case, at least one through hole 413 may include at least one of a first through hole and a second through hole, wherein the first through hole is configured to allow the first spacer 301 to penetrate therethrough while including a planar area corresponding to the planar area of ​​the first spacer 301, and the second through hole is configured to allow the second spacer 302 to penetrate therethrough while including a planar area corresponding to the planar area of ​​the second spacer 302.

[0087] On the other hand, in order to form the above-mentioned current path, at least one of the first spacer 301 and the second spacer 302 can be divided into an upper part and a lower part, and the first connection layer 410 can be arranged between the upper part and the lower part of at least one of the first spacer 301 and the second spacer 302 to interconnect the upper part and the lower part.

[0088] To form a current path, the first connection layer 410 may be implemented by a conductive portion regardless of its type, such as low temperature co-fired ceramic (LTCC), a printed circuit board (PCB), metal, etc.

[0089] Because the first connection layer 410 is conductive and connected to the corresponding components of the power module, a current loop can be formed in the power module. More specifically, a current loop can be formed based on the connection relationship between the first connection layer 410 and the upper substrate 110, the lower substrate 120, the first semiconductor chip 201, the first spacer 301, the second spacer 302, etc.

[0090] In addition, the first connection layer 410 can form a current path in a direction that intersects with the direction of the current path formed by the first spacer 301 and the second spacer 302 through the pattern formed on the plane. The pattern can cut off the electrical connection between multiple regions in the first connection layer 410, thereby determining the electrical connection relationship between the various components. The pattern can also be used as an injection path for filler in the molding process. In addition, the pattern can be formed by arranging in parallel a combination of multiple separate plates that are spaced apart from each other in the horizontal direction (that is, the second axis direction or the third axis direction).

[0091] In addition, the thickness T1 of the first connection layer 410 may be greater than or equal to the thickness T2 of the power lead 501. Since a large current flows through the first connection layer 410, the thickness of the first connection layer 410 is greater than or equal to the thickness of the power lead 501 through which the large current flows, and accordingly, a thickness suitable for the large current flowing therethrough can be ensured.

[0092] Will refer to Figure 3A 、 Figure 3B 、 Figure 3C 、 Figure 3D 、 Figure 3E 、 Figure 3F and Figure 3G A more detailed description of the first connection layer 410 is provided.

[0093] The power lead 501 may be disposed on the second metal layer 122, and the first semiconductor chip 201 may be disposed on the second metal layer 122. Current may be input from the outside to the power lead 501 depending on the relationship between the power lead 501 and the outside, or current may be output from the power lead 501 to the outside. The power lead 501 may correspond to one of the negative terminal N, the positive terminal P, and the output terminal O.

[0094] On the other hand, Figure 1 and Figure 2 The arrows shown in each of the diagrams represent the flow of current. Through the first connection layer 410, a current loop can be formed in which current flows in the order of power lead 501 → second metal layer 122 → first semiconductor chip 201 → second spacer 302 → first metal layer 112 → first spacer 301 → second metal layer 122 → second semiconductor chip 202 → third spacer 303 → first connection layer 410, or in the reverse order.

[0095] Through the current path formed by the first connection layer 410, the current does not need to repeatedly flow through the first spacer 301 or the second spacer 302. As a result, the entire current loop can be simplified.

[0096] In addition, as the current loop becomes narrower, e.g. Figure 1As shown, the current superposition degree can be enhanced. Accordingly, most of the area of ​​the first connection layer 410 on the plane can correspond to the current high superposition area O1. As described above, as the current high superposition area O1 is expanded, the working efficiency of the power module can be enhanced.

[0097] On the other hand, the detailed structure of the power module according to various exemplary embodiments of the present invention may be different from the structure of the first connection layer 410. Figure 2 In the following, reference will be made to Figure 3A 、 Figure 3B 、 Figure 3C 、 Figure 3D 、 Figure 3E 、 Figure 3F and Figure 3G The detailed structure of the first connection layer 410 is described.

[0098] Figure 3A and Figure 3B are schematic diagrams illustrating the structure of a first connection layer according to various exemplary embodiments of the present invention.

[0099] First, refer to Figure 3A , the first connection layer 410 may include a substrate corresponding portion 411 and a lead corresponding portion 412 .

[0100] The substrate corresponding portion 411 may overlap the upper substrate 110 and the lower substrate 120 in a plane at least at a portion thereof, and accordingly, the degree of current superposition may be increased.

[0101] In this case, the plurality of through holes 413 as described above may be formed in the substrate corresponding portion 411. The first spacer 301, the second spacer 302, the third spacer 303, etc. may extend through the substrate corresponding portion 411 along the plurality of through holes 413, respectively.

[0102] The lead corresponding portion 412 may extend from the substrate corresponding portion 411 to protrude outward in a plane from the upper substrate 110 and the lower substrate 120. Current may be input to and output from the lead corresponding portion 412. In addition, the horizontal width D1 of the lead corresponding portion 412 may be smaller than the horizontal width D2 of the substrate corresponding portion 411.

[0103] Lead corresponding portion 412 may include one of a positive terminal, a negative terminal, and an output terminal, or may be connected to one of a positive terminal, a negative terminal, and an output terminal. In this case, power lead 501 may include one of the remaining terminals of a positive terminal, a negative terminal, and an output terminal.

[0104] On the other hand, although the lead corresponding portion 412 may be arranged to be spaced apart upward from the power lead 501 so that the lead corresponding portion 412 overlaps with the power lead 501 in a plane, as shown in FIG. Figure 2 As shown, the positional relationship between the lead corresponding portion 412 and the power lead 501 is not limited to the above situation, and the lead corresponding portion 412 can be arranged parallel to the power lead 501 while being spaced apart from the power lead 501 in the horizontal direction.

[0105] refer to Figure 3B , different from Figure 3A , the first connection layer 410 may be implemented by a plurality of separate boards. In this case, the first spacer 301, the second spacer 302, and the third spacer 303 may extend through the first connection layer 410 not only along the through hole 413 but also along the spaces between the plurality of boards.

[0106] refer to Figure 3C and Figure 3D , the third spacer 303 may not extend through the first connection layer 410 (specifically, the substrate corresponding portion 411), which is consistent with Figure 3A and Figure 3B That is, the first connection layer 410 may not overlap with the third spacer 301 in a plane.

[0107] In this case, the substrate corresponding portion 411 may be bonded to one of the side surface of the third spacer 303, the lower surface of the upper substrate 110, and the upper surface of the lower substrate 120. In addition, even if the third spacer 303 does not extend through the first connection layer 410, as shown in FIG. Figure 3D As shown, the first connection layer 410 may also be implemented by a plurality of separate plates.

[0108] refer to Figure 3E , not only the third spacer 303 but also the second spacer 302 may not extend through the first connection layer 410. For this structure, the planar shape of the first connection layer 410 may be determined in consideration of the arrangement of the second spacer 302 and the third spacer 303.

[0109] refer to Figure 3F , any one of the first spacer 301, the second spacer 302, and the third spacer 303 may not pass through the first connection layer 410. For this structure, the planar shape of the first connection layer 410 may be determined in consideration of the arrangement of the first spacer 301, the second spacer 302, and the third spacer 303.

[0110] refer to Figure 3G , the lead corresponding portion 412 may include separate parts, and the separate parts may be used as a negative terminal, an output terminal, and a positive terminal, respectively.

[0111] When the structure can form a current path in a direction crossing the direction of the current path formed between the first spacer 301 and the second spacer 302 through the first spacer 301 and the second spacer 302, Figure 3A 、 Figure 3B 、 Figure 3C 、 Figure 3D 、 Figure 3E 、 Figure 3F and Figure 3G Any structure different from the structure of the exemplary embodiment may be applied to the structure of the first connection layer 410 .

[0112] In the following, reference will be made to Figure 4 、 Figure 5 、 Figure 6 and Figure 7 A current loop of the power module according to the structure of the first connection layer 410 will be described.

[0113] Figure 4 、 Figure 5 、 Figure 6 and Figure 7 Schematic diagrams illustrating current loops based on different structures of the first connection layer according to various exemplary embodiments of the present invention, respectively.

[0114] In more detail, Figure 4 and Figure 5 An embodiment in which the lead corresponding portion 412 includes a negative terminal N and the power lead 501 is implemented by a positive terminal P is respectively shown. Figure 6 An exemplary embodiment is shown in which the lead corresponding portion 412 is connected to the negative terminal N and the power lead 501 is implemented by the positive terminal P. Figure 7 An exemplary embodiment is shown where the second connection layer 420 is arranged together with the first connection layer 410 .

[0115] First, refer to Figure 4 and Figure 5 , the first connection layer 410 may form a portion of a current loop including the lead corresponding portion 412 and the power lead 501 as opposite ends thereof, respectively.

[0116] In this case, if Figure 4 As shown, the lead corresponding portion 412 can be arranged to be spaced apart upward from the power lead 501 so that the lead corresponding portion 412 overlaps with the power lead 501 in a plane. With such an arrangement, the degree of current superposition can be further enhanced.

[0117] and Figure 4 The exemplary embodiments are different, such as Figure 5As shown, lead corresponding portion 412 may be arranged parallel to power lead 501 while being horizontally spaced apart from power lead 501. With this arrangement, lead corresponding portion 412 may bend downward from substrate corresponding portion 411 and then may extend outward from upper substrate 110 and lower substrate 120.

[0118] On the other hand, the substrate corresponding portion 411 may be bent upward between the first spacer 301 and the third spacer 303 and coupled to the upper substrate 110 .

[0119] According to the above structure, a current loop can be formed in which current flows in the order of power lead 501 → second metal layer 122 → first semiconductor chip 201 → second spacer 302 → first metal layer 112 → first spacer 301 → second metal layer 122 → second semiconductor chip 202 → third spacer 303 → first metal layer 122 → first connection layer 410 or the reverse order.

[0120] On the other hand, Figure 4 and Figure 5 Differently, the lead corresponding portion 412 may include the positive terminal P or may be connected to the positive terminal P. In this case, the substrate corresponding portion 411 may be bent downward between the first spacer 301 and the third spacer 303 and coupled to the lower substrate 110 .

[0121] In this case, a current loop can be formed in which current flows in the order of power lead 501 → second metal layer 122 → first semiconductor chip 201 → second spacer 302 → first metal layer 112 → first spacer 301 → second metal layer 122 → second semiconductor chip 202 → third spacer 303 → first metal layer 122 → first connection layer 410 or the reverse order.

[0122] refer to Figure 6 , the power lead 501 and the other power lead 501′ can be respectively provided on the second metal layer 122 and the first metal layer 112. In this case, the lead corresponding portion 412 of the first connection layer 410 can be bent upward from the substrate corresponding portion 411 and bonded to the first metal layer 112, and accordingly, can be connected to the power lead 501′ provided on the first metal layer 112.

[0123] The substrate corresponding portion 411 may extend upward between the first spacer 301 and the third spacer 303 and be coupled to the second metal layer 122 .

[0124] According to the above structure, a current loop can be formed in which current flows in the order of power lead 501 → second metal layer 122 → first semiconductor chip 201 → second spacer 302 → first metal layer 112 → first spacer 301 → second metal layer 122 → second semiconductor chip 202 → third spacer 303 → first metal layer 122 → first connection layer 410 → first metal layer 112 → power lead 501' or the reverse order.

[0125] On the other hand, reference Figure 7 , the first connection layer 410 may be arranged in parallel to the upper substrate 110 and the lower substrate 120 , and accordingly, an increase in the degree of current superposition may be achieved.

[0126] The first connection layer 410 may include a negative terminal N, and the third spacer 303 may extend through the first connection layer 410 .

[0127] In addition, a second connection layer 420 may be provided. The second connection layer 420 may be arranged to be vertically spaced apart from the first connection layer 410 while forming a current path in a direction intersecting with a direction of a current path formed between the upper substrate 110 and the lower substrate 120 and between the first spacer 301 and the second spacer 302 through the first spacer 301 and the second spacer 302.

[0128] In this case, the second connection layer 420 may include the remaining terminals in addition to the terminals included in the first connection layer 410 and the power lead 501. That is, when the first connection layer 410 includes the negative terminal N and the power lead 501 includes the positive terminal P, the second connection layer 420 may include the output terminal O.

[0129] Based on the above structure, a current loop can be formed in which current flows in the order of power lead 501 → second metal layer 122 → first semiconductor chip 201 → second spacer 302 → first metal layer 112 → first spacer 301 → second metal layer 122 → second semiconductor chip 202 → third spacer 303 → first connection layer 410, or in the reverse order. In this case, AC current can be output through the second connection layer 420.

[0130] On the other hand, this current loop can be changed according to the metal layer structure of the upper substrate 110 and the lower substrate 120. This will be referred to below. Figures 8A to 8C to describe.

[0131] Figure 8A 、 Figure 8B and Figure 8C 1 and 2 are schematic diagrams respectively illustrating current loops based on different structures of a first metal layer and a second metal layer according to various exemplary embodiments of the present invention.

[0132] refer to Figures 8A to 8C In the power module according to the exemplary embodiment of the present invention, at least one of the first metal layer 112 and the second metal layer 122 may be formed of a plurality of horizontally spaced portions. In this case, the first connection layer 410 may extend vertically between the first spacer 301 and the second spacer 302 so that the first connection layer 410 is electrically connected to at least one of the plurality of portions. In more detail, Figure 8A and Figure 8B A structure is shown in which each of the first metal layer 112 and the second metal layer 122 is formed of a plurality of horizontally spaced-apart portions. Figure 8B A structure is shown in which a plurality of horizontally spaced apart portions of the first metal layer 122 are fixed to a single first insulating layer 111. In addition, Figure 8C It is shown that, among the first metal layer 112 and the second metal layer 122 , only the first metal layer 112 is formed of a plurality of horizontally spaced portions while the second metal layer 122 is formed into a structure including an integral structure.

[0133] The first connection layer 410 may extend vertically between the first spacer 301 and the second spacer 302 and be electrically connected to one of the separated portions of the first metal layer 112 or the second metal layer 122. Accordingly, a current path in the same direction as the current path formed by the first spacer 310 and the second spacer 320 may also be formed.

[0134] Based on the above structure, a current loop can be formed in which current flows in the order of power lead 501 → second metal layer 122 → first spacer 301 → first metal layer 112 → first connection layer 410 → second spacer 302 → first semiconductor chip 201 → second metal layer 122 or the reverse order.

[0135] According to various embodiments of the present invention as described above, a current loop of a power module can be simplified by additionally disposing a connection layer between an upper substrate and a lower substrate while including a structure through which a spacer extends.

[0136] Furthermore, the current superposition effect can be enhanced by simplifying the current loop via the connection layer.

[0137] Furthermore, the sizes of insulating patterns and via spacers for forming a current loop can be reduced, thereby achieving reduction in module size.

[0138] In addition, the reliability of the power module can be enhanced by simplifying the current loop and reducing the module size.

[0139] In an exemplary embodiment of the present invention, a vehicle may be referred to as a concept based on various means of transportation. In some cases, a vehicle may be interpreted as being based on a concept that includes not only various land vehicles such as cars, motorcycles, trucks, and buses that travel on roads, but also various means of transportation such as airplanes, drones, and ships.

[0140] For ease of explanation and accurate definition in the appended claims, the terms "up," "down," "inside," "outside," "above," "below," "upward," "downward," "front," "back," "inside," "outside," "inwardly," "outwardly," "interior," "exterior," "inside," "outside," "forward," and "rearward" are used to describe features of the exemplary embodiments with reference to the positions of such features as shown in the accompanying drawings. It will be further understood that the term "connected" or its derivatives refers to both direct and indirect connections.

[0141] The term "and / or" may include any one of a plurality of related listed items or a combination of a plurality of related listed items. For example, "A and / or B" includes all three cases such as "A", "B" and "A and B".

[0142] In an exemplary embodiment of the present invention, “at least one of A and B” may mean “at least one of A or B” or “at least one of a combination of at least one of A and B.” Furthermore, “one or more of A and B” may mean “one or more of A or B” or “one or more of a combination of at least one of A and B.”

[0143] In this specification, unless otherwise stated, a singular expression includes a plural expression unless the context clearly indicates otherwise.

[0144] In exemplary embodiments of the present invention, it should be understood that terms such as “including” or “having” are intended to specify that the features, values, steps, operations, elements, parts, or a combination thereof described in the specification are present, and do not exclude the possibility of adding or existing one or more other features, values, steps, operations, elements, parts, or a combination thereof.

[0145] According to the exemplary embodiment of the present invention, components may be combined with each other to be implemented as one, or some components may be omitted.

[0146] The foregoing descriptions of specific exemplary embodiments of the present invention are presented for purposes of illustration and description. They are not intended to be exhaustive or to limit the invention to the precise forms disclosed, and it is apparent that many modified and varied embodiments are possible in light of the foregoing teachings. The exemplary embodiments are chosen and described in order to explain the specific principles of the invention and its practical application, thereby enabling others skilled in the art to make and utilize the various exemplary embodiments of the invention and its various alternatives and modifications. The scope of the invention is intended to be defined by the appended claims and their equivalents.

Claims

1. A power module, comprising: an upper substrate comprising a first metal layer; a lower substrate disposed below the upper substrate, the lower substrate comprising a second metal layer facing the first metal layer; a first semiconductor chip disposed on the second metal layer; a first spacer electrically interconnecting the first metal layer and the second metal layer while extending vertically; a second spacer electrically interconnecting the first semiconductor chip and the first metal layer while extending vertically; a first connection layer configured to form a current path between the upper substrate and the lower substrate and between the first spacer and the second spacer in a direction intersecting a direction of a current path formed by the first spacer and the second spacer; as well as The power lead is arranged on at least one of the first metal layer or the second metal layer.

2. The power module according to claim 1, wherein: The first connection layer does not overlap with the first spacer and the second spacer in a plane.

3. The power module according to claim 2, wherein: At least one of the first spacer or the second spacer is formed to pass through the first connection layer.

4. The power module according to claim 3, wherein: The first connection layer is provided with at least one of a first through hole or a second through hole, wherein the first through hole includes a planar area corresponding to the planar area of ​​the first spacer and the first spacer penetrates the first through hole, and the second through hole includes a planar area corresponding to the planar area of ​​the second spacer and the second spacer penetrates the second through hole.

5. The power module according to claim 1, wherein: At least one of the first spacer or the second spacer includes an upper portion and a lower portion, The first connection layer is disposed between the upper portion and the lower portion to interconnect the upper portion and the lower portion of at least one of the first spacer or the second spacer.

6. The power module according to claim 1, wherein: The first connection layer forms a current path in a direction intersecting with a direction of a current path formed by the first spacer and the second spacer through a pattern formed on a plane.

7. The power module according to claim 6, wherein: The pattern is formed by a combination of a plurality of divided plates arranged in parallel while being horizontally spaced apart from each other.

8. The power module according to claim 1, wherein: The vertical thickness of the first connection layer is greater than or equal to the vertical thickness of the power lead.

9. The power module according to claim 1, wherein: The first connection layer includes: a substrate corresponding portion that overlaps the upper substrate and the lower substrate at least partially in a plane; and Lead corresponding portions extend from the substrate corresponding portions to protrude outwardly from the upper substrate and the lower substrate in a plane, the lead corresponding portions allowing current to be input and output thereto.

10. The power module according to claim 9, wherein: The lead corresponding portion includes one of a positive terminal, a negative terminal and an output terminal, or is connected to one of a positive terminal, a negative terminal and an output terminal, The power lead includes a positive terminal, a negative terminal, and one of the remaining terminals of the output terminal.

11. The power module according to claim 10, further comprising: a second connection layer arranged to be vertically spaced apart from the first connection layer and configured to form a current path between the upper substrate and the lower substrate and between the first spacer and the second spacer in a direction intersecting a direction of a current path formed by the first spacer and the second spacer, The second connection layer includes another one of the positive terminal, the negative terminal, and the output terminal, or is connected to another one of the positive terminal, the negative terminal, and the output terminal.

12. The power module according to claim 9, wherein: The lead corresponding portion is spaced apart upward from the power lead to overlap with the power lead in a plane.

13. The power module according to claim 9, wherein: The lead corresponding portion is bent downward from the substrate corresponding portion and extends outward from the upper substrate and the lower substrate so that the lead corresponding portion is arranged parallel to the power lead while being horizontally spaced apart from the power lead.

14. The power module according to claim 9, wherein: The substrate corresponding portion is arranged parallel to the upper substrate and the lower substrate while being vertically spaced apart from the upper substrate and the lower substrate.

15. The power module according to claim 1, further comprising: a third spacer arranged to be horizontally spaced apart from the second spacer, the first spacer being arranged between the second spacer and the third spacer, The first connection layer is bonded to at least one of the upper substrate, the lower substrate, the first spacer, the second spacer, or the third spacer.

16. The power module according to claim 15, wherein: The first connection layer does not overlap with the third spacer in a plane.

17. The power module according to claim 16, wherein: The first connection layer is bent upward or downward between the first spacer and the third spacer and is bonded to the upper substrate or the lower substrate.

18. The power module according to claim 16, wherein: The third spacer is formed through the first connection layer.

19. The power module according to claim 16, wherein: The first connection layer is horizontally bonded to a side surface of the third spacer.

20. The power module according to claim 1, wherein: at least one of the first metal layer or the second metal layer is formed of a plurality of horizontally spaced apart portions, The first connection layer vertically extends between the first spacer and the second spacer and is electrically connected to at least one of the plurality of portions.