Evaluation Method for Bus Voltage Stability Domain of Cascaded Systems under Small Current Disturbance

Abstract

This invention discloses a method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances, relating to the field of power supply and distribution system technology. The method includes the following steps: constructing an impedance ratio test circuit; introducing a non-intrusive current signal disturbance into the bus voltage of the cascaded system using an impedance analyzer to excite the operation of the cascaded system feedback loop; simplifying the Middlebrook stability criterion to obtain an improved stability criterion; integrating the amplitude-frequency Bode plot data corresponding to each load operating point obtained from the impedance ratio test circuit and fitting the amplitude-frequency Bode plot data of each load operating point using Matlab to obtain a fitted surface based on the test results; comparing the fitted surface with the judgment region determined based on the stability criterion to determine the stable operating boundary of the cascaded system over a wide load range. This invention solves the bus voltage stability problem of black-box cascaded converter systems under a wide load range and proposes a test method that does not require intrusion into the bus line.

Description

Technical Field

[0001] This invention belongs to the field of power supply and distribution system technology, and particularly relates to a method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances. Background Technology

[0002] With the maturation and development of power electronic conversion technology, an increasing number of microgrid systems, such as ships, aircraft, unmanned surface vessels, and decentralized photovoltaic power stations, are adopting cascaded power electronic converters on a large scale. Figure 1 As shown. However, power distribution systems based on power electronic converters need to meet system stability requirements in applications such as microgrids and decentralized photovoltaic power plants. Therefore, conducting stability research among cascaded converter modules has significant academic research and application value.

[0003] However, since each power supply (converter module) is manufactured independently by different power supply manufacturers, the power supply topology and modulation technology are usually not disclosed to users. Therefore, it is impossible to model and analyze the cascaded system using traditional methods based on known circuits and control. In addition, on the user side, it is necessary to quantify the stability margin of the cascaded system at different output power levels to ensure that the user-side system can meet the power demand of the load across the entire power range.

[0004] Existing stability modeling and analysis methods mostly focus on white-box stability analysis methods with known circuit parameters to analyze cascaded systems, primarily using eigenvalues, Lyapunov stability criteria, Nyquist plots, and other related criteria to achieve system stability analysis. The main drawbacks of this approach are: ① it requires thorough knowledge of circuit topology parameters and control modulation methods; ② it involves enormous computational demands. It is difficult to apply to power supply and distribution systems with existing power sources, and it is also difficult to determine the system's stability margin.

[0005] To avoid the above problems, the inventors previously proposed an impedance ratio testing circuit based on a small voltage interference signal, patent number CN116644699B, such as... Figure 2 As shown, the impedance ratio test circuit can be used to perform bus stability analysis of a cascaded system. This method does not require prior knowledge of circuit parameters and control methods; instead, it primarily relies on test results to model the system's stability and assess its stability margin. However, in practical applications, this invention requires invasive testing of the system bus. For many application scenarios where the lines are already fixed, additional opening of the bus ports is necessary, resulting in relatively complex operation and insufficient convenience.

[0006] Therefore, based on the duality principle of voltage and current, such as Figure 3As shown, this invention proposes a method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances. It is a method for analyzing the bus voltage stability of a cascaded circuit with a wide load range based on small current interference signals. It mainly solves the problem of bus voltage stability of black box cascaded converter systems under a wide load range and proposes a test method that does not require intrusion into the bus line. Summary of the Invention

[0007] The purpose of this invention is to provide a method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances, in order to solve the problems of existing cascaded system bus stability analysis methods mentioned in the background art, which require invasive testing of the system bus, resulting in relatively complex operation and insufficient convenience.

[0008] To achieve the above objectives, the present invention employs the following technical solution:

[0009] The method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances includes the following steps:

[0010] S1. Construct the impedance ratio test circuit;

[0011] The impedance ratio test circuit includes a source-side converter, a load-side converter, and an impedance analyzer; the source-side converter and the load-side converter form a cascaded system; the impedance analyzer introduces non-invasive current signal interference into the bus voltage of the cascaded system to excite the operation of the cascaded system feedback loop;

[0012] S2. The Middlebrook stability criterion is simplified to obtain the improved stability criterion;

[0013] The improved stability criterion is: converter impedance ratio |Z so / Z Li Any point on the curve does not enter the forbidden region; the forbidden region is specifically a circle centered at coordinates (-1, 0) with a radius of... A circular area;

[0014] S3. The amplitude-frequency Bode plot data of each load operating point obtained from the impedance ratio test circuit are integrated and fitted using Matlab to obtain a fitted surface based on the test results.

[0015] S4. Compare the fitted surface with the judgment region determined based on the stability criterion to determine the stable operating boundary of the cascaded system over a wide load range.

[0016] Preferably, the cascaded system feedback loop is activated in S1, as follows:

[0017] The impedance analyzer includes a measurement end and an interference end, both of which are connected in parallel to the bus of the cascaded system.

[0018] The interference terminal injects non-intrusive interference currents Δi of different frequencies into the bus of the cascaded system. p This induces the nonlinear operating modes of the cascaded system; the measurement terminal performs non-invasive current Δi s Measurement.

[0019] Preferably, step S2 is as follows:

[0020] |Z so / Z Li The distance from any point on the curve to the point (-1, 0) is defined as D, i.e.

[0021]

[0022] The output impedance Z of the source-side converter so The input impedance Z of the load-side converter Li satisfy

[0023]

[0024] Substituting equation (2) into equation (1) yields

[0025]

[0026] At the same time, consider △i L =△i p +△i s Then equation (3) can be rewritten as follows:

[0027]

[0028] From equation (4), we can see that the specific criterion corresponding to the forbidden region is, |△i s / △i p | Less than 1.156.

[0029] Preferably, step S3 is as follows:

[0030] The amplitude-frequency Bode plot data of each load operating point are fitted using Matlab's griddata to obtain the fitted surface.

[0031] Preferably, step S4 is as follows:

[0032] In the Bode plot dB coordinates, this is converted to |Δi s / △i pThe amplitude curves in the amplitude-frequency response curves must all be below 1.25dB. This 1.25dB corresponds to 1.156, i.e., 20log1.156 = 1.25dB, thus meeting the stability requirements of the cascaded system.

[0033] Compared with the prior art, the beneficial effects of the present invention are:

[0034] (1) The method of the present invention can realize the quantitative analysis of system bus stability without the need for circuit topology and control method.

[0035] (2) The method in this invention can achieve impedance ratio measurement and stability analysis of cascaded circuits without intruding into the busbar, and can obtain the stable operating boundary surface of the system with a wide load range.

[0036] (3) The method in this invention achieves quantitative evaluation of the stability of cascaded systems with a wide load operating range by analyzing the small signal stability of multiple load operating points; and the accuracy can be enhanced by adding load test points.

[0037] (4) The method in this invention can realize the quantitative stability analysis and estimation of cascaded systems without the need for internal circuit parameters and control parameters, which is more intuitive and easier to operate.

[0038] (5) The method in this invention only requires recording test data and processing it through Matlab program to obtain a visualized system stable operation boundary surface, which has the advantage of simple operation. Attached Figure Description

[0039] Figure 1 The background section shows a cascaded converter circuit diagram.

[0040] Figure 2 This is a circuit diagram for testing the source-side and load-side impedance ratio under low-voltage interference signals in the background technology.

[0041] Figure 3 This is a schematic diagram of the source-side and load-side impedance ratio test circuit under low current interference signal in this invention;

[0042] Figure 4 This is the actual test circuit diagram of the source-side and load-side converter impedance ratio based on a small current signal in this invention;

[0043] Figure 5 This is a schematic diagram of the polar coordinate forbidden region in this invention (5(a) is a schematic diagram of the polar coordinate forbidden region corresponding to the stability criterion in the prior art); Figure 5 (b) is a schematic diagram of the polar coordinate forbidden region corresponding to the simplified stability criterion;

[0044] Figure 6This is a flowchart of the bus voltage stability domain analysis method for cascaded systems under a wide load range in this invention;

[0045] Figure 7 This is the circuit schematic diagram for the case analysis in this invention;

[0046] Figure 8 This is the fitted stable operating boundary surface diagram obtained from the amplitude-frequency baud rate of the case analysis circuit in this invention;

[0047] Figure 9 This is a time-domain waveform verification result diagram for the case analysis in this invention. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] Example 1:

[0050] The method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances is based on the principle of introducing a sinusoidal small-signal disturbance into the bus voltage of the cascaded circuit to excite the operation of the system feedback loop. The nonlinear operating modes within different frequency small-signal ranges are then used to reflect the converter impedance ratio |Z| on the source and load sides. so / Z Li The system then uses the test results to perform modeling and analysis, ultimately completing the stability analysis of the wide-range cascaded system. Figure 3 This describes the principle of an impedance ratio test circuit based on current interference. The main steps include:

[0051] Step 1: Construct a test circuit for the impedance ratio of the source-side and load-side converters based on a small current signal.

[0052] Figure 4 A specific impedance ratio test circuit diagram is given, which consists of a source-side converter, a load-side converter, and an impedance analyzer.

[0053] The source-side converter and the load-side converter form a cascaded system; the impedance analyzer includes a measurement end and an interference end, both of which are connected in parallel to the bus of the cascaded system.

[0054] The interference terminal injects non-intrusive interference currents Δi of different frequencies into the bus of the cascaded system. p This excites the nonlinear operating modes of the cascaded system; non-invasive current Δi is measured at the measurement end. s Measurement.

[0055] Step 2: Determine the stability judgment criteria.

[0056] According to existing literature, Figure 5 (a) provides the specific operating region boundary of the stability criterion corresponding to this invention. Its stability meaning is that when... Figure 5 (a) Impedance ratio |Z so / Z Li The fact that the curve does not enter the forbidden region in any small-signal frequency domain indicates that the bus of the cascaded system under study is stable. This conclusion is derived from the classic Middlebrook stability criterion.

[0057] However, this stability criterion requires the use of a phase diagram for stability assessment, increasing its practical difficulty. Therefore, this invention simplifies it as follows: Figure 5 (b) shows the simplified stability criterion. This simplified stability criterion still retains most of the forbidden region near (-1, 0) and ensures that the radius of the forbidden region to (-1, 0) is [value missing]. Furthermore, the simplified stability criterion does not require consideration of phase angle, making it easier to derive the corresponding stability boundary for subsequent stability assessments.

[0058] Therefore, the stability criterion in this application is as follows: converter impedance ratio |Z so / Z Li |The curve in polar coordinates, as long as it doesn't enter such a state as... Figure 5 (b) shows the forbidden region, which allows the system to remain stable. This requires |Z so / Z Li Any point on the curve does not enter the circle with radius centered at (-1,0). The forbidden region. Its mathematical derivation is as follows, where |Z so / Z Li The distance from any point on the curve to the point (-1, 0) is defined as D, i.e.

[0059]

[0060] according to Figure 3 It can be seen that the output impedance Z of the source-side converter so The input impedance Z of the load-side converter Li satisfy

[0061]

[0062] Substituting equation (2) into equation (1) yields...

[0063]

[0064] On the other hand, considering Figure 3 △i L =△i p +△i s Then equation (3) can be rewritten as

[0065]

[0066] From equation (4), we can see that Figure 5 (b) The specific criteria corresponding to the forbidden region can be converted into |Δi| in the Bode plot dB coordinates. s / △i p The amplitude curves in the amplitude-frequency response curves must all be below 1.25dB (corresponding to 1.156, i.e., 20log1.156=1.25dB) to meet the system stability requirements.

[0067] Step 3: Test data for each load operating point obtained from the impedance ratio test circuit.

[0068] Figure 6 The steps for performing boundary surface fitting for stable operation are given. Based on the impedance ratio test circuit, the impedance analyzer injects interference signals Δi of different frequencies into the bus. p This induces nonlinear operating modes in the system, and by measuring the Bode plot of key parameters, relevant data is obtained, thereby enabling stability analysis of a single operating point of the system. Similar to the voltage interference signal injection method, it is based on... Figure 4 In the medium impedance ratio test circuit, each time a current interference signal is injected into the bus, the test circuit must also ensure that it operates at a load point. This is because this test is derived from a small-signal measurement method based on the steady-state operating point; therefore, the small-signal operating test conditions must be met for each load test point. After the test, this invention obtains the corresponding amplitude-frequency Bode plot data of the test circuit at multiple load operating points.

[0069] In addition, the method of the present invention can enhance the accuracy of stability margin analysis results by increasing the number of load operating points to obtain richer data information.

[0070] Step 4: Integrate the load running point data of each test and fit it using the griddata fitting function in Matlab to obtain a fitted surface based on the test results.

[0071] Step 5: Compare the output fitted surface with the judgment region determined based on the stability criterion to determine the stable operating boundary of the system over a wide load range.

[0072] That is, in the Bode plot dB coordinates, it is converted to |△i s / △i pThe amplitude curves in the amplitude-frequency response curves must all be below 1.25dB to meet the system stability requirements.

[0073] Experimental verification:

[0074] like Figure 7 As shown, to verify the feasibility of the stability analysis method for black box cascaded systems under a wide load range proposed in this invention, a simple cascaded circuit system of boost and buck circuits was constructed using the high-performance Saber simulation software. The front stage is mainly a boost circuit controlled by a single voltage loop, which raises the 24V voltage to 180V, and then the 180V is reduced to 12V by the subsequent buck circuit to power the subsequent circuit.

[0075] The specific parameters of the circuit analyzed in this case study are as follows: DC input RMS value is 24V, inductance L of the pre-stage boost circuit is 50uH, bus support capacitor is 200uF, bus voltage is 180V, and switching frequency is 50kHz; inductance of the post-stage buck circuit is 50uH, output capacitor is 1000uF, output voltage is 12V, and switching frequency is 50kHz. All switching transistors in this circuit are ideal devices. The PI parameters of the pre-stage boost circuit are P=3 and I=200; the PI parameters of the post-stage buck circuit are P=10 and I=100. Note that the above circuit parameters were not used to construct the model in this case study; this section only describes the specific parameters of the constructed simulation circuit to facilitate verification of the correctness of this invention by other skilled personnel.

[0076] Through such Figure 6 The analytical steps of the present invention shown can yield the following results: Figure 8 The case study illustrates the stable operation of the circuit's boundary surface. (From...) Figure 8 It can be seen that: ① The stability margin of the circuit system in the case study gradually decreases as the load power increases, which is consistent with the actual situation; ② Under these parameters, the cascaded system enters the unstable region when the output power is around 93W, posing a risk to stable operation.

[0077] Figure 9 The time-domain waveform of the circuit used in the case study is provided. Figure 9 It can be seen that as the system load power increases, the system output voltage ripple also gradually increases. Moreover, when the system load power increases to 96W, the system output voltage can no longer operate at 180V. The time-domain waveform of the simulated circuit verifies the theoretical analysis results in the frequency domain.

[0078] Experimental Summary: This invention proposes a method for analyzing the bus voltage stability of cascaded systems based on current interference. Without knowing the circuit topology and control methods, and without intruding into the bus system wiring, it can estimate the stability margin of the cascaded converter over a wide load operating range based on impedance ratio test results, thus achieving system stability analysis. Compared to existing white-box (i.e., knowing the circuit topology and control) methods for analyzing the bus voltage stability of cascaded converters, this method is more practical; compared to stability analysis methods based on voltage interference, it is simpler and more convenient to operate.

[0079] The above description is only for the purpose of helping to understand the method and core essence of the present invention, but the scope of protection of the present invention is not limited thereto. For those skilled in the art, any equivalent substitutions or modifications made to the technical solution and inventive concept disclosed in the present invention within the scope of the technology disclosed in the present invention should be covered within the scope of protection of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances, characterized in that, Includes the following steps: S1. Construct the impedance ratio test circuit; The impedance ratio test circuit includes a source-side converter, a load-side converter, and an impedance analyzer; the source-side converter and the load-side converter form a cascaded system; the impedance analyzer introduces non-invasive current signal interference into the bus voltage of the cascaded system to excite the operation of the cascaded system feedback loop; S2. The Middlebrook stability criterion is simplified to obtain the improved stability criterion; The improved stability criterion is: converter impedance ratio |Z so / Z Li Any point on the curve does not enter the forbidden region; the forbidden region is specifically a circle centered at coordinates (-1, 0) with a radius of... A circular area; Will |Z so / Z Li The distance from any point on the curve to the point (-1, 0) is defined as... D ,Right now (1) The output impedance Z of the source-side converter so The input impedance Z of the load-side converter Li satisfy (2) Substituting equation (2) into equation (1) yields (3) At the same time, consider △ i L =△ i p +△ i s Then equation (3) can be rewritten as follows: (4) From equation (4), we can see that the specific criterion corresponding to the forbidden region is, |△ i s / △ i p | Less than 1.156; Among them, △ i p It is a non-invasive interference current; △ i s It is a non-invasive current; △ V bus The output voltage of the cascaded system; S3. The amplitude-frequency Bode plot data of each load operating point obtained from the impedance ratio test circuit are integrated and fitted using Matlab to obtain a fitted surface based on the test results. S4. Compare the fitted surface with the judgment region determined based on the stability criterion to determine the stable operating boundary of the cascaded system over a wide load range. In the Bode plot dB coordinates, convert to |△ i s / △ i p The amplitude curves in the amplitude-frequency response curves must all be below 1.25dB to meet the stability requirements of the cascaded system.

2. The method for evaluating the bus voltage stability domain of a cascaded system under small current disturbances according to claim 1, characterized in that, The cascaded system feedback loop in S1 is activated as follows: The impedance analyzer includes a measurement end and an interference end, both of which are connected in parallel to the bus of the cascaded system. The interference terminal injects non-intrusive interference currents Δ of different frequencies into the bus of the cascaded system. i p This induces the nonlinear operating modes of the cascaded system; the measurement terminal performs non-invasive current Δ... i s Measurement.

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