High-voltage light-emitting diode, manufacturing method thereof and light-emitting device

Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a high-voltage light-emitting diode, a manufacturing method thereof and a light-emitting device.The high-voltage light-emitting diode comprises a substrate, a plurality of light-emitting units and a plurality of insulating layers, the light-emitting units and the insulating layers are located on the substrate, and the adjacent light-emitting units are spaced through isolation grooves; the isolation groove comprises a first isolation groove and a second isolation groove, the first isolation groove is communicated with the second isolation groove, the insulating layer is exposed out of the bottom of the first isolation groove, the substrate is exposed out of the bottom of the second isolation groove, and the light-emitting units are electrically connected through bridging electrodes arranged at the first isolation groove. According to the invention, large light-emitting area loss can be avoided, the defect of electric leakage short circuit can be improved, and the light-emitting brightness and yield of the high-voltage light-emitting diode can be finally improved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a high-voltage light-emitting diode, a manufacturing method thereof, and a light-emitting device. Background Art

[0002] High-voltage light-emitting diodes are a type of semiconductor solid-state light-emitting device that has the advantages of high operating voltage, low driving current, low packaging cost, high warm white light efficiency, and low line loss. They are widely used in various fields.

[0003] In high-voltage light-emitting diodes, the epitaxial structure 3' is often divided into a number of light-emitting units 30' using isolation grooves 4', and then the isolation grooves 4' are filled with an insulating layer 2' at the locations where bridges are required. Finally, the light-emitting units 30' are connected in series through bridge electrodes 6'. Figure 13 However, the high-voltage light-emitting diode with the above structure will lose a large light-emitting area and has the risk of leakage and short circuit, which ultimately affects the brightness and yield of the high-voltage light-emitting diode. Summary of the Invention

[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a high-voltage light-emitting diode and a manufacturing method thereof, and a light-emitting device, so as to reduce the loss of light-emitting area and avoid leakage short circuit.

[0005] According to a first aspect of the present invention, the present invention provides a high-voltage light-emitting diode, characterized in that it includes a substrate, a plurality of light-emitting units located on the substrate, and a plurality of insulating layers, adjacent light-emitting units are separated by isolation grooves, and the isolation grooves include a first isolation groove and a second isolation groove, wherein the first isolation groove and the second isolation groove are connected, the bottom of the first isolation groove exposes the insulating layer, and the bottom of the second isolation groove exposes the substrate, and each light-emitting unit is electrically connected through a bridging electrode arranged at the first isolation groove.

[0006] In some embodiments, a depth of the first isolation trench is smaller than a depth of the second isolation trench.

[0007] In some embodiments, a partial surface of the insulating layer is sandwiched between the light emitting unit and the substrate.

[0008] In some embodiments, the sidewall of the first isolation trench includes a first slope and a second slope, the first slope is closer to the insulating layer than the second slope, wherein the first slope forms an angle A with the upper surface of the insulating layer, and the second slope forms an angle B with the horizontal plane, and the angle A is smaller than the angle B.

[0009] In some embodiments, the angle A is less than 90 degrees, and the angle B is greater than 90 degrees and less than 180 degrees.

[0010] In some embodiments, along the vertical direction, the height of the first inclined surface is H1, the height of the second inclined surface is H2, and H1<H2.

[0011] In some embodiments, an angle C is formed between the sidewall of the second isolation trench and the upper surface of the substrate, and the angle C is less than 90 degrees.

[0012] In some embodiments, a surface of the insulating layer exposed by the first isolation trench is rough.

[0013] In some embodiments, the substrate surface exposed by the second isolation trench has laser scratches.

[0014] In some embodiments, the thickness of the insulating layer is 300 angstroms to 500 angstroms.

[0015] In some embodiments, the maximum width of the first isolation trench is 16 μm to 34 μm.

[0016] In some embodiments, the maximum width of the second isolation trench is 6 μm to 22 μm.

[0017] According to a second aspect of the present invention, there is provided a light emitting device, characterized in that it comprises any of the high-voltage light emitting diodes described above.

[0018] According to a third aspect of the present invention, a method for manufacturing a high-voltage light-emitting diode is provided, characterized in that the method comprises the following steps: S1. Providing a substrate, and forming a plurality of insulating layers at predetermined positions of the substrate; S2, growing an epitaxial layer on the substrate and the insulating layer, wherein the epitaxial layer covers the surfaces of the substrate and the insulating layer; S3. Removing part of the epitaxial layer to form a plurality of light-emitting units, and forming isolation trenches between adjacent light-emitting units, wherein the isolation trenches include a first isolation trench and a second isolation trench, wherein the first isolation trench and the second isolation trench are connected, the bottom of the first isolation trench is exposed to the insulating layer, and the bottom of the second isolation trench is exposed to the substrate; S4. Making a bridge electrode at the first isolation trench, and connecting the light-emitting units in sequence through the bridge electrode to form a high-voltage light-emitting diode.

[0019] In some embodiments, in step S1 , a whole surface of an original insulating layer is first grown on the substrate, and then the original insulating layer is patterned to form a plurality of insulating layers.

[0020] In some embodiments, in step S3 , a portion of the epitaxial layer is removed by first performing ISO etching, and then performing laser forward scribing and SE etching to form a first isolation trench.

[0021] In some embodiments, in step S3 , a portion of the epitaxial layer is removed by laser forward scribing and SE etching to form a second isolation trench.

[0022] In some embodiments, a partial surface of the insulating layer is sandwiched between the light emitting unit and the substrate.

[0023] In some embodiments, the sidewall of the first isolation trench includes a first slope and a second slope, the first slope is closer to the insulating layer than the second slope, wherein the first slope forms an angle A with the upper surface of the insulating layer, and the second slope forms an angle B with the horizontal plane, and the angle A is smaller than the angle B.

[0024] In some embodiments, along the vertical direction, the height of the first inclined surface is H1, the height of the second inclined surface is H2, and H1<H2.

[0025] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purposes and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work. The positional relationships described in the drawings in the following description are based on the directions of the components drawn in the diagrams, unless otherwise specified.

[0027] Figure 1 Schematic diagram of the substrate structure in an embodiment of the present invention.

[0028] Figure 2 Schematic diagram of the structure of growing an original insulating layer on a substrate in an embodiment of the present invention.

[0029] Figure 3 Schematic diagram of the structure of forming an insulating layer in an embodiment of the present invention.

[0030] Figure 4 Schematic diagram of the structure of growing an epitaxial layer in an embodiment of the present invention.

[0031] Figure 5 Schematic diagram of the structure of forming a step (Mesa) in the epitaxial layer in an embodiment of the present invention.

[0032] Figure 6 Schematic diagram of the structure of forming a first isolation trench prototype in the epitaxial layer in an embodiment of the present invention.

[0033] Figure 7 Schematic diagram of the structure of forming a first isolation trench in the epitaxial layer in an embodiment of the present invention.

[0034] Figure 8 FIG. 4 is a partially enlarged schematic diagram of the first isolation trench in an embodiment of the present invention.

[0035] Figure 9 Schematic diagram of the structure of forming a second isolation trench in the epitaxial layer in an embodiment of the present invention.

[0036] Figure 10 FIG. 1 is a schematic diagram of a structure for forming an electrode structure in an embodiment of the present invention.

[0037] Figure 11 FIG. 1 is a schematic diagram of a structure for forming a bridging electrode in an embodiment of the present invention.

[0038] Figure 12 Schematic diagram of the top view of the high-voltage light-emitting diode in an embodiment of the present invention.

[0039] Figure 13 It is a structural diagram of a high-voltage light-emitting diode in the prior art.

[0040] Figure annotation: 2', insulating layer; 3', epitaxial structure; 30', light-emitting unit; 4', isolation trench; 6', bridging electrode; 1. Substrate; 2. Original insulating layer; 20. Insulating layer; 3. Epitaxial layer; 30. Light-emitting unit; 31. First semiconductor layer; 32. Light-emitting layer; 33. Second semiconductor layer; 4. Isolation trench; 40. First isolation trench prototype; 41. First isolation trench; 411. First inclined plane; 412. Second inclined plane; 42. Second isolation trench; 51. First electrode; 52. Second electrode; 6. Bridging electrode; 7. Current blocking layer; 8. Transparent conductive layer. DETAILED DESCRIPTION

[0041] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0042] The high-voltage light-emitting diode of the present invention can be a face-mounted high-voltage light-emitting diode or a flip-chip high-voltage light-emitting diode. The following embodiments will be described in detail using the face-mounted high-voltage light-emitting diode as an example. Example 1

[0043] This embodiment provides a method for manufacturing a high-voltage light-emitting diode, comprising the following steps: Step S1: Provide a substrate 1, and form a plurality of insulating layers 20 at predetermined positions on the substrate 1, referring to Figures 1-3 .

[0044] Both substrate 1 and insulating layer 20 are preferably made of insulating materials. Substrate 1 can be selected from Al2O3, SiO2, or a combination thereof, while insulating layer 20 can be selected from SiO2, TiO2, Si3N4, Al2O3, MgF2, or any combination thereof. In this embodiment, substrate 1 is preferably a sapphire (Al2O3) substrate. Patterning can also be performed on substrate 1 to alter the light propagation path and improve light extraction efficiency. Insulating layer 20 is preferably made from silicon dioxide (SiO2), which is stable and widely used. Furthermore, the thickness of insulating layer 20 is preferably 300 to 500 angstroms.

[0045] In this embodiment, the upper surface of the substrate 1 is used as the base surface and multiple insulating layers 20 are formed at specific preset positions on the upper surface of the substrate 1. Specifically, the areas where the light-emitting units 30 and the isolation grooves 4 are subsequently formed are defined and planned on the substrate 1, and then an original insulating layer 2 is grown on the upper surface of the substrate 1 to cover the entire surface. Finally, the original insulating layer 2 is patterned to remove part of the original insulating layer 2 to form multiple insulating layers 20. Figure 2 and 3 . The graphical processing of the original insulating layer 2 can be achieved through a mask process, wherein the retained original insulating layer 2 (insulating layer 20) can be a flat film layer, that is, the thickness of each part of the insulating layer 20 remains basically the same, or it can be an insulating layer 20 formed with a pattern, for example, the insulating layer 20 has a concave-convex structure. It should be noted that part of the original insulating layer 2 where the isolation groove 4 is subsequently formed may be retained, while most of the original insulating layer 2 where the light-emitting unit 30 is subsequently formed is removed. In this embodiment, the original insulating layer 2 located in the isolation groove area at the non-bridging electrode is removed, and only the original insulating layer 2 located in the isolation groove area at the bridging electrode is retained, and the width of the retained original insulating layer 2 is not less than the width of the isolation groove at the bridging electrode 6 to ensure the photoelectric performance of the high-voltage light-emitting diode.

[0046] Next, step S2 is performed to grow an epitaxial layer 3 on the substrate 1 and the insulating layer 20. The epitaxial layer 3 covers the surface of the substrate 1 and the insulating layer 20. Figure 4 .

[0047] Specifically, the epitaxial layer 3 is grown on the substrate 1 and the insulating layer 20 by metal organic chemical vapor deposition (MOCVD). The growth method of the epitaxial layer 3 includes but is not limited to the metal organic chemical vapor deposition (MOCVD) process, which is not particularly limited in the present invention.

[0048] The epitaxial layer 3 is used to subsequently form multiple light-emitting units 30. The epitaxial layer 3 can be made of a gallium nitride-based, gallium arsenide-based, or gallium phosphide-based material. Specifically, the epitaxial layer 3 includes at least a first semiconductor layer 31, a second semiconductor layer 33, and a light-emitting layer 32 located therebetween. The first semiconductor layer 31 or the second semiconductor layer 33 is n-type doped or p-type doped, respectively, and the first semiconductor layer 31 and the second semiconductor layer 33 have different doping characteristics. Furthermore, the n-type is doped with n-type dopants such as Si, Ge, or Sn, and the p-type is doped with p-type dopants such as Mg, Zn, Ca, Sr, or Ba. Equivalent substitutions of other elements are also possible. The light-emitting layer 32 is a material capable of providing light radiation, specifically in the wavelength range of 390 to 950 nm, such as blue, green, red, yellow, orange, and infrared light. The light-emitting layer 32 can be a single quantum well layer or a multi-quantum well layer. The first semiconductor layer 31, the light-emitting layer 32, and the second semiconductor layer 33 are merely the basic building blocks of the epitaxial layer 3. Furthermore, the epitaxial layer 3 may also include other functional structural layers that optimize the performance of the high-voltage light-emitting diode. In this embodiment, the epitaxial layer 3 includes, in the direction away from the substrate 1, the first semiconductor layer 31, the light-emitting layer 32, and the second semiconductor layer 33. The first semiconductor layer 31 is an n-GaN layer with an n-type dopant of Si, the light-emitting layer 32 is an alternating stack of GaN / InGaN, and the second semiconductor layer 33 is a p-GaN layer with a p-type dopant of Mg.

[0049] Next, step S3 is performed to remove part of the epitaxial layer 3 to form a plurality of light-emitting units 30, and isolation trenches 4 are formed between adjacent light-emitting units 30. The isolation trenches 4 include a first isolation trench 41 and a second isolation trench 42. The first isolation trench 41 and the second isolation trench 42 are connected. The bottom of the first isolation trench 41 is exposed to the insulating layer 20, and the bottom of the second isolation trench 42 is exposed to the substrate 1. Figures 5 to 10 .

[0050] Specifically, in this embodiment, a portion of the epitaxial layer 3 is removed through an etching process to form a step (Mesa) and an isolation trench 4. This etching process can be dry or wet, with dry etching being preferred. The process for forming the step differs from the process for forming the isolation trench 4.

[0051] Regarding the production of the step (Mesa), plasma etching (ICP etching) is used to remove part of the second semiconductor layer 33, the light-emitting layer 32 and the first semiconductor layer 31 from top to bottom to form a step. The step includes an upper mesa and a lower mesa, wherein the upper mesa is the upper surface of the second semiconductor layer 33 and the lower mesa is the exposed upper surface of the first semiconductor layer 31. Figure 5 .

[0052] Regarding the production of the isolation groove 4, this embodiment adopts a production process different from the prior art. The prior art high voltage light emitting diode usually uses ISO etching to form all the isolation grooves 4'. The isolation grooves 4' formed by this process will be wide at the top and narrow at the bottom (inverted trapezoidal shape). Figure 13 However, ISO etching has the disadvantage of incomplete etching and easy leakage short circuit. It is not suitable for the production of narrow isolation trenches. The production of wide isolation trenches will lose a large amount of light-emitting area, thereby affecting the brightness of high-voltage light-emitting diodes.

[0053] Therefore, in this embodiment, the isolation groove 4 is divided into two parts, namely the first isolation groove 41 and the second isolation groove 42. Among them, the isolation groove 4 located in the area where the subsequent bridge electrode 6 is located is defined as the first isolation groove 41, and the isolation groove 4 located in the area where the non-bridge electrode is located is defined as the second isolation groove 42. The first isolation groove 41 is mainly used to carry the deposition bridge electrode 6, and the second isolation groove 42 is used to isolate each light-emitting unit 30. Figure 12 In an embodiment, the depth of the first isolation trench 41 is less than the depth of the second isolation trench 42 .

[0054] Specifically, regarding the production of the first isolation trench 41, first, a portion of the epitaxial layer 3 is removed by ISO etching, and the etching cannot be performed downward to expose the insulating layer 20, so as to form a first isolation trench prototype 40 with a wide top and a narrow bottom. Figure 6 This part is conducive to the subsequent deposition of the bridge electrode 6, ensuring the reliability of the high-voltage light-emitting diode. Next, the first isolation trench prototype 40 is scratched from the bottom to the insulating layer 20 by laser. Finally, SE etching is used to remove the remaining epitaxial layer 3 along the position of the laser scratch to expose the insulating layer 20 below, and finally form the first isolation trench 41 with a wide top and bottom and a narrow middle, similar to an hourglass shape. Figure 7 Regarding the production of the second isolation trench 42, firstly, laser positive scratching is performed to the substrate 1, and then SE etching is performed along the position of the laser positive scratching to remove part of the epitaxial layer 3 to form the second isolation trench 42 which is narrow at the top and wide at the bottom. Figure 9 The exposed portion of the bottom of the second isolation groove 42 is the substrate 1. The substrate 1 exposed by the second isolation groove 42 is affected by the laser positive scratching, and laser scratches may appear on the surface.

[0055] It should be noted that compared with ISO etching, the isolation groove 4 of better quality can be obtained by the method of positive scratching plus SE etching, wherein the positive scratching can completely remove the epitaxial layer 3, and there is no situation of incomplete etching. Moreover, the width of the isolation groove 4 formed by positive scratching is also smaller, which is conducive to forming a narrow isolation groove. Combined with SE etching, an isolation groove 4 that is narrow at the top and wide at the bottom can be formed, thereby retaining more light-emitting area, thereby improving the brightness of the high-voltage light-emitting diode.

[0056] In addition, in the prior art, high-voltage LEDs typically first form an isolation trench 4' and then fill the isolation trench 4' with an insulating layer 2'. However, this method results in poor quality of the insulating layer 2', which can be incomplete, affecting the yield of the high-voltage LED. Furthermore, this method is only suitable for wide isolation trenches, not narrow ones. In contrast, this embodiment first forms an insulating layer 20 in the area of ​​the isolation trench 4 and then exposes the insulating layer 20 by forming the isolation trench 4. This method is applicable not only to wide isolation trenches but also to narrow ones, and significantly improves the yield of the high-voltage LED.

[0057] In an alternative embodiment, reference Figure 8 The sidewalls of the first isolation trench 41 include a first inclined surface 411 and a second inclined surface 412. The first inclined surface 411 is closer to the insulating layer 20 than the second inclined surface 412. The first inclined surface 411 forms an angle A with the upper surface of the insulating layer 20, and the second inclined surface 412 forms an angle B with the horizontal plane. Angle A is smaller than angle B. The larger inclination angle of the second inclined surface 412 facilitates the subsequent deposition of the bridging electrode 6, ensures the quality of the bridging electrode 6, and improves the reliability of the high-voltage light-emitting diode. Preferably, angle A is less than 90 degrees, and angle B is greater than 90 degrees and less than 180 degrees, to obtain an hourglass-shaped first isolation trench 41 that is wider at the top and bottom and narrower in the middle. More preferably, angle A is between 30 and 50 degrees, and angle B is between 120 and 150 degrees.

[0058] In an alternative embodiment, reference Figure 8 The depth of the epitaxial layer 3 etched by ISO is greater than the depth of the epitaxial layer 3 etched by SE, that is, in the vertical direction, the height H1 of the first inclined surface 411 is less than the height H2 of the second inclined surface 412, thereby ensuring that it has a larger area and a gentler slope, which is beneficial to the deposition of the bridge electrode 6 and further ensures the quality of the deposition of the bridge electrode 6.

[0059] In an alternative embodiment, reference Figure 9 The sidewalls of the second isolation trench 42 form an angle C with the upper surface of the substrate 1. Preferably, the angle C is less than 90 degrees to reduce the area occupied by the second isolation trench 42 and increase the light-emitting area of ​​the high-voltage LED. More preferably, the angle C is between 30 and 50 degrees. This increases the light-emitting area of ​​the high-voltage LED while also better utilizing the sidewalls to form a reflective surface, thereby improving light-emitting efficiency and thereby enhancing light brightness.

[0060] The isolation trench 4 fabricated in this embodiment minimizes the loss of light-emitting area, ensuring the brightness of the high-voltage LED. In a preferred embodiment, the maximum width of the first isolation trench 41 is 16 μm to 34 μm, i.e., the width of the first isolation trench 41 after ISO etching is 16 μm to 34 μm. This ensures the deposition of the bridge electrode 6, avoids cracks or broken wires, and ensures the reliability of the high-voltage LED. The maximum width of the second isolation trench 42 is 6 μm to 22 μm, minimizing the loss of light-emitting area and ensuring the brightness of the high-voltage LED.

[0061] In an optional embodiment, the bottom of the first isolation groove 41 may just expose the entire upper surface of the insulating layer 20, or may only expose a portion of the upper surface of the insulating layer 20, which means that a portion of the surface of the insulating layer 20 is sandwiched between the light emitting unit 30 and the substrate 1. Figure 7 However, it should be noted that the portion of the insulating layer 20 sandwiched between the insulating layer 20 should not be too large, otherwise the luminous efficiency of the high-voltage light-emitting diode may be affected. Furthermore, preferably, the surface of the insulating layer 20 exposed by the first isolation trench 41 can be made rough. This rough surface can facilitate the deposition of the bridge electrode 6 to a certain extent, increase the adhesion of the bridge electrode 6, and further improve the reliability of the high-voltage light-emitting diode.

[0062] In this embodiment, after the isolation trench 4 is formed, an electrode structure is formed on each light emitting unit 30. Specifically, a first electrode 51 is formed on the lower surface, and a second electrode 52 is formed on the upper surface, so that an electrical connection is formed between the first electrode 51 and the first semiconductor layer 31, and an electrical connection is formed between the second electrode 52 and the second semiconductor layer 33. Figure 10 The polarity of the electrode is the same as that of the semiconductor layer to which it is electrically connected. In this embodiment, the first electrode 51 is an n-electrode and the second electrode 52 is a p-electrode.

[0063] Specifically, the electrode can be a metal electrode formed by depositing multiple layers of metal, such as one or a combination of nickel, gold, chromium, titanium, platinum, palladium, rhodium, iridium, aluminum, tin, indium, tantalum, copper, cobalt, iron, ruthenium, zirconium, tungsten, and molybdenum. The bottom layer of the electrode can be a metal with good adhesion, such as chromium (Cr), and the outermost layer of the electrode can be a metal with good conductivity, such as gold (Au).

[0064] Finally, step S4 is performed to form a bridge electrode 6 at the first isolation trench 41, and the light emitting units 30 are sequentially connected through the bridge electrode 6 to form a high voltage light emitting diode. Figure 11 and 12 .

[0065] Specifically, the bridging electrode 6 spans the first isolation groove 41 and contacts the upper surface of the insulating layer 20, connecting the (electrodes of) each light-emitting unit 30 in series, wherein the first electrode 51 on the previous light-emitting unit 30 is connected to the second electrode 52 on the next light-emitting unit 30 through the bridging electrode 6, or the second electrode 52 on the previous light-emitting unit 30 is connected to the first electrode 51 on the next light-emitting unit 30 through the bridging electrode 6, to form a high-voltage light-emitting diode.

[0066] Furthermore, the bridging electrode 6 may be an electrode deposited with multiple layers of metal; or, the material of the bridging electrode 6 includes indium tin oxide, indium zinc oxide or zinc aluminum oxide; preferably, the bridging electrode 6 is made of the same material as the first electrode 51 and the second electrode 52 .

[0067] In an optional embodiment, a passivation layer (not shown) is formed after the bridging electrode 6 is formed. This passivation layer covers the light-emitting unit 30, the bridging electrode 6, the isolation trench 4, and extends to the sidewalls of the light-emitting unit 30. However, at least a portion of the surface of the electrode structure (the first electrode 51 and the second electrode 52) needs to be exposed for connection to an external power source. The provision of the passivation layer prevents moisture from entering, reducing the risk of short circuit leakage. The passivation layer is made of an insulating material, for example, silicon dioxide, silicon nitride, titanium oxide, or any combination thereof. In this embodiment, the preferred material for the passivation layer is silicon dioxide (SiO2). Example 2

[0068] This embodiment provides a high voltage light emitting diode, which can be manufactured by the method in the above embodiment 1, but is not limited to the method in the embodiment 1. Figure 11 and 12 The high-voltage light-emitting diode includes: a substrate 1, a plurality of light-emitting units 30 located on the substrate 1, and a plurality of insulating layers 20. Adjacent light-emitting units 30 are separated from each other by isolation grooves 4, and each light-emitting unit 30 is electrically connected through a bridge electrode 6 provided at the isolation grooves 4.

[0069] Substrate 1 supports the light-emitting unit 30 thereon. Preferably, substrate 1 is made of an insulating material selected from Al2O3, SiO2, or a combination thereof. In this embodiment, substrate 1 is a sapphire (Al2O3) substrate. This substrate 1 can be thinned or even removed in subsequent processes. In other embodiments, substrate 1 can be patterned to alter the light propagation path and improve light extraction efficiency.

[0070] Continue to refer to Figure 11, multiple light-emitting units 30 are arranged on the substrate 1, wherein each light-emitting unit 30 includes an epitaxial layer, which includes at least a first semiconductor layer 31, a second semiconductor layer 33 and a light-emitting layer 32 located therebetween. The first semiconductor layer 31 or the second semiconductor layer 33 is n-type doped or p-type doped, respectively, and the first semiconductor layer 31 and the second semiconductor layer 33 have different doping. Furthermore, the n-type is doped with n-type dopants such as Si, Ge, or Sn, and the p-type is doped with p-type dopants such as Mg, Zn, Ca, Sr, or Ba, and doping with other elements equivalent to substitution is not excluded. The light-emitting layer 32 is a material that can provide light radiation, and the specific radiation band is between 390 and 950 nm, such as blue, green, red, yellow, orange, and infrared light. The light-emitting layer 32 can be a single quantum well layer or a multi-quantum well layer. The first semiconductor layer 31, the light-emitting layer 32, and the second semiconductor layer 33 are merely the basic building blocks of the epitaxial layer. Furthermore, the epitaxial layer may also include other functional structural layers that optimize the performance of the high-voltage light-emitting diode. In this embodiment, the epitaxial layer includes, in the direction away from the substrate 1, the first semiconductor layer 31, the light-emitting layer 32, and the second semiconductor layer 33. The first semiconductor layer 31 is an n-GaN layer with an n-type dopant of Si, the light-emitting layer 32 is an alternating stack of GaN / InGaN, and the second semiconductor layer 33 is a p-GaN layer with a p-type dopant of Mg.

[0071] The epitaxial layer further includes a step (Mesa), which exposes a portion of the first semiconductor layer 31. Specifically, the step includes an upper mesa and a lower mesa, wherein the upper mesa is the upper surface of the second semiconductor layer 33 and the lower mesa is the exposed upper surface of the first semiconductor layer 31.

[0072] In this embodiment, the light-emitting unit 30 further includes an electrode structure, specifically, a first electrode 51 formed on the lower surface and a second electrode 52 formed on the upper surface. The first electrode 51 is electrically connected to the first semiconductor layer 31, and the second electrode 52 is electrically connected to the second semiconductor layer 33. Optionally, a transparent conductive layer 8 is formed between the second electrode 52 and the second semiconductor layer 33. The material of this transparent conductive layer 8 is preferably indium tin oxide (ITO) to promote current spreading. In addition, a current blocking layer 7 is formed between the transparent conductive layer 8 and the second semiconductor layer 33, and below the second electrode 52, to prevent current concentration and further enhance current spreading. The material of this current blocking layer 7 is preferably silicon dioxide (SiO2).

[0073] Continue to refer to Figure 11 and 12The high-voltage light-emitting diode further includes a bridge electrode 6 for connecting (the electrodes of) the light-emitting units 30 in series, wherein the first electrode 51 of the preceding light-emitting unit 30 is connected to the second electrode 52 of the succeeding light-emitting unit 30 via the bridge electrode 6, or the second electrode 52 of the preceding light-emitting unit 30 is connected to the first electrode 51 of the succeeding light-emitting unit 30 via the bridge electrode 6. The material of the bridge electrode 6 includes one or more of titanium, platinum, gold, nickel, or aluminum; or the material of the bridge electrode 6 includes indium tin oxide, indium zinc oxide, or zinc aluminum oxide; preferably, the bridge electrode 6 is made of the same material as the first electrode 51 and the second electrode 52.

[0074] In this embodiment, referring to Figure 12 The isolation trench 4 includes a first isolation trench 41 and a second isolation trench 42, which are interconnected and continuous. The isolation trench located in the area where the bridge electrode 6 is located is defined as the first isolation trench 41, which primarily supports the deposition of the bridge electrode 6. The bottom of the first isolation trench 41 exposes the insulating layer 20. The isolation trench located in the area where the bridge electrode is not located is defined as the second isolation trench 42. The bottom of the second isolation trench 42 exposes the substrate 1 to isolate the light-emitting units 30. The exposed portion of the bottom of the second isolation trench 42 is the substrate 1, and the exposed surface of the substrate 1 may have laser scratches.

[0075] Because the insulating layer 20 is located below the first isolation trench 41, the depth of the first isolation trench 41 is less than the depth of the second isolation trench 42. In this embodiment, the thickness of the insulating layer 20 is preferably 300 angstroms to 500 angstroms. This reduces the deposition depth of the bridge electrode 6 in the first isolation trench 41, improves the phenomenon of cracks in the bridge electrode 6 during the deposition process, and avoids defects such as virtual connections and broken wires in the bridge electrode 6, thereby further improving the reliability of the high-voltage light-emitting diode. In an optional embodiment, the insulating layer 20 can be selected from SiO2, TiO2, Si3N4, Al2O3, MgF2, or any combination of the foregoing. The insulating layer 20 is preferably silicon dioxide (SiO2). In an optional embodiment, the insulating layer 20 can be a reflective insulating material to act as a reflective layer to reflect light to the front surface, thereby improving the external quantum efficiency of the high-voltage light-emitting diode.

[0076] In a preferred embodiment, the maximum width of the first isolation groove 41 is 16μm~34μm, so as to ensure the deposition effect of the bridging electrode 6, avoid cracks or broken wire defects, and ensure the reliability of the high-voltage light-emitting diode, while the maximum width of the second isolation groove 42 is 6μm~22μm, so as to minimize the loss of the light-emitting area to the greatest extent and ensure the brightness of the high-voltage light-emitting diode.

[0077] In an optional embodiment, the bottom of the first isolation groove 41 may just expose the entire upper surface of the insulating layer 20, or may only expose a portion of the upper surface of the insulating layer 20, which means that a portion of the surface of the insulating layer 20 is sandwiched between the light emitting unit 30 and the substrate 1. Figure 11 However, it should be noted that the portion of the insulating layer 20 sandwiched between the first isolation trenches 41 should not be too large, otherwise the luminous efficiency of the high-voltage LED may be affected. In other embodiments, the surface of the insulating layer 20 exposed by the first isolation trench 41 is roughened. This roughened surface can facilitate the deposition of the bridge electrode 6 to a certain extent, increase the adhesion of the bridge electrode 6, and further improve the reliability of the high-voltage LED.

[0078] In an optional embodiment, the sidewall of the first isolation trench 41 includes a first inclined surface 411 and a second inclined surface 412, wherein the first inclined surface 411 is closer to the insulating layer 20 than the second inclined surface 412, wherein the first inclined surface 411 forms an angle A with the upper surface of the insulating layer 20, and the second inclined surface 412 forms an angle B with the horizontal plane, wherein the angle A is smaller than the angle B, which can be referred to Figure 8 The second inclined surface 412 has a larger inclination angle, which will facilitate the subsequent deposition of the bridge electrode 6, ensure the quality of the bridge electrode 6, and improve the reliability of the high-voltage light-emitting diode. Preferably, the angle A is less than 90 degrees, and the angle B is greater than 90 degrees and less than 180 degrees, so as to obtain a first isolation trench 41 that is wide at the top and bottom and narrow in the middle and has an hourglass shape. More preferably, the angle A is 30 degrees to 50 degrees, and the angle B is 120 degrees to 150 degrees.

[0079] In an optional embodiment, along the vertical direction, the height of the first inclined surface 411 is H1, and the height of the second inclined surface 412 is H2, H1<H2, thereby ensuring that it has a larger area and a gentler slope, which is conducive to the deposition of the bridging electrode 6 and further ensures the quality of the deposition of the bridging electrode 6.

[0080] In an optional embodiment, an angle C is formed between the sidewalls of the second isolation trench 42 and the upper surface of the substrate 1. Preferably, the angle C is less than 90 degrees to reduce the area occupied by the second isolation trench 42 and increase the light-emitting area of ​​the high-voltage LED. More preferably, the angle C is between 30 and 50 degrees, which increases the light-emitting area of ​​the high-voltage LED while also better utilizing the sidewalls to form a reflective surface, thereby improving light-emitting efficiency and thereby enhancing light brightness.

[0081] In an optional embodiment, the high-voltage LED also includes a passivation layer (not shown). This layer protects the high-voltage LED from moisture intrusion and reduces the risk of short circuits and leakage. Specifically, the passivation layer can cover the light-emitting unit 30, the bridging electrode 6, the isolation trench 4, and extend to the sidewalls of the light-emitting unit 30. However, it must expose at least a portion of the surface of the electrode structure (the first electrode 51 and the second electrode 52) to allow connection to an external power source. The passivation layer can be made of silicon dioxide, silicon nitride, or aluminum oxide, with silicon dioxide being preferred due to its stable properties and widespread use. Example 3

[0082] This embodiment also provides a light-emitting device, which can be a lighting device, a backlight device, or a display device, such as a lamp, a television, a mobile phone, a panel, or an RGB display screen. The light-emitting device includes the high-voltage light-emitting diode described in the above embodiment, which is mounted on an application substrate or a packaging substrate to form a light source portion.

[0083] In addition, those skilled in the art should understand that, although there are many problems in the prior art, each embodiment or technical solution of the present invention may be improved in only one or several aspects, without having to simultaneously solve all the technical problems listed in the prior art or background art. Those skilled in the art should understand that any content not mentioned in a claim should not be construed as limiting the claim.

[0084] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high voltage light emitting diode, characterized in that: The invention comprises a substrate, a plurality of light-emitting units located on the substrate, and a plurality of insulating layers. Adjacent light-emitting units are separated by isolation grooves. The isolation grooves include a first isolation groove and a second isolation groove. The first isolation groove and the second isolation groove are connected. The bottom of the first isolation groove exposes the insulating layer, and the bottom of the second isolation groove exposes the substrate. Each light-emitting unit is electrically connected through a bridging electrode arranged at the first isolation groove.

2. The high-voltage light-emitting diode according to claim 1, characterized in that: The depth of the first isolation trench is smaller than the depth of the second isolation trench.

3. The high-voltage light-emitting diode according to claim 1, characterized in that: A partial surface of the insulating layer is sandwiched between the light emitting unit and the substrate.

4. The high-voltage light-emitting diode according to claim 1, characterized in that: The sidewall of the first isolation groove includes a first inclined surface and a second inclined surface, wherein the first inclined surface is closer to the insulating layer than the second inclined surface, wherein the first inclined surface forms an angle A with the upper surface of the insulating layer, and the second inclined surface forms an angle B with the horizontal plane, and the angle A is smaller than the angle B.

5. The high-voltage light-emitting diode according to claim 4, characterized in that: The angle A is less than 90 degrees, and the angle B is greater than 90 degrees and less than 180 degrees.

6. The high-voltage light-emitting diode according to claim 4, characterized in that: In the vertical direction, the height of the first inclined surface is H1, the height of the second inclined surface is H2, and H1<H2.

7. The high-voltage light-emitting diode according to claim 4, characterized in that: An angle C is formed between the sidewall of the second isolation trench and the upper surface of the substrate, and the angle C is less than 90 degrees.

8. The high-voltage light-emitting diode according to claim 1, characterized in that: The surface of the insulating layer exposed by the first isolation trench is rough.

9. The high-voltage light-emitting diode according to claim 1, characterized in that: The substrate surface exposed by the second isolation trench has laser scratches.

10. The high-voltage light-emitting diode according to claim 1, characterized in that: The thickness of the insulating layer is 300 angstroms to 500 angstroms.

11. The high-voltage light-emitting diode according to claim 1, characterized in that: The maximum width of the first isolation trench is 16 μm to 34 μm.

12. The high-voltage light-emitting diode according to claim 1, characterized in that: The maximum width of the second isolation trench is 6 μm to 22 μm.

13. A light emitting device, characterized in that The device comprises a high-voltage light-emitting diode as claimed in any one of claims 1 to 12.

14. A method for manufacturing a high-voltage light-emitting diode, characterized in that: The steps include: S1. Providing a substrate, and forming a plurality of insulating layers at predetermined positions of the substrate; S2, growing an epitaxial layer on the substrate and the insulating layer, wherein the epitaxial layer covers the surfaces of the substrate and the insulating layer; S3. Removing part of the epitaxial layer to form a plurality of light-emitting units, and forming isolation trenches between adjacent light-emitting units, wherein the isolation trenches include a first isolation trench and a second isolation trench, wherein the first isolation trench and the second isolation trench are connected, the bottom of the first isolation trench is exposed to the insulating layer, and the bottom of the second isolation trench is exposed to the substrate; S4. Making a bridge electrode at the first isolation trench, and connecting the light-emitting units in sequence through the bridge electrode to form a high-voltage light-emitting diode.

15. The method for manufacturing a high-voltage light-emitting diode according to claim 14, wherein: In step S1 , a whole surface of an original insulating layer is first grown on a substrate, and then the original insulating layer is patterned to form a plurality of insulating layers.

16. The method for manufacturing a high-voltage light-emitting diode according to claim 14, wherein: In step S3 , a portion of the epitaxial layer is removed by first performing ISO etching, and then performing laser forward scribing and SE etching to form a first isolation trench.

17. The method for manufacturing a high-voltage light-emitting diode according to claim 14, wherein: In step S3 , a portion of the epitaxial layer is removed by laser forward scribing and SE etching to form a second isolation trench.

18. The method for manufacturing a high-voltage light-emitting diode according to claim 14, wherein: A partial surface of the insulating layer is sandwiched between the light emitting unit and the substrate.

19. The method for manufacturing a high-voltage light-emitting diode according to claim 14, wherein: The sidewall of the first isolation groove includes a first inclined surface and a second inclined surface, wherein the first inclined surface is closer to the insulating layer than the second inclined surface, wherein the first inclined surface forms an angle A with the upper surface of the insulating layer, and the second inclined surface forms an angle B with the horizontal plane, and the angle A is smaller than the angle B.

20. The high-voltage light-emitting diode according to claim 19, characterized in that: In the vertical direction, the height of the first inclined surface is H1, the height of the second inclined surface is H2, and H1<H2.

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