FTL mapping method during SSD fault, data recovery method and storage device

Abstract

The invention relates to an FTL mapping method during SSD fault, a data recovery method and storage equipment, and belongs to the technical field of storage. The method comprises the following steps: in response to a fault of an SSD, taking out an in-transit command in a waiting queue; distributing a unique serial number for each in-transit command to form an in-transit data frame; sorting the in-transit data frames according to the serial numbers to form a data frame chain table; and storing the data frame chain table. According to the embodiment of the invention, the firmware is used for temporarily replacing the work of hardware, the in-transit data frames form the data frame linked list by using the serial numbers, and based on the data structure of the data frames, the mapping relation and data of the in-transit command when the fault occurs can be stored, so that the problem that the mapping table is unavailable is solved; according to the technical scheme, the cached user data can be effectively obtained and stored when the fault occurs, so that the user data in the cache is prevented from being lost, and the data reliability in the write command processing process is guaranteed.

Description

Technical Field

[0001] The present disclosure relates to the field of storage technology, and in particular to an FTL mapping method, a data recovery method, and a storage device when an SSD fails. Background Art

[0002] During the operation of an SSD (Solid State Disk), some hardware failures (such as DDR multi-bit errors and hardware errors in the controller) may occur. Querying the mapping table and then reading and writing data may cause the firmware logic to be unable to continue, interrupting the internal firmware processing and causing SSD operation to malfunction.

[0003] Daily SSD tasks often involve a complex mix of commands, including writes, reads, and trims. Each command inevitably interacts with the mapping table during processing. Therefore, if the mapping table is inaccessible, some commands will inevitably fail to complete their responses to the host.

[0004] Based on the above, if a DDR failure or some faults in the SSD cause the user data cache and mapping table to be unreliable or unavailable, the normal execution process of the firmware cannot continue, resulting in the loss of user data in the cache. Summary of the Invention

[0005] Based on this, it is necessary to address the above technical problems. An embodiment of the present invention provides an FTL mapping method, a data recovery method and a storage device when an SSD fails, so as to solve the problem that an SSD failure causes user data cache loss, unreliable or unavailable mapping tables.

[0006] In a first aspect, an embodiment of the present invention provides a method for FTL mapping when an SSD fails, the method comprising:

[0007] In response to an SSD failure, in-transit commands in the waiting queue are removed;

[0008] Assign a unique sequence number to each in-transit command to form an in-transit data frame;

[0009] Sort the in-transit data frames according to the sequence numbers to form a data frame linked list;

[0010] Save the data frame list;

[0011] The data structure of the in-transit data frame includes a sector bitmap, a buffer address and a sequence number. The sequence number is an integer that increases positively in units of 1 in a unidirectional direction. The sector bitmap is used to indicate the location of the 4K space to be updated by the in-transit command. The logical address is the logical address specified by the host, and the buffer address is the buffer address where the data to be written by the in-transit command is located.

[0012] In some embodiments of the present disclosure, taking out the in-transit command from the waiting queue includes:

[0013] If the type of the in-transit command is a non-aligned write command, after a fault occurs, the in-transit command is directly taken out from the waiting queue without waiting for the in-transit command to be processed.

[0014] In some embodiments of the present disclosure, the forming of the in-transit data frame includes:

[0015] The queue relationship between the extracted in-transit commands is decoupled and the in-transit data frames are formed in sequence.

[0016] In some embodiments of the present disclosure, taking out the in-transit command from the waiting queue includes:

[0017] If the type of the in-transit command is an aligned write command, then after the failure occurs, the status of the hardware resources and / or the status of the software resources of the solid-state drive are identified;

[0018] A corresponding waiting queue is found according to the status of the hardware resources and / or the status of the software resources of the solid-state drive, and the in-transit command is taken out from the corresponding waiting queue.

[0019] In some embodiments of the present disclosure, the method further includes:

[0020] After sorting the in-transit data frames into a data frame linked list according to the sequence number, the data frame linked list is scanned to filter out the data frames that access the same logical address;

[0021] Multiple data frames accessing the same logical address are merged to obtain a merged data frame linked list.

[0022] In some embodiments of the present disclosure, after obtaining the merged data frame linked list, the method further includes:

[0023] The data frames in the merged data frame linked list are saved according to the sequence numbers.

[0024] In some embodiments of the present disclosure, merging multiple data frames accessing the same logical address includes:

[0025] In the data frame linked list, the sector bitmap of the current data frame is compared with the sector bitmap of the previous data frame;

[0026] If a single sector bitmap or a combination of multiple sector bitmaps can completely cover a previous sector bitmap or multiple previous sector bitmaps, the data frame whose sector bitmap is overwritten is removed using the current data frame.

[0027] In some embodiments of the present disclosure, merging multiple data frames accessing the same logical address further includes:

[0028] Determine whether the sector bitmap of the selected data frame is of type 0xFF;

[0029] In response to a data frame whose sector bitmap is 0xFF, determine whether there is a preceding data frame in the data frame linked list that accesses the same logical address as the current data frame, and if so, discard the preceding data frame;

[0030] In response to a data frame whose sector bitmap is not of type 0xFF, searching for a preceding data frame accessing the same logical address, and updating the sector bitmap to a temporary bitmap by NULL or NULL;

[0031] When the temporary bitmap is of type 0xFF, the corresponding non-0xFF data frames are merged in the same manner as the 0xFF data frames.

[0032] In some embodiments of the present disclosure, before determining whether the sector bitmap of the selected data frame is of type 0xFF, the method further includes:

[0033] Determine the selected data frame;

[0034] Determining the selected data frame includes:

[0035] Starting from the second data frame in the data frame linked list, if the second data frame is not the last data frame, it is determined as the selected data frame.

[0036] In some embodiments of the present disclosure, the storing of the data frame linked list includes:

[0037] Fill the data frames in the data frame linked list into the command queue buffer of the flash memory backup area.

[0038] In a second aspect, an embodiment of the present disclosure further provides an SSD data recovery method, comprising:

[0039] After the failure is recovered, the in-transit data frames are obtained from the data frame linked list saved based on the FTL mapping method when the SSD fails as described above;

[0040] Obtain the mapping relationship and data of the in-transit command from the in-transit data frame;

[0041] Rewrite the in-transit commands according to the mapping relationship and data.

[0042] In a third aspect, an embodiment of the present disclosure further provides a storage device, comprising: a memory and a processor, the processor comprising multiple cores, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the above-mentioned FTL mapping method when an SSD failure occurs, or the above-mentioned SSD data recovery method is implemented.

[0043] The present disclosure provides an FTL mapping method, a data recovery method, and a storage device when an SSD fails. The technical solution provided by the embodiments of the present disclosure brings at least the following beneficial effects: when a solid-state drive fails, by improving the firmware FTL layer algorithm, the firmware temporarily takes over the work of the hardware, and the in-transit data frames are organized into a data frame linked list using serial numbers. Based on the data structure of the data frame, the mapping relationship and data of the in-transit commands when the failure occurs can be saved, solving the problem of unavailable mapping tables. This method can effectively obtain user data that should have been cached when a failure occurs, and store the data, avoiding the loss of user data in the cache, ensuring data reliability during the write command processing, and the code implementation is simple.

[0044] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 A flowchart of an FTL mapping method when an SSD fails provided by an embodiment of the present disclosure;

[0047] Figure 2 A flowchart of the simplest data frame processed by the SSD provided in the embodiment of the present disclosure;

[0048] Figure 3 A schematic diagram of a data frame structure provided in an embodiment of the present disclosure;

[0049] Figure 4 A schematic diagram of a data frame linked list generated in an embodiment of the present disclosure;

[0050] Figure 5 Schematic diagram of the merged data frame linked list in an embodiment of the present disclosure;

[0051] Figure 6 A schematic diagram of a command queue buffer to be written into a flash memory backup area formed in an embodiment of the present disclosure;

[0052] Figure 7 A flowchart of the steps of the FTL mapping method when an SSD fails provided by an embodiment of the present disclosure;

[0053] Figure 8This is a flowchart of the steps of the process of merging data frame linked lists in an embodiment of the present disclosure;

[0054] Figure 9 A flowchart of a data recovery method for SSD failure recovery provided by another embodiment of the present disclosure;

[0055] Figure 10 A schematic diagram of the structure of a storage device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0056] In order to make the purpose, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present disclosure and are not intended to limit the present disclosure.

[0057] In embodiments of the present disclosure, when a SSD experiences a fault such as an abnormal power outage, it saves in-transit data frames. If the primary hardware is trustworthy, for example, operations on the FTL (Flash Translation Layer) table and DMA (Direct Memory Access) can still be handled by the hardware. This means the hardware can assist the firmware in ensuring the accuracy of mappings and data content. For most non-user-written commands, the firmware will not respond to the host until it completes the execution process. When a fault occurs, the firmware cannot complete the command and does not respond to the host with a success message. The NVMe protocol allows for command failure responses or direct discarding of commands due to a timeout. For user write commands, most SSDs incorporate latency optimization technology. This means that as soon as data enters the hard drive buffer, a success message can be sent to the host in advance, even if the firmware may not have actually completed the data write process. In this case, hardware usage can be minimized, with processing the in-transit data frame mapping relationship and data storage relying solely on the CPU (and the hardware that writes to the NAND).

[0058] However, if the SSD's mapping table fails, the mapping table cannot be updated, individual cache spaces may be faulty, and cache data cannot be merged. In this case, the FTL algorithm within the SSD must adapt to the post-failure situation to ensure command mapping accuracy and data accuracy. To preserve the user's cached data at the time of the failure, the user's cached data must be located.

[0059] To address the aforementioned issues, the method provided by the embodiments of this disclosure allows, when an SSD fault occurs, a firmware-implemented FTL algorithm to take over the hardware's tasks, bypassing the hardware to collate, sort, and merge the mapping / sequence relationships of currently in-flight commands and the user write data being processed by the firmware, before storing them in the flash backup area. Later, after the host is powered on or reset to eliminate the fault, the flash backup area can be used to rewrite this user data, preventing host data loss and ensuring data reliability during the write command processing process.

[0060] Figure 1 A flowchart of an FTL mapping method for SSD failure provided by an embodiment of the present disclosure is shown as follows: Figure 1 As shown, the following steps are included:

[0061] In step S110 , in response to the SSD failure, the in-transit commands in the waiting queue are taken out;

[0062] In step S120, a unique sequence number is assigned to each in-transit command to form an in-transit data frame;

[0063] In step S130, the data frames in transit are sorted according to the sequence numbers to form a data frame linked list;

[0064] In step S140, the data frame linked list is saved.

[0065] Among them, the data structure of the in-transit data frame includes the logical address, sector bitmap, buffer address and sequence number; the sequence number is an integer that increases positively in units of 1 in a unidirectional direction; the sector bitmap is used to indicate the location of the 4K space to be updated by the in-transit command, and its length is 8 bits; the logical address is the logical address specified by the host; the buffer address is the buffer address where the data to be written by the in-transit command is located.

[0066] In the event of a hardware failure, such as a DDR failure or an SSD fault, that renders the user data cache and mapping table unreliable or unavailable, the FTL layer uses a subsystem-provided algorithm to take over the hardware's task and save the currently in-progress write commands and data. This method preserves the mapping, sequence, and data content of the currently in-progress commands completely and accurately, preventing the loss of user data in the cache due to the fault. This method is applicable not only to hardware failures but also to situations such as abnormal power outages, and its code implementation is simple.

[0067] Inside the SSD, 4K aligned data is usually written as a basic data unit (data frame) for processing. Figure 2 The flowchart of the SSD processing a simplest data frame provided in the embodiment of the present disclosure specifically includes the following steps:

[0068] In step S201, a data frame is received from the host.

[0069] In step S202, the buffer address is updated in the mapping table.

[0070] In step S203, a flash memory address is requested for the data frame.

[0071] In step S204, the data in the buffer address is updated to the flash memory address.

[0072] The above method will be described in detail below with reference to some specific embodiments:

[0073] In step S110 , in response to the SSD failure, the in-transit commands in the waiting queue are taken out.

[0074] In some embodiments of the present disclosure, when a fault occurs, the firmware stops processing these in-transit commands. The purpose of the method described herein is to back up all in-transit commands and data, which necessitates timely removal of in-transit commands from the waiting queue. In some embodiments of the present disclosure, the corresponding waiting queue is determined based on the current state of the software and hardware resources used to process the in-transit commands.

[0075] For data frames that are still waiting for software or hardware resources or non-aligned write commands, they no longer wait for these resources and remove the in-transit commands from the waiting queue; for data frames whose hardware requests have been issued, they no longer wait for the hardware to return and directly block the return channels of these hardware.

[0076] In step S120, a unique sequence number is assigned to each in-transit command to form an in-transit data frame.

[0077] For user write commands, the order of the same logical address cannot be disrupted. When a fault occurs, in order to be able to identify the order between these logical addresses in the scattered data frames, it is necessary to assign a sequence number to each data frame when the firmware receives it. The sequence number is a unidirectional integer that increases positively in steps of 1. Based on this, Figure 3 A schematic diagram of the data frame structure provided in the embodiment of the present disclosure is shown in FIG. Figure 3 As shown in the figure, the main information of a data frame includes the logical address, sector bitmap, buffer address, and sequence number. The sector bitmap is used to indicate the location of the 4K aligned write space to be updated by the write command, that is, which eight 512-byte blocks; the sector bitmap is 8 bits long; and the buffer address is the address of the buffer where the data is to be written.

[0078] In some specific embodiments of the present disclosure, if the type of the in-transit command is an unaligned write command, after a fault occurs, there is no need to wait for the in-transit command to be processed, and the in-transit command is directly taken out from the waiting queue to form an in-transit data frame.

[0079] Furthermore, in some specific embodiments of the present disclosure, for non-aligned write commands, after directly taking out the in-transit commands from the waiting queue, the following steps are further included:

[0080] The queue relationship between the extracted in-transit commands is decoupled and the in-transit data frames are formed in sequence.

[0081] Since there is coupling between the unaligned write command data, the context data of each data frame is intertwined, for example, it is still in a certain linked list or array. Through decoupling, these links can be completely cancelled, making each data frame independent. When constructing the in-transit data frame, the order of the data frames is followed instead of the original dependency order, which facilitates various subsequent processing.

[0082] In some specific embodiments of the present disclosure, if the type of the in-transit command is an aligned write command, after a failure occurs, the status of the hardware resources and / or the status of the software resources of the solid-state drive is identified; the corresponding waiting queue is found according to the status of the hardware resources and / or the status of the software resources of the solid-state drive, and the in-transit command is taken out from the corresponding waiting queue.

[0083] If the in-transit command is identified as an aligned write command, where the in-transit command is a write command that has been taken out of the queue and is being processed, then there is corresponding data that has not been written to the disk, that is, data that is being transmitted but has not yet been completely written to the NAND. It may be in the host buffer, the SSD DRAM cache, or in the NAND programming process.

[0084] The controller of the solid-state drive uses multiple queues to process commands. The queues that may be used in the command processing process include: software queues (managed by FTL), hardware queues (such as the submission queue and completion queue of the NVMe protocol), etc.

[0085] When an SSD fails, in-transit data frames may be in the following states:

[0086] (1) Waiting for software resources (NAND address, etc.) and hardware resources (mapping table update, etc.). At this point, both software and hardware resources are not completed, indicating that the command may be placed in the software queue, waiting for FTL processing, or in a unified waiting queue waiting for resources to become available. Also, it may not have entered the hardware queue because no hardware operation has been triggered.

[0087] (2) Waiting for software resources (NAND address, etc.), hardware requests (mapping table update, etc.) have been issued, and waiting for hardware completion. At this time, the command may have been submitted to the hardware queue (such as the NVMe submission queue), but because the software resources are not ready, it may be temporarily suspended or in the waiting queue waiting for software processing to complete.

[0088] (3) The software resource (NAND address, etc.) has been requested and is waiting for hardware resources (mapping table update, etc.). At this point, the software resource is ready and may have entered the hardware queue (including the submission queue), waiting for the controller to process the hardware request. It may also be in the waiting queue, waiting for hardware resources to be released or processed.

[0089] (4) The software resource (NAND address, etc.) request has been completed, and the hardware request (mapping table update, etc.) has been issued. At this point, the command may be in the hardware completion queue, the data has been written to the NAND, and is waiting for the controller to send a completion notification to the host. The mapping table update has been submitted to the controller and may be stored in the cache, but has not yet been flushed to the non-volatile storage area of ​​the NAND.

[0090] For aligned writes, the queue where the in-transit command is located can be preliminarily determined based on the status of the above-mentioned hardware resources and software resources, so that the in-transit command can be taken out from the corresponding waiting queue.

[0091] In addition, for non-aligned write, it may still wait for the completion of the preceding data frame before execution. In the present disclosure, the read-modify operation is no longer waited for to be completed, and the processing flow provided by the present disclosure is directly entered.

[0092] It should be noted that the software resources and hardware resources mentioned in this disclosure do not need to be distinguished for the purposes of the methods provided herein. This distinction is made because different resources are used in different ways, which leads to different ways of expressing the usage status of different resources. For example, hardware resources have three states: issued, waiting, and completed, while software resources have two states: waiting and completed.

[0093] In step S130 , the in-transit data frames are sorted according to the sequence numbers to form a data frame linked list.

[0094] Figure 4 This is a schematic diagram of a data frame linked list generated in an embodiment of the present disclosure, such as Figure 4 As shown, the data frame linked list includes data frame 0, data frame 1 ... data frame N, etc. A sequence number is recorded in each data frame, and the sequence numbers in the data frame linked list are arranged in order.

[0095] Furthermore, in some specific embodiments of the present disclosure, the following is further included:

[0096] After sorting the in-transit data frames into a data frame linked list according to the sequence number, the data frame linked list is scanned to filter out the data frames that access the same logical address;

[0097] Merge multiple data frames that access the same logical address to obtain a merged data frame linked list;

[0098] The data frames in the merged data frame linked list are saved according to the sequence numbers.

[0099] Although limited merging cannot perfectly merge all data accessing the same logical address, it can still merge as much as possible within a controllable range of algorithm complexity. The data frames in the merged data frame linked list are saved as a sequence according to the sequence number and written to the flash backup area in this sequence. This allows the data to be rewritten in the order of the sequence after the SSD failure is resolved.

[0100] In some specific embodiments of the present disclosure, merging the data frames accessing the same logical address specifically includes:

[0101] Comparing the sector bitmap of the current data frame with the sector bitmap of the previous data frame;

[0102] If a single sector bitmap or a combination of multiple sector bitmaps can completely cover a previous sector bitmap or multiple previous sector bitmaps, the current data frame is retained and the data frame overwritten by the previous sector bitmap is deleted to avoid excessive redundant data occupying storage space.

[0103] Figure 5 Schematic diagram of the merged data frame linked list in the embodiment of the present disclosure, such as Figure 5 As shown, taking the same logical address 0x100 as an example, data frame 0, data frame 2 and data frame 3 access this logical address.

[0104] In some specific embodiments of the present disclosure, it is necessary to determine whether the sector bitmap of the selected data frame is of type 0xFF during merging;

[0105] In response to a data frame whose sector bitmap is 0xFF, determine whether there is a preceding data frame in the data frame linked list that accesses the same logical address as the current data frame, and if so, discard the preceding data frame;

[0106] In response to a data frame whose sector bitmap is not of type 0xFF, searching for a preceding data frame accessing the same logical address, and updating the sector bitmap to a temporary bitmap by NULL or NULL;

[0107] When the temporary bitmap is of type 0xFF, the corresponding non-0xFF data frames are merged in the same manner as the 0xFF data frames.

[0108] In some specific embodiments of the present disclosure, before determining whether the sector bitmap of the selected data frame is of type 0xFF, the process further includes: determining the selected data frame; the specific steps are: starting from the second data frame in the data frame linked list, if the data frame is not the last data frame, determining it as the selected data frame.

[0109] In step S140, the data frame linked list is saved.

[0110] In some specific embodiments of the present disclosure, a data frame linked list is saved to a flash memory backup area, where the flash memory backup area is an independent flash memory address space in a solid-state drive. The data frames in the data frame linked list are then placed into a command queue buffer in the flash memory backup area; or, in the case of limited merging, the data frames in the merged data frame linked list are placed into the command queue buffer in the flash memory backup area.

[0111] Figure 6 This is a schematic diagram of the command queue buffer to be written into the flash memory backup area formed in the embodiment of the present disclosure, assuming that Figure 4 As an example, the data frame linked list shown in the figure is as follows: Figure 6 shown.

[0112] Figure 7 This is a flowchart of the steps of the FTL mapping method when an SSD fails provided by the embodiment of the present disclosure, as shown in FIG. Figure 7 As shown, the following steps are included:

[0113] In step S701, the firmware blocks the host channel and no longer receives new write commands. For data frames that have been sent by the hardware request, the firmware does not wait for the hardware to return and directly blocks the return channel of these hardware.

[0114] In step S702, the firmware stops processing all commands in progress.

[0115] In step S703 , the firmware scans all hardware waiting queues and takes out the waiting user write data frames, that is, takes out the in-transit commands in the waiting queues in the hardware resources.

[0116] In step S704, the firmware scans all software waiting queues and takes out the waiting user write data frames, that is, takes out the in-transit commands in the waiting queues in the software resources.

[0117] In step S705 , the firmware scans the relationship queues between all non-aligned writes and decouples them all.

[0118] In step S706, after the in-transit data frames are formed, the firmware scans all the in-transit data frames and reorganizes the data frames according to the sequence numbers to form an ordered data frame linked list.

[0119] In some specific embodiments, when all in-transit data frames are no longer waiting for the return of any software resources or hardware, scanning of all in-transit data frames is started to form a first sorted data frame linked list according to the sequence numbers.

[0120] In step S707, the firmware scans the data frame linked list multiple times, each time selecting data frames that access the same logical address. In some specific embodiments, after the first sort, the data frame linked list of the first sort can be scanned multiple times to select all data frames with the same logical address. If the pre-order relationship is satisfied, the pre-order data frame can be discarded to form a linked list of data frames with the same logical address.

[0121] In step S708, data frames accessing the same logical address are merged according to the sector bitmap to obtain a merged data frame linked list.

[0122] In step S709, the firmware fills the merged data frame into a buffer and waits to write it into the flash memory backup area when the host is powered off or reset.

[0123] In step S710, the host channel is opened to receive new commands that have not been processed in time.

[0124] In step S711, the received new commands are written to the buffer one by one, waiting to be written to the flash backup area when the host power is lost or restored. Writing data to a specific flash backup area does not ensure that each logical address is backed up only once, but rather involves limited merging. Therefore, after power is restored, the data must be rewritten in sequence.

[0125] Figure 8 This is a flowchart of the steps of merging the data frame linked list in the embodiment of the present disclosure. The main step is to check whether there are a first data frame and a second data frame accessing the same logical address in the data frame linked list in response to the data frame being a data frame of type 0xFF, and the first data frame is located before the second data frame in the data frame linked list. If so, the first data frame is discarded. In response to the data frame being a data frame of type non-0xFF, Figure 8 The process shown processes other data frames of non-0xFF type that access the same LBA and updates the temporary bitmap by bitwise OR. After the temporary bitmap type is updated to 0xFF, subsequent processing is performed in accordance with the above-mentioned response to data frames of 0xFF type.

[0126] like Figure 8 As shown, first, start checking from the second data frame in the data frame list to determine whether it is the last data frame. If so, end the execution; if not, continue to the next step;

[0127] Determine whether the sector bitmap is of type 0xFF. If so, discard all preceding data frames; if not, proceed to the next step.

[0128] Determine whether it is the first non-0xFF data frame. If so, record the current position and the current sector bitmap. If not, proceed to the next step.

[0129] Look forward to see if there is a data frame with exactly the same sector bitmap. If so, discard the data frame with exactly the same preceding sequence; if not, proceed to the next step.

[0130] Perform a bitwise OR operation on it and the previously recorded sector bitmap to further determine whether the calculation result is 0xFF. If so, discard all data frames preceding the first non-0xFF data frame; if not, continue to check the next data frame.

[0131] In some embodiments of the present disclosure, the merging process is performed by the CPU, and during the merging process, merging of multiple data frames is not performed to avoid using DMA hardware, so that the method of the present disclosure can be executed when the DMA hardware is completely unavailable.

[0132] In summary, when an SSD fails, especially a hardware failure, the firmware needs to take over the hardware's work, running a special FTL algorithm through the firmware, bypassing the hardware to accurately preserve the order and mapping relationship of in-transit commands and then store them in the flash backup area. In other words, it is necessary to minimize the use of DMA hardware and complete the processing of the in-transit command data frame mapping relationship and data storage by relying solely on the CPU (and the hardware that writes to the NAND). Alternatively, if the SSD does not suffer a hardware failure but encounters an abnormal power outage, the method provided in the embodiments of the present disclosure can also be applied to map in-transit commands and save data.

[0133] It should be understood that although Figure 1 、 Figure 7 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. In addition, Figure 1 、 Figure 7 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The order of execution of these steps or stages is not necessarily one by one, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0134] It can be understood that the same / similar parts between the various embodiments of the above method in this specification can be referred to each other, and each embodiment focuses on the differences from other embodiments. For related parts, please refer to the description of other method embodiments.

[0135] The conventional data recovery process after an SSD power outage requires rebuilding the FTL table. Specifically, the following steps are performed: reading the backed-up FTL metadata from the NAND (which may be stored in multiple spare areas). If the metadata is damaged, rebuilding part of the FTL by scanning the NAND physical blocks (which takes a long time); marking incomplete write operations as "invalid data" to prevent subsequent read errors.

[0136] Based on the FTL mapping method provided by the above embodiment of the present disclosure, after the mapping table and user data are saved, if the fault is recovered, the data needs to be rewritten.

[0137] Figure 9 A flowchart of a data recovery method for SSD failure recovery is provided in another embodiment of the present disclosure. Figure 9 As shown, the specific steps include:

[0138] In step S910, after the fault is recovered, the in-transit data frame is obtained from the data frame linked list;

[0139] In step S920, the mapping relationship and data of the in-transit command are obtained from the in-transit data frame;

[0140] In step S930 , the in-transit command is rewritten according to the mapping relationship and data.

[0141] The data frame linked list is based on the above embodiment and Figures 1-8 The data frame linked list used can be the data frame linked list directly obtained by the steps, or can be the merged data frame linked list obtained after effective merging, the principles are the same or similar, and will not be repeated here.

[0142] Based on the above data recovery method, after the SSD fault is eliminated, the mapping relationship and data cached in the flash memory backup area can be used to rewrite, thereby correctly restoring the state before the fault occurs.

[0143] An embodiment of the present disclosure also provides a storage device, which includes a processor and a memory, wherein the processor includes multiple cores, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method of any of the above embodiments can be implemented, and its execution method and beneficial effects are similar, which will not be repeated here.

[0144] Figure 10is a schematic diagram of the structure of a storage device provided by an embodiment of the present disclosure, such as Figure 10 As shown, the storage device may include a processor 1010 and a memory 1020, wherein a computer program is stored in the memory 1020. When the computer program is executed by the processor 1010, the method provided by any of the above embodiments can be implemented. The execution method and beneficial effects are similar and will not be repeated here.

[0145] Of course, to simplify, Figure 10 Only some of the components of the storage device related to the present invention are shown in the figure, and components such as a bus, an input / output interface, an input device, and an output device are omitted. In addition, the storage device may also include any other appropriate components according to specific application conditions.

[0146] An embodiment of the present disclosure provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the method of any of the above embodiments can be implemented. The execution method and beneficial effects are similar and will not be repeated here.

[0147] The computer-readable storage medium can be any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, but is not limited to, a system, device or component of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0148] The computer program can be written in any combination of one or more programming languages ​​to implement the program code for performing the operations of the embodiments of the present disclosure, including object-oriented programming languages ​​such as Java, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer device, partially on the user's computer device, as a stand-alone software package, partially on the user's computer device and partially on a remote computer device, or entirely on a remote computer device or server.

[0149] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details have been included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.

[0150] The foregoing description is intended only to provide specific embodiments of the present disclosure, intended to enable those skilled in the art to understand and implement the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the embodiments described herein, but rather to be construed in the broadest manner consistent with the principles and novel features disclosed herein.

Claims

1. A FTL mapping method for SSD failure, characterized in that: The method comprises: In response to an SSD failure, in-transit commands in the waiting queue are removed; Assign a unique sequence number to each in-transit command to form an in-transit data frame; Sort the in-transit data frames according to the sequence numbers to form a data frame linked list; Save the data frame list; The data structure of the in-transit data frame includes a logical address, a sector bitmap, a buffer address and a sequence number. The sequence number is an integer that increases positively in units of 1 in a unidirectional direction. The sector bitmap is used to indicate the location of the 4K space to be updated by the in-transit command. The logical address is the logical address specified by the host, and the buffer address is the buffer address where the data to be written by the in-transit command is located.

2. The method according to claim 1, characterized in that The taking out of the in-transit commands in the waiting queue comprises: If the type of the in-transit command is a non-aligned write command, after a fault occurs, the in-transit command is directly taken out from the waiting queue without waiting for the in-transit command to be processed.

3. The method according to claim 2, characterized in that The in-transit data frame comprises: The queue relationship between the extracted in-transit commands is decoupled and the in-transit data frames are formed in sequence.

4. The method according to claim 1, wherein The taking out of the in-transit commands in the waiting queue comprises: If the type of the in-transit command is an aligned write command, then after the failure occurs, the status of the hardware resources and / or the status of the software resources of the solid-state drive are identified; A corresponding waiting queue is found according to the status of the hardware resources and / or the status of the software resources of the solid-state drive, and the in-transit command is taken out from the corresponding waiting queue.

5. The method according to claim 1, wherein The method further comprises: After sorting the in-transit data frames into a data frame linked list according to the sequence number, The data frame linked list is scanned to filter out data frames accessing the same logical address, and multiple data frames accessing the same logical address are merged to obtain a merged data frame linked list.

6. The method according to claim 5, characterized in that The merging of multiple data frames accessing the same logical address includes: In the data frame linked list, the sector bitmap of the current data frame is compared with the sector bitmap of the previous data frame; If a single sector bitmap or a combination of multiple sector bitmaps can completely cover a previous sector bitmap or multiple previous sector bitmaps, the data frame whose sector bitmap is overwritten is removed using the current data frame.

7. The method according to claim 5, characterized in that The merging of multiple data frames accessing the same logical address further includes: Determine whether the sector bitmap of the selected data frame is of type 0xFF; In response to a data frame whose sector bitmap is 0xFF, determine whether there is a preceding data frame in the data frame linked list that accesses the same logical address as the current data frame, and if so, discard the preceding data frame; In response to a data frame whose sector bitmap is not of type 0xFF, searching for a preceding data frame accessing the same logical address, and updating the sector bitmap to a temporary bitmap by NULL or NULL; When the temporary bitmap is of type 0xFF, the corresponding non-0xFF data frames are merged in the same manner as the 0xFF data frames.

8. The method according to any one of claims 1 to 7, characterized in that The stored data frame linked list includes: Fill the data frames in the data frame linked list into the command queue buffer of the flash memory backup area.

9. A method for recovering SSD data, characterized in that: include: After the failure is recovered, the in-transit data frame is obtained from the data frame linked list saved by the FTL mapping method when the SSD fails according to any one of claims 1 to 8; Obtain the mapping relationship and data of the in-transit command from the in-transit data frame; Rewrite the in-transit commands according to the mapping relationship and data.

10. A storage device, characterized in that: include: A memory and a processor, wherein the processor includes multiple cores, wherein the memory stores a computer program, and when the computer program is executed by the processor, the FTL mapping method for SSD failure according to any one of claims 1 to 8 is implemented, or the SSD data recovery method according to claim 9 is implemented.

Images