Manufacturing method of back-drilled zero Stub

Abstract

The invention provides a manufacturing method of a backdrill zero Stub. The manufacturing method comprises the following steps: S1, manufacturing an inner layer pattern: transferring a required pattern to a CCL; s2, drilling is conducted, specifically, through holes of the current layer are drilled through a drill bit; s3, copper deposition: depositing a layer of copper on the hole wall as an electroplating conductor; s4, electroplating: electroplating the hole wall to reach the required copper thickness; and S5, plugging the hole with resin. According to the manufacturing method of the back drilling zero Stub, multiple times of pressing are adopted, back drilling residual hole copper is used as a through hole and hole plugging is completed, and then designed back drilling holes are completed through multiple times of pressing, hole drilling, hole plugging and etching, so that the problem that the length of the back drilling Stub is difficult to accurately control due to uneven plate thickness is effectively solved, the Stub value is zero, and the thickness of the back drilling hole is uniform. The signal integrity is improved, and high speed and stability of server data processing are guaranteed.

Description

Technical Field

[0001] The present invention relates to the field of circuit board manufacturing, and in particular to a method for manufacturing a back-drilled zero stub. Background Art

[0002] In recent years, with the acceleration of digital transformation and the booming development of emerging technologies such as cloud computing, big data, and artificial intelligence, the server industry has ushered in unprecedented opportunities and continued market expansion. The increasing adoption of the Internet of Things and 5G technologies has made edge computing a key future development trend, further driving demand for high-performance servers. In server circuit board manufacturing, the control accuracy of backdrilling stubs plays a key role in signal transmission quality and has become a major factor affecting server performance.

[0003] In existing technical solutions, backdrilling is typically performed after the electroplating or resin plugging process is completed. However, this method faces many challenges when controlling the stub length. Since the thickness of the circuit board is difficult to achieve completely uniform during the production process, the backdrilling depth cannot be accurately controlled during the backdrilling operation. As a result, the stub value can only be controlled within the range of 2-10 mils, which seriously affects the integrity and stability of the signal, thereby reducing the data processing speed and reliability of the server.

[0004] Therefore, it is necessary to provide a method for manufacturing a back-drilled zero-Stub to solve the above technical problems. Summary of the Invention

[0005] The present invention provides a method for manufacturing a back-drilled zero stub, which solves the problem in the prior art that the length of the back-drilled stub cannot be accurately controlled, resulting in a decrease in signal transmission quality.

[0006] To solve the above technical problems, the present invention provides a method for manufacturing a back-drilled zero stub, comprising the following steps:

[0007] S1. Inner layer pattern production: transfer the required pattern to CCL;

[0008] S2, drilling: drilling a through hole in the current layer using a drill bit;

[0009] S3, copper plating: deposit a layer of copper on the hole wall as an electroplated conductor;

[0010] S4, electroplating: electroplating the required copper thickness on the hole wall;

[0011] S5, resin plugging: plug all through holes that need to be back-drilled in the current layer with resin ink;

[0012] S6, ceramic grinding plate: grind the protruding resin ink on the plate surface;

[0013] S7, outer layer pattern production: open a window on the current layer corresponding to the back-drilled hole of the previous layer. The window is 4 mil larger than the hole of the previous layer.

[0014] S8. Multiple lamination: Using multiple lamination process, first treat the back-drilled residual hole copper as a through hole and complete the plugging. Through repeated lamination, drilling, plugging, and etching, the designed back-drilled hole is completed through multiple laminations. In theory, more layers of boards can be produced by lamination, drilling, and plugging multiple times.

[0015] S9. Subsequent processing: including solder mask, printing solder mask ink on the outer layer to protect the outer layer; characters, marking characters on each component PAD and hole; gold plating, performing gold plating surface treatment on the PAD where components need to be attached; molding, shaping the appearance according to requirements.

[0016] Preferably, in the multiple pressing steps, the number of layers and specific process parameters of each pressing are determined according to the actual board layer design, and the drilling, plugging and etching operations performed after each pressing are all performed on the current board layer structure after pressing.

[0017] Preferably, in the drilling step, the selection of the drill bit and the drilling parameters are adjusted according to factors such as the thickness of the board layer and the hole diameter requirements to ensure that the drilled through hole meets the design standards.

[0018] Preferably, in the copper deposition step and the electroplating step, the copper deposition thickness and electroplating process parameters are determined according to the electrical performance requirements of the final product to ensure the conductivity and stability of the hole wall copper layer.

[0019] Preferably, in the resin plugging step, the resin ink used must meet the requirements of good adhesion to the hole wall, curing performance and insulation performance to ensure that the plugging effect is stable and reliable.

[0020] Preferably, in the ceramic plate grinding step, the plate grinding process parameters are controlled within a range that can completely grind away the protruding resin ink on the plate surface without damaging other structures of the plate layer.

[0021] Preferably, in the outer layer pattern making step, the window size is 4 mil larger than the hole of the previous layer in order to ensure the connectivity and signal transmission performance of the back-drilled holes between the layers.

[0022] Preferably, the gold plating process in the subsequent processing step adopts a chemical nickel-gold plating process, wherein the thickness of the nickel layer is controlled at 3-5 μm and the thickness of the gold layer is controlled at 0.05-0.1 μm, so as to ensure the flatness and solderability of the PAD surface and improve the corrosion resistance.

[0023] Preferably, in the multiple pressing steps, the first pressing adopts a low-temperature pressing process, the pressing temperature is controlled at 150-180°C, and the pressing time is 60-90 minutes to ensure that the resin flows fully and does not damage the inner layer circuit; the second pressing adopts a high-temperature pressing process, the pressing temperature is controlled at 180-200°C, and the pressing time is 30-60 minutes to improve the interlayer bonding strength.

[0024] Preferably, in the resin plugging step, a vacuum plugging process is adopted, the vacuum degree is controlled between -0.08MPa and -0.1MPa, and the plugging pressure is 0.3-0.5MPa to ensure that the resin completely fills the through hole and no bubbles remain; after plugging, a pre-curing treatment is performed, the pre-curing temperature is 80-100°C, and the time is 30-45 minutes, so that the resin reaches the B-stage state.

[0025] Compared with the related art, the method for making a back-drilled zero stub provided by the present invention has the following advantages:

[0026] Beneficial effects:

[0027] The present invention provides a method for manufacturing a backdrilled zero stub. By using multiple presses, the copper remaining in the backdrilled hole is first treated as a through hole and plugged. Then, the designed backdrilled hole is completed through repeated presses, drilling, plugging, and etching. This effectively solves the problem of difficult to accurately control the backdrilled stub length due to uneven board thickness, achieves a stub value of 0, improves signal integrity, and ensures high speed and stability of server data processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic flow chart of a first embodiment of a method for manufacturing a backdrilled zero stub provided by the present invention;

[0029] Figure 2 for Figure 1 The first-level operation flow diagram shown;

[0030] Figure 3 for Figure 1 Schematic diagram of the operation flow of each middle layer shown;

[0031] Figure 4 for Figure 1 The diagram shows the tail layer operation flow. DETAILED DESCRIPTION

[0032] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0033] First embodiment

[0034] Please refer to Figure 1 、 Figure 2 、 Figure 3、 Figure 4 ,in, Figure 1 A schematic flow chart of a first embodiment of a method for manufacturing a backdrilled zero stub provided by the present invention; Figure 2 for Figure 1 The first-level operation flow diagram shown; Figure 3 for Figure 1 Schematic diagram of the operation flow of each middle layer shown; Figure 4 for Figure 1 A method for manufacturing a backdrilled zero stub includes the following steps:

[0035] S1. Inner layer pattern production: transfer the required pattern to CCL;

[0036] S2, drilling: drilling a through hole in the current layer using a drill bit;

[0037] S3, copper plating: deposit a layer of copper on the hole wall as an electroplated conductor;

[0038] S4, electroplating: electroplating the required copper thickness on the hole wall;

[0039] S5, resin plugging: plug all through holes that need to be back-drilled in the current layer with resin ink;

[0040] S6, ceramic grinding plate: grind the protruding resin ink on the plate surface;

[0041] S7, outer layer pattern production: open a window on the current layer corresponding to the back-drilled hole of the previous layer. The window is 4 mil larger than the hole of the previous layer.

[0042] S8. Multiple lamination: Using multiple lamination process, first treat the back-drilled residual hole copper as a through hole and complete the plugging. Through repeated lamination, drilling, plugging, and etching, the designed back-drilled hole is completed through multiple laminations. In theory, more layers of boards can be produced by lamination, drilling, and plugging multiple times.

[0043] S9. Subsequent processing: including solder mask, printing solder mask ink on the outer layer to protect the outer layer; characters, marking characters on each component PAD and hole; gold plating, performing gold plating surface treatment on the PAD where components need to be attached; molding, shaping the appearance according to requirements.

[0044] In the multiple lamination steps, the number of layers and specific process parameters of each lamination are determined according to the actual board layer design, and the drilling, plugging and etching operations performed after each lamination are all performed on the current board layer structure after lamination.

[0045] In the drilling step, the selection of the drill bit and the drilling parameters are adjusted according to factors such as the thickness of the board layer and the hole diameter requirements to ensure that the drilled through hole meets the design standards.

[0046] In the copper deposition step and the electroplating step, the copper deposition thickness and electroplating process parameters are determined according to the electrical performance requirements of the final product to ensure the conductivity and stability of the hole wall copper layer.

[0047] In the resin plugging step, the resin ink used must meet the requirements of good adhesion to the hole wall, curing performance and insulation performance to ensure that the plugging effect is stable and reliable.

[0048] In the ceramic plate grinding step, the plate grinding process parameters are controlled within a range that can completely grind away the protruding resin ink on the plate surface without damaging other structures of the plate layer.

[0049] In the outer layer pattern making step, the window size is 4 mil larger than the hole of the previous layer in order to ensure the connectivity and signal transmission performance of the back drilled holes between the layers.

[0050] The gold plating process in the subsequent processing step adopts a chemical nickel-gold plating process, wherein the thickness of the nickel layer is controlled at 3-5 μm and the thickness of the gold layer is controlled at 0.05-0.1 μm to ensure the flatness and solderability of the PAD surface and improve the corrosion resistance.

[0051] First-level operation:

[0052] Cutting: Based on the design size and specifications of the PCB, select the appropriate copper clad laminate (CCL) material. Commonly used CCLs include FR-4 and high-speed laminates. The selection should be based on circuit characteristics and signal transmission requirements. Use a high-precision cutting machine to cut the CCL to the appropriate size with a tolerance of ±0.1mm to ensure that the edge of the plate is smooth and burr-free, laying the foundation for subsequent processing.

[0053] Drilling: Based on the designed hole diameter and board thickness, select a suitable drill bit, such as a carbide drill bit. Use CNC drilling equipment to accurately set parameters such as speed and feed rate. Generally, the speed is 8000-15000rpm and the feed rate is 0.05-0.15mm / r. Ensure that the drilled hole position accuracy is within ±0.05mm, the hole wall is smooth and has no flash, and meets the electrical connection requirements;

[0054] Copper plating: First, the plate after drilling is pretreated. After degreasing and micro-etching, the hole wall is cleaned and the surface is roughened to enhance the adhesion of the copper layer. A 0.2-0.5μm thick copper layer is deposited on the hole wall as a conductive layer using a chemical copper plating process. The plating solution temperature is strictly controlled at 25-35℃, pH value at 12-13, and reaction time at 10-20min to ensure a uniform and continuous copper layer, providing a good foundation for electroplating.

[0055] Electroplating: The copper-plated plate is placed in the electroplating tank for electroplating. The electroplating solution mainly contains copper sulfate, sulfuric acid and additives. The current density is adjusted to 1-3A / dm2 2. The electroplating time is 20-60min, so that the thickness of the copper layer on the hole wall meets the design requirements, generally 20-50μm, to ensure good conductivity and stability;

[0056] Resin plugging: Select resin inks with good adhesion to the hole wall, excellent curing performance, and good insulation, such as epoxy resin. Use a vacuum plugging process with a vacuum degree controlled at -0.08MPa to -0.1MPa and a plugging pressure of 0.3-0.5MPa to ensure that the resin completely fills the through-hole without bubbles. After plugging, pre-cure at 80-100℃ for 30-45min to allow the resin to reach the B-stage state, which is convenient for subsequent processing.

[0057] Ceramic grinding plate: Use ceramic grinding plate equipment, select 800-1200 mesh sandpaper, and control the grinding plate pressure to 0.5-1.5kg / cm 2 2-5 minutes, grind the protruding resin ink on the board surface to ensure that the board surface flatness is within ±0.02mm to avoid affecting the subsequent graphic production and lamination effect;

[0058] Outer layer graphics: Through photolithography technology, photoresist is evenly coated on the board surface. After exposure and development processes, the designed outer layer circuit pattern is transferred to the board surface. The mask accuracy reaches ±0.02mm to ensure the accuracy of the pattern size. During etching, acidic copper chloride etching solution is used. The etching parameters are strictly controlled to accurately remove the excess copper foil and form a clear circuit pattern;

[0059] AOI: Using AOI equipment, we conduct a comprehensive inspection of the circuit patterns on the board based on pre-set standard patterns. We can quickly identify defects such as short circuits, open circuits, copper shortages, and pattern deviations with an inspection accuracy of ±0.02mm. Once a problem is found, it is marked and repaired in a timely manner to ensure product quality.

[0060] Browning: Browning the board surface to enhance the bonding strength between the copper surface and the prepreg. Chemical treatment is used to form a uniform, dense oxide film on the copper surface with a thickness of 0.5-1.5μm. Strictly control the concentration, temperature, and treatment time of the browning solution to ensure a stable browning effect and improve the bonding strength between the laminated boards.

[0061] Middle layer operation

[0062] Lamination: The inner core board that has passed the inner layer pattern production and AOI inspection is laminated with the prepreg (PP), copper foil, etc. according to the designed laminated structure. The high temperature and high pressure lamination process is used. According to the board structure and material properties, the lamination temperature is controlled at 180-200℃ and the pressure is controlled at 3-5kg / cm 2 , time 60-90min, make the semi-cured sheet fully melt and flow, fill the gap between layers, achieve a firm bond between the layers, the interlayer bonding force reaches 5-8N / mm2 above;

[0063] Drilling: Similar to the first layer drilling, select the appropriate drill bit and optimize the drilling parameters based on the current laminate thickness and hole diameter requirements. Use high-precision drilling equipment to ensure drilling accuracy, avoid problems such as hole diameter deviation and hole position offset, and ensure that the hole wall quality meets the subsequent process requirements.

[0064] Copper plating, electroplating, resin plugging, ceramic grinding, outer layer graphics, AOI and browning: The operating principles and process parameter control of these steps are basically the same as those of the first layer operation, but the process parameters need to be fine-tuned according to the actual situation of the middle layer board, such as changes in board thickness, circuit density, etc., to ensure the stable quality of each process and meet the overall performance requirements of the circuit board.

[0065] Tail layer operation

[0066] Lamination: After the inner and middle layers are completed, the final layer is laminated to overlap the inner and middle layers with the outer copper foil and prepreg. Similar process parameters are used as for the middle layer lamination to ensure a close bond between the outer and inner layers, further improving the overall structural strength and stability of the circuit board.

[0067] Drilling, copper plating, electroplating, outer layer graphics, outer layer AOI: This part of the operation is similar to the corresponding process of the previous layer. Strict control of process quality is required. The outer layer graphics must be finely produced and accurately inspected to ensure the accuracy and integrity of the outer layer circuit graphics and meet the electrical performance and assembly requirements of the circuit board;

[0068] Solder mask: Use heat-curing or light-curing solder mask ink, and evenly apply the solder mask layer on the outer layer of the circuit board through screen printing or inkjet printing. The thickness is controlled at 20-40μm. When heat-curing, bake at 150-200℃ for 20-60min; when light-curing, cure by ultraviolet irradiation for 1-5min, effectively preventing circuit short circuit and corrosion, and protecting the circuit board;

[0069] Characters: Use screen printing or laser marking technology to mark clear and accurate characters on the component PADs and holes of the circuit board. When screen printing, choose the appropriate ink and screen; when laser marking, control the laser power and speed to ensure the depth and clarity of the character marking to facilitate production, maintenance and testing;

[0070] Chemical gold plating: The PAD where components are to be mounted is treated with chemical nickel-gold plating. First, a 3-5μm thick nickel layer is plated to enhance the adhesion and corrosion resistance of the gold layer. Then, a 0.05-0.1μm thick gold layer is plated to improve the surface flatness and solderability of the PAD, ensuring reliable soldering of components and improving the reliability and service life of the circuit board.

[0071] Molding: Use a CNC milling machine to set the appropriate tool speed, feed rate and cutting depth according to the designed size and shape; generally the tool speed is 10000-20000rpm, the feed rate is 0.1-0.3mm / r, and the cutting depth is determined according to the board thickness. The circuit board is processed into the required shape, and the shape accuracy is controlled within ±0.1mm;

[0072] Electrical testing: Use flying probe test or bed of nails test equipment to test the electrical performance of the circuit board; detect line connectivity, short circuit, open circuit and electrical parameters, etc. to ensure that the electrical performance of the circuit board meets the design requirements and promptly identify and eliminate unqualified products;

[0073] FQC (Final Quality Control) and FQA (Final Quality Assurance): FQC conducts a comprehensive appearance inspection of the circuit board, including circuit lines, solder mask, characters, molding, etc., to check for defects; FQA conducts random inspections on products to evaluate the overall quality of the products and ensure that the products meet customer needs and quality standards;

[0074] Browning: The circuit board is subjected to the final browning treatment to further enhance the surface antioxidant capacity, improve the stability of the product during storage and transportation, and ensure reliable product quality.

[0075] Compared with the related art, the method for making a back-drilled zero stub provided by the present invention has the following advantages:

[0076] Beneficial effects:

[0077] By using multiple presses, the back-drilled residual copper is first treated as a through-hole and plugged. Then, the designed back-drilled hole is completed through repeated presses, drilling, plugging, and etching. This effectively solves the problem of difficult to accurately control the back-drilled stub length due to uneven board thickness, achieving a stub value of 0, improving signal integrity, and ensuring high-speed and stable server data processing.

[0078] Second embodiment

[0079] Based on the method for manufacturing a backdrilled zero stub provided in the first embodiment of this application, the second embodiment of this application provides another method for manufacturing a backdrilled zero stub. The second embodiment is merely a preferred embodiment of the first embodiment, and the implementation of the second embodiment will not affect the independent implementation of the first embodiment.

[0080] Specifically, the second embodiment of the present application provides a method for manufacturing a back-drilled zero stub. The difference is that, in the multiple pressing steps, the first pressing adopts a low-temperature pressing process, the pressing temperature is controlled at 150-180°C, and the pressing time is 60-90 minutes to ensure that the resin flows fully and does not damage the inner layer circuit; the second pressing adopts a high-temperature pressing process, the pressing temperature is controlled at 180-200°C, and the pressing time is 30-60 minutes to improve the interlayer bonding strength.

[0081] Compared with the related art, the method for making a back-drilled zero stub provided by the present invention has the following advantages:

[0082] Beneficial effects:

[0083] By adopting a phased lamination process, the first lamination adopts a low-temperature lamination process of 150-180℃, and the lamination time is controlled at 60-90 minutes, which can ensure the full flow of resin and better fusion of each layer of material, while avoiding damage to the inner layer circuit, ensuring the integrity and functionality of the inner layer circuit. During the second lamination, the temperature is raised to 180-200℃ and the lamination time is 30-60 minutes. This high-temperature lamination process effectively improves the interlayer bonding strength and enhances the stability of the overall structure of the circuit board. During multiple lamination processes, reasonable temperature and time control ensures the safety of the internal circuits during the production process of the circuit board, and improves the overall mechanical properties, reduces the probability of problems such as interlayer separation, and improves the reliability and yield of the product.

[0084] Third embodiment

[0085] Based on the method for fabricating a backdrilled zero stub provided in the first embodiment of this application, the third embodiment of this application provides another method for fabricating a backdrilled zero stub. The third embodiment is merely a preferred embodiment of the first embodiment, and the implementation of the third embodiment will not affect the independent implementation of the first embodiment.

[0086] Specifically, the third embodiment of the present application provides a method for manufacturing a back-drilled zero stub. The difference is that in the resin plugging step, a vacuum plugging process is adopted, the vacuum degree is controlled between -0.08MPa and -0.1MPa, and the plugging pressure is 0.3-0.5MPa to ensure that the resin completely fills the through hole and no bubbles remain; after plugging, a pre-curing treatment is performed, the pre-curing temperature is 80-100°C, and the time is 30-45 minutes, so that the resin reaches the B-stage state.

[0087] Compared with the related art, the method for making a back-drilled zero stub provided by the present invention has the following advantages:

[0088] Beneficial effects:

[0089] By adopting the vacuum plugging process, the vacuum degree is strictly controlled between -0.08MPa and -0.1MPa, and the plugging pressure is set to 0.3-0.5MPa to ensure that the resin can completely fill the through-hole without any bubbles remaining. This improvement effectively avoids problems such as decreased insulation performance of the hole wall and interference during signal transmission caused by loose plugging or the presence of bubbles, thereby improving the quality of the plugging and increasing the electrical performance stability of the circuit board.

[0090] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for manufacturing a backdrilled zero stub, characterized in that: The following steps are involved: S1. Inner layer pattern production: transfer the required pattern to CCL; S2, drilling: drilling a through hole in the current layer using a drill bit; S3, copper plating: deposit a layer of copper on the hole wall as an electroplated conductor; S4, electroplating: electroplating the required copper thickness on the hole wall; S5, resin plugging: plug all through holes that need to be back-drilled in the current layer with resin ink; S6, ceramic grinding plate: grind the protruding resin ink on the plate surface; S7, outer layer pattern production: open a window on the current layer corresponding to the back-drilled hole of the previous layer. The window is 4 mil larger than the hole of the previous layer. S8. Multiple lamination: Using multiple lamination process, first treat the back-drilled residual hole copper as a through hole and complete the plugging. Through repeated lamination, drilling, plugging, and etching, the designed back-drilled hole is completed through multiple laminations. In theory, more layers of boards can be produced by lamination, drilling, and plugging multiple times. S9. Subsequent processing: including solder mask, printing solder mask ink on the outer layer to protect the outer layer; characters, marking characters on each component PAD and hole; gold plating, performing gold plating surface treatment on the PAD where components need to be attached; molding, shaping the appearance according to requirements.

2. The method for manufacturing a backdrilled zero stub according to claim 1, characterized in that: In the multiple lamination steps, the number of layers and specific process parameters of each lamination are determined according to the actual board layer design, and the drilling, plugging and etching operations performed after each lamination are all performed on the current board layer structure after lamination.

3. The method for manufacturing a back-drilled zero stub according to claim 1, characterized in that: In the drilling step, the selection of the drill bit and the drilling parameters are adjusted according to factors such as the thickness of the board layer and the hole diameter requirements to ensure that the drilled through hole meets the design standards.

4. The method for manufacturing a back-drilled zero stub according to claim 1, characterized in that: In the copper deposition step and the electroplating step, the copper deposition thickness and electroplating process parameters are determined according to the electrical performance requirements of the final product to ensure the conductivity and stability of the hole wall copper layer.

5. The method for manufacturing a back-drilled zero stub according to claim 1, characterized in that: In the resin plugging step, the resin ink used must meet the requirements of good adhesion to the hole wall, curing performance and insulation performance to ensure that the plugging effect is stable and reliable.

6. The method for manufacturing a back-drilled zero stub according to claim 1, characterized in that: In the ceramic plate grinding step, the plate grinding process parameters are controlled within a range that can completely grind away the protruding resin ink on the plate surface without damaging other structures of the plate layer.

7. The method for manufacturing a back-drilled zero stub according to claim 1, characterized in that: In the outer layer pattern making step, the window size is 4 mil larger than the hole of the previous layer in order to ensure the connectivity and signal transmission performance of the back drilled holes between the layers.

8. The method for manufacturing a backdrilled zero stub according to claim 1, characterized in that: The gold plating process in the subsequent processing step adopts a chemical nickel-gold plating process, wherein the thickness of the nickel layer is controlled at 3-5 μm and the thickness of the gold layer is controlled at 0.05-0.1 μm to ensure the flatness and solderability of the PAD surface and improve the corrosion resistance.

9. The method for manufacturing a back-drilled zero stub according to claim 2, characterized in that: In the multiple pressing steps, the first pressing adopts a low-temperature pressing process, the pressing temperature is controlled at 150-180°C, and the pressing time is 60-90 minutes to ensure that the resin flows fully and does not damage the inner layer circuit; the second pressing adopts a high-temperature pressing process, the pressing temperature is controlled at 180-200°C, and the pressing time is 30-60 minutes to improve the interlayer bonding strength.

10. The method for manufacturing a back-drilled zero stub according to claim 5, characterized in that: In the resin plugging step, a vacuum plugging process is adopted, the vacuum degree is controlled between -0.08MPa and -0.1MPa, and the plugging pressure is 0.3-0.5MPa to ensure that the resin completely fills the through hole and no bubbles remain; after plugging, a pre-curing treatment is performed at a pre-curing temperature of 80-100°C and a time of 30-45 minutes to allow the resin to reach the B-stage state.

Images