Laminated ceramic electronic component
By configuring the base electrode layer, conductive resin layer and plating layer on the end face of the stacked ceramic capacitor, the bonding problem between the internal conductor layer and the external electrode is solved, the external electrode is made thinner, and the increase in the length direction dimension is avoided.
Patent Information
- Application Number
- CN202411968218.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-19
- Filing Date
- 2024-12-30
- Publication Date
- 2025-09-26
AI Technical Summary
Conventional multilayer ceramic capacitors have difficulty in achieving thinner external electrodes while ensuring adhesion between the internal conductive layer and the external electrodes, resulting in an increase in the longitudinal dimension, which is not preferable.
The first and second external electrodes are arranged on the end faces of the stack. The external electrodes include a base electrode layer, a conductive resin layer and a plating layer. The base electrode layer is intermittently present in the area near the inner layer portion, and the conductive resin layer is in contact with the ceramic layer and the internal conductor layer.
The bonding between the internal conductor layer and the external electrode is achieved, and at the same time, the external electrode is made thinner, avoiding an excessive increase in the length direction.
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Figure CN120709074A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a multilayer ceramic electronic component. Background Art
[0002] In recent years, multilayer ceramic capacitors, which are multilayer ceramic electronic components, have been required to withstand harsh environments such as flexural stress caused by thermal expansion. To address this, a technology using a thermosetting conductive resin paste for the external electrodes of multilayer ceramic capacitors has become known. Patent Document 1 is cited as a document demonstrating this technology. Patent Document 1 describes a multilayer ceramic capacitor having external electrodes having a layered structure comprising an electrode layer, a conductive epoxy-based thermosetting resin layer, a nickel-plated layer, and a tin-based layer stacked in this order. The electrode layer is obtained by applying a conductive paste by dipping and then sintering it.
[0003] Prior art literature
[0004] Patent Literature
[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 11-162771 Summary of the Invention
[0006] Problems to be solved by the invention
[0007] The multilayer ceramic capacitor disclosed in Patent Document 1 suppresses cracking in the laminated body through stress relaxation caused by sacrificial destruction and deformation of the resin layer. However, multilayer ceramic capacitors with such resin layers present challenges in ensuring adhesion between internal and external electrode layers while simultaneously achieving thinner external electrodes. For example, thicker external electrodes increase the longitudinal dimensions of the multilayer ceramic capacitor, which is undesirable.
[0008] An object of the present invention is to provide a multilayer ceramic electronic component capable of ensuring the bonding between an internal conductive layer and an external electrode while achieving a reduction in the thickness of the external electrode.
[0009] Technical solutions to solve problems
[0010] The multilayer ceramic electronic component according to the present invention comprises: a laminated body including a plurality of stacked ceramic layers and a plurality of internal conductor layers, having a first main surface and a second main surface opposite to each other in a height direction, a first side surface and a second side surface opposite to each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposite to each other in a length direction perpendicular to the height direction and the width direction; a first external electrode arranged on the first end surface; and a second external electrode arranged on the second end surface, wherein the laminated body comprises: an inner layer portion including the ceramic layer and the internal conductor layer; and a first outer layer portion and a second outer layer portion. It is configured to clamp the inner layer portion in the height direction, and the first external electrode and the second external electrode have: an end face side base electrode layer; an end face side conductive resin layer, which is configured on the end face side base electrode layer; and an end face side plating layer, which is configured on the end face side conductive resin layer, and the end face side base electrode layer has a discontinuous area where the end face side base electrode layer is intermittent at least in the area near the first outer layer portion and the area near the second outer layer portion of the inner layer portion, and in the area where the end face side base electrode layer is discontinuous, the end face side conductive resin layer is in contact with the ceramic layer and the end portion of the internal conductor layer.
[0011] Effects of the Invention
[0012] According to the present invention, it is possible to provide a multilayer ceramic electronic component capable of ensuring the bonding between the internal conductive layer and the external electrode while achieving thinning of the external electrode. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 This is a perspective view of the appearance of a multilayer ceramic capacitor according to this embodiment.
[0014] Figure 2 It is along Figure 1 A cross-sectional view taken along line II-II of the multilayer ceramic capacitor shown.
[0015] Figure 3 It is along Figure 2 A cross-sectional view taken along line III-III of the multilayer ceramic capacitor shown.
[0016] Figure 4 It is along Figure 2 A cross-sectional view taken along line IV-IV of the multilayer ceramic capacitor shown.
[0017] Figure 5 yes Figure 2 The enlarged view of the V portion of the multilayer ceramic capacitor shown is a schematic diagram for explaining the bonding portion between the end surface side base electrode layer and the end surface side conductive resin layer of the multilayer ceramic capacitor.
[0018] Figure 6Schematic diagram showing an example of the structure of a dual-structured multilayer ceramic capacitor.
[0019] Figure 7 Schematic diagram showing an example of the structure of a triple-structured multilayer ceramic capacitor.
[0020] Figure 8 Schematic diagram showing an example of the structure of a quadruple-structured multilayer ceramic capacitor.
[0021] Description of Reference Numerals
[0022] 1. Multilayer ceramic capacitors (multilayer ceramic electronic components);
[0023] 10 laminates;
[0024] 20 dielectric layer (ceramic layer);
[0025] 30 internal electrode layer (internal conductor layer);
[0026] 31 first internal electrode layer (first internal conductor layer);
[0027] 32 second internal electrode layer (second internal conductor layer);
[0028] 40A first external electrode;
[0029] 40B second external electrode;
[0030] 50A first base electrode layer;
[0031] 50B second base electrode layer;
[0032] 54 discontinuous area;
[0033] 55 interruption area;
[0034] 60A first conductive resin layer;
[0035] 60B second conductive resin layer;
[0036] 70A first plating layer;
[0037] 70B second plating layer;
[0038] T height direction;
[0039] TS1 first main surface;
[0040] TS2 second main surface;
[0041] W width direction;
[0042] WS1 first side;
[0043] WS2 second side;
[0044] L length direction;
[0045] LS1 first end face;
[0046] LS2 second end face. DETAILED DESCRIPTION
[0047] <Implementation Method>
[0048] Below, use Figures 1 to 4 A multilayer ceramic capacitor 1 as a multilayer ceramic electronic component according to a first embodiment of the present disclosure will be described. Figure 1 1 is a perspective view of the appearance of a multilayer ceramic capacitor 1 according to the present embodiment. Figure 2 It is along Figure 1 1 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line II-II. Figure 3 It is along Figure 2 1 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III. Figure 4 It is along Figure 2 1 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line IV-IV.
[0049] It should be noted that the drawings are sometimes simplified for the purpose of illustrating the content of the invention, and the depicted components or the ratios of the dimensions between the components are sometimes inconsistent with the ratios of these dimensions described in the specification. In addition, the components described in the specification are sometimes omitted in the drawings or depicted with the number omitted. For example, for the convenience of explanation, Figure 2 、 Figure 3 The number of internal electrode layers described is 10, but this does not indicate the actual number of internal electrode layers 30. It should be noted that the shapes and geometric conditions used in the present invention, as well as the terms specifying their degree, such as "parallel," "orthogonal," and "same," and the values of lengths and angles, are not to be strictly defined and are to be interpreted as encompassing a range within which the same function can be expected.
[0050] The multilayer ceramic capacitor 1 includes a laminate 10 and external electrodes 40 .
[0051] exist Figures 1 to 4 The XYZ orthogonal coordinate system is shown in FIG. The length direction L of the multilayer ceramic capacitor 1 and the multilayer body 10 corresponds to the X direction. The width direction W of the multilayer ceramic capacitor 1 and the multilayer body 10 corresponds to the Y direction. The stacking direction T, which is the height direction of the multilayer ceramic capacitor 1 and the multilayer body 10, corresponds to the Z direction. Here, Figure 2 The section shown is also referred to as the LT section. Figure 3 The cross section shown is also referred to as the WT cross section. Figure 4 The cross section shown is also referred to as the LW cross section.
[0052] like Figures 1 to 4 As shown, the stack 10 includes a first main surface TS1 and a second main surface TS2 opposite to each other in the stacking direction T, a first side surface WS1 and a second side surface WS2 opposite to each other in the width direction W orthogonal to the stacking direction T, and a first end surface LS1 and a second end surface LS2 opposite to each other in the length direction L orthogonal to the stacking direction T and the width direction W.
[0053] like Figure 1 As shown, the laminate 10 has a generally rectangular parallelepiped shape. It should be noted that the length L of the laminate 10 is not necessarily longer than the width W. The corners and ridges of the laminate 10 are preferably rounded. A corner is where three surfaces of the laminate 10 intersect, and a ridge is where two surfaces of the laminate 10 intersect. It should be noted that concavities and convexities may be formed on part or all of the surface constituting the laminate 10.
[0054] The dimensions of the laminate 10 are not particularly limited, but when the dimension in the longitudinal direction L of the laminate 10 is defined as the L dimension, the L dimension is preferably 0.2 mm or more and 10 mm or less. Furthermore, when the dimension in the stacking direction T of the laminate 10 is defined as the T dimension, the T dimension is preferably 0.1 mm or more and 10 mm or less. Furthermore, when the dimension in the width direction W of the laminate 10 is defined as the W dimension, the W dimension is preferably 0.1 mm or more and 10 mm or less.
[0055] like Figure 2 and Figure 3 As shown, the laminate 10 includes an inner layer portion 11 , and a first main surface side outer layer portion 12A as a first outer layer portion and a second main surface side outer layer portion 12B as a second outer layer portion arranged in the lamination direction T to sandwich the inner layer portion 11 .
[0056] The inner portion 11 includes a plurality of dielectric layers 20 serving as ceramic layers and a plurality of internal electrode layers 30 serving as internal conductor layers. The inner portion 11 includes the internal electrode layer 30 located closest to the first principal surface TS1 and the internal electrode layer 30 located closest to the second principal surface TS2 in the stacking direction T. In the inner portion 11, the plurality of internal electrode layers 30 are arranged opposite each other with the dielectric layer 20 interposed therebetween. The inner portion 11 is the portion that generates capacitance and essentially functions as a capacitor.
[0057] The plurality of dielectric layers 20 are formed of a dielectric material. For example, the dielectric material may be a dielectric ceramic containing BaTiO3, CaTiO3, SrTiO3, or CaZrO3. Alternatively, the dielectric material may be a material obtained by adding secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds to these primary components.
[0058] The thickness of dielectric layer 20 is preferably not less than 0.5 μm and not more than 15 μm. The number of dielectric layers 20 stacked is preferably not less than 10 and not more than 700. It should be noted that the number of dielectric layers 20 is the sum of the number of dielectric layers in inner layer portion 11 and the number of dielectric layers in first principal surface-side outer layer portion 12A and second principal surface-side outer layer portion 12B.
[0059] The plurality of internal electrode layers 30 include first internal electrode layers 31 as a plurality of first internal conductor layers and second internal electrode layers 32 as a plurality of second internal conductor layers. The plurality of first internal electrode layers 31 are arranged on the plurality of dielectric layers 20. The plurality of second internal electrode layers 32 are arranged on the plurality of dielectric layers 20. The plurality of first internal electrode layers 31 and the plurality of second internal electrode layers 32 are alternately arranged in the stacking direction T of the laminate 10, with the dielectric layers 20 interposed therebetween. The first internal electrode layers 31 and the second internal electrode layers 32 are arranged so as to sandwich the dielectric layer 20.
[0060] The first internal electrode layer 31 includes a first opposing portion 31A opposing the second internal electrode layer 32 and a first lead portion 31B led out from the first opposing portion 31A toward the first end surface LS1. The first lead portion 31B is exposed at the first end surface LS1.
[0061] The second internal electrode layer 32 includes a second opposing portion 32A opposing the first internal electrode layer 31 and a second lead portion 32B led out from the second opposing portion 32A toward the second end surface LS2. The second lead portion 32B is exposed at the second end surface LS2.
[0062] In the present embodiment, the first opposing portion 31A and the second opposing portion 32A face each other via the dielectric layer 20 to form capacitance, thereby exhibiting capacitor characteristics.
[0063] The shapes of the first opposing portion 31A and the second opposing portion 32A are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded, or the rectangular corners may be inclined. The shapes of the first lead portion 31B and the second lead portion 32B are not particularly limited, but are preferably rectangular. However, the corners of the rectangular shape may be rounded, or the rectangular corners may be inclined.
[0064] The first opposing portion 31A and the first lead portion 31B may have the same width W dimension, or one of them may be smaller. The second opposing portion 32A and the second lead portion 32B may have the same width W dimension, or one of them may be smaller.
[0065] The first internal electrode layers 31 and the second internal electrode layers 32 are formed of a suitable conductive material, such as a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing at least one of these metals. When an alloy is used, the first internal electrode layers 31 and the second internal electrode layers 32 may be formed of, for example, an Ag-Pd alloy.
[0066] The thickness of each of the first internal electrode layer 31 and the second internal electrode layer 32 is preferably about 0.2 μm to 2.0 μm, for example. The total number of the first internal electrode layers 31 and the second internal electrode layers 32 is preferably 10 to 700.
[0067] The first principal surface-side outer layer portion 12A is located on the first principal surface TS1 side of the laminate 10. The first principal surface-side outer layer portion 12A is an aggregate of a plurality of dielectric layers 20 located between the first principal surface TS1 and the internal electrode layer 30 closest to the first principal surface TS1. The dielectric layers 20 used in the first principal surface-side outer layer portion 12A may be the same as the dielectric layers 20 used in the internal layer portion 11, or may be dielectric layers composed of different materials.
[0068] The second principal surface-side outer layer portion 12B is located on the second principal surface TS2 side of the laminate 10. The second principal surface-side outer layer portion 12B is an aggregate of a plurality of dielectric layers 20 located between the second principal surface TS2 and the internal electrode layer 30 closest to the second principal surface TS2. The dielectric layers 20 used in the second principal surface-side outer layer portion 12B may be the same as the dielectric layers 20 used in the internal layer portion 11, or may be dielectric layers made of different materials.
[0069] The laminate 10 includes an opposing electrode portion 11E. The opposing electrode portion 11E is a portion where the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 face each other. The opposing electrode portion 11E is a portion of the inner layer portion 11. Figure 4 ] shows the range of the opposing electrode portion 11E in the width direction W and the length direction L. It should be noted that the opposing electrode portion 11E is also referred to as a capacitor effective portion.
[0070] It should be noted that the stacked body 10 has a side outer layer portion. The side outer layer portion includes a first side outer layer portion WG1 and a second side outer layer portion WG2. The first side outer layer portion WG1 is a portion including the dielectric layer 20 located between the opposing electrode portion 11E and the first side WS1. The second side outer layer portion WG2 is a portion including the dielectric layer 20 located between the opposing electrode portion 11E and the second side WS2. Figure 3 and Figure 4 , the range of the first side outer layer portion WG1 and the second side outer layer portion WG2 in the width direction W is shown. Note that the side outer layer portion is also referred to as a W gap or a side gap.
[0071] It should be noted that the stacked body 10 has an end face side outer layer portion. The end face side outer layer portion includes a first end face side outer layer portion LG1 and a second end face side outer layer portion LG2. The first end face side outer layer portion LG1 is a portion including the dielectric layer 20 located between the opposing electrode portion 11E and the first end face LS1. The second end face side outer layer portion LG2 is a portion including the dielectric layer 20 located between the opposing electrode portion 11E and the second end face LS2. Figure 2 and Figure 4 , the range of the first end surface side outer layer portion LG1 and the second end surface side outer layer portion LG2 in the longitudinal direction L is shown. In addition, the end surface side outer layer portion is also called an L gap or an end gap.
[0072] The external electrode 40 includes a first external electrode 40A arranged on the first end surface LS1 side and a second external electrode 40B arranged on the second end surface LS2 side.
[0073] The first external electrode 40A is arranged on the first end surface LS1. The first external electrode 40A is connected to the first internal electrode layer 31. The first external electrode 40A may also be arranged on a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2. In this embodiment, the first external electrode 40A has a first end surface side external electrode 40A1, a first main surface side external electrode 40A2, and a first side surface side external electrode 40A3. The first end surface side external electrode 40A1 is arranged on the first end surface LS1. The first main surface side external electrode 40A2 is connected to the first end surface side external electrode 40A1 and is arranged on a portion of the first end surface LS1 side of the first main surface TS1 and the second main surface TS2. The first side surface side external electrode 40A3 is connected to the first end surface side external electrode 40A1 and is arranged on a portion of the first side surface WS1 and the second side surface WS2 on the first end surface LS1 side. In this manner, the first outer electrode 40A is formed to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2 , and to a portion of the first side surface WS1 and a portion of the second side surface WS2 .
[0074] The second external electrode 40B is arranged on the second end surface LS2. The second external electrode 40B is connected to the second internal electrode layer 32. The second external electrode 40B may also be arranged on a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2. In this embodiment, the second external electrode 40B has a second end surface side external electrode 40B1, a second main surface side external electrode 40B2, and a second side surface side external electrode 40B3. The second end surface side external electrode 40B1 is arranged on the second end surface LS2. The second main surface side external electrode 40B2 is connected to the second end surface side external electrode 40B1 and is arranged on a portion of the first main surface TS1 and the second main surface TS2 on the second end surface LS2 side. The second side surface side external electrode 40B3 is connected to the second end surface side external electrode 40B1 and is arranged on a portion of the first side surface WS1 and the second side surface WS2 on the second end surface LS2 side. In this manner, the second outer electrode 40B is formed to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2 , and a portion of the first side surface WS1 and a portion of the second side surface WS2 .
[0075] As described above, within the laminate 10, a capacitor is formed by the first opposing portion 31A of the first internal electrode layer 31 and the second opposing portion 32A of the second internal electrode layer 32 facing each other via the dielectric layer 20. Therefore, capacitor characteristics are exhibited between the first external electrode 40A connected to the first internal electrode layer 31 and the second external electrode 40B connected to the second internal electrode layer 32.
[0076] The first external electrode 40A includes a first base electrode layer 50A including a metal component, a first conductive resin layer 60A disposed on the first base electrode layer 50A, and a first plating layer 70A disposed on the first conductive resin layer 60A.
[0077] The first foundation electrode layer 50A includes a first end surface side foundation electrode layer 50A1 , a first principal surface side foundation electrode layer 50A2 , and a first side surface side foundation electrode layer 50A3 .
[0078] The first conductive resin layer 60A includes a first end surface side conductive resin layer 60A1 , a first main surface side conductive resin layer 60A2 , and a first side surface side conductive resin layer 60A3 .
[0079] The first plating layer 70A includes a first end surface-side plating layer 70A1, a first main surface-side plating layer 70A2, and a first side surface-side plating layer 70A3. Alternatively, the first plating layer 70A may have a two-layer structure including a first Ni plating layer 71A as a lower plating layer and a first Sn plating layer 72A as an upper plating layer. The first Ni plating layer 71A includes a first end surface-side Ni plating layer 71A1, a first main surface-side Ni plating layer 71A2, and a first side surface-side Ni plating layer 71A3. The first Sn plating layer 72A includes a first end surface-side Sn plating layer 72A1, a first main surface-side Sn plating layer 72A2, and a first side surface-side Sn plating layer 72A3.
[0080] The second external electrode 40B includes a second base electrode layer 50B including a metal component, a second conductive resin layer 60B disposed on the second base electrode layer 50B, and a second plating layer 70B disposed on the second conductive resin layer 60B.
[0081] The second foundation electrode layer 50B includes a second end surface side foundation electrode layer 50B1 , a second principal surface side foundation electrode layer 50B2 , and a second side surface side foundation electrode layer 50B3 .
[0082] The second conductive resin layer 60B includes a second end surface side conductive resin layer 60B1 , a second main surface side conductive resin layer 60B2 , and a second side surface side conductive resin layer 60B3 .
[0083] The second plating layer 70B includes a second end surface-side plating layer 70B1, a second main surface-side plating layer 70B2, and a second side surface-side plating layer 70B3. Alternatively, the second plating layer 70B may have a two-layer structure including a second Ni plating layer 71B as a lower plating layer and a second Sn plating layer 72B as an upper plating layer. The second Ni plating layer 71B includes a second end surface-side Ni plating layer 71B1, a second main surface-side Ni plating layer 71B2, and a second side surface-side Ni plating layer 71B3. The second Sn plating layer 72B includes a second end surface-side Sn plating layer 72B1, a second main surface-side Sn plating layer 72B2, and a second side surface-side Sn plating layer 72B3.
[0084] Here, the basic structure of the layers constituting the first external electrode 40A and the second external electrode 40B is the same. Furthermore, the first external electrode 40A and the second external electrode 40B are substantially plane-symmetrical with respect to the LW cross-section taken at the center of the longitudinal direction L of the multilayer ceramic capacitor 1. Therefore, when describing the first external electrode 40A and the second external electrode 40B without distinguishing them, the first external electrode 40A and the second external electrode 40B are sometimes collectively referred to as the external electrode 40. Furthermore, when describing the first foundation electrode layer 50A and the second foundation electrode layer 50B without distinguishing them, the first foundation electrode layer 50A and the second foundation electrode layer 50B are sometimes collectively referred to as the foundation electrode layer 50. Furthermore, when describing the first end surface-side foundation electrode layer 50A1 and the second end surface-side foundation electrode layer 50B1 without distinguishing them, the first end surface-side foundation electrode layer 50A1 and the second end surface-side foundation electrode layer 50B1 are sometimes collectively referred to as the end surface-side foundation electrode layer 501.
[0085] In addition, when the first conductive resin layer 60A and the second conductive resin layer 60B are not particularly distinguished from each other in description, the first conductive resin layer 60A and the second conductive resin layer 60B are sometimes collectively referred to as the conductive resin layer 60. In addition, when the first end surface side conductive resin layer 60A1 and the second end surface side conductive resin layer 60B1 are not particularly distinguished from each other in description, the first end surface side conductive resin layer 60A1 and the second end surface side conductive resin layer 60B1 are sometimes collectively referred to as the end surface side conductive resin layer 601.
[0086] In the case where the first plating layer 70A and the second plating layer 70B are not specifically distinguished from each other, the first plating layer 70A and the second plating layer 70B are sometimes collectively referred to as the plating layer 70. In the case where the first end surface side plating layer 70A1 and the second end surface side plating layer 70B1 are not specifically distinguished from each other, the first end surface side plating layer 70A1 and the second end surface side plating layer 70B1 are sometimes collectively referred to as the end surface side plating layer 701. In the case where the first Ni plating layer 71A and the second Ni plating layer 71B are not specifically distinguished from each other, the first Ni plating layer 71A and the second Ni plating layer 71B are sometimes collectively referred to as the Ni plating layer 71. In the case where the first Sn plating layer 72A and the second Sn plating layer 72B are not specifically distinguished from each other, the first Sn plating layer 72A and the second Sn plating layer 72B are sometimes collectively referred to as the Sn plating layer 72. When the first end surface side Ni plating layer 71A1 and the second end surface side Ni plating layer 71B1 are not specifically distinguished from each other in description, the first end surface side Ni plating layer 71A1 and the second end surface side Ni plating layer 71B1 are sometimes collectively referred to as the end surface side Ni plating layer 711. Furthermore, when the first end surface side Sn plating layer 72A1 and the second end surface side Sn plating layer 72B1 are not specifically distinguished from each other in description, the first end surface side Sn plating layer 72A1 and the second end surface side Sn plating layer 72B1 are sometimes collectively referred to as the end surface side Sn plating layer 721.
[0087] In addition, when describing the first end surface LS1 and the second end surface LS2 without particularly distinguishing between them, the first end surface LS1 and the second end surface LS2 may be collectively referred to as the end surface LS.
[0088] When describing the first main surface side outer layer portion 12A and the second main surface side outer layer portion 12B without distinguishing them in particular, the first main surface side outer layer portion 12A and the second main surface side outer layer portion 12B may be collectively referred to as the outer layer portion 12 .
[0089] Next, the foundation electrode layer 50 will be described. The foundation electrode layer 50 includes a first foundation electrode layer 50A and a second foundation electrode layer 50B.
[0090] The first foundation electrode layer 50A is arranged on the first end surface LS1. The first foundation electrode layer 50A is connected to the first internal electrode layer 31. Alternatively, the first foundation electrode layer 50A may be arranged on a portion of the first principal surface TS1 and a portion of the second principal surface TS2, and on a portion of the first side surface WS1 and a portion of the second side surface WS2. In this embodiment, the first foundation electrode layer 50A is formed so as to extend from the first end surface LS1 to a portion of the first principal surface TS1 and a portion of the second principal surface TS2, and on a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, in the first foundation electrode layer 50A, the first end surface-side foundation electrode layer 50A1 is arranged on the first end surface LS1, the first principal surface-side foundation electrode layer 50A2 is arranged to extend from the first end surface LS1 to a portion of the first principal surface TS1 and a portion of the second principal surface TS2, and the first side surface-side foundation electrode layer 50A3 is arranged to extend from the first end surface LS1 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0091] The second foundation electrode layer 50B is arranged on the second end surface LS2. The second foundation electrode layer 50B is connected to the second internal electrode layer 32. Alternatively, the second foundation electrode layer 50B may be arranged on a portion of the first main surface TS1 and a portion of the second main surface TS2, and a portion of the first side surface WS1 and a portion of the second side surface WS2. In this embodiment, the second foundation electrode layer 50B is formed to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, in the second foundation electrode layer 50B, the second end surface-side foundation electrode layer 50B1 is arranged on the second end surface LS2, the second main surface-side foundation electrode layer 50B2 is arranged to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and the second side surface-side foundation electrode layer 50B3 is arranged to extend from the second end surface LS2 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0092] The first base electrode layer 50A and the second base electrode layer 50B of this embodiment are sintered layers. The sintered layers preferably include a metal component and either a glass component or a ceramic component, or both. This improves the adhesion between the laminate 10 and the base electrode layer 50. The metal component includes, for example, at least one selected from Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, etc. The glass component includes, for example, at least one selected from B, Si, Ba, Mg, Al, Li, etc. The presence of a glass component can assist in sintering the metal component in the base electrode layer and promote sintering. The ceramic component can use the same type of ceramic material as the dielectric layer 20, or a different type of ceramic material. The ceramic component includes, for example, at least one selected from BaTiO3, CaTiO3, (Ba, Ca)TiO3, SrTiO3, CaZrO3, etc.
[0093] The sintered layer is obtained by, for example, applying a conductive paste containing glass and metal to a laminate and sintering the laminate. The sintered layer can be obtained by simultaneously sintering a laminated chip having an internal electrode layer and a dielectric layer and a conductive paste applied to the laminated chip, or by sintering the laminated chip to obtain a laminate. It should be noted that when simultaneously sintering a laminated chip having an internal electrode layer and a dielectric layer and a conductive paste applied to the laminated chip, the sintered layer is preferably formed by sintering a material to which a ceramic material has been added instead of a glass component. In this case, it is particularly preferred to use a ceramic material of the same type as the dielectric layer 20 as the added ceramic material. The sintered layer can also be a plurality of layers.
[0094] The thickness of the first end surface side base electrode layer 50A1 in the longitudinal direction located at the first end surface LS1 is preferably about 2 μm or more and 220 μm or less at the center portion of the first end surface side base electrode layer 50A1 in the stacking direction T and the width direction W. More preferably, the thickness of the first end surface side base electrode layer 50A1 in the longitudinal direction is in the range of about 10 μm or more and 45 μm or less.
[0095] The thickness of the second end face side base electrode layer 50B1 in the longitudinal direction located at the second end face LS2 is preferably about 2 μm or more and 220 μm or less at the center of the second end face side base electrode layer 50B1 in the stacking direction T and the width direction W. More preferably, the thickness of the second end face side base electrode layer 50B1 in the longitudinal direction is in the range of about 10 μm or more and 45 μm or less.
[0096] When the first foundation electrode layer 50A is also provided on a portion of at least one of the first principal surface TS1 or the second principal surface TS2, the thickness in the stacking direction of the first principal surface side foundation electrode layer 50A2 provided in this portion is preferably, for example, not less than 4 μm and not more than 40 μm at the center of the first principal surface side foundation electrode layer 50A2 provided in this portion in the longitudinal direction L and the width direction W. More preferably, the thickness in the stacking direction of the first principal surface side foundation electrode layer 50A2 is in the range of not less than 2 μm and not more than 15 μm.
[0097] When the first foundation electrode layer 50A is also provided on a portion of at least one of the first side surface WS1 or the second side surface WS2, the thickness of the first side surface foundation electrode layer 50A3 provided on this portion in the width direction is preferably, for example, not less than 4 μm and not more than 40 μm at the center of the first side surface foundation electrode layer 50A3 provided on this portion in the longitudinal direction L and the stacking direction T. More preferably, the thickness of the first side surface foundation electrode layer 50A3 in the width direction is in the range of not less than 2 μm and not more than 15 μm.
[0098] When the second foundation electrode layer 50B is also provided on a portion of at least one of the first principal surface TS1 or the second principal surface TS2, the thickness of the second principal surface-side foundation electrode layer 50B2 provided in the stacking direction in the center portion of the second principal surface-side foundation electrode layer 50B2 provided in the longitudinal direction L and the width direction W of the second principal surface-side foundation electrode layer 50B2 provided in the stacking direction is preferably, for example, not less than 4 μm and not more than 40 μm. More preferably, the thickness of the second principal surface-side foundation electrode layer 50B2 in the stacking direction is preferably not less than 2 μm and not more than 15 μm.
[0099] When the second foundation electrode layer 50B is also provided on a portion of at least one of the first side surface WS1 or the second side surface WS2, the thickness of the second side surface foundation electrode layer 50B3 provided on this portion in the width direction is preferably, for example, not less than 4 μm and not more than 40 μm at the center of the second side surface foundation electrode layer 50B3 provided on this portion in the longitudinal direction L and the stacking direction T. More preferably, the thickness of the second side surface foundation electrode layer 50B3 in the width direction is in the range of not less than 2 μm and not more than 15 μm.
[0100] The external electrode 40 includes a conductive resin layer 60 including a resin component and a metal component, which is disposed on the base electrode layer 50. The conductive resin layer 60 includes a first conductive resin layer 60A and a second conductive resin layer 60B.
[0101] The first conductive resin layer 60A is arranged to cover the first base electrode layer 50A. The end of the first conductive resin layer 60A preferably contacts the laminate 10. The end of the first conductive resin layer 60A refers to the portion of the first conductive resin layer 60A that is closer to the second end surface LS2 than the first base electrode layer 50A in the longitudinal direction L. In this embodiment, the first conductive resin layer 60A includes the first end surface-side conductive resin layer 60A1 arranged on the first end surface LS1, the first principal surface-side conductive resin layer 60A2 extending from the first end surface LS1 to a portion of the first principal surface TS1 and a portion of the second principal surface TS2, and the first side surface-side conductive resin layer 60A3 extending from the first end surface LS1 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0102] The second conductive resin layer 60B is arranged to cover the second base electrode layer 50B. The end of the second conductive resin layer 60B preferably contacts the laminate 10. The end of the second conductive resin layer 60B refers to the portion of the second conductive resin layer 60B that is closer to the first end surface LS1 than the second base electrode layer 50B in the longitudinal direction L. In this embodiment, the second conductive resin layer 60B includes the second end surface-side conductive resin layer 60B1 arranged on the second end surface LS2, the second principal surface-side conductive resin layer 60B2 extending from the second end surface LS2 to a portion of the first principal surface TS1 and a portion of the second principal surface TS2, and the second side surface-side conductive resin layer 60B3 extending from the second end surface LS2 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0103] The thickness of the first end surface side conductive resin layer 60A1 located on the first end surface LS1 side in the longitudinal direction is preferably about 10 μm or more and 200 μm or less in the center portion in the stacking direction T and the width direction W of the first end surface side conductive resin layer 60A1 .
[0104] The thickness of the second end surface side conductive resin layer 60B1 located on the second end surface LS2 side in the longitudinal direction is preferably about 10 μm or more and 200 μm or less in the center portion in the stacking direction T and the width direction W of the second end surface side conductive resin layer 60B1 .
[0105] When the first conductive resin layer 60A is also provided on a portion of the first main surface TS1 side and a portion of the second main surface TS2 side, the thickness in the stacking direction T of the conductive resin layer 60A2 on the first main surface side provided in the portion is preferably greater than 10 μm and less than 200 μm in the central portion of the conductive resin layer 60A2 on the first main surface side provided in the portion in the length direction L and the width direction W.
[0106] When the first conductive resin layer 60A is also provided on a portion of the first side surface WS1 and a portion of the second side surface WS2, the thickness of the first side conductive resin layer 60A3 provided on the portion in the width direction W is preferably greater than 10 μm and less than 200 μm in the central portion of the first side conductive resin layer 60A3 provided on the portion in the length direction L and the stacking direction T.
[0107] When a second conductive resin layer 60B is also provided on a portion of the first main surface TS1 side and a portion of the second main surface TS2 side, the thickness in the stacking direction T of the conductive resin layer 60B2 on the second main surface side provided in the portion is preferably greater than 10 μm and less than 200 μm in the central portion of the conductive resin layer 60B2 on the second main surface side provided in the portion in the length direction L and the width direction W.
[0108] When a second conductive resin layer 60B is also provided on a portion of the first side WS1 side and a portion of the second side WS2 side, the thickness of the second side conductive resin layer 60B3 provided on the portion in the width direction W is preferably greater than 10 μm and less than 200 μm in the central portion of the second side conductive resin layer 60B3 provided on the portion in the length direction L and the stacking direction T.
[0109] Conductive resin layer 60 is disposed on base electrode layer 50. The internal structure of conductive resin layer 60 will be described later in the description of end-face-side conductive resin layer 601. Plating layer 70 is disposed to cover conductive resin layer 60. Plating layer 70 includes Ni plating layer 71 and Sn plating layer 72.
[0110] The plating layer 70 includes a first plating layer 70A and a second plating layer 70B.
[0111] The first plating layer 70A is configured to cover the first conductive resin layer 60A. In this embodiment, the first plating layer 70A is configured to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, in the first plating layer 70A, the first end surface side plating layer 70A1 is configured on the first end surface LS1, the first main surface side plating layer 70A2 is configured to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and the first side surface side plating layer 70A3 is configured to extend from the first end surface LS1 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0112] The second plating layer 70B is configured to cover the second conductive resin layer 60B. In this embodiment, the second plating layer 70B is configured to extend from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2, as well as a portion of the first side surface WS1 and a portion of the second side surface WS2. More specifically, in the second plating layer 70B, the second end surface side plating layer 70B1 is configured on the second end surface LS2, the second main surface side plating layer 70B2 is configured to extend from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and the second side surface side plating layer 70B3 is configured to extend from the second end surface LS2 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0113] Preferably, the plating layer 70 has a double-layer structure of a Ni plating layer 71 and a Sn plating layer 72. Preferably, a first Sn plating layer 72A is disposed on the first Ni plating layer 71A, and preferably, a second Sn plating layer 72B is disposed on the second Ni plating layer 71B. In this embodiment, the first end surface side Ni plating layer 71A1 and the first end surface side Sn plating layer 72A1 are disposed on the first end surface LS1, the first principal surface side Ni plating layer 71A2 and the first principal surface side Sn plating layer 72A2 are disposed so as to extend from the first end surface LS1 to a portion of the first principal surface TS1 and a portion of the second principal surface TS2, and the first side surface side Ni plating layer 71A3 and the first side surface side Sn plating layer 72A3 are disposed so as to extend from the first end surface LS1 to a portion of the first side surface WS1 and a portion of the second side surface WS2. Similarly, the second end face side Ni plating layer 71B1 and the second end face side Sn plating layer 72B1 are arranged on the second end face LS2, the above-mentioned second main surface side Ni plating layer 71B2 and the second main surface side Sn plating layer 72B2 are arranged to extend from the second end face LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2, and the above-mentioned second side surface side Ni plating layer 71B3 and the second side surface side Sn plating layer 72B3 are arranged to extend from the second end face LS2 to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0114] The Ni plating layer 71 prevents the base electrode layer 50 and the conductive resin layer 60 from being corroded by solder when mounting the multilayer ceramic capacitor 1. The Sn plating layer 72 improves the wettability of the solder when mounting the multilayer ceramic capacitor 1. This facilitates mounting of the multilayer ceramic capacitor 1.
[0115] The thickness of each of the first Ni plating layer 71A and the first Sn plating layer 72A is preferably 1 μm or more and 15 μm or less.
[0116] The thickness of each of the second Ni plating layer 71B and the second Sn plating layer 72B is preferably 1 μm or more and 15 μm or less.
[0117] Figure 5 yes Figure 2 The enlarged view of the V portion of the multilayer ceramic capacitor 1 shown is a schematic diagram for explaining the junction between the end surface side base electrode layer 501 and the end surface side conductive resin layer 601 of the multilayer ceramic capacitor 1. As described above, the first external electrode 40A and the second external electrode 40B have the same basic structure, so Figure 5 , and they are collectively described as the external electrode 40. Note that the same also applies to the other layers constituting the first external electrode 40A and the second external electrode 40B.
[0118] As described above, the external electrode 40 includes the end surface side base electrode layer 501 arranged on the end surface LS of the stacked body 10 , the end surface side conductive resin layer 601 arranged on the end surface side base electrode layer 501 , and the end surface side plating layer 701 arranged on the end surface side conductive resin layer 601 .
[0119] like Figure 5 As shown, the end surface side base electrode layer 501 is not formed entirely continuously on the end surface LS, but has intermittent regions 54. The intermittent region 54 includes one or more interrupted regions 55 where the end surface LS is exposed in the end surface side conductive resin layer 601.
[0120] The range of forming the discontinuous region 54 in the end surface side base electrode layer 501 is not particularly limited, but Figure 5 The area near the outer layer 12 of the inner layer 11 shown is formed. Figure 5 In the example of FIG, a plurality of discontinuous regions 55 are formed, and the ratio of the discontinuous regions 55 increases as the ratio approaches the outer layer portion 12 .
[0121] It should be noted that the discontinuous region 54 may be formed outside the region near the outer layer portion 12 of the end surface-side base electrode layer 501. For example, the discontinuous region 54 may be formed from the inner layer portion 11 to the outer layer portion 12, with the end surface-side conductive resin layer 601 in contact with the outer layer portion 12 at the interruption region 55. The discontinuous region 54 may be formed on the end surface LS of the laminate 10 in the region near the outer layer portion 12 in the inner layer portion 11 and in the outer layer portion 12, rather than in the central region in the height direction of the inner layer portion 11. The region near the outer layer portion 12 in the inner layer portion 11 extends in the height direction from the boundary between the inner layer portion 11 and the outer layer portion 12 toward the center of the inner layer portion 11 to a position that is 5% of the dimension of the inner layer portion 11 in the stacking direction T.
[0122] Furthermore, in this embodiment, the end surface-side base electrode layer 501 includes an anchor portion 56 formed in a portion adjacent to the interruption region 55. The anchor portion 56 is configured to extend from a portion in contact with the end surface LS of the stacked body 10 along the longitudinal direction of the stacked body 10 and then bend in a direction intersecting the longitudinal direction L. From the perspective of the anchor effect, the bending direction of the anchor portion 56 is preferably a direction close to the end surface LS.
[0123] The anchor portion 56 is a portion called an undercut in resin molding technology that forms a space between the end surface LS when the end surface LS is viewed from the outside. In the longitudinal direction L, the end surface side conductive resin layer 601 enters the space formed between the anchor portion 56 of the end surface side base electrode layer 501 and the end surface LS. Figure 5 , the anchor portion 56 is shown bent in the stacking direction T, which is the height direction. However, the direction in which the anchor portion 56 bends is not limited to the stacking direction T. The direction in which the anchor portion 56 bends may be any direction intersecting the longitudinal direction L, and any direction that allows a space to be formed between the anchor portion 56 and the end surface LS for the end surface-side conductive resin layer 601 to enter. For example, the anchor portion 56 may be formed to be bent in the width direction W.
[0124] The end-face-side conductive resin layer 601 disposed on the end-face-side base electrode layer 501 is in contact with the end face LS of the laminate 10 at the discontinuous region 54 of the end-face-side base electrode layer 501. Depending on the position of the discontinuous region 54, the end-face-side base electrode layer 501 may be in contact only with the dielectric layer 20 or may be in contact with both the dielectric layer 20 and the first lead portion 31B of the internal electrode layer 30. Depending on the shape of the discontinuous region 54, the end-face-side base electrode layer 501 may also be in contact only with the first lead portion 31B of the internal electrode layer 30.
[0125] The internal structure of the end surface-side conductive resin layer 601 will be described. It should be noted that the main surface-side conductive resin layer 602 and the side surface-side conductive resin layer 603 also have the same internal structure as the end surface-side conductive resin layer 601. In other words, the internal structure of the end surface-side conductive resin layer 601 can also be said to be the internal structure of the conductive resin layer 60.
[0126] The end surface side conductive resin layer 601 includes a resin portion 61 and conductive fillers 62 dispersed in the resin portion 61 .
[0127] The resin portion 61 may also include at least one selected from various well-known thermosetting resins, such as epoxy resin, phenoxy resin, phenolic resin, polyurethane resin, silicone resin, and polyimide resin. Among them, epoxy resin is one of the most suitable resins due to its excellent heat resistance, moisture resistance, and adhesion. Furthermore, the resin portion of the conductive resin layer 60 preferably includes a curing agent along with the thermosetting resin. When epoxy resin is used as the base resin, the curing agent for the epoxy resin may also be various well-known compounds, such as phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, and amide-imide-based compounds.
[0128] Because the end-face-side conductive resin layer 601 includes such a resin portion 61, it is more flexible than, for example, the base electrode layer 50, which is a fired product composed of a plated film, a metal component, and a glass component. Therefore, even when the multilayer ceramic capacitor 1 is subjected to physical shock or shock caused by thermal cycling, the end-face-side conductive resin layer 601 functions as a buffer layer. Consequently, the conductive resin layer 60 suppresses the occurrence of cracks in the multilayer ceramic capacitor 1.
[0129] The conductive fillers 62 are dispersed and distributed in a substantially uniform manner within the resin portion. The conductive fillers are primarily responsible for the electrical conductivity of the conductive resin layer 60. Specifically, the contact between the plurality of conductive fillers 62 forms an electrical path within the end-face-side conductive resin layer 601, establishing electrical continuity between the base electrode layer 50 and the plated layer 70.
[0130] The metal constituting the conductive filler 62 can be Ag alone, an alloy containing Ag, or a metal powder coated with Ag. Ag has the lowest resistivity among metals, making it suitable for electrode materials. Furthermore, since Ag is a noble metal, it is not easily oxidized and has high weather resistance. Therefore, Ag metal powder is suitable as the conductive filler 62. Furthermore, when using a metal powder coated with Ag, the metal powder is preferably Cu, Ni, Sn, Bi, or an alloy powder containing these.
[0131] Furthermore, the conductive filler 62 may be a filler obtained by subjecting Cu or Ni to an oxidation-resistant treatment. Alternatively, the conductive filler may be a metal powder coated with Sn, Ni, or Cu. When using a metal powder coated with Sn, Ni, or Cu, the metal powder is preferably Ag, Cu, Ni, Sn, Bi, or an alloy thereof.
[0132] The shape of the conductive filler 62 is not particularly limited. Spherical or flat shapes can be used for the conductive filler 62, but a mixture of spherical and flat metal powders is preferred. The spherical particles of the conductive filler 62 may also include forms that are not completely spherical, such as those with a major axis to minor axis ratio (major axis / minor axis) of 1.45 or less. The flat particles of the conductive filler 62 are flat and elongated particles, and while not particularly limited, they may also have a major axis to minor axis ratio (major axis / minor axis) of 1.95 or greater, for example.
[0133] The average particle size of the conductive filler 62 may be, for example, 0.3 μm to 10 μm, more preferably 1 μm to 8 μm. Furthermore, if the conductive filler 62 is flat, the average major axis diameter of the planar portion of the conductive filler 62 may be, for example, 2 μm to 10 μm, more preferably 5 μm to 8 μm. If the conductive filler 62 is flat, the average minor axis diameter of the planar portion of the conductive filler 62 may be, for example, 0.3 μm to 3 μm, more preferably 0.5 μm to 1 μm.
[0134] In this embodiment, a portion of the conductive filler 62 contained in the end surface-side conductive resin layer 601 contacts the end surface LS in the discontinuity region 55. In this embodiment, the portion of the conductive filler 62 in contact with the end surface LS contacts the first lead portion 31B or the second lead portion 32B, which are the ends of the internal electrode layer 30, directly connecting the end surface-side conductive resin layer 601 and the internal electrode layer 30. Furthermore, a portion of the conductive filler 62 also contacts the inner layer portion 11 exposed at the end surface LS. In the discontinuity region 55, there is also a portion of the end surface-side conductive resin layer 601 that contacts the end surface LS of the laminate 10 but does not contact the ends of the internal electrode layer 30.
[0135] It should be noted that the average particle size of the conductive filler 62 is preferably smaller than the thickness of the dielectric layer 20. This makes it easier for the conductive filler 62 to enter the discontinuous regions 55 of the discontinuous regions 54, increasing the probability of contact between the conductive filler 62 and the internal electrode layer 30. The average particle size of the conductive filler 62 may be larger than the thickness of the internal electrode layer 30 and smaller than the thickness of the dielectric layer 20. The conductive filler 62 preferably comprises a flat conductive filler. If the conductive filler 62 comprises a flat conductive filler, the average minor axis diameter of the planar portion of the conductive filler 62 is preferably smaller than the thickness of the dielectric layer 20. This makes it easier for the flat conductive filler 62 to enter the discontinuous regions 55 of the discontinuous regions 54, increasing the probability of contact between the conductive filler 62 and the internal electrode layer 30. If the conductive filler 62 comprises a flat conductive filler, the average minor axis diameter of the planar portion of the conductive filler 62 may be larger than the thickness of the internal electrode layer 30 and smaller than the thickness of the dielectric layer 20.
[0136] It should be noted that the average particle size of the conductive filler 62 is preferably smaller than the height dimension of the discontinuous region 55 of the discontinuous region 54. Furthermore, when the conductive filler 62 includes a flat conductive filler, the average minor axis diameter of the flat portion of the conductive filler 62 is preferably smaller than the height dimension of the discontinuous region 55 of the discontinuous region 54. This makes it easier for the conductive filler 62 to enter the discontinuous region 55 of the discontinuous region 54, increasing the probability of contact between the conductive filler 62 and the internal electrode layer 30.
[0137] Note that a portion of the conductive filler 62 included in the end surface side conductive resin layer 601 may be in contact with the end portion of the anchor portion 56. This improves electrical connectivity in a structure in which the end surface side base electrode layer 501 has the discontinuous region 54.
[0138] It should be noted that, when the longitudinal dimension of the multilayer ceramic capacitor 1 including the laminated body 10 and the external electrodes 40 is defined as the L dimension, the L dimension is preferably 0.2 mm or more and 10 mm or less. Furthermore, when the dimension of the multilayer ceramic capacitor 1 in the stacking direction is defined as the T dimension, the T dimension is preferably 0.1 mm or more and 10 mm or less. Furthermore, when the width dimension of the multilayer ceramic capacitor 1 is defined as the W dimension, the W dimension is preferably 0.1 mm or more and 10 mm or less.
[0139] Next, a method for measuring the average particle size of the conductive filler 62 in the end surface side base electrode layer 501 and the end surface side conductive resin layer 601 and a method for confirming the contact state between the conductive filler 62 and the internal electrode layer 30 in this embodiment will be described.
[0140] First, the multilayer ceramic capacitor 1 is ground from the first side surface WS1 or the second side surface WS2 to a position 1 / 2 of the width direction W. As a result, the LT cross section at the exact middle position in the width direction W of the multilayer ceramic capacitor 1 is exposed. Next, the LT cross section exposed by grinding is observed using an SEM. Specifically, the portion of the LT cross section including the base electrode layer 50 is photographed as a reflected electron image. In the reflected electron image, the difference in the constituent elements is reflected as contrast. It should be noted that the shooting magnification is 2000 times, and the portion of the base electrode layer 50 in the reflected electron image is set as the analysis object range. The position where the reflected electron image is obtained is, for example, Figure 5 As shown, the structure includes an end surface side base electrode layer 501 , an end surface side conductive resin layer 601 , an inner layer portion 11 , and an outer layer portion 12 .
[0141] The acquired reflected electron image was binarized using the image analysis software "WinROOF (Mitani Shoji Co., Ltd.)" to identify the conductive fillers 62. The average particle size of the identified conductive fillers 62 was measured, and the contact state between the conductive fillers 62 and the internal electrode layer 30 in the discontinuity region 55 was confirmed.
[0142] Next, a method for manufacturing the multilayer ceramic capacitor 1 of this embodiment will be described. The method for manufacturing the multilayer ceramic capacitor 1 of this embodiment is not limited as long as the aforementioned requirements are met. However, a suitable manufacturing method includes the following steps. Details of each step are described below.
[0143] A dielectric sheet for dielectric layer 20 and a conductive paste for internal electrode layer 30 are prepared. The conductive paste for dielectric sheet and internal electrode contains a binder and a solvent. The binder and solvent may be known binders and solvents.
[0144] Conductive paste for the internal electrode layers 30 is printed on the dielectric sheet in a predetermined pattern by screen printing, gravure printing, etc. Thus, a dielectric sheet having a pattern for the first internal electrode layers 31 and a dielectric sheet having a pattern for the second internal electrode layers 32 are prepared.
[0145] By stacking a predetermined number of dielectric sheets without internal electrode layer patterns, a portion that will become the first principal surface outer layer portion 12A on the first principal surface TS1 side is formed. On this portion, a dielectric sheet with a pattern for the first internal electrode layer 31 and a dielectric sheet with a pattern for the second internal electrode layer 32 are sequentially stacked to form the portion that will become the inner layer portion 11. A predetermined number of dielectric sheets without internal electrode layer patterns are stacked on top of the portion that will become the inner layer portion 11, thereby forming the portion that will become the second principal surface outer layer portion 12B on the second principal surface TS2 side. This completes the production of a laminated sheet.
[0146] The laminated sheets are pressed in the stacking direction by isostatic pressing or other means to produce a laminated block.
[0147] The stacked blocks are cut into predetermined sizes to produce stacked small pieces. The corners and ridges of the stacked small pieces may be rounded by barrel grinding or the like.
[0148] The stacked small pieces are fired to produce the laminate 10. The firing temperature is determined by the materials of the dielectric layer 20 and the internal electrode layer 30, but is preferably 900°C or higher and 1400°C or lower.
[0149] A conductive paste, which will become the base electrode layer 50, is applied to both end surfaces of the laminate 10. In this embodiment, the base electrode layer 50 is a sintered layer. The conductive paste, which includes a glass component and a metal, is applied to the laminate 10 by a method such as dipping. A sintering process is then performed to form the base electrode layer 50. The sintering process temperature is preferably between 700°C and 950°C.
[0150] In this embodiment, the impregnation is performed so that the first foundation electrode layer 50A extends from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2. Furthermore, the impregnation is performed so that the second foundation electrode layer 50B extends from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2. It should be noted that, in this case, the impregnation is preferably performed so that the first foundation electrode layer 50A extends to a portion of the first side surface WS1 and a portion of the second side surface WS2. Furthermore, the impregnation is preferably performed so that the second foundation electrode layer 50B extends to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0151] Here, by adjusting the amounts of binder and solvent contained in the conductive paste that forms the base electrode layer 50, the viscosity of the conductive paste is reduced, thereby reducing the thickness of the conductive paste applied to the laminate 10. Furthermore, by adjusting the amounts of binder and solvent contained in the conductive paste, the density of the metal component in the base electrode layer 50 after sintering can be adjusted. This allows the base electrode layer 50 of this embodiment to be formed. It should be noted that, after applying the conductive paste to the laminate 10, it is also possible to bring the applied conductive paste into contact with the platform to remove excess conductive paste, thereby further reducing the thickness of the conductive paste applied to the end surface LS of the laminate 10.
[0152] It should be noted that the pre-fired laminated pieces and the conductive paste applied to the laminated pieces can also be fired simultaneously. In this case, the sintered layer is preferably formed by sintering a material to which a ceramic material has been added in place of the glass component. In this case, the added ceramic material is particularly preferably the same type of ceramic material as that used in dielectric layer 20. In this case, the conductive paste is applied to the pre-fired laminated pieces, and the laminated pieces and the conductive paste applied to the laminated pieces are simultaneously sintered to form a laminate 10 having a sintered layer.
[0153] Next, the conductive resin layer 60 is formed. Note that the conductive resin layer 60 may be formed on the surface of the foundation electrode layer 50 or directly on the laminate 10. In this embodiment, the conductive resin layer 60 is formed on the surface of the foundation electrode layer 50.
[0154] First, a conductive resin paste is prepared in which conductive fillers are dispersed in a thermosetting resin, which serves as the base resin for the resin portion. This conductive resin paste is produced by stirring and mixing the thermosetting resin and conductive fillers. As a result, the conductive fillers are uniformly distributed throughout the conductive resin paste. Here, the thermosetting resin is, for example, epoxy resin. The conductive fillers are, for example, Ag metal powder.
[0155] In this embodiment, impregnation is performed so that the first conductive resin layer 60A extends from the first end surface LS1 to a portion of the first main surface TS1 and a portion of the second main surface TS2. Furthermore, impregnation is performed so that the second conductive resin layer 60B extends from the second end surface LS2 to a portion of the first main surface TS1 and a portion of the second main surface TS2. It should be noted that, in this case, impregnation is preferably performed so that the first conductive resin layer 60A extends to a portion of the first side surface WS1 and a portion of the second side surface WS2. Furthermore, impregnation is preferably performed so that the second conductive resin layer 60B extends to a portion of the first side surface WS1 and a portion of the second side surface WS2.
[0156] Then, a plating layer 70 is formed on the surface of the conductive resin layer 60. In this embodiment, a Ni plating layer 71 and a Sn plating layer 72 are formed on the conductive resin layer 60. The Ni plating layer 71 and the Sn plating layer 72 are sequentially formed using electrolytic plating. As the plating process, for example, barrel plating is preferably used.
[0157] Through the above-described manufacturing steps, the multilayer ceramic capacitor 1 is manufactured.
[0158] According to the multilayer ceramic capacitor 1 of this embodiment, the following effects are achieved.
[0159] In recent years, ceramic electronic components, such as multilayer ceramic capacitors, have been used in harsher environments than ever before. For example, electronic components used in mobile devices such as mobile phones and portable music players are required to withstand the impact of being dropped. Specifically, even in the event of a drop, the electronic components must not fall off the mounting substrate or crack.
[0160] Furthermore, electronic components used in automotive devices such as ECUs (Electronic Control Units) are required to withstand the impact of thermal cycles. Specifically, they must prevent delamination between the resin layer and the base electrode layer, even when subjected to flexural stress caused by the thermal expansion and contraction of the mounting substrate during thermal cycles.
[0161] On the other hand, due to the miniaturization of devices, there is a demand for further thinning of external electrodes. However, in a multilayer ceramic electronic component such as Patent Document 1, there is no provision for a technique for thinning the external electrodes while maintaining the bonding between the base electrode layer disposed on the end surface of the multilayer body and the conductive resin layer.
[0162] In the present invention, in the discontinuous regions 54 where the end-face-side base electrode layer 501 is intermittently present, the end-face-side conductive resin layer 601 contacts the ends of the dielectric layer 20 and the internal electrode layer 30 in the discontinuous regions 55 where the end-face-side base electrode layer 501 is discontinuous. By allowing the end-face-side conductive resin layer 601 to penetrate the discontinuous regions 55 of the end-face-side base electrode layer 501, the thickness required to form both the end-face-side base electrode layer 501 and the end-face-side conductive resin layer 601 can be reduced without compromising bonding. In this embodiment, the conductive filler 62 of the end-face-side conductive resin layer 601 contacts the ends of the internal electrode layer 30, thereby improving electrical connectivity.
[0163] (1) A multilayer ceramic capacitor 1 (a multilayer ceramic electronic component 1) according to the present embodiment comprises: a multilayer body 10 including a plurality of stacked dielectric layers 20 (ceramic layers 20), having a first main surface TS1 and a second main surface TS2 facing each other in a stacking direction T, a first side surface WS1 and a second side surface WS2 facing each other in a width direction W perpendicular to the stacking direction T, and a first end surface LS1 and a second end surface LS2 facing each other in a length direction L perpendicular to the stacking direction T and the width direction W; a first internal electrode layer 31 (a first internal electrode layer 31); The laminate 10 includes: an inner layer portion 11 having the dielectric layers 20, the first inner electrode layer 31, and the second inner electrode layer 32; a second inner electrode layer 32 (the second inner conductor layer 32) arranged on the plurality of dielectric layers 20 and exposed on the second end surface LS2; a first outer electrode 40A arranged on the first end surface LS1; and a second outer electrode 40B arranged on the second end surface LS2. The first main surface side outer layer portion 12A (first outer layer portion 12A) and the second main surface side outer layer portion 12B (second outer layer portion 12B) are arranged so as to sandwich the inner layer portion 11 in the height direction. The first external electrode 40A and the second external electrode 40B include: an end surface side base electrode layer 501, which is arranged on the first end surface LS1 and the second end surface LS2; an end surface side conductive resin layer 601, which is arranged on the end surface side base electrode layer 501; and an end surface side plating layer 701, which is arranged on the end surface side conductive resin layer 601. The side base electrode layer 501 has a discontinuous region 54 in which the end face side base electrode layer 501 is intermittently present, at least in the region near the first principal surface side outer layer portion 12A and the region near the second principal surface side outer layer portion 12B of the inner layer portion 11. In the interrupted region 55 (region 55) in which the end face side base electrode layer 501 is discontinuous, the end face side conductive resin layer 601 is in contact with the dielectric layer 20 and the first lead portion 31B (end portion 31B) of the first internal electrode layer 31 or the second lead portion 32B (end portion 32B) of the second internal electrode layer 32.
[0164] Thus, it is possible to provide a multilayer ceramic electronic component that can ensure the bonding between the internal electrode layer 30 and the external electrode 40 while achieving a reduction in the thickness of the external electrode 40 .
[0165] (2) In the multilayer ceramic capacitor 1 of this embodiment, the conductive filler 62 (filler 62 ) of the end surface-side conductive resin layer 601 is in contact with the first lead portion 31B of the first internal electrode layer 31 or the second lead portion 32B of the second internal electrode layer 32 .
[0166] This ensures electrical connectivity between the internal electrode layer 30 and the external electrode 40 and suppresses an increase in ESR.
[0167] (3) In the multilayer ceramic capacitor 1 of this embodiment, the end face side base electrode layer 501 has an anchor portion 56. The anchor portion 56 is located adjacent to the interruption region 55 where the end face side base electrode layer 501 is interrupted. After extending in the longitudinal direction in a direction away from the end face, the anchor portion 56 is bent toward the end face LS side, and a portion of the end face side conductive resin layer 601 enters between the anchor portion 56 and the end face LS.
[0168] Thus, due to the anchor effect, the bonding property between the end surface side base electrode layer 501 and the end surface side conductive resin layer 601 can be further improved.
[0169] (4) In the multilayer ceramic capacitor 1 of this embodiment, the discontinuous region 54 is formed from the inner layer portion 11 to the first main surface side outer layer portion 12A and from the inner layer portion 11 to the second main surface side outer layer portion 12B, and in the interrupted region 55 where the end surface side base electrode layer 501 is interrupted, the end surface side conductive resin layer 601 is in contact with the first main surface side outer layer portion 12A or the second main surface side outer layer portion 12B.
[0170] Thus, even when subjected to flexural stress, cracking of the laminate 10 can be suppressed. Flexural stress concentrates not only on the ends of the external electrodes 40 on the principal surface TS side but also on the corners of the laminate 10. Direct bonding of the conductive resin layer near the corners of the laminate 10 suppresses cracking of the laminate 10 even when subjected to flexural stress.
[0171] It should be noted that the structure of the multilayer ceramic capacitor 1 is not limited to Figures 1 to 5 For example, the multilayer ceramic capacitor 1 may also be Figure 6 、 Figure 7 、 Figure 8 The following are multilayer ceramic capacitors with dual, triple, and quadruple structures.
[0172] Figure 6 The illustrated multilayer ceramic capacitor 1 is a dual-structure multilayer ceramic capacitor 1 , and includes, as internal electrode layers 30 , a first internal electrode layer 33 and a second internal electrode layer 34 , and a floating internal electrode layer 35 that is not extended to either the first end surface LS1 or the second end surface LS2 . Figure 7 The illustrated multilayer ceramic capacitor 1 is a multilayer ceramic capacitor 1 having a triple structure including a first floating internal electrode layer 35A and a second floating internal electrode layer 35B as the floating internal electrode layers 35 . Figure 8The illustrated multilayer ceramic capacitor 1 is a multilayer ceramic capacitor 1 having a quadruple structure, comprising a first floating internal electrode layer 35A, a second floating internal electrode layer 35B, and a third floating internal electrode layer 35C as floating internal electrode layers 35. Thus, by providing the floating internal electrode layer 35 as the internal electrode layer 30, the multilayer ceramic capacitor 1 has a structure in which the opposing electrode portion is divided into a plurality of sections. Consequently, a plurality of capacitor components are formed between the opposing internal electrode layers 30, and these capacitor components are connected in series. Consequently, the voltage applied to each capacitor component is reduced, enabling the multilayer ceramic capacitor 1 to achieve a higher withstand voltage. It should be noted that the multilayer ceramic capacitor 1 of this embodiment may also have a multilayer structure of four or more sections.
[0173] It should be noted that the multilayer ceramic capacitor 1 may have a two-terminal structure including two external electrodes, or may have a multi-terminal structure including a plurality of external electrodes.
[0174] It should be noted that in the above embodiment, a multilayer ceramic capacitor using a dielectric layer 20 composed of dielectric ceramic as a ceramic layer is exemplified as a multilayer ceramic electronic component. However, the multilayer ceramic electronic component disclosed herein is not limited thereto. For example, the ceramic electronic component disclosed herein can also be applied to various multilayer ceramic electronic components, such as piezoelectric components using piezoelectric ceramics as a ceramic layer, thermistors using semiconductor ceramics as a ceramic layer, and inductors using magnetic ceramics as a ceramic layer. Examples of piezoelectric ceramics include PZT (lead zirconate titanate) ceramics, examples of semiconductor ceramics include spinel ceramics, and examples of magnetic ceramics include ferrite ceramics.
[0175] The present invention is not limited to the configuration of the above embodiment, and can be applied with appropriate modifications within the scope of the present invention. It should be noted that a configuration obtained by combining two or more of the preferred configurations described in the above embodiment also belongs to the present invention.
[0176] <1>
[0177] A laminated ceramic electronic component comprising:
[0178] A laminate comprising a plurality of stacked ceramic layers and a plurality of internal conductor layers, the laminate having a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction;
[0179] a first external electrode disposed on the first end surface; and
[0180] a second external electrode disposed on the second end surface,
[0181] in,
[0182] The laminated body comprises:
[0183] an inner layer portion having the ceramic layer and the inner conductor layer; and
[0184] The first outer layer portion and the second outer layer portion are arranged to sandwich the inner layer portion in the height direction.
[0185] The first external electrode and the second external electrode include:
[0186] end surface side base electrode layer;
[0187] an end surface side conductive resin layer disposed on the end surface side base electrode layer; and
[0188] an end surface side plating layer disposed on the end surface side conductive resin layer,
[0189] The end surface side foundation electrode layer has a discontinuous region where the end surface side foundation electrode layer is intermittently present at least in the region near the first outer layer portion and the region near the second outer layer portion of the inner layer portion.
[0190] In a region where the end surface side base electrode layer is discontinuous, the end surface side conductive resin layer is in contact with the ceramic layer and the end portion of the internal conductor layer.
[0191] <2>
[0192] In the multilayer ceramic electronic component described in <1>,
[0193] The filler of the end surface side conductive resin layer is in contact with the end portion of the internal conductor layer.
[0194] <3>
[0195] In the multilayer ceramic electronic component according to <1> or <2>,
[0196] The end surface side base electrode layer has an anchor portion, the anchor portion being located adjacent to the region where the end surface side base electrode layer is interrupted, extending in a direction away from the end surface in the longitudinal direction and then bending toward the end surface side.
[0197] A portion of the end surface-side conductive resin layer enters between the anchor portion and the end surface.
[0198] <4>
[0199] In the multilayer ceramic electronic component described in any one of <1> to <3>,
[0200] The intermittent region is formed from the inner layer portion to the first outer layer portion and from the inner layer portion to the second outer layer portion.
[0201] In the region where the end surface side base electrode layer is discontinuous, the end surface side conductive resin layer is in contact with the first outer layer portion or the second outer layer portion.
Claims
1. A multilayer ceramic electronic component comprising: A laminate comprising a plurality of stacked ceramic layers and a plurality of internal conductor layers, the laminate having a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction; a first external electrode disposed on the first end surface; and a second external electrode disposed on the second end surface, in, The laminated body comprises: an inner layer portion having the ceramic layer and the inner conductor layer; and The first outer layer portion and the second outer layer portion are arranged to sandwich the inner layer portion in the height direction. The first external electrode and the second external electrode include: end surface side base electrode layer; an end surface side conductive resin layer disposed on the end surface side base electrode layer; and an end surface side plating layer disposed on the end surface side conductive resin layer, The end surface side foundation electrode layer has a discontinuous region where the end surface side foundation electrode layer is intermittently present at least in the region near the first outer layer portion and the region near the second outer layer portion of the inner layer portion. In a region where the end surface side base electrode layer is discontinuous, the end surface side conductive resin layer is in contact with the ceramic layer and the end portion of the internal conductor layer.
2. The multilayer ceramic electronic component according to claim 1, wherein The filler of the end surface side conductive resin layer is in contact with the end portion of the internal conductor layer.
3. The multilayer ceramic electronic component according to claim 1 or 2, wherein The end surface side base electrode layer has an anchor portion, the anchor portion being located adjacent to the region where the end surface side base electrode layer is interrupted, extending in a direction away from the end surface in the longitudinal direction and then bending toward the end surface side. A portion of the end surface-side conductive resin layer enters between the anchor portion and the end surface.
4. The multilayer ceramic electronic component according to any one of claims 1 to 3, wherein The intermittent region is formed from the inner layer portion to the first outer layer portion and from the inner layer portion to the second outer layer portion. In the region where the end surface side base electrode layer is discontinuous, the end surface side conductive resin layer is in contact with the first outer layer portion or the second outer layer portion.
Citation Information
Patent Citations
Laminated ceramic capacitor
JP1999162771A