Wiring board

Abstract

Provided is a wiring board having high quality. A wiring substrate according to an embodiment includes: a core substrate including a resin substrate having a first surface, a second surface, and an opening, a glass substrate disposed within the opening and having a third surface forming substantially the same surface as the first surface and a fourth surface on the opposite side of the third surface, and a filling resin disposed between the first surface and the second surface; the filling resin fills a gap between the resin substrate and the glass substrate; and a laminated portion formed on the core substrate. The glass substrate has a plurality of first via conductors from the third surface to the fourth surface, the resin substrate has a plurality of second via conductors from the first surface to the second surface, the main material of the first via conductors and the second via conductors is copper, the density of the first via conductors is greater than that of the second via conductors, and the density of the second via conductors is greater than that of the first via conductors. The density of the first via conductors is the number of first via conductors per unit area of the third face, and the density of the second via conductors is the number of second via conductors per unit area of the first face.

Description

Technical Field

[0001] The technology disclosed in this specification relates to a wiring substrate. Background Art

[0002] Patent Document 1 discloses a wiring board including a core layer composed of a resin plate having a cavity and a glass plate in the cavity in Embodiment 2.

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2014-127701

[0004] [Problems of Patent Document 1]

[0005] The core layer of the second embodiment of Patent Document 1 is formed of a glass plate and a resin plate. It is believed that the core layer is easily warped at the boundary between the glass plate and the resin plate because the thermal expansion coefficients of the two plates are different. Summary of the Invention

[0006] The wiring substrate of the present invention comprises: a core substrate including a resin substrate, a glass substrate, and a filling resin. The resin substrate has a first surface, a second surface opposite the first surface, and an opening extending from the first surface to the second surface. The glass substrate is disposed within the opening and has a third surface substantially concentric with the first surface and a fourth surface opposite the third surface. The filling resin fills a gap between the resin substrate and the glass substrate. A build-up portion is formed on the core substrate and comprises a plurality of conductor layers and a plurality of resin insulating layers. The conductor layers and the resin insulating layers are alternately stacked. The glass substrate has a plurality of first through-hole conductors extending from the third surface to the fourth surface, and the resin substrate has a plurality of second through-hole conductors extending from the first surface to the second surface. The primary material of the first through-hole conductors and the second through-hole conductors is copper. The density of the first through-hole conductors is greater than the density of the second through-hole conductors. The density of the first through-hole conductors is the number of the first through-hole conductors per unit area of ​​the third surface, and the density of the second through-hole conductors is the number of the second through-hole conductors per unit area of ​​the first surface.

[0007] The thermal expansion coefficient of copper is greater than that of glass. The glass substrate forming the wiring substrate of an embodiment of the present invention has a first through-hole conductor. Therefore, the thermal expansion coefficient of the glass substrate of the embodiment is greater than that of glass. Moreover, the density of the first through-hole conductor is greater than the density of the second through-hole conductor. Therefore, the embodiment can reduce the difference between the thermal expansion coefficient of the glass substrate and the thermal expansion coefficient of the resin substrate. Since the resin substrate has the second through-hole conductor, the embodiment can reduce the number of first through-hole conductors. The embodiment can reduce the size of the glass substrate. The embodiment can reduce the size of the core substrate. The embodiment can reduce the warping of the wiring substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a cross-sectional view schematically showing a wiring substrate according to the embodiment.

[0009] Figure 2 This is an enlarged cross-sectional view schematically showing a portion of a wiring substrate according to the embodiment.

[0010] Figure 3 This is an enlarged cross-sectional view schematically showing a portion of a wiring substrate according to the embodiment.

[0011] Description of labels

[0012] 2: Wiring substrate; 4: Core substrate; 10: Resin substrate; 10a: First surface; 10b: Second surface; 11: Opening; 12: Glass substrate; 12a: Third surface; 12b: Fourth surface; 14: Filling resin; 16: First through-hole conductor; 18: Second through-hole conductor; 20F: First build-up section; 20B: Second build-up section; 30F, 30B: Conductor layer; 40F, 40B: Resin insulating layer; 40Fa: Fifth surface; 40Fb: Sixth surface; 50F, 50B: Conductor layer; 60F, 60B: Resin insulating layer Insulating layer; 70F, 70B: conductive layer; 72F: electrode; 90F: bonding component; 100: resin; 100R: upper surface; 110: inorganic particles; 111: first inorganic particles; 111a: first portion; 111aR: exposed surface; 111b: second portion; 112: second inorganic particles; 113: third inorganic particles; D1a: minimum spacing of first through-hole conductors; D1b: maximum spacing of first through-hole conductors; D2a: minimum spacing of second through-hole conductors; D2b: maximum spacing of second through-hole conductors. DETAILED DESCRIPTION

[0013] [Wiring Board 2 of the Embodiment]

[0014] Figure 1 1 is a cross-sectional view showing a wiring board 2 according to the embodiment. Figure 2 and Figure 3 1 is an enlarged cross-sectional view showing a portion of the wiring substrate 2 according to the embodiment. Figure 1 As shown, wiring substrate 2 includes core substrate 4 , a first build-up portion 20F, a second build-up portion 20B, solder resist layers 80F and 80B, and bonding members 90F.

[0015] The core substrate 4, having a ninth surface 4a and a tenth surface 4b opposite the ninth surface 4a, is composed of a resin substrate 10, a glass substrate 12, and a filling resin 14. The resin substrate 10 has a first surface 10a, a second surface 10b opposite the first surface 10a, and an opening 11 extending from the first surface 10a to the second surface 10b. The ninth surface 4a and the first surface 10a form a substantially common surface, and the tenth surface 4b and the second surface 10b form a substantially common surface. The resin substrate 10 is made of resin. An example of a resin is epoxy resin. The resin substrate 10 may contain inorganic particles such as silica. The resin substrate 10 may also contain reinforcing materials such as glass cloth. The opening 11 has a substantially rectangular planar shape. The glass substrate 12 is disposed within the opening 11. The glass substrate 12 has a third surface 12a and a fourth surface 12b opposite the third surface 12a. The third surface 12a forms a substantially common surface with the first surface 10a. The fourth surface 12b forms a substantially common surface with the second surface 10b. The glass substrate 12 is made of glass. The filling resin 14 fills the gap between the resin substrate 10 and the glass substrate 12. An example of the filling resin 14 is epoxy resin. The filling resin 14 may contain inorganic particles such as silica.

[0016] The glass substrate 12 has a plurality of first through-holes 160 and a plurality of first through-hole conductors 16 extending from the third surface 12a to the fourth surface 12b. A first through-hole conductor 16 is formed in each first through-hole 160. The resin substrate 10 has a plurality of second through-holes 180 extending from the first surface 10a to the second surface 10b and a plurality of second through-hole conductors 18. A second through-hole conductor 18 is formed in each second through-hole 180. The primary material of the first through-hole conductors 16 and the second through-hole conductors 18 is copper. The density of the first through-hole conductors 16 is greater than the density of the second through-hole conductors 18. The density of the first through-hole conductors 16 is the number of first through-hole conductors 16 per unit area of ​​the third surface 12a. The density of the second through-hole conductors 18 is the number of second through-hole conductors 18 per unit area of ​​the first surface 10a. For example, the density of the first through-hole conductors 16 can be calculated by dividing the total number of first through-hole conductors 16 by the area of ​​the third surface 12a. Each first through-hole 160 is partially included in the area of ​​third surface 12a. For example, the density of second through-hole conductors 18 can be calculated by dividing the total number of second through-hole conductors 18 by the area of ​​first surface 10a. Each second through-hole 180 is partially included in the area of ​​first surface 10a.

[0017] Minimum spacing D1a between adjacent first through-hole conductors 16 is smaller than minimum spacing D2a between adjacent second through-hole conductors 18. Maximum spacing D1b between adjacent first through-hole conductors 16 is smaller than maximum spacing D2b between adjacent second through-hole conductors 18. Maximum spacing D1b between adjacent first through-hole conductors 16 is smaller than minimum spacing D2a between adjacent second through-hole conductors 18.

[0018] First build-up section 20F is formed on ninth surface 4a of core substrate 4. First build-up section 20F includes multiple conductor layers 30F, 50F, and 70F and multiple resin insulation layers 40F and 60F. Conductor layers 30F, 50F, and 70F and resin insulation layers 40F and 60F are alternately stacked. First build-up section 20F includes via-hole conductors 35F connecting conductor layers 30F and 50F, and via-hole conductors 55F connecting conductor layers 50F and 70F.

[0019] The conductor layer 30F is formed on the ninth surface 4a of the core substrate 4. The conductor layer 30F includes a conductor circuit on the first surface 10a of the resin substrate 10 and a conductor circuit on the third surface 12a of the glass substrate 12. The conductor layer 30F is mainly formed of copper. The conductor circuit on the first surface 10a of the resin substrate 10 includes a conductor circuit connected to the upper end of the second through-hole conductor 18. The conductor circuit on the third surface 12a of the glass substrate 12 includes a conductor circuit connected to the upper end of the first through-hole conductor 16. The conductor layer 30F may include a conductor circuit on the filling resin 14 for connecting the conductor circuit on the first surface 10a of the resin substrate 10 to the conductor circuit on the third surface 12a of the glass substrate 12. Alternatively, the conductor layer 30F does not have a conductor circuit on the filling resin 14 for connecting the conductor circuit on the first surface 10a of the resin substrate 10 to the conductor circuit on the third surface 12a of the glass substrate 12.

[0020] The resin insulating layer 40F is formed on the conductor layer 30F and the ninth surface 4a. The resin insulating layer 40F has a fifth surface 40Fa and a sixth surface 40Fb opposite to the fifth surface 40Fa. The sixth surface 40Fb is closer to the first surface 10a than the fifth surface 40Fa. Figure 2 As shown, resin insulating layer 40F is formed from resin 100 and a plurality of inorganic particles 110 dispersed within resin 100. Resin 100 is an epoxy resin. An example of the resin is a thermosetting resin. Inorganic particles 110 are glass particles. Inorganic particles 110 may be aluminum oxide. The content of inorganic particles 110 in resin insulating layer 40F is 75 wt % or greater.

[0021] Inorganic particles 110 may include first inorganic particles 111 partially embedded in resin 100 and second inorganic particles 112 embedded in resin 100. Second inorganic particles 112 are completely embedded in resin 100. First inorganic particles 111 and second inorganic particles 112 are spherical in shape. First inorganic particle 111 is formed by a first portion 111a protruding from resin 100 and a second portion 111b embedded in resin 100. Fifth surface 40Fa of resin insulating layer 40F is formed by upper surface 100R of resin 100 and exposed surface 111aR of first portion 111a, which is exposed from upper surface 100R.

[0022] The ratio R of the volume of the first portion 111a to the volume of the first inorganic particles 111 (volume of the first portion 111a / volume of the first inorganic particles 111) is greater than 0 and is less than 0.4. The ratio R is preferably less than 0.2. The ratio R is more preferably less than 0.1. The ratio R is most preferably less than 0.05. The upper surface 100R of the resin 100 forming the fifth surface 40Fa of the resin insulating layer 40F is substantially flat. The upper surface 100R of the resin 100 has almost no concave portions. Therefore, the fifth surface 40Fa has almost no concave portions. The arithmetic mean roughness (Ra) of the fifth surface 40Fa is less than 0.08 μm. The roughness Ra of the fifth surface 40Fa is preferably less than 0.05 μm. The roughness Ra of the fifth surface 40Fa is more preferably less than 0.03 μm. The arithmetic mean roughness (Ra) of the upper surface 100R of the resin 100 forming the fifth surface 40Fa of the resin insulating layer 40F is less than 0.08 μm. The roughness Ra of the upper surface 100R of the resin 100 is preferably 0.05 μm or less. The roughness Ra of the upper surface 100R of the resin 100 is more preferably 0.03 μm or less.

[0023] like Figure 3 As shown, the inorganic particles 110 may include third inorganic particles 113 forming the fifth surface 40Fa and second inorganic particles 112 embedded in the resin 100. The third inorganic particles 113 have a substantially flat exposed portion 113a. The surface (exposed surface) 113b of the exposed portion 113a is exposed from the upper surface 100R of the resin 100. The fifth surface 40Fa is formed by the upper surface 100R of the resin 100 and the surface 113b of the exposed portion 113a. The surface 113b of the exposed portion 113a and the upper surface 100R of the resin 100 are present on approximately the same plane. The surface 113b of the exposed portion 113a and the upper surface 100R of the resin 100 may not be completely consistent, and there may be a gap between the two. The amount of the gap (the distance between the two) is less than 5μm. The amount of the gap is preferably less than 3μm.

[0024] The inorganic particles 110 may include first inorganic particles 111 , second inorganic particles 112 , and third inorganic particles 113 .

[0025] like Figure 1 As shown in FIG. 4 , the conductor layer 50F is formed on the fifth surface 40Fa of the resin insulating layer 40F. The conductor layer 50F is mainly formed of copper. Figure 2 and Figure 3 As shown, the conductor layer 50F includes conductor circuits 52F and 54F. The conductor layer 50F is formed of a seed layer 50Fa and a plating layer 50Fb on the seed layer 50Fa.

[0026] like Figure 1As shown, the via-hole conductor 35F is formed in an opening that passes through the resin insulating layer 40F. The via-hole conductor 35F connects the adjacent conductive layers 30F and 50F. The via-hole conductor 35F is mainly formed of copper.

[0027] The resin insulating layer 60F is formed on the conductive layer 50F and the fifth surface 40Fa of the resin insulating layer 40F. The resin insulating layer 60F has a seventh surface 60Fa and an eighth surface 60Fb opposite to the seventh surface 60Fa. The eighth surface 60Fb is closer to the first surface 10a than the seventh surface 60Fa. Figure 2 and Figure 3 As shown, the resin insulating layer 60F is formed of a resin 100 and a plurality of inorganic particles 110 dispersed in the resin 100. The resin insulating layer 60F has the same inorganic particles 110 as the inorganic particles 110 forming the resin insulating layer 40F.

[0028] like Figure 1 As shown, conductive layer 70F is formed on seventh surface 60Fa of resin insulation layer 60F. Conductive layer 70F is primarily composed of copper. Conductive layer 70F is the topmost conductive layer. Conductive layer 70F includes electrodes 72F for mounting electronic components. Each first through-hole conductor 16 is located directly below each electrode 72F. In other examples, a portion or a majority of first through-hole conductors 16 may be located directly below electrode 72F.

[0029] A solder resist layer 80F having an opening for exposing the electrode 72F is formed on the seventh surface 60Fa of the conductive layer 70F and the resin insulating layer 60F. The solder resist layer 80F is formed from a photocurable resin. A bonding member 90F is formed on the electrode 72F. The bonding member 90F is connected to the electrode 72F. The bonding member 90F is formed by soldering or plating. The electronic component is mounted on the bonding member 90F.

[0030] Second build-up section 20B is formed on tenth surface 4b of core substrate 4. Second build-up section 20B includes multiple conductor layers 30B, 50B, and 70B and multiple resin insulation layers 40B and 60B. Conductor layers 30B, 50B, and 70B and resin insulation layers 40B and 60B are alternately stacked. Second build-up section 20B includes via conductors 35B connecting conductor layers 30B and 50B, and via conductors 55B connecting conductor layers 50B and 70B. First build-up section 20F is identical to second build-up section 20B. Conductor layers 30B, 50B, and 70B are identical to conductor layers 30F, 50F, and 70F. Resin insulation layers 40B and 60B are identical to resin insulation layers 40F and 60F. Solder resist layer 80B is formed on second build-up section 20B. Solder resist layer 80B is identical to solder resist layer 80F.

[0031] [Method for Manufacturing Wiring Board 2 According to Embodiment]

[0032] A resin substrate 10 having an opening 11 and a glass substrate 12 are prepared. Glass substrate 12 has a plurality of first through-hole conductors 16. Resin substrate 10 has a plurality of second through-hole conductors 18. The density of first through-hole conductors 16 is greater than the density of second through-hole conductors 18. Glass substrate 12 is accommodated in opening 11. Glass substrate 12 is secured to resin substrate 10 by filling resin 14. A core substrate 4 having a ninth surface 4a and a tenth surface 4b is formed. A first build-up portion 20F and a second build-up portion 20B are formed on core substrate 4. First build-up portion 20F and second build-up portion 20B are formed in the same manner. The method for forming first build-up portion 20F is as follows.

[0033] Conductive layer 30F is formed on ninth surface 4a of core substrate 4. Conductive layer 30F connects the upper ends of first through-hole conductors 16 and second through-hole conductors 18. In a modified example, conductive layer 30F, first through-hole conductors 16, and second through-hole conductors 18 may be formed simultaneously.

[0034] A resin insulating layer 40F is formed on the conductive layer 30F and the ninth surface 4a. The fifth surface 40Fa of the resin insulating layer 40F is cleaned. The fifth surface 40Fa is cleaned by sputtering using argon gas (argon sputtering). The resin 100 forming the resin insulating layer 40F is removed by about 20 nm by cleaning. The resin 100 is selectively removed by cleaning. The thickness of the resin 100 is reduced. A portion of the inorganic particles (second inorganic particles 112) 110 is partially exposed from the upper surface 100R of the resin 100 by cleaning. By exposing a portion of the second inorganic particles 112 embedded in the resin 100 from the upper surface 100R of the resin 100, the first inorganic particles 111 are obtained. The first inorganic particles 111 are formed from the second inorganic particles 112. The resin insulating layer 40F having the first inorganic particles 111 and the second inorganic particles 112 is formed. Thereafter, the embodiment can treat the fifth surface 40Fa of the resin insulating layer 40F using plasma. For example, the fifth surface 40Fa of the resin insulating layer 40F is treated with plasma containing tetrafluoromethane. The third inorganic particles 113 are formed from the first inorganic particles 111. All of the first inorganic particles 111 are transformed into the third inorganic particles 113. A resin insulating layer 40F having the second inorganic particles 112 and the third inorganic particles 113 is formed. Alternatively, a portion of the first inorganic particles 111 is transformed into the third inorganic particles 113. A resin insulating layer 40F having the first inorganic particles 111, the second inorganic particles 112, and the third inorganic particles 113 is formed.

[0035] The first inorganic particles 111 and the second inorganic particles 112 are substantially spherical in shape. The third inorganic particles 113 are substantially spherical in shape. The third inorganic particles 113 have substantially flat surfaces. The substantially flat surfaces of the third inorganic particles 113 are third flat surfaces. The third flat surfaces form the fifth surface 40Fa.

[0036] Conductor layer 50F is formed on fifth surface 40Fa of resin insulation layer 40F. Via-hole conductor 35F is formed simultaneously with conductor layer 50F. Via-hole conductor 35F connects conductor layer 30F and conductor layer 50F. Resin insulation layer 60F is formed on conductor layer 50F and fifth surface 40Fa. Resin insulation layer 60F is formed using the same method as resin insulation layer 40F. Conductor layer 70F is formed on seventh surface 60Fa of resin insulation layer 60F. Via-hole conductor 55F is formed simultaneously with conductor layer 70F. Via-hole conductor 55F connects conductor layer 50F and conductor layer 70F. First build-up section 20F is formed. Second build-up section 20B is formed using the same method as first build-up section 20F. Solder resist layer 80F and bonding member 90F are formed on first build-up section 20F. Solder resist layer 80B is formed on second build-up section 20B. Wiring substrate 2 is obtained. Each resin insulating layer is formed of the same resin 100 and inorganic particles 110 as those of the resin insulating layer 40F.

[0037] In the embodiment, the density of first through-hole conductors 16 is greater than the density of second through-hole conductors 18. Therefore, the thermal expansion coefficient of glass substrate 12 in the embodiment is greater than that of glass. The embodiment can reduce the difference in thermal expansion coefficient between glass substrate 12 and resin substrate 10. Because resin substrate 10 includes second through-hole conductors 18, the embodiment can reduce the number of first through-hole conductors 16 within glass substrate 12. The embodiment can reduce the size of glass substrate 12. The embodiment can reduce the size of core substrate 4. The embodiment can reduce warping of wiring substrate 2.

[0038] The electrode 72F is located directly above all the first through-hole conductors 16. The first through-hole conductors 16 and the electrode 72F are connected in the shortest distance.

Claims

1. A wiring substrate comprising: a core substrate comprising a resin substrate having a first surface, a second surface opposite to the first surface, and an opening extending from the first surface to the second surface; a glass substrate disposed in the opening and having a third surface substantially common to the first surface and a fourth surface opposite to the third surface and substantially common to the second surface; and a filling resin filling a gap between the resin substrate and the glass substrate; and a build-up portion formed on at least one of the surface where the first surface is located and the surface where the second surface is located of the core substrate, and including a plurality of conductor layers and a plurality of resin insulating layers; in, The conductor layers and the resin insulation layers are alternately stacked, The glass substrate has a plurality of first through-hole conductors extending from the third surface to the fourth surface. The resin substrate has a plurality of second through-hole conductors extending from the first surface to the second surface. The main material of the first through-hole conductor and the second through-hole conductor is copper, The density of the first through-hole conductors is greater than the density of the second through-hole conductors, The density of the first through-hole conductors is the number of the first through-hole conductors per unit area of ​​the third surface. The density of the second through-hole conductors is the number of the second through-hole conductors per unit area of ​​the first surface.

2. The wiring substrate according to claim 1, wherein A minimum distance between adjacent first through-hole conductors is smaller than a minimum distance between adjacent second through-hole conductors.

3. The wiring substrate according to claim 1, wherein A maximum distance between adjacent first through-hole conductors is smaller than a maximum distance between adjacent second through-hole conductors. The wiring substrate according to claim 1 , wherein: A maximum distance between adjacent first through-hole conductors is smaller than a minimum distance between adjacent second through-hole conductors.

5. The wiring substrate according to claim 1, wherein The conductive layers forming the build-up portion include an uppermost conductive layer having an electrode for mounting an electronic component, and at least a portion of the plurality of first through-hole conductors are located directly below the electrode. The wiring substrate according to claim 1 , wherein: The resin insulating layer has a fifth surface and a sixth surface opposite to the fifth surface. The sixth surface is closer to the core substrate than the fifth surface, The resin insulating layer is formed of resin and inorganic particles, The inorganic particles include first inorganic particles partially embedded in the resin and second inorganic particles embedded in the resin. The first inorganic particles are formed of a first portion protruding from the resin and a second portion embedded in the resin. The fifth surface is formed by a surface of the resin remote from the core substrate and an exposed surface of the first portion exposed from the surface remote from the core substrate.

7. The wiring substrate according to claim 6, wherein A ratio of the volume of the first portion to the volume of the first inorganic particles is greater than 0 and is 0.4 or less.

8. The wiring substrate according to claim 5, wherein Each of the first through-hole conductors is located directly below each of the electrodes.

9. The wiring substrate according to claim 1, wherein The resin insulating layer has a fifth surface and a sixth surface opposite to the fifth surface. The sixth surface is closer to the core substrate than the fifth surface, The resin insulating layer is formed of resin and inorganic particles, The inorganic particles include third inorganic particles forming the fifth surface and second inorganic particles embedded in the resin. The second inorganic particles are roughly spherical in shape, The shape of the third inorganic particles is roughly spherical, The third inorganic particles have a third flat surface that is a substantially flat surface, The fifth surface is formed by a surface of the resin that is away from the core substrate and the third flat surface.

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