Manufacturing method of superconducting through silicon via and superconducting quantum chip

Abstract

The invention discloses a manufacturing method of a superconducting through silicon via and a superconducting quantum chip. The manufacturing method comprises the following steps: providing a substrate which is provided with a first surface and a second surface which are opposite; forming a through hole penetrating from the first surface to the second surface on the substrate; forming a superconducting seed layer on the first surface, the second surface and the inner wall of the through hole; and filling the through holes with superconductive metal pellets of which the diameters are matched with the apertures of the through holes, and melting the superconductive metal pellets by laser to form a superconductive filling layer for filling the through holes. According to the invention, the through hole can be rapidly filled with the superconducting metal.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit manufacturing, and in particular to a method for manufacturing a superconducting through silicon via and a superconducting quantum chip. Background Art

[0002] With the development of quantum computing, the number of quantum bits on superconducting quantum chips is increasing. In order to improve the utilization of chip area and reduce loss and crosstalk, through-silicon via technology is increasingly used on superconducting quantum chips to achieve double-sided superconducting connectivity.

[0003] Since subsequent processes are required after TSV fabrication, the TSVs must be filled with superconducting metal to prevent them from affecting subsequent processes (such as photolithography and coating). However, the coating speed of traditional electroplating processes is very slow. For example, the coating speed of ALD atomic layer deposition is usually less than 1nm / min, making it very difficult to fill the TSVs with superconducting metal, and it is almost impossible to complete the filling of the TSVs. Summary of the Invention

[0004] The purpose of the present invention is to provide a method for manufacturing a superconducting silicon via and a superconducting quantum chip to solve the problem in the prior art that it is very difficult to fill the via with superconducting metal, and to enable the via to be quickly filled with superconducting metal.

[0005] To solve the above technical problems, the present invention provides a method for manufacturing a superconducting through-silicon via, comprising:

[0006] providing a substrate having opposing first and second surfaces;

[0007] forming a through hole on the substrate extending from the first surface to the second surface;

[0008] forming a superconducting seed layer on the first surface, the second surface and the inner wall of the through hole;

[0009] Superconducting metal spheres with a diameter matching the aperture of the through hole are filled in the through hole, and the superconducting metal spheres are melted by laser to form a superconducting filling layer filling the through hole.

[0010] Preferably, the inner wall of the through hole is inclined inward from the first surface to the second surface.

[0011] Preferably, the diameter of the superconducting metal spheres does not exceed the aperture of the through hole on the first surface, and is larger than the aperture of the through hole on the second surface.

[0012] Preferably, the aperture of the through hole on the first surface is 10% to 15% larger than the aperture of the through hole on the second surface.

[0013] Preferably, forming a through hole on the substrate extending from the first surface to the second surface includes:

[0014] forming a superconducting metal layer on the second surface of the substrate;

[0015] Performing deep silicon etching on the first surface of the substrate using the superconducting metal layer as an etching cutoff layer to form a through hole;

[0016] The substrate is cleaned by BOE to remove the superconducting metal layer.

[0017] Preferably, the step of forming a superconducting seed layer by plating on the first surface, the second surface and in the through hole comprises:

[0018] placing the substrate on a predetermined plane;

[0019] rotating the substrate on the predetermined plane;

[0020] Performing evaporation coating on the first surface in a direction inclined to the preset plane to form a first superconducting seed layer partially extending into the through hole;

[0021] The second surface is evaporated and coated in a direction inclined to the preset plane to form a second superconducting seed layer that partially extends into the through hole and connects to the first superconducting seed layer in the through hole.

[0022] Preferably, before performing evaporation coating on the second surface in a direction inclined to the preset plane, the method further comprises:

[0023] The oxide layer on the surface of the first superconducting seed layer in the through hole is removed.

[0024] Preferably, the first evaporation coating is performed by electron beam evaporation, the second evaporation coating is performed by magnetron sputtering, and the oxide layer on the surface of the first superconducting seed layer is removed by bias cleaning or ion beam cleaning.

[0025] Preferably, the material of the superconducting seed layer is aluminum, and the material of the superconducting metal spheres is aluminum or indium.

[0026] In order to solve the above technical problems, the present invention also provides a superconducting quantum chip, the superconducting quantum chip includes a substrate, the substrate has a superconducting silicon via obtained by any of the above manufacturing methods

[0027] Different from the prior art, the manufacturing method of the superconducting silicon via provided by the present invention forms a through hole on a substrate, and forms a superconducting seed layer on the first surface, the second surface and the inner wall of the through hole of the substrate, and then fills the through hole with superconducting metal pellets with a diameter matching the aperture of the through hole, and uses laser to melt the superconducting metal pellets to form a superconducting filling layer that fills the through hole. Since the superconducting filling layer is formed by laser melting, the through hole filling speed is fast, and the superconducting seed layer not only plays the role of double-sided superconducting connection, but also can improve the adhesion of the superconducting filling layer, so that the superconducting filling layer is formed faster. Therefore, the present invention can quickly fill the through hole with superconducting metal.

[0028] The superconducting quantum chip provided by the present invention has a superconducting silicon via obtained by the aforementioned manufacturing method of the superconducting silicon via, which belongs to the same inventive concept as the aforementioned manufacturing method and has the same technical effect, and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic flow chart of a method for manufacturing a superconducting through silicon via provided in an embodiment of the present invention.

[0030] Figures 2a to 2d A schematic diagram of a process for manufacturing a superconducting through silicon via provided by an embodiment of the present invention.

[0031] Figure 3 for Figure 1 Detailed flowchart of step S2 in the manufacturing method shown.

[0032] Figure 4a and Figure 4b Schematic diagram of the process of forming a through hole on a substrate.

[0033] Figure 5 for Figure 1 Schematic diagram of the specific process of step S3 in the manufacturing method shown.

[0034] Figure 6a and Figure 6b Schematic diagram of the process of forming a superconducting seed layer on a substrate. DETAILED DESCRIPTION

[0035] The following describes a specific embodiment of the present invention in more detail with reference to schematic diagrams. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the drawings are greatly simplified and not to exact scale, and are intended solely to facilitate and clearly illustrate the embodiments of the present invention.

[0036] In the description of the present invention, it should be understood that the terms "center", "up", "down", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0037] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0038] Please refer to Figure 1 , and combined with Figures 2a to 2c The present invention provides a method for manufacturing a superconducting silicon via. The method comprises the following steps:

[0039] S1: Provide a substrate, wherein the substrate has a first surface and a second surface opposite to each other.

[0040] The substrate may be made of silicon or sapphire. In order to reduce the thickness of the substrate and remove surface dirt, the first surface and the second surface of the substrate may be polished. The smaller the thickness of the substrate, the lower the difficulty of etching the through hole.

[0041] S2: forming a through hole on the substrate that passes through from the first surface to the second surface.

[0042] The through hole can be formed by using an ultraviolet lithography process and a dry etching process. The ultraviolet lithography process is used to define an area to be etched on the first surface of the substrate, and then the area to be etched is selectively dry-etched to form the through hole.

[0043] like Figure 2a FIG2 is a schematic diagram of a through hole formed on a substrate 100 , wherein the substrate 100 has a first surface A and a second surface B, and the through hole 110 penetrates the substrate 100 in a direction perpendicular to the first surface.

[0044] S3: forming a superconducting seed layer on the first surface, the second surface and the inner wall of the through hole.

[0045] The superconducting seed layer covers the first surface, the second surface and the inner wall of the through hole, so that the first surface and the second surface are superconducting on both sides. The superconducting seed layer can be formed by a physical vapor deposition process, such as thermal evaporation, electron beam evaporation, magnetron sputtering, etc.

[0046] like Figure 2b, which is a schematic diagram of a superconducting seed layer formed on a substrate, wherein the superconducting seed layer 200 is formed on the first surface A, the second surface B of the substrate 100 and the inner wall of the through hole 110 , but the through hole 110 is not completely filled with the superconducting seed layer 200 .

[0047] S4: filling the through hole with superconducting metal pellets having a diameter matching the aperture of the through hole, and using laser to melt the superconducting metal pellets to form a superconducting filling layer filling the through hole.

[0048] Because the diameter of the superconducting metal spheres matches the aperture of the through-hole, the superconducting metal spheres are unlikely to slide out of the through-hole after being filled. After the superconducting metal spheres are melted by the laser, the molten superconducting metal solidifies. Furthermore, due to the presence of the superconducting seed layer, the molten superconducting metal adheres to the superconducting seed layer as it solidifies, forming a superconducting filling layer that completely blocks the through-hole. In this embodiment, the superconducting seed layer is made of aluminum, and the superconducting metal spheres are made of aluminum or indium.

[0049] The number of superconducting metal spheres can be set based on the volume of the through-hole. If there are multiple superconducting metal spheres, they can all be filled in and then laser-melted, or laser-melted simultaneously with each superconducting metal sphere. After the laser melts the multiple superconducting metal spheres, the molten superconducting metal solidifies and stacks together, forming a columnar structure that fills the through-hole, i.e., the superconducting filling layer. Assuming a through-hole diameter of 90 μm and a depth of 270 μm, and a superconducting metal sphere of 90 μm in diameter, approximately seven superconducting metal spheres are required to completely fill the through-hole with the superconducting filling layer.

[0050] like Figure 2c FIG. 1 shows a schematic diagram of filling a through-hole with superconducting metal spheres 300. Superconducting metal spheres 300 are compatible with the diameter of through-hole 110 and can be filled into through-hole 110. The superconducting metal spheres 300 are melted by laser heating and then solidified, sealing the opening of through-hole 110 on second surface B.

[0051] like Figure 2d , shown is a schematic diagram of the superconducting filling layer formed within the through-hole. After all the superconducting metal spheres 300 have melted and solidified, a superconducting filling layer 400 is formed. The edges of the superconducting filling layer 400 are integrated with the superconducting seed layer 200 on the inner wall of the through-hole 110. It should be noted that after the superconducting filling layer 400 is formed, its top and bottom surfaces are not flat, but rather curved. This is due to the tension in the molten superconducting metal during solidification.

[0052] The manufacturing method of the superconducting silicon via provided by the embodiment of the present invention realizes double-sided superconducting connectivity by forming a superconducting seed layer in the through hole, then fills the through hole with superconducting metal pellets, and uses laser to melt the superconducting metal pellets to form a superconducting filling layer that fills the through hole. Since the superconducting filling layer is formed by laser melting, the through hole is filled at a fast speed, and the superconducting seed layer not only plays the role of double-sided superconducting connectivity, but also can improve the adhesion of the superconducting filling layer, so that the superconducting filling layer is formed faster. Therefore, the present invention can quickly fill the through hole with superconducting metal.

[0053] In some embodiments of the present invention, the inner wall of the through hole is inclined inward from the first surface to the second surface. The inner wall of the through hole is not perpendicular to the first surface, so the opening diameter of the through hole on the first surface is larger than the opening diameter of the through hole on the second surface. Figure 2a As shown, the through hole 110 is wide at the top and narrow at the bottom from the first surface A to the second surface B. In an actual application, the diameter of the through hole on the first surface is 10% to 15% larger than that on the second surface.

[0054] Furthermore, the diameter of the superconducting metal spheres does not exceed the aperture of the through hole on the first surface, and is larger than the aperture of the through hole on the second surface.

[0055] Assuming that the aperture of the through hole on the first surface is R1, the aperture of the through hole on the second surface is R2, and the diameter of the superconducting metal sphere is R, then R2<R≤R1, so the superconducting metal sphere can be implanted into the through hole from the first surface of the substrate but will not slide out of the through hole from the second surface of the substrate.

[0056] Please refer to Figure 3 as well as Figure 4a and Figure 4b In some embodiments of the present application, the step of forming a through hole on the substrate extending from the first surface to the second surface, i.e., step S2, includes:

[0057] S21: forming a superconducting metal layer on the second surface of the substrate.

[0058] like Figure 4a FIG. 1 is a schematic diagram of a superconducting metal layer formed on the second surface of the substrate 100 . The superconducting metal layer 101 is formed on the second surface B of the substrate 100 by a process such as evaporation coating.

[0059] S22: performing deep silicon etching on the first surface of the substrate using the superconducting metal layer as an etching stop layer to form a through hole.

[0060] Among them, when performing deep silicon etching, photoresist can be used as a mask to photoetch a through-hole window exposing the substrate, and then the through-hole window is deep silicon etched. Since deep silicon etching only etches the substrate, when the substrate is etched through to the etching stop layer, etching will no longer continue.

[0061] like Figure 4b FIG. 1 is a schematic diagram of a through hole formed by deep silicon etching. The through hole 110 is etched starting from the first surface A of the substrate 100 and ending at the superconducting metal layer 101 .

[0062] S23: performing BOE cleaning on the substrate to remove the superconducting metal layer.

[0063] Among them, after the substrate is cleaned by BOE (buffered oxide etching), not only the superconducting metal layer is removed, but also the oxide layer on the first surface of the substrate is removed, achieving the purpose of cleaning the substrate. After removing the superconducting metal layer, the following is obtained: Figure 2a The structure shown.

[0064] Please refer to Figure 5 as well as Figure 6a and Figure 6b In some embodiments of the present application, the step of forming a superconducting seed layer by plating on the first surface, the second surface and in the through hole, i.e., step S3, includes:

[0065] S31: placing a substrate on a preset plane.

[0066] Typically, an evaporation coating device has a carrier plate for supporting a substrate, and a surface of the carrier plate is a preset plane.

[0067] S32: Rotating the substrate on a preset plane.

[0068] S33: performing evaporation coating on the first surface in a direction inclined to the preset plane to form a first superconducting seed layer partially extending into the through hole.

[0069] Among them, when evaporation coating is performed, since the coating direction is inclined with respect to the preset plane, in addition to the first surface of the substrate being covered with the coating material, part of the inner wall of the through hole connected to the first surface will also be covered with the coating material. Moreover, since the substrate itself is in a rotating state, the inner wall of the through hole can be covered with the coating material in each direction, so that the coating material on the inner wall of the through hole and the coating material on the first surface of the substrate are connected as a whole to form a first superconducting seed layer.

[0070] like Figure 6a Figure 1 is a schematic diagram of the substrate after the first superconducting seed layer is formed. During evaporation, the coating direction D1 forms an angle α with the predetermined plane O (indicated by the dashed horizontal line in the figure). Simultaneously, the substrate 100 rotates on the predetermined plane O. After the evaporation is completed, the first superconducting seed layer 201 is formed on the first surface A of the substrate 100 and partially extends into the through hole 110.

[0071] S34: performing evaporation coating on the second surface in a direction inclined to the preset plane to form a second superconducting seed layer that partially extends into the through hole and connects to the first superconducting seed layer in the through hole.

[0072] Among them, when the second evaporation coating is carried out, since the coating direction is inclined with respect to the preset plane, in addition to the second surface of the substrate being covered with the coating material, part of the inner wall of the through hole connected to the second surface will also be covered with the coating material. Moreover, since the substrate itself is in a rotating state, the inner wall of the through hole can be covered with the coating material in each direction, so that the coating material on the inner wall of the through hole and the coating material on the second surface of the substrate are connected as a whole to form a second superconducting seed layer.

[0073] like Figure 6b , which is a schematic diagram of the second superconducting seed layer formed on the substrate. During evaporation coating, the coating direction D2 forms an angle β with the preset plane O, while the substrate 100 rotates on the preset plane O. After the evaporation coating is completed, the second superconducting seed layer 202 is formed on the second surface B of the substrate 100 and partially extends into the through hole 110. The portion of the second superconducting seed layer 202 extending into the through hole 110 is interconnected with the portion of the first superconducting seed layer 201 extending into the through hole 110, so that the first superconducting seed layer 201 and the second superconducting seed layer 202 together constitute the superconducting seed layer 200, achieving double-sided superconducting conduction of the substrate 100.

[0074] The angle α and the angle β may be the same or different. The angle values ​​of the angle α and the angle β may be set according to actual needs. For example, the angle α and the angle β are both 45 degrees.

[0075] Furthermore, before performing evaporation coating on the second surface in a direction inclined to the preset plane, the method further includes: removing the oxide layer on the surface of the first superconducting seed layer in the through hole.

[0076] If an oxide layer exists on the surface of the first superconducting seed layer, the second superconducting seed layer will be insulated from the first when it is combined with the first superconducting seed layer. However, the superconducting metal used in the first superconducting seed layer is highly reactive and will quickly oxidize upon contact with air, forming an oxide layer. Therefore, the oxide layer on the surface of the first superconducting seed layer must be removed before forming the second superconducting seed layer. This oxide layer can be removed using methods such as bias cleaning and ion beam cleaning.

[0077] The first superconducting seed layer and the second superconducting seed layer can be formed by the same or different processes. For example, the first evaporation coating is performed by electron beam evaporation, and the second evaporation coating is performed by magnetron sputtering.

[0078] The embodiment of the present invention further provides a superconducting quantum chip, which includes a substrate having a superconducting silicon via obtained by the manufacturing method of the superconducting silicon via of the above embodiment. Figure 2d Superconducting silicon via shown.

[0079] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "example," or "specific example" means that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. Furthermore, those skilled in the art may combine and reconcile different embodiments or examples described in this specification.

[0080] The above description is merely a preferred embodiment of the present invention and does not limit the present invention in any way. Any person skilled in the art who, without departing from the scope of the present invention, makes any equivalent substitution, modification, or other changes to the technical solution and technical content disclosed in the present invention shall be deemed to be within the scope of the present invention and still fall within the scope of protection of the present invention.

Claims

1. A method for manufacturing a superconducting silicon via, characterized in that: include: providing a substrate having opposing first and second surfaces; forming a through hole on the substrate extending from the first surface to the second surface; forming a superconducting seed layer on the first surface, the second surface and the inner wall of the through hole; Superconducting metal spheres with a diameter matching the aperture of the through hole are filled in the through hole, and the superconducting metal spheres are melted by laser to form a superconducting filling layer filling the through hole.

2. The manufacturing method according to claim 1, characterized in that An inner wall of the through hole is inclined inward from the first surface to the second surface.

3. The manufacturing method according to claim 2, characterized in that The diameter of the superconducting metal sphere does not exceed the aperture of the through hole on the first surface, and is larger than the aperture of the through hole on the second surface.

4. The manufacturing method according to claim 2, characterized in that The diameter of the through hole on the first surface is 10% to 15% larger than the diameter of the through hole on the second surface.

5. The manufacturing method according to claim 1, characterized in that The step of forming a through hole on the substrate extending from the first surface to the second surface includes: forming a superconducting metal layer on the second surface of the substrate; Performing deep silicon etching on the first surface of the substrate using the superconducting metal layer as an etching cutoff layer to form a through hole; The substrate is cleaned by BOE to remove the superconducting metal layer.

6. The manufacturing method according to claim 1, characterized in that The step of forming a superconducting seed layer by plating on the first surface, the second surface and the through hole comprises: placing the substrate on a predetermined plane; rotating the substrate on the predetermined plane; Performing evaporation coating on the first surface in a direction inclined to the preset plane to form a first superconducting seed layer partially extending into the through hole; The second surface is evaporated and coated in a direction inclined to the preset plane to form a second superconducting seed layer that partially extends into the through hole and connects to the first superconducting seed layer in the through hole.

7. The manufacturing method according to claim 6, characterized in that Before performing evaporation coating on the second surface in a direction inclined to the preset plane, the method further includes: The oxide layer on the surface of the first superconducting seed layer in the through hole is removed.

8. The manufacturing method according to claim 7, characterized in that The first evaporation coating is performed by electron beam evaporation, the second evaporation coating is performed by magnetron sputtering, and the oxide layer on the surface of the first superconducting seed layer is removed by bias cleaning or ion beam cleaning.

9. The manufacturing method according to claim 1, characterized in that The material of the superconducting seed layer is aluminum, and the material of the superconducting metal spheres is aluminum or indium.

10. A superconducting quantum chip, characterized in that: The superconducting quantum chip comprises a substrate having a superconducting silicon through-hole via (TSV) obtained by the manufacturing method according to any one of claims 1 to 9.

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