MAC address configuration method and electronic equipment

Abstract

The invention discloses an MAC (Media Access Control) address configuration method, which is applied to a Feiteng processor platform, and the Feiteng processor platform comprises a Feiteng processor, an EEPROM (Electrically Erasable Programmable Read-Only Memory) and UEFI firmware. The method comprises the following steps: writing a target MAC address into a specific storage position of an EEPROM; and the UEFI firmware reads the MAC address from the specific storage position of the EEPROM in the DXE stage, and writes the MAC address into the MAC address register of the Feiteng processor network controller. According to the invention, the persistent configuration of the MAC address can be realized.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and in particular relates to a MAC address configuration method and electronic equipment. Background Art

[0002] During the implementation of domestically produced replacements for Phytium processors, the unique network identifier (MAC address) of physical devices often needs to be customized according to business scenarios. However, existing technical solutions can only modify MAC addresses at the operating system level through temporary commands (such as ifconfig), which has the following technical flaws: (1) Modifying the MAC address through temporary commands (such as ifconfig) will cause the function to become invalid after reboot due to the built-in eFuse hardware protection mechanism of the Feiteng processor; (2) The operation is complex and requires direct operation of hardware registers. It also requires operation and maintenance personnel to be proficient in the operation of the underlying hardware registers. The implementation process for a single device takes more than 30 minutes. (3) Difficulty in batch deployment: Moreover, this modification needs to be performed on each device in a batch deployment scenario. The configuration is lost after the system is reinstalled, resulting in an exponential increase in operation and maintenance costs, which restricts the efficiency of large-scale implementation of domestically produced equipment. Summary of the Invention

[0003] The purpose of this application is to provide a MAC address configuration method and electronic device, which can realize persistent configuration of MAC addresses.

[0004] In a first aspect, the present application provides a MAC address configuration method, which is applied to a Feiteng processor platform, wherein the Feiteng processor platform includes a Feiteng processor, an EEPROM (Electrically Erasable Programmable Read Only Memory), and UEFI firmware; the Feiteng processor is externally connected to the EEPROM; the method includes: Write the target MAC address to a specific memory location in the EEPROM; The UEFI firmware reads the MAC address from a specific storage location in the EEPROM during the DXE phase and writes the MAC address to the MAC address (MAC_ADDR) hardware register of the Phytium processor network controller.

[0005] In a possible implementation, the Feiteng processor is connected to the EEPROM via an I2C0 bus.

[0006] In one possible implementation, the method further includes: generating a CRC check code of the target MAC address; Writing the target MAC address into a specific storage location of the EEPROM includes: writing the target MAC address and a corresponding CRC check code into the EEPROM, wherein the CRC check code is used for verification when the UEFI firmware reads the MAC address from the specific storage location of the EEPROM.

[0007] In one possible implementation, the UEFI firmware verifies the MAC address when reading it from a specific storage location in the EEPROM during the DXE phase. Only after the verification is passed will the MAC address be written into the MAC address register of the Phytium processor network controller. The verification includes checking the legality of the MAC address format and matching the CRC check code.

[0008] The dual verification mechanism of MAC address format validity check (MAC address U / L bit check) and CRC checksum matching can ensure the validity of the MAC address stored in the external EEPROM, avoiding security risks caused by bypassing the eFuse.

[0009] In a possible implementation, the method further includes: if reading the EEPROM fails or verification fails, entering a MAC address recovery mode and using the original MAC address.

[0010] In a possible implementation, if the EEPROM reading fails or the verification fails, an error may be reported and the verification failure event may be written into the TCM trusted log.

[0011] In a possible implementation, writing the target MAC address and the corresponding CRC check code into the EEPROM, in a stand-alone configuration, includes: receiving a customized target MAC address input by a user; and writing the target MAC address and the corresponding CRC check code into the EEPROM.

[0012] In a possible implementation, writing the target MAC address and the corresponding CRC check code into the EEPROM, in the case of batch configuration, includes: using an EEPROM programmer to batch burn the target MAC address and the CRC check code into the EEPROM.

[0013] In a second aspect, the present application provides an electronic device, comprising: a memory and a processor; The memory is used to store computer programs; The processor is configured to call the computer program to execute the method described above.

[0014] In a third aspect, the present application provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed on an electronic device, the electronic device implements the method described above.

[0015] In a fourth aspect, the present application provides a computer program product, including a computer program, which, when executed on an electronic device, enables the electronic device to implement the method described above.

[0016] The specific implementation methods of the second to fourth aspects of this application can refer to the implementation method of the first aspect above, and will not be repeated here.

[0017] Beneficial effects: This application, through the linkage of operating system (Kylin), firmware (UEFI), and hardware (EEPROM), can circumvent the restrictions on direct writing to hardware registers by the processor's internal eFuse protection mechanism, achieving persistent storage of MAC addresses that is not affected by system restarts. For batch deployment, the EEPROM can be pre-burned to improve batch deployment efficiency. A double-check mechanism is used to filter broadcast addresses by checking the legitimacy of the MAC address format, and data tampering is prevented through CRC verification to ensure security. This application solves the problems of restart failure and low deployment efficiency of traditional solutions and is suitable for large-scale application of domestically produced equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the operating system layer configuration stage in an embodiment of the present application; Figure 2 This is the hardware layer EEPROM configuration in the embodiment of this application; Figure 3 This is the process of automatically loading MAC addresses in the firmware layer UEFI in the embodiment of this application. DETAILED DESCRIPTION

[0019] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution of the present application will be further described in detail below in conjunction with the embodiments and drawings of the present application.

[0020] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0021] Furthermore, the terms "installed," "disposed," "provided with," "connected," "connected," and "socketed" should be interpreted broadly. For example, "connected" can mean a fixed connection, a removable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection, an indirect connection through an intermediary, or an internal communication between two devices, elements, or components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0022] This application discloses a MAC address configuration method. By storing the address and check code in the external EEPROM of the Feiteng processor, the UEFI firmware automatically loads and writes the MAC address into the MAC address register (hardware register) of the network controller of the Feiteng processor at startup, solving the problems of restart failure and low deployment efficiency of traditional solutions. The method is suitable for large-scale application of domestically produced equipment.

[0023] In order to more clearly understand the technical solution of this application, the relevant technologies are first introduced and explained.

[0024] The Phytium processor series (including models such as the FT-1500A / 16 and FT-2000 / 4) utilizes a highly integrated SoC design, integrating two independent Gigabit Ethernet controllers (GMAC0 and GMAC1) within the chip. Each controller has its own dedicated MAC layer processing unit and PHY interface, forming a unique dual-MAC architecture. This architecture requires two independent MAC addresses (i.e., "dual MAC addresses") and interconnects with the CPU system bus via different high-speed AMBA buses (AHB / AXI), supporting 10 / 100 / 1000Mbps adaptive rates. The original MAC address is stored in a dedicated area of ​​the Phytium processor's non-volatile memory (NVM / eFuse). Hardware-level network filtering and security policies based on MAC addresses are supported, providing fundamental system security. Exemplarily, the method for loading dual MAC addresses of a Feiteng processor from non-volatile memory (NVM / eFuse) includes: a) reading two sets of SM2-signed MAC addresses from the non-volatile memory (NVM / eFuse) area inside the processor, corresponding to the GMAC0 and GMAC1 controllers respectively; b) writing the first MAC address to the MAC address register group of GMAC0 and the second MAC address to the MAC address register group of GMAC1 through the AMBA AHB bus; c) starting to set the SecurityEn bit (security enable bit) of the control register of GMAC0 and the control register of GMAC1 to implement hardware-level address filtering.

[0025] The MAC address (Media Access Control Address) is the core identifier of the data link layer of the OSI model. In binary format, a MAC address is 48 bits (6 bytes, 8 bits per byte, for a total of 48 bits). The first 24 bits are the OUI (Organizationally Unique Identifier), uniformly assigned by the IEEE; the last 24 bits are the device ID, assigned by the device manufacturer to ensure global uniqueness. In hexadecimal format, a MAC address is typically represented as 12 hexadecimal characters (e.g., 00:1A:2B:3C:4D:5E). The first six hexadecimal characters (00:1A:2B) are the OUI assigned by IEEE, and the last six hexadecimal characters (3C:4D:5E) are the manufacturer-defined device identifier.

[0026] The eFuse (fuse memory) inside the Phytium processor implements hardware-level write protection for MAC address registers (such as the MAC_ADDR register). Its features include: the eFuse is locked after the original MAC address is burned into it at the factory, prohibiting direct modification by the operating system or software. This is a one-time write. The protection of the MAC address by the Phytium processor's eFuse is essentially a timing-controlled protection. During the hardware initialization phase (the moment power is applied), the hardware automatically loads the original MAC address stored in the eFuse into the MAC address register of the network controller. During the operating system operation phase, the eFuse locks the MAC address register, prohibiting subsequent software (such as the operating system) from directly modifying it. Any MAC address temporarily modified by software (such as Linux's ifconfig) is only temporarily effective within the operating system software stack, does not penetrate the hardware protection layer, and is overwritten by the original MAC address stored in the eFuse after the system is restarted.

[0027] Kylin OS is a Chinese operating system developed based on the Arch Linux kernel, specifically optimized and adapted to run stably on Phytium processors. Deeply customized for the Phytium processor's network architecture, the system effectively manages the processor's unique raw MAC address storage mechanism, providing complete network protocol stack support for upper-layer applications. The tight integration of Kylin OS with Phytium hardware ensures that raw MAC address modification and management maintain the flexibility of the Linux system while also meeting the security and reliability requirements of Chinese platforms.

[0028] The following will refer to Figure 1 Specific embodiments according to the present application are described.

[0029] Example 1: The present application provides a MAC address configuration method, which is applied to a Feiteng processor platform. The Feiteng processor platform includes a Feiteng processor, an EEPROM, and UEFI firmware. The Feiteng processor is connected to an external EEPROM (Electrically Erasable Programmable Read Only Memory). The method includes: Write the target MAC address to a specific memory location in the EEPROM; The UEFI firmware reads the target MAC address stored in the EEPROM during the DXE (Driver Execution Environment) phase and writes the MAC address into the MAC address register of the Phytium processor network controller.

[0030] In some embodiments, the EEPROM has a model number of 24AA025E48.

[0031] In some embodiments, the Feiteng processor is connected to the EEPROM via an I2C0 bus (400kHz clock frequency).

[0032] Phytium processors only open the I2C0 / SPI0 bus for secure storage, while EEPROM supports the I2C / SPI interface standard. Therefore, connecting an external EEPROM via the I2C0 bus can adapt to the hardware native interface, facilitate the use of encryption algorithms to encrypt data and transmit data through hardware encryption channels, and comply with domestic security standards.

[0033] For example, the EEPROM is assigned as a slave device address 0x50 in the I2C bus.

[0034] In some embodiments, the method further includes: generating a CRC check code of the target MAC address; writing the target MAC address to a specific storage location of the EEPROM includes: writing the target MAC address and the corresponding CRC check code to the EEPROM, wherein the CRC check code is used for verification when the UEFI firmware reads the MAC address from the specific storage location of the EEPROM.

[0035] In some embodiments, the MAC address is stored at offset 0x100-0x105 of the EEPROM.

[0036] In some embodiments, the CRC check code is CRC16-CCITT, which can be stored at the offset address 0x106-0x107 of the EEPROM.

[0037] Among them, the CRC16-CCITT check code can be automatically generated.

[0038] In some embodiments, the UEFI firmware first verifies the MAC address when reading it from a specific storage location of the EEPROM during the DXE phase, and only writes the MAC address into the MAC address register of the Feiteng processor network controller after the verification is passed.

[0039] In some embodiments, the verification includes a MAC address format validity check (MAC address U / L bit check) and a CRC check code match.

[0040] The dual verification mechanism of MAC address format validity check (MAC address U / L bit check) and CRC checksum matching can ensure the validity of the MAC address stored in the external EEPROM, avoiding security risks caused by bypassing the eFuse.

[0041] In some embodiments, in the Kylin operating system, a dedicated configuration tool directly accesses the I2C controller through a kernel driver, writing an IEEE-compliant MAC address to a specific EEPROM storage area (offset address 0x100-0x105) and automatically generating a CRC16 checksum stored at address 0x106. During system startup, the UEFI firmware reads the data from this EEPROM storage area via the I2C protocol during the DXE phase. After dual verification of the MAC address format legitimacy (MAC address U / L bit check) and the checksum match, the valid MAC address value is directly written to the MAC address register of the Phytium processor network controller, thereby bypassing the processor's internal eFuse protection mechanism and permanently modifying the MAC address at the firmware level.

[0042] MAC address U / L bit (least significant bit of the second byte) verification instructions: In the 48-bit (6-byte) MAC address structure, the IEEE standard stipulates that the least significant bit of the second byte (the 8th bit, counting from the right) is called the U / L bit (Universal / Local bit), which is used to identify whether the MAC address is globally unique (Universal) or locally defined (Local).

[0043] U / L = 0 (Universal): Indicates that the MAC address is officially assigned by the IEEE (such as the vendor OUI) and is globally unique.

[0044] U / L = 1 (Local): Indicates that the MAC address is customized by the user or system administrator and may not be globally unique.

[0045] If the U / L bit is incorrectly set to 1 (Local), the MAC address may conflict with the standard OUI, affecting network communication. The U / L bit of certain special MAC addresses (such as the broadcast address FF:FF:FF:FF:FF:FF or the multicast address 01:00:5E:xx:xx:xx) may not meet the standard and need to be filtered. Feiteng processors generally require MAC addresses to use Universal (U / L=0) mode to ensure the uniqueness and compatibility of network devices. If the user enters an incorrect MAC address (such as 02:xx:xx:xx:xx:xx, U / L=1), network anomalies will occur. Malicious modification of the MAC address may lead to network spoofing attacks (such as ARP spoofing). During the verification process, this application can prevent broadcast / multicast MAC address conflicts, ensure that the MAC address complies with IEEE standards, enhance security, and prevent the injection of illegal MAC addresses by detecting the U / L bit.

[0046] During the MAC address loading phase of the UEFI firmware, the verification process is as follows: Read the MAC address in EEPROM (such as 00:1A:2B:3C:4D:5E).

[0047] Check the lowest bit of the second byte of the MAC address; For example, if the second byte of the MAC address is: 1A (binary 0001 1010) → the lowest bit is 0 (U / L=0, legal).

[0048] If the second byte of the MAC address is: 1B (binary 0001 1011) → the lowest bit is 1 (U / L=1, which may be illegal).

[0049] If U / L=1, it is considered an illegal MAC and UEFI refuses to load it, avoiding network abnormalities.

[0050] The implementation of the embodiment of this application includes three levels of operations: 1. Operating system layer configuration: See also Figure 1The user runs the MAC configuration tool (such as a graphical configuration tool) in the operating system and selects the "MAC Address Modification" function. The operating system (Kylin OS) receives the target MAC address (which must conform to the IEEE standard format) entered by the user through the graphical configuration tool. The kernel driver is activated, and the Phytium-specific I2C driver module is loaded. Using memory mapping (MMIO), the physical address space of the Phytium processor's I2C controller's hardware registers (using the D2000 platform's I2C0 as an example, the mapping area is 0x28006000-0x28006FFF) is mapped to the operating system kernel's virtual address space. Simultaneously, the EEPROM is connected to the Phytium processor via the I2C0 bus (from device address 0x50). Therefore, by manipulating the hardware registers of the Phytium processor's I2C controller and I2C bus, the target MAC address and CRC checksum can be written to a specific storage location in the external EEPROM using the I2C protocol.

[0051] 2. Hardware layer EEPROM configuration: See also Figure 2 ,EEPROM (model 24AA025E48) is connected to the Feiteng processor through the I2C bus. Its built-in non-volatile storage unit still retains the MAC address data completely after power failure, realizing persistent storage.

[0052] For example, the external EEPROM offset address 0x100-0x105 stores a 6-byte MAC address (such as 00:1A:2B:3C:4D:5E); the external EEPROM offset address 0x106-0x107 stores an automatically generated CRC check code (such as a CRC16-CCITT check code).

[0053] 3. The UEFI firmware automatically loads the MAC address: See also Figure 3 During a cold boot, during the Power-On Self-Test (POST) phase, the processor automatically verifies hardware-level security checks, including the hash value of the MAC address stored in the eFuse, dual MAC controller status detection, and TCM security metric initialization. During the DXE phase, the UEFI firmware reads data from the EEPROM area 0x100-0x107 via the I2C protocol for double verification. Format verification: Check the U / L bit of the MAC address (the lowest bit of the second byte) to ensure it is not a broadcast address (0x01); Integrity verification: recalculate the MAC field CRC16 checksum to match the EEPROM storage value; After verification, the MAC address is written to the network controller register of the Phytium processor through memory-mapped I / O.

[0054] If EEPROM reading or verification fails, the device enters MAC address recovery mode and uses the original MAC address to ensure normal device startup and networking. It also reports an error, prompting maintenance personnel to intervene, and writes verification failure events to the TCM (Trusted Cryptography Module) trusted log for security traceability.

[0055] In a stand-alone configuration, you can run a graphical configuration tool in the Kylin system to set a user-customized target MAC address and write the target MAC address and CRC checksum to the EEPROM through memory mapping; after restarting, UEFI reads and verifies the target MAC address and CRC checksum, and finally writes them to the network controller register of the Phytium processor after verification.

[0056] In the case of batch configuration, you can use an EEPROM programmer to batch burn the target MAC address and CRC checksum into the EEPROM.

[0057] The embodiment of the present application uses a three-layer collaborative linkage mechanism of operating system (Kylin) - firmware (UEFI) - hardware (EEPROM), which not only ensures the compatibility and security of domestic platforms, but also provides the core advantages of restart effectiveness and persistent storage.

[0058] This application bypasses the internal eFuse protection mechanism of the Phytium processor through the coordinated design of the hardware storage path and the firmware loading strategy. The specific technical logic is as follows: Physical isolation at the hardware level: Using independent storage media, the external EEPROM (such as 24AA025E48) and the internal eFuse of the Phytium processor belong to different physical storage units. The processor cannot apply the eFuse's write protection rules to the EEPROM. The EEPROM is connected via the I2C bus (rather than the processor's internal AHB / AXI bus), bypassing the eFuse's control over system bus access. The non-volatility of the EEPROM ensures address persistence.

[0059] Loading priority of the firmware layer: During the DXE phase of system startup (between hardware initialization and operating system startup, eFuse has completed loading the original MAC address, but runtime protection has not yet been activated), the UEFI firmware directly obtains the MAC address from the external EEPROM through the I2C protocol (instead of reading the eFuse default value); the verified MAC address is directly written into the MAC address register of the network controller, thereby overwriting the original MAC address loaded by eFuse, and completing the MAC address rewriting before the Feiteng processor initializes the network controller, ensuring that the MAC address register is written earlier than the original MAC address loaded by eFuse takes effect.

[0060] Example 2: This embodiment provides an electronic device, including: a memory and a processor; The memory is used to store computer programs; The processor is configured to call the computer program to execute the method described in the first embodiment.

[0061] Example 3: This embodiment provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed on an electronic device, the electronic device implements the method according to the first embodiment.

[0062] Example 4: This embodiment provides a computer program product, including a computer program. When the computer program is run on an electronic device, the electronic device implements the method described in the first embodiment.

[0063] The specific implementation methods of a system, electronic device, computer-readable storage medium, and computer program product provided in the embodiments of the present application can refer to the specific embodiments of the above-mentioned method and will not be repeated here.

[0064] Obviously, those skilled in the art should understand that the above-mentioned units or steps of the present application can be implemented using a general-purpose computing device. They can be concentrated on a single computing device or distributed across a network composed of multiple computing devices. Alternatively, they can be implemented using program codes executable by the computing device, so that they can be stored in a storage device and executed by the computing device, or they can be made into individual integrated circuit modules, or multiple modules or steps can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0065] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A MAC address configuration method, characterized in that: Applied to the Feiteng processor platform, the Feiteng processor platform includes a Feiteng processor, EEPROM and UEFI firmware; The Feiteng processor is externally connected to an EEPROM; the method includes: Write the target MAC address to a specific memory location in the EEPROM; The UEFI firmware reads the MAC address from a specific storage location in the EEPROM during the DXE phase and writes the MAC address to the MAC address hardware register of the Phytium processor network controller.

2. The method according to claim 1, characterized in that The Feiteng processor is connected to the EEPROM via the I2C0 bus.

3. The method according to claim 2, characterized in that The method further comprises: generating a CRC check code of the target MAC address; Writing the target MAC address into a specific storage location of the EEPROM includes: writing the target MAC address and a corresponding CRC check code into the EEPROM, wherein the CRC check code is used for verification when the UEFI firmware reads the MAC address from the specific storage location of the EEPROM.

4. The method according to claim 3, characterized in that The UEFI firmware verifies the MAC address when reading it from a specific storage location in the EEPROM during the DXE phase. Only after the verification is passed will the MAC address be written into the MAC address register of the Phytium processor network controller. The verification includes checking the legality of the MAC address format and matching the CRC check code.

5. The method according to claim 4, characterized in that The method further includes: if reading the EEPROM fails or verification fails, entering a MAC address recovery mode and using the original MAC address.

6. The method according to claim 3, characterized in that The writing of the target MAC address and the corresponding CRC check code into the EEPROM, in the case of a single machine configuration, includes: receiving a customized target MAC address input by a user; and writing the target MAC address and the corresponding CRC check code into the EEPROM.

7. The method according to claim 3, characterized in that Writing the target MAC address and the corresponding CRC check code into the EEPROM, in the case of batch configuration, includes: using an EEPROM programmer to batch burn the target MAC address and the CRC check code into the EEPROM.

8. An electronic device, characterized in that: include: memory and processor; The memory is used to store computer programs; The processor is configured to call the computer program to execute the method according to any one of claims 1 to 7.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed on an electronic device, the electronic device implements the method according to any one of claims 1 to 7.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed on an electronic device, the electronic device implements the method according to any one of claims 1 to 7.

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