Double-interface card preparation method and double-interface card

Abstract

The invention relates to the field of dual-interface cards, and discloses a dual-interface card preparation method and a dual-interface card, and the dual-interface card preparation method comprises the steps: providing a chip packaging body and a flexible substrate which is electrically connected with an upper conductive layer and a lower conductive layer; the chip packaging body, the flexible substrate and the antenna are connected in the card body, a conductive layer on the side, opposite to the chip packaging body, of the flexible substrate is exposed out of the card body, and the chip packaging body and the antenna are connected with the flexible substrate; and packaging the card body to obtain the dual-interface card. The reliability of the dual-interface card is improved and the cost is reduced.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of dual-interface cards, and particularly relates to a dual-interface card preparation method and a dual-interface card. BACKGROUND

[0002] A dual-interface card is a kind of smart card integrating two communication interfaces, and usually has a contact interface and a non-contact interface, which can interact with a card reader in different ways. The dual-interface card can be applied to a traffic card, a social security card, a bank card, etc.

[0003] The dual-interface card comprises a card body and a chip encapsulated in the card body. The current dual-interface card has low reliability and high cost. SUMMARY

[0004] The application provides a dual-interface card preparation method and a dual-interface card, which can improve the reliability of the dual-interface card and reduce the cost.

[0005] In one aspect, the application provides a dual-interface card preparation method, which comprises the following steps: providing a flexible substrate with a chip package and upper and lower conductive layers electrically connected; connecting the chip package, the flexible substrate and an antenna in a card body, and exposing the conductive layer on the side of the flexible substrate away from the chip package to the card body, wherein the chip package and the antenna are connected with the flexible substrate respectively; and encapsulating the card body to obtain a dual-interface card.

[0006] In some embodiments, the step of connecting the chip package, the flexible substrate and the antenna in the card body, and exposing the conductive layer on the side of the flexible substrate away from the chip package to the card body comprises the following steps: connecting the chip package and the conductive layer of the flexible substrate to obtain a chip module; and encapsulating the connected chip module and the antenna in the card body, and exposing the conductive layer on the side of the flexible substrate away from the chip module to the card body.

[0007] In some embodiments, the step of providing the chip package comprises the following steps: manufacturing a batch of lead frames; dispensing glue on the lead frames; placing a chip body in the aligned lead frame and performing wire bonding; and filling the mold cavity with encapsulation glue in a mold to encapsulate the chip body and the lead frame, and exposing part of the lead frame to form a support part and a plurality of connecting parts, and cutting off the redundant part to obtain the chip package.

[0008] In some embodiments, the step of providing the flexible substrate with the upper and lower conductive layers electrically connected comprises the following steps: opening a plurality of conductive holes in the thickness direction of the flexible substrate with the upper and lower conductive layers; and filling the conductive holes with conductive structures, and connecting the conductive structures with the upper and lower conductive layers.

[0009] In some embodiments, the step of providing the flexible substrate with the upper and lower conductive layers electrically connected further comprises the following steps: producing a large flexible substrate; and printing solder on the upper conductive layer of the large flexible substrate to form a solder layer.

[0010] In some embodiments, the method of connecting the chip package and the flexible substrate to obtain the chip module comprises: corresponding the connecting part and the supporting part of the chip package to the contact positions of the large flexible substrate with the solder layer; heating and melting the solder layer to connect the connecting part and the plurality of third pads of the upper conductive layer through the solder layer, to connect the supporting part and the intermediate disc of the upper conductive layer through the solder layer, and to make the chip package and the lower conductive layer of the flexible substrate conductive through the electroplating conductive structure, to obtain the chip module.

[0011] In some embodiments, the method of obtaining the chip module comprises: dividing the flexible substrate to obtain a plurality of chip modules.

[0012] In some embodiments, after connecting the connecting part and the plurality of third pads of the upper conductive layer through the solder layer, and connecting the supporting part and the intermediate disc of the upper conductive layer through the solder layer, the method further comprises: forming a glue layer at the connection between the chip package and the flexible substrate.

[0013] On the other hand, the embodiments of the present application also provide a dual-interface card, comprising: a card body, provided with a mounting slot; an antenna, disposed in the card body, a part of the antenna being accommodated in the mounting slot;

[0014] a chip module, accommodated in the mounting slot, the chip module comprising a chip package and a flexible substrate connected to each other, the flexible substrate comprising an upper conductive layer and a lower conductive layer disposed opposite to each other along the thickness direction of the dual-interface card, the upper conductive layer being conductively connected to the lower conductive layer; the chip package being connected to the upper conductive layer, the side of the chip package facing the flexible substrate being a flat surface, the side of the lower conductive layer facing away from the chip module being exposed to the card body, and the antenna being connected to the upper conductive layer.

[0015] In some embodiments, the chip module further comprises a conductive structure, which penetrates the flexible substrate along the thickness direction and is connected to the upper conductive layer and the lower conductive layer.

[0016] In some embodiments, the chip module further comprises a glue layer, which is located in the circumferential direction of the chip package and is connected to the chip package and the flexible substrate.

[0017] In some embodiments, the upper conductive layer comprises a plurality of first pads and a plurality of second pads, the first pads and the second pads being continuous strips, one end of the first pads and the second pads being connected to the chip package, and the other end of the first pads being connected to the conductive structure; the second pads comprising an enlarged portion, the enlarged portion being connected to the antenna.

[0018] In some embodiments, the plurality of first pads are respectively located on both sides of the chip package, and the plurality of first pads are respectively connected to a ground contact, a power supply contact, a reset contact, a clock contact, a data input / output contact, and two logic signal contacts of the chip package.

[0019] In some embodiments, the chip package includes a chip body, a lead frame, a connecting line, and a packaging layer, the packaging layer covering the chip body, the lead frame, and the connecting line, the chip body being located at one side of the lead frame along a thickness direction; the lead frame includes a supporting part and a connecting part, the chip body being mounted on the supporting part, the connecting line being connected between a contact of the chip body and the connecting part, and a side of the supporting part and the connecting part facing away from the chip body being at least partially exposed to the packaging layer.

[0020] In some embodiments, the chip module further includes a solder layer, the solder layer being connected between the supporting part and the upper conductive layer, and being connected between the connecting part and the upper conductive layer.

[0021] In some embodiments, the solder layer includes solder.

[0022] The double-interface card preparation method and the double-interface card of the embodiments of the present application improve the protection strength of the chip body through the independently packaged chip package, have a smaller overall size, and have a smaller connection difficulty of the chip package and the flexible substrate, without the need for via connection, and have higher connection reliability. The preparation process is shortened, the product qualification rate is improved, and the risk of failure in mechanical performance testing is reduced. The oxidation resistance and corrosion resistance of the chip package are greatly improved, and the reliability of the double-interface card is improved. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly introduced. Those skilled in the art can obtain other drawings according to these drawings without creative labor.

[0024] Figure 1 FIG. 1 is a structural schematic diagram of a double-interface card according to some embodiments of the present application;

[0025] Figure 2 FIG. 2 shows a structural schematic diagram of a chip module in FIG. 1; Figure 1

[0026] FIG. 3 shows a structural schematic diagram of a chip module in FIG. 1; Figure 3 Figure 1 FIG. 4 shows a top view of a chip module in FIG. 1;

[0027] Figure 4 Figure 2 FIG. 5 shows an internal wire bonding diagram of a chip package in FIG. 1;

[0028] Figure 5 FIG. 6 is a flowchart of a double-interface card preparation method according to some embodiments of the present application.

[0029] REFERENCE SIGNS:

[0030] ​100, chip module; 110, chip package; 120, flexible substrate; 111, chip body; 112, lead frame; 113, packaging layer; 114, connecting line; 130, conductive structure; 121, upper conductive layer; 122, lower conductive layer; 123, insulating layer; 101, first pad; 102, second pad; 102a, enlarged portion; 102b, extension portion; 103, third pad; 104, intermediate pad; 110a, support portion; 110b, connecting portion; 115, solder layer; 131, conductive hole;

[0031] 200, card body; 201, mounting slot; 300, antenna; Z, thickness direction. DETAILED DESCRIPTION

[0032] The embodiments of the technical solutions of the present application will be described in detail below with reference to the drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present application, and therefore only serve as examples, and cannot limit the protection scope of the present application.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "include" and "have" and any variations thereof in the specification and claims of the present application and the above description of drawings are intended to cover non-exclusive inclusion.

[0034] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly and specifically limited.

[0035] In this paper, the phrase "embodiment" means that the specific features, structures or properties described in conjunction with the embodiment can be included in at least one embodiment of the present application. The appearance of this phrase in the specification does not necessarily mean the same embodiment, nor is it an independent or alternative embodiment that is not mutually exclusive with other embodiments. The skilled person in the art explicitly and implicitly understands that the embodiments described herein can be combined with other embodiments.

[0036] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the existence of A alone, the existence of A and B together, and the existence of B alone. In addition, the character " / " in this paper generally represents a "or" relationship between the front and rear associated objects.

[0037] In the description of the embodiments of the present application, the term "a plurality of" refers to two or more (including two), and similarly, "a plurality of groups" refers to two or more groups (including two groups), and "a plurality of pieces" refers to two or more pieces (including two pieces).

[0038] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "transverse"

[0039] "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right"

[0040] "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise"

[0041] "axial", "radial", "circumferential", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.

[0042] In the description of the embodiments of the present application, unless otherwise explicitly specified and limited, the technical terms "mounting", "connection", "connection", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal connection of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0043] A dual-interface card is a smart card that integrates two communication interfaces, usually having both contact and contactless interfaces, and can interact with card readers in different ways. The contact interface refers to physical contact with the card reader through the metal contacts on the card to complete data transmission, which is more secure and commonly used in traditional smart cards (such as bank card chips). The contactless interface refers to the radio frequency identification (RFID) technology, which can transmit data through electromagnetic field without physical contact, which is convenient and fast, suitable for fast payment, access control and other scenarios.

[0044] The dual-interface card includes a card body and a chip encapsulated in the card body. The chip is connected to the back side of the substrate away from the chip through wire bonding of the chip body. The metal wire is connected to the substrate in the form of a via. The chip body is further encapsulated with the substrate and then installed in the card body. However, the dual-interface card is often subjected to bending force during use. The connection mode of the metal wire via makes the chip very easy to be damaged or even broken during use, affecting the use reliability and service life of the dual-interface card. In addition, the encapsulation of the substrate and the chip body is not firm, which reduces the reliability of the dual-interface card and increases the cost.

[0045] Therefore, the embodiments of the present application provide a dual-interface card preparation method and a dual-interface card. The connection reliability of the connecting wire in the chip encapsulation body is improved by connecting the chip encapsulation body and the upper conductive layer of the flexible substrate. The connection reliability of the chip encapsulation body and the flexible substrate is improved without a via. The reliability of the dual-interface card is improved as a whole. The length of the connecting wire is shortened, and the connecting material can be selected as a low-cost material, thereby reducing the cost of the dual-interface card.

[0046] As shown in Figures 1 to 4 The embodiments of the present application provide a dual-interface card including a card body 200, an antenna 300, and a chip module 100. The card body 200 is provided with a mounting groove 201. The antenna 300 is arranged in the card body 200, and a part of the antenna 300 is accommodated in the mounting groove 201. The chip module 100 is accommodated in the mounting groove 201. The chip module 100 includes a chip encapsulation body 110 and a flexible substrate 120 connected to each other. The flexible substrate 120 includes an upper conductive layer 121 and a lower conductive layer 122 arranged opposite to each other along the thickness direction Z of the dual-interface card. The upper conductive layer 121 is conductively connected to the lower conductive layer 122. The chip encapsulation body 110 is connected to the upper conductive layer 121. One side of the lower conductive layer 122 away from the chip module 100 is exposed to the card body 200. The antenna 300 is connected to the upper conductive layer 121.

[0047] For example, the card body 200 can have a regular shape or an irregular shape. For example, the card body 200 can have a rectangular shape, a circular shape, a heart shape, an ultra-thin strip shape, or the like. The card body 200 can be made of PVC (polyvinyl chloride), PET (polyethylene terephthalate), PLA (polylactic acid), or the like. In some examples, the card body 200 can be processed by injection molding, stamping, laminating, or the like.

[0048] In some examples, the card body 200 can be processed by mechanical milling, laser cutting, mold stamping, or the like to form the mounting groove 201. For example, the mounting groove 201 can have a regular shape or an irregular shape, such as a rectangular shape, a circular shape, an L shape, a T shape, or the like.

[0049] The antenna 300 is used to realize the contactless communication function of the dual-interface card. The antenna 300 is made of a coil or circuit structure of a specific shape of conductive material embedded in the card body 200. Through the coupling effect of the electromagnetic field, energy transmission and data exchange are carried out with the external card reader, so that the dual-interface card can complete identification, authentication, payment and other operations without physical contact.

[0050] Exemplarily, the antenna 300 can directly print silver paste or copper paste on the insulating layer 123 inside the card body 200 by screen printing technology to form the antenna 300 circuit. The enameled copper wire can also be wound into a loop-shaped antenna 300, and the antenna 300 is embedded in the card body 200 by injection molding or lamination process. The pre-made flexible antenna 300 (such as FPC antenna 300) can also be pasted inside the card body 200 by heat-conducting glue and the like.

[0051] In some examples, the antenna 300 can be a rectangular loop, a circular spiral winding, a multi-loop conforming structure, etc. The antenna 300 can be made of copper-based materials, aluminum-based materials, silver paste composites, etc.

[0052] Exemplarily, part of the antenna 300 is located in the mounting groove 201 to facilitate connection with the chip module 100, and another part of the antenna 300 is located in the thickness range of the card body 200. As an example, both ends of the antenna 300 are located in the mounting groove 201. The ends of the antenna 300 are electrically connected to the chip module 100.

[0053] The chip module 100 is accommodated in the mounting groove 201, facilitating the installation of the chip module 100 and the card body 200, and the protection of the card body 200 to the chip module 100. Exemplarily, the circumference of the chip module 100 can be bonded in the mounting groove 201. As an example, one surface of the chip module 100 is in the same plane as the surface of the card body 200 on the opening side of the mounting groove 201.

[0054] The chip module 100 includes a chip package 110, which is a structural assembly for physically protecting, electrically connecting and supporting the chip body 111. The chip body 111 is isolated from the external circuit by the packaging material, and the electrical connection between the chip body 111 and the external circuit is realized by the pins or pads. Exemplarily, the chip package 110 can use thermosetting plastic materials such as epoxy resin to encapsulate the chip body 111, use ceramic materials as the packaging shell, or use flexible polymer materials to encapsulate the chip body 111. The chip body 111 is connected to the flexible substrate 120 through the chip package 110 to improve the protection of the chip body 111.

[0055] Exemplarily, the flexible substrate 120 can be a flexible printed circuit board, a flexible copper-clad plate, a polymer thick film substrate, or the like. The flexible substrate 120 can better adapt to the use environment of the dual-interface card with bending, improve the bending resistance of the connection between the chip package 110 and the flexible substrate 120, and improve the reliability of the dual-interface card.

[0056] The upper conductive layer 121 and the lower conductive layer 122 are arranged on the upper surface and the lower surface of the flexible substrate 120 along the thickness direction Z, for realizing the connection with the chip module 100 and the external connection. The shape of the upper conductive layer 121 and the lower conductive layer 122 can be a sub-region form, a grid form, a contact array form, or the like.

[0057] In one example, the flexible substrate 120 includes an insulating layer 123, and the upper conductive layer 121 and the lower conductive layer 122 are connected to the two surfaces opposite to the insulating layer 123 along the thickness direction Z.

[0058] In one example, the upper conductive layer 121 and the lower conductive layer 122 are connected through a via.

[0059] Exemplarily, the chip package 110 can be connected with the upper conductive layer 121 through welding, bonding, or the like. As an example, the antenna 300 is located on both sides of the chip package 110 and is connected with the upper conductive layer 121, respectively.

[0060] In one example, the lower conductive layer 122 is exposed to the card body 200 for physical contact communication with a card reader, and transmits signals such as power supply (VCC), ground (GND), data input and output (I / O), and the like.

[0061] In the embodiments of the present application, the chip package 110 is connected with the flexible substrate 120 to form the chip module 100, which improves the stability of the connection between the chip body 111 and the flexible substrate 120 compared with the related art in which the chip body 111 is connected with the substrate and then encapsulated. The flexible substrate 120 electrically connected by the upper and lower conductive layers 122 does not need to be connected with the connection line 114, which reduces the risk of cracking of the solder joint of the connection line 114 and improves the reliability of the dual-interface card.

[0062] In the related art, a long connection line 114 with a large wire diameter is needed to connect between the chip body 111 and the flexible substrate 120, which is high in cost. In the present application, the length of the connection line 114 in the chip package 110 is shorter and the wire diameter is smaller, which reduces the cost. In addition, in the related art, the metal material of the connection line 114 and the substrate needs to be electroplated with nickel and pure gold to ensure the conduction efficiency, while in the present application, the connection between the chip package 110 and the flexible substrate 120 can be realized by reflow soldering and via copper plating, which reduces the cost.

[0063] Further, in an embodiment of the present application, the chip module 100 further comprises a conductive structure 130, the conductive structure 130 is connected to the upper conductive layer 121 and the lower conductive layer 122 through the flexible substrate 120 along the thickness direction Z.

[0064] Illustratively, the conductive structure 130 comprises a conductive hole 131 and a conductive medium filled in the conductive hole 131, the conductive hole 131 is opened in the flexible substrate 120 along the thickness direction Z, and penetrates the upper conductive layer 121, the insulating layer 123 and the lower conductive layer 122 of the flexible substrate 120.

[0065] In an example, the conductive medium can comprise one or more of electroplated copper, conductive glue, conductive polymer.

[0066] In an example, the conductive hole 131 can be a cylindrical hole, a waist-shaped hole, a conical hole or the like.

[0067] As an example, the conductive medium can fill the conductive hole 131 or fill to a height lower than the depth of the conductive hole 131.

[0068] Illustratively, the chip module 100 can have a plurality of conductive structures 130. As an example, the plurality of conductive structures 130 is consistent with the number of pins or pads of the chip package 110.

[0069] Embodiments of the present application pass through the flexible substrate 120 and the upper conductive layer 121 and the lower conductive layer 122 by the conductive structure 130, which improves the connection reliability of the upper conductive layer 121 and the lower conductive layer 122, and simplifies the structural complexity of the flexible substrate 120, facilitating processing and manufacturing.

[0070] In an embodiment of the present application, the upper conductive layer 121 comprises a plurality of first pads 101 and a plurality of second pads 102, the first pads 101 and the second pads 102 are continuous strips, one end of the first pads 101 and the second pads 102 are connected with the chip package 110, the other end of the first pads 101 is connected with the conductive structure 130; the second pads 102 comprise an enlarged portion 102a, and the enlarged portion 102a is connected with the antenna 300.

[0071] Illustratively, the first pads 101 are connected through the conductive structure 130, the corresponding areas of the upper conductive layer 121 and the lower conductive layer 122. The second pads 102 realize the connection of the antenna 300 and the chip package 110.

[0072] In an example, the first pad 101 comprises a first end and a second end, the first end is located below the chip package 110 along the thickness direction Z, and is connected with the pad of the chip package 110 through the glue or solder layer 115.

[0073] In another example, the second end of the first pad 101 is arranged in the circumferential direction of the conductive structure 130, and the conductive structure 130 is in contact with the second end in the thickness direction Z.

[0074] In some examples, the second pad 102 includes a continuous extension 102b and an enlarged portion 102a, and the end of the extension 102b is below the chip package 110 in the thickness direction Z, and is connected to the pad of the chip package 110 through the glue or solder layer 115.

[0075] In another example, in the thickness direction Z, the projection area of the enlarged portion 102a on the insulating layer 123 of the flexible substrate 120 is greater than the projection area of the end of the extension 102b on the insulating layer 123 of the flexible substrate 120. The projection area of the enlarged portion 102a on the insulating layer 123 of the flexible substrate 120 is greater than the projection area of the second end of the first pad 101 on the insulating layer 123 of the flexible substrate 120.

[0076] In an embodiment of the present application, the connecting portion 110b is located on the opposite side of the supporting portion 110a.

[0077] In some examples, the upper conductive layer 121 includes 5 first pads 101, which can be respectively located on both sides of the chip package 110 in the first direction, wherein the 5 first pads 101 are respectively connected to the ground contact (GND), the power supply contact (VDD), the reset contact (RST), the clock contact (CLK), the data input / output contact (I / O), and two logic signal contacts (LA / LB) of the chip package 110.

[0078] In other examples, the upper conductive layer 121 includes 2 second pads 102, which are located on both sides of the chip package 110 in the first direction. The first direction can be perpendicular to the thickness direction Z in the length or width direction of the dual-interface card.

[0079] The strip-shaped first pad 101 and the second pad 102 are beneficial to being arranged insulatively on the flexible substrate 120, reducing mutual interference. The enlarged portion 102a of the second pad 102 has a large area, which is beneficial to the stability of the antenna 300 connection.

[0080] In an embodiment of the present application, the lower conductive layer 122 includes an intermediate disc 104 and a plurality of third pads 103, the third pads 103 are located on the circumferential side of the intermediate disc 104, the intermediate disc 104 is opposite to the chip package 110, and a part of the third pads 103 are connected to the conductive structure 130.

[0081] Exemplarily, the chip package 110 is mounted on the intermediate disc 104, and as an example, the chip package 110 is connected to the intermediate disc 104 through the solder layer 115 or the glue layer.

[0082] In one example, the lower conductive layer 122 includes 6 third pads 103, 5 of which are connected to the first pads 101 through the conductive structures 130. Among them, 2 third pads 103 are arranged opposite to the second pads 102 along the thickness direction Z. Among them, 1 third pad 103 is arranged opposite to 1 second pad 102 and 1 conductive structure 130 along the thickness direction Z.

[0083] Further, in one embodiment of the present application, the chip package 110 includes a chip body 111, a lead frame 112, and a packaging layer 113, the packaging layer 113 covering the chip body 111 and the lead frame 112, the chip body 111 being located on one side of the lead frame 112 along the thickness direction Z; the lead frame 112 includes a support part 110a and a connecting part 110b, the chip body 111 is mounted on the support part 110a, the contacts of the chip body 111 are connected to the connecting part 110b, and the side of the support part 110a and the connecting part 110b away from the chip body 111 is at least partially exposed to the packaging layer 113.

[0084] The chip body 111 is a piece of semiconductor silicon wafer integrating integrated circuits, on which transistors, resistors, capacitors and other components are manufactured through semiconductor processes to form circuit modules that realize dual-mode communication. As an example, the chip body 111 can be connected to the lead frame 112 through silver paste.

[0085] The lead frame 112 is a sheet structure made of metal material, which is formed into a specific geometric shape through precise stamping or etching process. Exemplarily, the surface of the lead frame 112 can be plated with nickel, gold or silver to improve electrical conductivity and oxidation resistance. The lead frame 112 serves as an electrical bridge between the chip body 111 and the external conductive layer, and provides physical support for the chip while assisting in dissipating heat generated during operation.

[0086] Specifically, the lead frame 112 includes a support part 110a, which serves as a chip carrier table, and is the largest rectangular or circular area on the lead frame 112. The support part 110a is located in the center of the frame and is used to mount the chip body 111. The chip body 111 is fixed to the surface of the support part 110a through conductive glue or eutectic welding process to ensure the stability of mechanical connection.

[0087] Exemplarily, the connecting part 110b can be an elongated metal strip distributed around the support part 110a, and the number of metal strips can be designed according to the needs of the chip body 111. The connecting part 110b is used to connect the contacts of the chip body 111 and the conductive structures 130. Each pin of the connecting part 110b corresponds to one functional signal of the chip.

[0088] As an example, the connecting portion 110b is provided with a circular or elliptical pad on the side facing the chip body 111, for wire 114 bonding. The side of the connecting portion 110b facing away from the chip body 111 is flush with the bottom of the supporting portion 110a, and the end of the connecting portion 110b extends to the edge of the chip package 110.

[0089] The lead frame 112 and the chip body 111 can be connected by means of flip-chip, tape automated bonding, flip-chip technology, wire bonding, etc.

[0090] The packaging layer 113 is a covering structure composed of high polymer material or ceramic, etc. As an example, the packaging layer 113 can be formed by molding, lamination or coating process. In some examples, the packaging layer 113 can be epoxy resin molding compound, liquid epoxy resin, polyimide, etc.

[0091] In some examples, a part of the side of the supporting portion 110a facing away from the chip body 111 is exposed to the packaging layer 113, and the side of the chip package 110 connected to the flexible substrate 120 can be a flat surface. The part of the supporting portion 110a exposed to the packaging layer 113 serves as a heat dissipation pad and is connected to the flexible substrate 120; a part of the side of the connecting portion 110b facing away from the chip body 111 is exposed to the packaging layer 113, and the part of the connecting portion 110b exposed to the packaging layer 113 serves as an external pad and is connected to the flexible substrate 120.

[0092] In the embodiments of the present application, the lead frame 112 is used to connect the chip body 111, and the packaging layer 113 is used to encapsulate the chip body 111. The lead frame 112 is not easy to deform at high temperature during encapsulation, and the packaging layer 113 can be baked and solidified after being inverted and molded by injection mold. The shape and size of the solidified packaging layer 113 are easy to control, and the encapsulation area is firm and not easy to be damaged.

[0093] In one embodiment of the present application, the chip package 110 further comprises a connecting wire 114, the packaging layer 113 encapsulates the connecting wire 114, and the connecting wire 114 is connected between the contact of the chip body 111 and the connecting portion 110b.

[0094] The connecting wire 114 is a metal wire, which is connected to the chip body 111 and the connecting portion 110b by wire bonding. As an example, the connecting wire 114 is an aluminum wire or an alloy wire, etc. As an example, when the connecting wire 114 is an alloy wire, the diameter of the connecting wire 114 is less than or equal to 25 μm.

[0095] In the embodiments of the present application, the connecting wire 114 is encapsulated in the packaging layer 113, which reduces the fracture of the connecting part of the connecting wire 114 and improves the overall structural reliability of the chip package. Moreover, the wire bonding of the lead frame 112 and the connecting wire 114 can reduce the length and diameter of the connecting wire 114, thereby reducing the cost.

[0096] In one embodiment, the chip package 110 is packaged by a DFN packaging process or a QFN packaging process or other similar processes. For example, the DFN package is formed by injection molding and baking curing, forming a regular rectangular black shell, reducing the risk of damage or breakage of the connecting lines 114 due to external force, and greatly improving the reliability.

[0097] In addition, in some embodiments of the present application, the chip module 100 further comprises a solder layer 115 connected between the support portion 110a and the upper conductive layer 121, and connected between the connecting portion 110b and the upper conductive layer 121.

[0098] The solder layer 115 realizes the surface connection between the support portion 110a and the upper conductive layer 121, and the solder layer 115 realizes the surface connection between the connecting portion 110b and the upper conductive layer 121, thereby increasing the solder contact area and improving the connection stability.

[0099] Further, in some embodiments, the solder layer 115 comprises solder. The use of solder in the solder layer 115 can connect the chip package 110 and the upper conductive layer 121 through a reflow soldering process, thereby reducing the soldering cost and improving the soldering efficiency.

[0100] In one embodiment, the connecting portion 110b of the lead frame 112 comprises 8 pins, of which 7 pins are respectively connected to the corresponding interfaces of the chip body 111. Of these, 2 pins are used to connect the two antenna pads (L1 and L2) on the front and back of the chip body 111, and 5 pins are used to connect the five functional contacts on the front of the chip body 111. There is also one pin which is a spare pin.

[0101] In some embodiments, the chip module 100 further comprises a glue layer, which is located in the circumferential direction of the chip package 110 and is connected to the chip package 110 and the flexible substrate 120.

[0102] The glue layer can be made of epoxy resin, modified acrylic resin, silicone gel, UV glue, etc.

[0103] The glue layer is arranged in the circumferential direction of the chip package 110 to improve the connection stability of the chip package 110 and the flexible substrate 120.

[0104] As shown in the drawings, Figures 1 to 5 Some embodiments of the present application also provide a dual-interface card preparation method, which can obtain the dual-interface card of the above-mentioned embodiments. The dual-interface card preparation method comprises the following steps S1 to S3.

[0105] S1: providing a flexible substrate 120 with a chip package 110 and an upper and lower conductive layer 122 electrically connected.

[0106] The chip package 110 can be prepared or purchased directly. The flexible substrate 120 can be prepared or purchased directly. The chip package 110 is a chip structure in a separate package.

[0107] The flexible substrate 120 includes an upper conductive layer 121 and a lower conductive layer 122, and the upper and lower conductive layers 122 are electrically connected. The upper conductive layer 121 is located on the upper surface of the flexible substrate 120, and the lower conductive layer 122 is located on the lower surface of the flexible substrate 120. As an example, the flexible substrate 120 includes an insulating layer 123, and the upper and lower conductive layers 122 are connected to the two surfaces of the insulating layer 123 in the thickness direction Z.

[0108] In one example, the upper and lower conductive layers 121 and 122 are connected by a via, and the conductive structure 130 is arranged in the hole to realize the connection of the upper and lower conductive layers 121 and 122.

[0109] S2: The chip package 110, the flexible substrate 120, and the antenna 300 are connected in the card body 200, and the conductive layer on the side of the flexible substrate 120 facing away from the chip package 110 is exposed to the card body 200, wherein the chip package 110 and the antenna 300 are connected to the flexible substrate 120 respectively.

[0110] As an example, the chip package 110, the flexible substrate 120, and the antenna 300 are all placed in the card body 200, and the connection of the chip package 110 and the flexible substrate 120, and the connection of the flexible substrate 120 and the antenna 300 can be completed at one time, or the connection of the chip package 110 and the flexible substrate 120, and the connection of the flexible substrate 120 and the antenna 300 are completed respectively.

[0111] In one example, a mounting groove 201 is formed on the card body 200, the chip package 110 and the flexible substrate 120 are accommodated in the mounting groove 201, and a part of the antenna 300 is placed in the card body 200 circumferentially of the mounting groove 201, and a part is placed in the mounting groove 201 for connection with the flexible substrate 120.

[0112] In another example, the chip package 110 and the antenna 300 are connected to the same side of the flexible substrate 120.

[0113] S3: The card body 200 is packaged to obtain a dual-interface card.

[0114] As an example, the card body 200 can adopt a form of thermal compression packaging, and the chip package 110, the flexible substrate 120, and the antenna 300 are packaged in the card body 200.

[0115] In one example, the card body 200 can be a multi-layer structure, and a part of the antenna 300 is laid in the multi-layer structure of the card body 200, and another part extends into the mounting slot 201.

[0116] In the related art, the chip body 111 is connected with the flexible substrate 120 through a via hole, and then the chip body 111 and the flexible substrate 120 are jointly packaged, and are connected with the antenna 300 when being mounted into the card body 200. In this preparation method, since the chip body 111 is arranged on the epoxy glass cloth, it is deformed at high temperature, and in order to ensure the connection reliability of the connecting line 114 of the chip body 111 and the flexible substrate 120, the packaging thickness of the chip body 111 and the flexible substrate 120 is large, the volume is large, and the packaging shape is irregular, the encapsulation glue is not fully cured, the epoxy glass cloth is easily contaminated, and the connecting point of the connecting line 114 is easily detached and broken, resulting in failure. The embodiment of the present application improves the protection strength of the chip body 111 through the independently packaged chip package body 110, the overall size is small, and the connection difficulty of the chip package body 110 and the flexible substrate 120 is smaller, without via hole connection, and the connection reliability is higher. The preparation process is shortened, the product qualification rate is improved, and the risk of failure in the mechanical property test is reduced. The oxidation resistance and corrosion resistance of the chip package body 110 are greatly improved.

[0117] In one embodiment of the present application, step S2 specifically includes S21 and S22.

[0118] S21: connecting the conductive layer of the chip package body 110 and the flexible substrate 120 to obtain the chip module 100.

[0119] The chip package body 110 can be connected with the upper conductive layer 121 or the lower conductive layer 122 of the flexible substrate 120. When the chip package body 110 is connected with the upper conductive layer 121, the lower conductive layer 122 of the flexible substrate 120 is used to connect with the external device to realize contact type communication. When the chip package body 110 is connected with the lower conductive layer 122, the upper conductive layer 121 of the flexible substrate 120 is used to connect with the external device to realize contact type communication.

[0120] In one example, the conductive layer of the chip package body 110 and the flexible substrate 120 can be connected through a solder layer 115. As an example, a tin solder layer 115 can be used to connect through reflow soldering, which reduces the connection cost and improves the connection efficiency and stability.

[0121] In another example, after the chip package body 110 and the flexible substrate 120 are connected, a glue layer is arranged.

[0122] S22: packaging the connected chip module 100 and the antenna 300 in the card body 200, and exposing the conductive layer on the side away from the chip module 100 to the card body 200.

[0123] Exemplarily, the chip module 100 can be installed in the card body 200 after being connected with the antenna 300 for packaging, or the antenna 300 can be installed in the card body 200 first, and then the chip module 100 is installed in the card body 200 to connect the antenna 300 with the chip module 100.

[0124] In the embodiment of the present application, the chip module 100 is formed by the chip package 110 and the flexible substrate 120, and then connected with the antenna 300, which can increase the connection stability of the chip package 110 and the flexible substrate 120 and reduce the risk of failure in mechanical testing.

[0125] In another embodiment of the present application, the step S2 specifically includes S23 and S25.

[0126] S23: The antenna 300 and the chip package 110 are respectively placed in the card body 200.

[0127] S24: The flexible substrate 120 with one side conductive layer coated with solder is placed on the antenna 300 and the chip package 110, and the conductive layer on the side away from the chip package 110 is exposed to the card body 200.

[0128] S25: The card body 200 is heated to connect the chip package 110, the flexible substrate 120 and the antenna 300. As an example, the chip package 110, the flexible substrate 120 and the antenna 300 can adopt a reflow soldering process. The reflow soldering process can effectively ensure the connection quality of the chip package 110 and the flexible substrate 120.

[0129] In the embodiment of the present application, through the independent packaging structure of the chip package 110 and the upper and lower conductive layers 122 of the flexible substrate 120, the connection of the antenna 300, the chip package 110 and the flexible substrate 120 is completed by one heating, which shortens the preparation steps, improves the production efficiency and reduces the production cost.

[0130] In one embodiment of the present application, the card body 200 can be a multi-layer structure, and the packaging of the card body 200 can be completed by pressure and heating at the same time in step S25, which further shortens the preparation steps, improves the production efficiency and reduces the production cost.

[0131] Further, in an optional embodiment of the present application, the step of providing the chip package 110 in step S1 includes S11 and S12.

[0132] S11: The chip body 111 and the lead frame 112 are connected.

[0133] In one example, a batch of metal lead frame 112 is prepared by high-precision mold high-speed stamping. The lead frame 112 is glued by a die bonder device. A wafer map is used to sequentially take a single chip body 111 and place it in the aligned lead frame 112 and wire it.

[0134] S12: In the mold, the chip body 111 and the lead frame 112 are encapsulated by the encapsulation glue, and part of the lead frame 112 is exposed to form the support part 110a and the plurality of connection parts 110b, to obtain the chip package 110.

[0135] In one example, after the lead frame 112 after die bonding and wire bonding is placed in the mold, preheated thermosetting epoxy resin glue is injected, and the mold cavity is filled under high temperature and pressure in an oven, and after curing, the chip package 110 with regular shape and size is formed. As an example, the redundant material around the lead frame 112 is cut off to ensure the accuracy of the package size. For example, the size of the DFN chip package 110 is 3mm x 3mm. The wire diameter of the lead bonding connection line 114 can be effectively shortened.

[0136] After encapsulation using the lead frame 112 and mold injection, curing and cutting, the encapsulation size and shape are easy to control. Compared with the related art, after UV glue dropping and curing, the glue flow is irregular and uncontrollable, and the encapsulation shape and size are not easy to control. The lead frame 112 has obvious advantages.

[0137] In another optional embodiment of the present application, the step of obtaining the flexible substrate 120 with the upper and lower conductive layers 122 electrically connected in step S1 includes steps S13 and S14.

[0138] S13: A plurality of conductive holes 131 are formed in the flexible substrate 120 with the upper and lower conductive layers 122 along the thickness direction Z of the flexible substrate 120.

[0139] S14: The conductive structure 130 is filled in the conductive hole 131, and the conductive structure 130 is connected with the upper and lower conductive layers 122.

[0140] In the embodiment of the present application, the conductive structure 130 filled in the conductive hole 131 can be plated with copper. Compared with the related art, the connection hole 114 connection must be plated with nickel and pure gold. The cost of copper plating in the present application is relatively reduced. The connection stability of the flexible substrate 120 and the chip package 110 is better. Copper has high strength and good conductivity. The length of the connection line 114 can be shortened by about 1 / 2 compared with the related art.

[0141] In one embodiment of the present application, the step of providing the flexible substrate 120 with the upper and lower conductive layers 122 electrically connected for step S1 further comprises S15.

[0142] S15: printing the solder layer 115 on the upper conductive layer 121 of the flexible substrate 120.

[0143] In one example, the large flexible substrate 120 can be a PCB board produced by etching, plating and laser drilling according to the design drawing. The solder layer 115 is formed by printing solder on the plurality of contacts in the large flexible substrate 120 through a CCD automatic roll-to-roll printer.

[0144] Specifically, in one embodiment of the present application, the step of connecting the chip package 110 and the conductive layer of the flexible substrate 120 to obtain the chip module 100 for step S21 comprises S211.

[0145] S211: connecting the plurality of third pads 103 of the upper conductive layer 121 through the solder layer 115 by connecting the connecting portion 110b and the support portion 110a of the chip package 110 to the intermediate disc 104 of the upper conductive layer 121, wherein the third pads 103 are connected to the conductive structure 130 to obtain the chip module 100.

[0146] In one example, the connecting portion 110b and the support portion 110a of the chip package 110 are connected to the third pads 103 and the intermediate disc 104 of the large flexible substrate 120 with printed solder through an SMT automatic chip mounter.

[0147] The solder is heated and melted using a reflow soldering device to connect the chip package 110 and the flexible substrate 120 through solder balls, form an electrical circuit between the chip package 110 and the upper conductive layer 121 of the flexible substrate 120, and further realize the conduction between the chip package 110 and the lower conductive layer 122 of the flexible substrate 120 through the conductive structure 130.

[0148] In one embodiment of the present application, the step of obtaining the chip module 100 for step S211 comprises S2111.

[0149] S2111: dividing the flexible substrate 120 to obtain a plurality of chip modules 100.

[0150] By simultaneously connecting a plurality of chip packages 110 on the flexible substrate 120 of the whole large board, a plurality of chip modules 100 are obtained by dividing, the larger flexible substrate 120 is convenient for positioning and installation, which is more advantageous for mass production of dual-interface cards, and a plurality of chip packages 110 can be connected to the flexible substrate 120 synchronously, which is more efficient.

[0151] In one embodiment of the present application, after connecting the plurality of third pads 103 of the upper conductive layer 121 to the connecting portion 110b by the solder layer 115, and connecting the support portion 110a to the intermediate disc 104 of the upper conductive layer 121 by the solder layer 115, i.e. after step S211, step S2112 is further included.

[0152] S2112: forming a glue layer at the connection between the chip package 110 and the flexible substrate 120.

[0153] The glue layer is arranged in the circumferential direction of the chip package 110, and is used to bond the chip package 110 and the flexible substrate 120 to improve the reliability of the chip module 100. The glue layer can enhance the connection strength between the chip package 110 and the flexible substrate 120.

[0154] As an example: using a dispensing machine to apply the glue layer and solidify.

[0155] In one embodiment of the present application, the flexible substrate 120 includes an insulating layer 123 and upper and lower conductive layers 122 stacked along the two opposite sides of the insulating layer 123 along the thickness direction Z of the insulating layer 123, the material of the insulating layer 123 includes epoxy resin, and the material of the upper and lower conductive layers 122 includes ALCu mixture.

[0156] In one embodiment of the present application, a dual-interface card manufacturing method is provided, including the following steps.

[0157] A large flexible substrate 120 is produced.

[0158] Solder paste is printed on the upper conductive layer 121 of the large flexible substrate 120 to form a solder layer 115.

[0159] A batch of lead frames 112 is manufactured.

[0160] Dispensing is performed on the lead frame 112.

[0161] The chip body 111 is placed in the aligned lead frame 112 and wire bonding is performed.

[0162] In a mold, the chip body 111 and the lead frame 112 are encapsulated by filling the mold cavity with encapsulation glue, and part of the lead frame 112 is exposed to form the support portion 110a and the plurality of connecting portions 110b, and the redundant part is cut off to obtain the chip package 110.

[0163] The connecting portions 110b and the support portion 110a of the chip package 110 are one-to-one corresponding to the contact positions of the large flexible substrate 120 with the solder layer 115.

[0164] The solder layer 115 is heated and melted to connect the connecting portion 110b and the plurality of third pads 103 of the upper conductive layer 121 through the solder layer 115, to connect the supporting portion 110a and the intermediate disc 104 of the upper conductive layer 121 through the solder layer 115, and to make the chip package 110 and the lower conductive layer 122 of the flexible substrate 120 conductive through the electroplated conductive structure 130, thereby obtaining the chip module 100.

[0165] A glue layer is formed at the connection between the chip package 110 and the flexible substrate 120.

[0166] The above is merely specific implementation of the present application, and those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described system, module and unit can refer to the corresponding process in the foregoing method embodiments, which will not be described herein. It should be understood that the protection scope of the present application is not limited to this, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements shall be encompassed within the protection scope of the present application.

Claims

1. A method for preparing a dual-interface card, characterized in that: include: Provide a flexible substrate that electrically connects the chip package to the upper and lower conductive layers; connecting the chip package, the flexible substrate, and the antenna within a card body, with the conductive layer of the flexible substrate facing away from the chip package exposed on the card body, wherein the chip package and the antenna are respectively connected to the flexible substrate; The card body is packaged to obtain a dual-interface card.

2. The method for preparing a dual-interface card according to claim 1, wherein: The step of connecting the chip package, the flexible substrate, and the antenna in a card body, and exposing the conductive layer of the flexible substrate on a side facing away from the chip package to the card body, comprises: connecting the chip package and the conductive layer of the flexible substrate to obtain a chip module; The connected chip module and antenna are encapsulated in a card body, and the conductive layer of the flexible substrate facing away from the chip module is exposed to the card body.

3. The method for preparing a dual-interface card according to claim 2, wherein: The step of providing a chip package comprises: Produce batches of lead frames; dispensing glue on the lead frame; The chip body is placed in the aligned lead frame and wire bonded; In the mold, the chip body and the lead frame are encapsulated by filling the mold cavity with encapsulation glue, and a portion of the lead frame is exposed to form a supporting portion and a plurality of connecting portions, and the redundant portion is cut off to obtain a chip package.

4. The method for preparing a dual-interface card according to claim 3, wherein: The step of providing a flexible substrate electrically connecting the upper and lower conductive layers comprises: On a flexible substrate having upper and lower conductive layers, a plurality of conductive holes are opened along the thickness direction of the flexible substrate; A conductive structure is filled in the conductive hole to connect the conductive structure with the upper and lower conductive layers.

5. The method for preparing a dual-interface card according to claim 4, wherein: The step of providing a flexible substrate electrically connecting the upper and lower conductive layers further comprises: Producing large sheets of flexible substrates; Solder is printed on the upper conductive layer of the large flexible substrate to form a solder layer.

6. The method for preparing a dual-interface card according to claim 5, wherein: The step of connecting the chip package and the conductive layer of the flexible substrate to obtain a chip module includes: Align the connection portion and the support portion of the chip package with the contact points of the large flexible substrate with a solder layer; The solder layer is heated and melted, the connecting portion is connected to the plurality of third solder pads of the upper conductive layer through the solder layer, the supporting portion is connected to the middle pad of the upper conductive layer through the solder layer, and the chip package is connected to the lower conductive layer of the flexible substrate through electroplating conductive structure to obtain a chip module.

7. The method for preparing a dual-interface card according to claim 6, wherein: The chip module is obtained as follows: The flexible substrate is divided to obtain a plurality of chip modules.

8. The method for preparing a dual-interface card according to claim 6, wherein: After connecting the connection portion to the plurality of third pads of the upper conductive layer through the solder layer, and connecting the support portion to the middle pad of the upper conductive layer through the solder layer, the method further includes: An adhesive layer is formed at the connection between the chip package and the flexible substrate.

9. A dual-interface card, characterized in that: include: The card body is provided with a mounting slot; An antenna is placed in the card body, and a portion of the antenna is accommodated in the mounting slot; a chip module accommodated in the mounting slot, the chip module comprising a chip package and a flexible substrate connected to each other, the flexible substrate comprising an upper conductive layer and a lower conductive layer disposed opposite to each other along the thickness direction of the dual-interface card, the upper conductive layer being conductively connected to the lower conductive layer; The chip package is connected to the upper conductive layer. The side of the chip package facing the flexible substrate is a flat surface. The side of the lower conductive layer facing away from the chip module is exposed to the card body. The antenna is connected to the upper conductive layer.

10. The dual interface card according to claim 9, wherein: The chip module further includes a conductive structure, which passes through the flexible substrate along the thickness direction and is connected to the upper conductive layer and the lower conductive layer.

11. The dual interface card according to claim 9, wherein: The chip module further includes an adhesive layer, which is located around the chip package and connected to the chip package and the flexible substrate.

12. The dual interface card according to claim 10, wherein: The upper conductive layer includes a plurality of first pads and a plurality of second pads, wherein the first pads and the second pads are in a continuous strip shape, one end of each of the first pads and the second pads is connected to the chip package, and the other end of the first pad is connected to the conductive structure; The second pad includes an enlarged portion, and the enlarged portion is connected to the antenna.

13. The dual interface card according to claim 12, wherein: The plurality of first pads are respectively located on both sides of the chip package, and are respectively connected to a ground contact, a power contact, a reset contact, a clock contact, a data input / output contact, and two logic signal contacts of the chip package.

14. The dual interface card according to claim 9, wherein: The chip package comprises a chip body, a lead frame, connecting wires and a packaging layer, wherein the packaging layer covers the chip body, the lead frame and the connecting wires, and the chip body is located on one side of the lead frame along the thickness direction; The lead frame includes a supporting portion and a connecting portion, the chip body is mounted on the supporting portion, the connecting wire is connected between the contact of the chip body and the connecting portion, and the side of the supporting portion and the connecting portion facing away from the chip body is at least partially exposed to the packaging layer.

15. The dual interface card according to claim 14, wherein: The chip module further includes a solder layer connected between the support portion and the upper conductive layer, and between the connection portion and the upper conductive layer.

16. The dual interface card according to claim 15, wherein: The solder layer includes solder.

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