High electron mobility transistor based on P-type diamond and preparation method thereof
By using a P-type diamond substrate and barrier layer in HEMT to form a two-dimensional hole gas channel, the performance degradation problem of GaN and AlGaN materials in extreme scenarios is solved, and the reliability of HEMT in high temperature, high pressure, high frequency, high power and high radiation environments is improved.
Patent Information
- Application Number
- CN202510901821.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-01
- Publication Date
- 2025-10-17
AI Technical Summary
GaN and AlGaN materials have low thermal conductivity and poor thermal stability. The performance of HEMT degrades under extreme scenarios such as high temperature, high pressure, high frequency, high power and high radiation, resulting in poor device reliability.
P-type diamond is used as the substrate, and a P-type diamond layer and a barrier layer are formed on it to form a two-dimensional hole gas channel. Combined with the high breakdown field strength and high thermal conductivity of diamond, the structure of HEMT is optimized to improve its performance in extreme scenarios.
Through the coordination of the P-type diamond layer and the barrier layer, the operating frequency and output power of the HEMT are improved, the breakdown voltage is increased, the heat dissipation capability and thermal stability are enhanced, and the HEMT is made more reliable in high temperature, high pressure, high frequency, high power and high radiation scenarios.
Smart Images

Figure CN120812979A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of semiconductor technology, and in particular to a high electron mobility transistor based on P-type diamond and a preparation method thereof. BACKGROUND
[0002] A high electron mobility transistor (HEMT) is a kind of field effect transistor that uses a heterojunction interface two-dimensional electron gas (2DEG) or two-dimensional hole gas (2DHG) to achieve high performance, and is widely used in fields such as radio frequency communication, power electronics and radar systems.
[0003] In related technologies, the HEMT includes: a substrate; a GaN channel layer disposed on the substrate; an AlGaN barrier layer disposed on the GaN channel layer; a source and a drain, which are disposed on the GaN channel layer and are located on two sides of a region where the AlGaN barrier layer is located, respectively; and a gate disposed on the AlGaN barrier layer.
[0004] However, the thermal conductivity of GaN and AlGaN materials is low, and the thermal stability is poor. In extreme scenarios such as high temperature, high pressure, high frequency, high power and high radiation, there may be performance degradation problems, which leads to poor performance of the HEMT. This limits the application of the HEMT in these extreme scenarios and affects the reliability of the device. SUMMARY
[0005] The present disclosure provides a high electron mobility transistor based on P-type diamond and a preparation method thereof, which can optimize the performance of the HEMT, so that the HEMT can be better applied to scenarios such as high temperature, high pressure, high frequency and high power, thereby effectively improving the reliability of the HEMT. The technical solution at least includes the following solutions: In one aspect, a high electron mobility transistor is provided, comprising: a diamond substrate; a P-type diamond layer disposed on the diamond substrate, used to form a two-dimensional hole gas channel; a barrier layer disposed on the P-type diamond layer, used to promote the formation of the two-dimensional hole gas channel; a source and a drain, which are disposed on the P-type diamond layer and are located on two sides of a region where the barrier layer is located, respectively; and a gate disposed on the barrier layer.
[0006] Optionally, the doping concentration of the P-type diamond layer is 1×10 19 cm -3 to 1×10 21 cm -3 .
[0007] Optionally, the thickness of the P-type diamond layer is 10 nm to 100 nm.
[0008] Optionally, the material of the barrier layer comprises one of Al2O3, HfO2, hexagonal boron nitride, Al2N3 and MgO.
[0009] Optionally, the thickness of the barrier layer is 10nm to 30nm.
[0010] Optionally, the high electron mobility transistor further comprises a diamond buffer layer, the diamond buffer layer is arranged between the diamond substrate and the P-type diamond layer.
[0011] Optionally, the thickness of the diamond buffer layer is 50nm to 300nm.
[0012] Optionally, the high electron mobility transistor further comprises a passivation layer, the passivation layer is arranged on the side of the barrier layer, the source, the drain and the gate away from the P-type diamond layer.
[0013] Optionally, the material of the passivation layer comprises one of SiN and Al2O3.
[0014] In another aspect, a method for manufacturing a high electron mobility transistor is provided, comprising: forming a P-type diamond layer on a diamond substrate, the P-type diamond layer is used to form a two-dimensional hole gas channel; forming a barrier layer on the P-type diamond layer, the barrier layer is used to promote the formation of the two-dimensional hole gas channel; forming a source and a drain on the P-type diamond layer, the source and the drain are arranged on the P-type diamond layer and are respectively located on the two sides of the area where the barrier layer is located; forming a gate on the barrier layer.
[0015] The technical scheme provided by the embodiments of the present disclosure has at least the following beneficial effects: In the embodiments of the present disclosure, by arranging a P-type diamond layer on a diamond substrate, the diamond has high breakdown field strength and high carrier mobility, and a 2DHG channel can be formed through the P-type diamond layer. A barrier layer is arranged on the P-type diamond layer, which can cooperate with the P-type diamond layer to promote the formation of the 2DHG channel. This is conducive to the HEMT to achieve higher working frequency and greater output power, improve the breakdown voltage of the device, and thus optimize the performance of the HEMT. In addition, the diamond also has extremely high thermal conductivity and high temperature resistance. The P-type diamond layer and the diamond substrate can quickly conduct the heat inside the HEMT, thereby improving the heat dissipation capacity and thermal stability of the HEMT, so that the HEMT can be better applied to high temperature, high pressure, high frequency, high power and high radiation scenes, thereby effectively improving the reliability of the HEMT. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and for those skilled in the art, other drawings can also be obtained from these drawings without creative effort.
[0017] Figure 1 is a structure schematic diagram of a HEMT provided by an embodiment of the present disclosure; Figure 2 is a flowchart of a preparation method of a HEMT provided by an embodiment of the present disclosure; Figure 3 is a flowchart of another preparation method of a HEMT provided by an embodiment of the present disclosure; Figures 4 to 8 is a preparation process schematic diagram of a HEMT provided by an embodiment of the present disclosure.
[0018] Reference signs: 10: diamond substrate; 20: P-type diamond layer; 30: barrier layer; 40: source electrode; 50: drain electrode; 60: gate electrode; 70: diamond buffer layer; 80: passivation layer. DETAILED DESCRIPTION
[0019] Unless otherwise defined, technical terms or scientific terms used herein should be understood as having the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first", "second", "third" and similar terms used in the description and claims of the present patent application do not denote any order, quantity or importance, but are used to distinguish different components. Similarly, the terms "one" or "a" or similar terms do not denote a quantity limitation, but mean that at least one exists. The terms "include" or "contain" or similar terms mean that the elements or objects appearing before the terms "include" or "contain" cover the elements or objects listed after the terms "include" or "contain" and their equivalents, and do not exclude other elements or objects. The terms "connect" or "connected" or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms "up", "down", "left", "right" and the like are used only to indicate relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships may also change accordingly. A and / or B means that there are three cases: A, B, and A and B.
[0020] In order to make the purposes, technical solutions and advantages of the present disclosure clearer, the embodiments of the present disclosure will be further described in detail below with reference to the drawings.
[0021] Figure 1is a structural schematic diagram of a HEMT provided by an embodiment of the present disclosure. As shown in the figure, the HEMT comprises: a diamond substrate 10; a P-type diamond layer 20, disposed on the diamond substrate 10, used for forming a 2DHG channel; a barrier layer 30, disposed on the P-type diamond layer 20, used for promoting the formation of the 2DHG; a source electrode 40 and a drain electrode 50, disposed on the P-type diamond layer 20 and located on two sides of the area where the barrier layer 30 is located, respectively; and a gate electrode 60, disposed on the barrier layer 30. Figure 1
[0022] In an embodiment of the present disclosure, by disposing the P-type diamond layer 20 on the diamond substrate 10, the diamond has a high breakdown field strength (> 10 MV / cm) and a high carrier mobility (holes about 3800 cm 2 / V·S, and electrons about 4500 cm 2 / V·S), the 2DHG channel can be formed through the P-type diamond layer 20, and the barrier layer 30 disposed on the P-type diamond layer 20 can cooperate with the P-type diamond layer 20 to promote the formation of the 2DHG channel, which is conducive to the HEMT to achieve a higher working frequency and a larger output power, improve the breakdown voltage of the device, and thus optimize the performance of the HEMT. In addition, the diamond also has extremely high thermal conductivity (> 2000 W / m·K) and high temperature resistance, and the P-type diamond layer 20 and the diamond substrate 10 can quickly conduct the heat inside the HEMT, thereby improving the heat dissipation capacity and thermal stability of the HEMT, so that the HEMT can be better applied to high temperature, high pressure, high frequency, high power, and high radiation scenes, thereby effectively improving the reliability of the HEMT.
[0023] Exemplarily, the diamond substrate 10 can be a single crystal diamond or a diamond obtained by epitaxial growth.
[0024] Exemplarily, the material of the P-type diamond layer 20 can be boron-doped diamond.
[0025] Optionally, the doping concentration of the P-type diamond layer 20 is 1×10 19 cm -3 to 1×10 21 cm -3 . The doping concentration of the P-type diamond layer 20 in this range is conducive to improving the hole mobility, forming a stable 2DHG channel, and optimizing the performance of the HEMT.
[0026] Exemplarily, the doping concentration of the P-type diamond layer 20 can be 1×10 19 cm -3 , 1×10 20 cm -3 , or 1×10 21 cm -3 , etc.
[0027] Optionally, the thickness of the P-type diamond layer 20 is 10 nm to 100 nm. When the thickness of the P-type diamond layer 20 is in this range, a stable 2DHG channel can be formed and the heat dissipation capacity and thermal stability of the HEMT can be effectively improved.
[0028] For example, the thickness of the P-type diamond layer 20 can be 10 nm, 50 nm, 100 nm, or the like.
[0029] Optionally, the material of the barrier layer 30 includes one of Al2O3, HfO2, Hexagonal Boron Nitride (h-BN), Al2N3, and MgO. These materials are high work function insulating materials. When the barrier layer 30 is arranged on the P-type diamond layer 20, the surface band bending is induced, the valence band is induced to bend downward at the interface between the P-type diamond layer 20 and the barrier layer 30, and thus the energy well structure is formed at the interface, which is beneficial to promote the aggregation of holes at the interface to form a 2DHG channel. The high work function material can also produce a surface polarization effect, adjust the interface barrier height by fixing the polarization charge, and enhance the binding ability of holes at the interface, thereby improving the channel carrier concentration. In addition, the dielectric constant of these materials is high, which can effectively suppress the influence of interface state traps and reduce the interference of the interface on the stability of the 2DHG, and is beneficial to improve the gate control ability and reliability of the HEMT.
[0030] Optionally, the thickness of the barrier layer 30 is 10 nm to 30 nm. When the thickness of the barrier layer 30 is in this range, the formation of the 2DHG channel can be effectively promoted.
[0031] For example, the thickness of the barrier layer 30 can be 10 nm, 20 nm, 30 nm, or the like.
[0032] As shown in FIG. 1, the HEMT further includes a diamond buffer layer 70 arranged between the diamond substrate 10 and the P-type diamond layer 20. The diamond buffer layer 70 can reduce interface defects and ensure good quality of the HEMT. Figure 1 For example, the material of the diamond buffer layer 70 can be undoped diamond.
[0033] Optionally, the thickness of the diamond buffer layer 70 is 50 nm to 300 nm. If the thickness of the diamond buffer layer 70 is too small, there can be many interface defects, which affects the quality of the HEMT. If the thickness of the diamond buffer layer 70 is too large, the preparation time can be long, which affects the cost of the device. When the thickness of the diamond buffer layer 70 is in this range, the interface defects can be effectively reduced while ensuring that the cost of the HEMT is low, thereby improving the quality of the HEMT and ensuring high device reliability.
[0034] For example, the thickness of the diamond buffer layer 70 can be 50 nm, 100 nm, 200 nm, 300 nm, or the like.
[0035] Exemplarily, the thickness of the diamond buffer layer 70 can be 50 nm, 170 nm or 300 nm, etc.
[0036] Exemplarily, the source electrode 40 and the drain electrode 50 also cover the sidewalls of the P-type diamond layer 20 and the surfaces of the diamond buffer layer 70 away from the diamond substrate 10.
[0037] Optionally, the source electrode 40 and the drain electrode 50 can be metal materials. For example, the source electrode 40 and the drain electrode 50 can be Ti layer, Al layer, Ni layer and Au layer stacked in sequence; or Ti layer, Pt layer and Au layer stacked in sequence; or Ti layer, W layer and Au layer stacked in sequence. The source electrode 40 and the drain electrode 50 adopt these materials to facilitate the formation of low-resistance and high-reliability ohmic contact.
[0038] Optionally, the material of the gate electrode 60 can be a metal material. For example, the gate electrode 60 can be a Pt layer; or a Ni layer and an Au layer stacked in sequence. The gate electrode 60 adopts these high work function metals to facilitate the formation of Schottky contact and optimize the gate control characteristics of the HEMT.
[0039] It should be noted that the materials of the source electrode 40, the drain electrode 50 and the gate electrode 60 are only an example, and in other embodiments, the materials of the source electrode 40, the drain electrode 50 and the gate electrode 60 can be adjusted according to actual needs, which are not limited in the present disclosure.
[0040] Exemplarily, the gate length of the gate electrode 60 can be 0.1-1 μm.
[0041] As shown in FIG. 1, Figure 1 Exemplarily, the passivation layer 80 also covers at least part of the sidewalls of the diamond substrate 10, the diamond buffer layer 70, the barrier layer 30, the source electrode 40, the drain electrode 50 and the gate electrode 60. By providing the passivation layer 80, it is beneficial to reduce the surface trap state density of the HEMT and improve the environmental erosion resistance, thereby further improving the stability and reliability of the device.
[0042] Optionally, the material of the passivation layer 80 includes one of SiN and Al2O3. These materials have good insulation performance and erosion resistance, which can ensure that the stability of the HEMT is high.
[0043] In other embodiments, the material of the passivation layer 80 can also be adjusted according to actual needs, which is not limited in the present disclosure.
[0044] Optionally, the thickness of the passivation layer 80 disposed on the gate 60 can be 20-100 nm. For example, the thickness of the passivation layer 80 can be 50-100 nm. For example, the thickness of the passivation layer 80 can be 50 nm, 70 nm, or 100 nm, etc.
[0045] Figure 2 is a flowchart of a preparation method of a HEMT provided by an embodiment of the present disclosure. As shown in Figure 2 the preparation method comprises the following steps. In step S101, a P-type diamond layer is formed on a diamond substrate.
[0046] The P-type diamond layer is used to form a 2DHG channel.
[0047] In step S102, a barrier layer is formed on the P-type diamond layer.
[0048] The barrier layer is used to facilitate the formation of the 2DHG channel.
[0049] In step S103, a source electrode and a drain electrode are formed on the P-type diamond layer.
[0050] The source electrode and the drain electrode are disposed on the P-type diamond layer and are respectively located on two sides of the region where the barrier layer is located.
[0051] In step S104, a gate electrode is formed on the barrier layer.
[0052] It should be noted that the preparation method embodiment and the above-mentioned Figure 1 structure embodiment are based on the same inventive concept, and the beneficial effects of the embodiment of the present disclosure can be referred to the above-mentioned structure embodiment, which will not be described here.
[0053] Figure 3 is a flowchart of another preparation method of a HEMT provided by an embodiment of the present disclosure. Figures 4 to 8 is a preparation process schematic diagram of a HEMT provided by an embodiment of the present disclosure. As shown in Figures 3 to 8 the preparation method comprises the following steps. In step S201, a diamond buffer layer is formed on a diamond substrate.
[0054] As shown in Figure 4 , a high-quality single crystal diamond can be used and the single crystal diamond can be polished, for example, the single crystal diamond can be mechanically polished to a roughness of less than 0.5 nm, and then sequentially ultrasonic cleaned with acetone, ethanol and deionized water to obtain the diamond substrate 10.
[0055] For example, the diamond buffer layer 70 can be formed on the diamond substrate 10 by using microwave plasma chemical vapor deposition (MPCVD) technology, with CH4 and H2 as reaction gases, with a CH4 to H2 ratio of 1:50 to 1:99, and depositing undoped diamond at a temperature of 800°C to 1000°C and a pressure of 50 Torr to 100 Torr.
[0056] In step S202 , a P-type diamond layer is formed on the diamond buffer layer.
[0057] like Figure 5 As shown, the P-type diamond layer 20 can be obtained by MPCVD technology, using diborane or trimethylboron (TMB) as a boron doping source, depositing boron-doped diamond under the conditions of a CH4 to H2 ratio of 0.1% to 1% and a temperature of 900°C to 1000°C.
[0058] It should be noted that, when the diamond buffer layer 70 is not provided, the above steps S201 to S202 may be to form the P-type diamond layer 20 on the diamond substrate 10 .
[0059] In step S203 , a barrier layer is formed on the P-type diamond layer.
[0060] like Figure 6 As shown, a high work function oxide material, such as Al2O3, HfO2, h-BN, Al2N3 or MgO, can be grown on the P-type diamond layer 20 by molecular beam epitaxy (MBE) or atomic layer deposition (ALD) technology to obtain the barrier layer 30.
[0061] In step S204 , a source and a drain are formed on the P-type diamond layer.
[0062] like Figure 7 As shown, the source and drain regions can be precisely defined using ultraviolet lithography, and then etched using reactive ion etching (RIE) using gases such as O2, Ar, and CHF3. Metal materials are then deposited using electron beam evaporation or magnetron sputtering, followed by rapid thermal annealing (RTA) at 600°C to 800°C to form the source 40 and drain 50. This allows for precise etching, reduces contact resistance, and improves the conductivity of the source 40 and drain 50.
[0063] Exemplarily, after the sample surface obtained in step S203 is spin-coated with a photoresist, and after UV exposure and development, a clear source and drain structure pattern is formed by using a RIE device to etch under the condition of CHF3 and O2 as etching gas and 20 mTorr pressure, and then a metal stack of Ti layer, Al layer, Ni layer and Au layer is deposited in sequence, and after removing the photoresist, the source 40 and the drain 50 are obtained by RTA treatment under the condition of 750℃ for 2 min in a nitrogen protective atmosphere.
[0064] In step S205, the gate is formed on the barrier layer.
[0065] As shown in FIG. 1C, the metal stack of Ni layer and Au layer is deposited in sequence on the barrier layer 30 by photolithography and metal deposition technology to form a Schottky contact, and the gate 60 is obtained. Figure 8
[0066] Optionally, after the above steps S201 to S205 are completed, the preparation method can further include: In step S206, the passivation layer is formed on the barrier layer, the source, the drain and the gate.
[0067] As shown in FIG. 1D, the passivation layer 80 is formed by plasma enhanced chemical vapor deposition (PECVD) technology or ALD technology, and the passivation layer 80 is arranged on the side of the barrier layer 30, the source 40, the drain 50 and the gate 60 away from the P-type diamond layer 20, and the passivation layer 80 covers at least part of the sidewalls of the diamond substrate 10, the diamond buffer layer 70, the barrier layer 30, the source 40, the drain 50 and the gate 60. Figure 1
[0068] It should be noted that the structure, material and thickness of each film layer in the preparation method embodiment can refer to the related structure embodiment, and the detailed description is omitted here. Figure 1
[0069] The above only describes optional embodiments of the present disclosure, and is not intended to limit the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A high electron mobility transistor, characterized in that include: Diamond substrate; A P-type diamond layer is provided on the diamond substrate to form a two-dimensional hole gas channel; a barrier layer, disposed on the P-type diamond layer, for promoting the formation of the two-dimensional hole gas channel; A source electrode and a drain electrode are spaced apart and arranged on the P-type diamond layer and are respectively located on both sides of the region where the barrier layer is located; The gate is arranged on the barrier layer.
2. The high electron mobility transistor according to claim 1, wherein The doping concentration of the P-type diamond layer is 1×10 19 cm -3 to 1×10 21 cm -3 .
3. The high electron mobility transistor according to claim 1, wherein The thickness of the P-type diamond layer is 10 nm to 100 nm.
4. The high electron mobility transistor according to claim 1, wherein The material of the barrier layer includes one of Al2O3, HfO2, hexagonal boron nitride, Al2N3 and MgO.
5. The high electron mobility transistor according to claim 4, wherein: The barrier layer has a thickness of 10 nm to 30 nm.
6. The high electron mobility transistor according to any one of claims 1 to 5, characterized in that: The high electron mobility transistor further includes a diamond buffer layer, which is disposed between the diamond substrate and the P-type diamond layer.
7. The high electron mobility transistor according to claim 6, wherein: The thickness of the diamond buffer layer is 50 nm to 300 nm.
8. The high electron mobility transistor according to any one of claims 1 to 5 and claim 7, characterized in that The high electron mobility transistor further includes a passivation layer, which is disposed on a side of the barrier layer, the source electrode, the drain electrode, and the gate electrode away from the P-type diamond layer.
9. The high electron mobility transistor according to claim 8, wherein The material of the passivation layer includes one of SiN and Al2O3.
10. A method for preparing a high electron mobility transistor, characterized in that: include: forming a P-type diamond layer on a diamond substrate, wherein the P-type diamond layer is used to form a two-dimensional hole gas channel; forming a barrier layer on the P-type diamond layer, wherein the barrier layer is used to promote the formation of the two-dimensional hole gas channel; forming a source electrode and a drain electrode on the P-type diamond layer, wherein the source electrode and the drain electrode are spaced apart from each other on the P-type diamond layer and are respectively located on both sides of the region where the barrier layer is located; A gate is formed on the barrier layer.