Vibration device

Abstract

And a vibration device. A resonator device includes: a semiconductor substrate having a first surface and a second surface in front and back relation, and having a through-hole penetrating from the first surface to the second surface; a resonator element disposed on the semiconductor substrate; a cover body that is joined to the outer peripheral portion of the first surface of the semiconductor substrate, and that houses the resonator element between the first surface and the cover body; an oscillation circuit that is provided on the first surface and oscillates the resonator element; a terminal disposed on the second surface of the semiconductor substrate; and a through electrode provided in the through hole and electrically connecting the terminal and the oscillation circuit, the through electrode being disposed in the vicinity of the outer peripheral portion relative to the center of the first surface in a plan view of the semiconductor substrate.

Description

TECHNICAL FIELD

[0001] The present application relates to a vibration device. BACKGROUND

[0002] Patent Document 1 discloses a vibration device having a semiconductor substrate having a first surface and a second surface in a front-back relationship, a vibration piece disposed on the semiconductor substrate, an oscillation circuit provided on the first surface of the semiconductor substrate to oscillate the vibration piece, a terminal disposed on the second surface of the semiconductor substrate, a through electrode penetrating from the second surface to the first surface of the semiconductor substrate to electrically connect the terminal and the oscillation circuit, and a cover engaged with a peripheral portion of the semiconductor substrate in a manner to house the vibration piece.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2021-72464

[0004] Such a vibration device has a through electrode, and thus the semiconductor substrate provided with the through electrode can be reduced in strength. SUMMARY

[0005] A vibration device of one embodiment of the present application has a semiconductor substrate having a first surface and a second surface in a front-back relationship, a through hole penetrating from the first surface to the second surface, a vibration piece disposed on the semiconductor substrate, a cover body engaged with a peripheral portion of the first surface of the semiconductor substrate to house the vibration piece between the first surface of the semiconductor substrate, an oscillation circuit provided on the first surface of the semiconductor substrate to oscillate the vibration piece, a terminal disposed on the second surface of the semiconductor substrate, and a through electrode provided on the through hole of the semiconductor substrate to electrically connect the terminal and the oscillation circuit, the through electrode being disposed near the peripheral portion of the first surface as viewed from the semiconductor substrate.

[0006] The vibration device of one embodiment of the present application includes a semiconductor substrate including a first surface and a second surface in a front-back relationship, a first through-hole, a second through-hole, a third through-hole, and a fourth through-hole which pass through the semiconductor substrate from the first surface to the second surface, a vibrating piece provided over the semiconductor substrate, a cover which is joined to a peripheral portion of the first surface of the semiconductor substrate and in which the vibrating piece is housed, an oscillation circuit provided on the first surface of the semiconductor substrate and which oscillates the vibrating piece, a first terminal, a second terminal, a third terminal, and a fourth terminal provided on the second surface of the semiconductor substrate, a first through-electrode which is provided in the first through-hole of the semiconductor substrate and electrically connects the first terminal to the oscillation circuit, a second through-electrode which is provided in the second through-hole of the semiconductor substrate and electrically connects the second terminal to the oscillation circuit, a third through-electrode which is provided in the third through-hole of the semiconductor substrate and electrically connects the third terminal to the oscillation circuit, and a fourth through-electrode which is provided in the fourth through-hole of the semiconductor substrate and electrically connects the fourth terminal to the oscillation circuit, wherein the first through-electrode, the second through-electrode, the third through-electrode, and the fourth through-electrode are provided in the vicinity of the peripheral portion of the first surface when the semiconductor substrate is viewed from above. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 FIG. 1 is a perspective view of a vibration device of Embodiment 1.

[0008] Figure 2 FIG. 2 is a perspective view of the vibration device of Embodiment 1, which is viewed from the back surface. Figure 1

[0009] Figure 3A FIG. 4 is a cross-sectional view of the vibration device of Embodiment 1, which is along the A-A line of FIG. 3. Figure 1 Figure 4

[0010] Figure 3B FIG. 6 is an enlarged view of a region C of FIG. 5. Figure 3A

[0011] Figure 4 FIG. 8 is a top view of a semiconductor substrate and a vibrating element.

[0012] Figure 5

[0013] Figure 6 FIG. 11 is a cross-sectional view of the vibration device of Embodiment 1, which is along the B-B line of FIG. 10. Figure 1

[0014] Figure 7 FIG. 14 is a block diagram illustrating a structure example of a semiconductor circuit. ​​​​​​

[0015] Figure 8 is a flowchart showing a manufacturing process of a vibration device.

[0016] Figure 9 is a flowchart showing Figure 8 a through electrode forming process S4 of

[0017] Figure 10 is a cross-sectional view showing one embodiment in a manufacturing process.

[0018] Figure 11 is a cross-sectional view showing one embodiment in a manufacturing process.

[0019] Figure 12 is a cross-sectional view showing one embodiment in a manufacturing process.

[0020] Figure 13 is a cross-sectional view showing one embodiment in a manufacturing process.

[0021] Figure 14 is a cross-sectional view showing one embodiment in a manufacturing process.

[0022] Figure 15 is a cross-sectional view showing one embodiment in a manufacturing process.

[0023] Figure 16 is a cross-sectional view showing one embodiment in a manufacturing process.

[0024] Figure 17 is a cross-sectional view showing one embodiment in a manufacturing process.

[0025] Figure 18 is a cross-sectional view showing one embodiment in a manufacturing process.

[0026] Figure 19 is a cross-sectional view showing one embodiment in a manufacturing process.

[0027] Figure 20 is a cross-sectional view showing one embodiment in a manufacturing process.

[0028] Figure 21 is a cross-sectional view showing one embodiment in a manufacturing process.

[0029] Explanation of reference numerals

[0030] 1 vibrating device; 2 semiconductor device; 3 vibrating element; 31 vibrating substrate; 321, 322 excitation electrode; 323, 324 terminal; 325, 326 wiring; 4 cover; 40 joining member; 41 recess; 5 semiconductor substrate; 5p outer peripheral portion; 5pl, 5p2, 5p3, 5p4 corner portion; 5a upper surface; 5b lower surface; 51, 52, 53, 54 through electrode; 57 seed layer; 59 conductive protective film; 61, 62 insulating film; 7 semiconductor circuit; 70 oscillation circuit; 71 laminate; 72 wiring layer; 73 insulating layer; 74 passivation film; 75 terminal layer; 76 contact hole; 81, 82 resist mask; 100 mounting substrate; 510, 520, 530, 540 terminal; 571, 572 sputtered film; 591, 592, 593 electroless plated film; 700 element; 721, 722, 723, 724 electrode pad; 751, 752 internal terminal; Bl, B2 joining member; cl center; thl, th2, th3, th4 through hole. DETAILED DESCRIPTION

[0031] In the embodiments of the present application, in order to facilitate observation, the scale of the size is sometimes made different to represent the constituent elements shown in each drawing.

[0032] In the drawings, three axes of an X axis, a Y axis, and a Z axis orthogonal to each other are sometimes illustrated. In the following description, the tip side of the arrow of the 3 axes is sometimes referred to as the "positive side", and the base side of the arrow is sometimes referred to as the "negative side". A direction parallel to the X axis is sometimes referred to as the "X axis direction", a direction parallel to the Y axis is sometimes referred to as the "Y axis direction", and a direction parallel to the Z axis is sometimes referred to as the "Z axis direction". "Viewing in the Z axis direction" is sometimes referred to as "plan view".

[0033] In the following description, for example, for a substrate, "on the substrate" indicates any one of the case where the substrate is disposed in contact with another structure, the case where the substrate is disposed with another structure therebetween, or the case where a part of the substrate is disposed in contact with another structure and a part of the substrate is disposed with another structure therebetween.

[0034] Regarding the upper surface of a certain structure, the face on the positive side of the Z axis direction of the structure, for example, "the upper surface of the substrate" indicates the face on the positive side of the Z axis direction of the movable body.

[0035] Regarding the lower surface of a certain structure, the face on the negative side of the Z axis direction of the structure, for example, "the lower surface of the substrate" indicates the face on the negative side of the Z axis direction of the movable body.

[0036] Regarding the front surface and the back surface of a certain structure, both indicate the face present on the outside of the structure, the front surface indicates the face on the positive side of the Z axis direction of the structure, and the back surface indicates the face on the negative side of the Z axis direction of the structure.

[0037] 1. Embodiment 1

[0038] 1.1. Outline structure of vibration device

[0039] Figures 1 to 7 An outline structure of a vibration device 1 of the present embodiment is shown.

[0040] Figure 1 is a perspective view of the vibration device 1 of Embodiment 1. Figure 2 is a perspective view of the vibration device 1 as viewed from the back surface. Figure 3A is a sectional view of the vibration device 1 along the A-A line of Figure 1 and Figure 4 . Figure 3B is an enlarged view of the region C of Figure 3A . Figure 4 is a plan view of the semiconductor substrate 5. Figure 5 is a plan view of the semiconductor substrate 5 and the vibration element 3. Figure 6 is a sectional view of the vibration device 1 along the B-B line of Figure 1 and Figure 5 . Figure 7 is a block diagram showing a structure example of the semiconductor circuit 7.

[0041] Figure 1 The vibration device 1 shown in is an oscillator, more specifically, a quartz oscillator in which a vibration element 3 composed of quartz and an oscillation circuit 70 are single-encapsulated. The vibration device 1 is mounted, for example, to a mounting substrate 100, and outputs a reference signal to the mounting substrate 100. In the present embodiment, the vibration element 3 is an example of a vibration piece.

[0042] The vibration device 1 has a semiconductor device 2, a vibration element 3, and a cover 4.

[0043] As shown in Figure 3A , the semiconductor device 2 includes a semiconductor substrate 5 and a semiconductor circuit 7. The semiconductor circuit 7 is provided to an upper surface 5a of the semiconductor substrate 5.

[0044] The vibration element 3 is disposed to an upper surface of the semiconductor circuit 7, which is provided on the semiconductor substrate 5. Thus, in the present embodiment, a face-up method in which the vibration element 3 is mounted to the semiconductor circuit 7 of the semiconductor substrate 5 side is adopted.

[0045] The cover 4 has a recess 41, engages with an outer peripheral portion 5p of the upper surface of the semiconductor device 2, and forms an encapsulation P. The vibration element 3 is housed in a housing space S inside the encapsulation P. The housing space S is airtight, becomes a reduced-pressure state, and preferably becomes a state closer to a vacuum. Thereby, viscosity resistance is reduced, and oscillation characteristics of the vibration element 3 are improved. However, the environment of the housing space S is not particularly limited.

[0046] like Figure 2 As shown, terminals 510, 520, 530, and 540 are provided on the back of the vibration device 1. The terminals 510, 520, 530, and 540 are connected to the components including the Figure 1 The semiconductor circuit 7 of the oscillation circuit 70 shown is electrically connected.

[0047] In this embodiment, terminal 510 is an example of a first terminal, terminal 520 is an example of a second terminal, terminal 530 is an example of a third terminal, and terminal 540 is an example of a fourth terminal. Through-electrode 51 is an example of a first through-electrode, through-electrode 52 is an example of a second through-electrode, through-electrode 53 is an example of a third through-electrode, and through-electrode 54 is an example of a fourth through-electrode.

[0048] Figure 7 1 is a block diagram showing a configuration example of the semiconductor circuit 7. The semiconductor circuit 7 includes an oscillation circuit 70, a control circuit 130, a storage unit 140, a temperature compensation circuit 150, a temperature sensor 160, a reference voltage generation circuit 170, and a clock signal output circuit 180.

[0049] The oscillation circuit 70 generates an oscillation signal using the vibration element 3. Specifically, the oscillation circuit 70 is connected to the vibration element 3 via terminals 323 and 324. The oscillation circuit 70 generates an oscillation signal by oscillating the vibration element 3. For example, in a TCXO (Temperature Compensated Crystal Oscillator) or an Oven Controlled Crystal Oscillator (OCXO), a control voltage VCOMP corresponding to the detected temperature is input to the oscillation circuit 70. The oscillation circuit 70 then causes the vibration element 3 to oscillate at an oscillation frequency corresponding to the control voltage VCOMP. The control voltage VCOMP is a temperature compensation voltage that compensates for the temperature characteristics of the oscillation frequency.

[0050] The clock signal output circuit 180 outputs a clock signal to the terminal CLKO according to the output signal OSQ of the oscillation circuit 70. The terminal CLKO is Figure 2 For example, it corresponds to the terminal 510. The clock signal output circuit 180 buffers the output signal OSQ or a signal obtained by frequency-dividing the output signal OSQ, and outputs the buffered signal as a clock signal.

[0051] The control circuit 130 controls each unit of the semiconductor circuit 7. The control circuit 130 also performs interface processing with a CPU or the like outside the semiconductor circuit 7. The control circuit 130 is implemented by a logic circuit such as a gate array, for example.

[0052] The storage section 140 stores various information required for the operation of the semiconductor circuit 7. For example, the storage section 140 stores a coefficient of a polynomial for temperature compensation, and the like, which is required for the temperature compensation circuit 150 to perform a temperature compensation process. The storage section 140 is, for example, a nonvolatile memory.

[0053] The temperature compensation circuit 150 outputs a control voltage VCOMP in accordance with a temperature detection signal VT from the temperature sensor 160 and a control voltage of an oscillation frequency input from the outside via a terminal VCNT. The terminal VCNT corresponds to, for example, the terminal 520 in the Figure 2

[0054] The temperature sensor 160 is a sensor that detects the temperature of the semiconductor circuit 7. For example, the temperature sensor 160 can be configured by a diode or the like. The temperature sensor 160 configured by the diode performs temperature detection using the temperature dependence of the forward voltage of the diode and outputs a temperature detection signal VT.

[0055] The reference voltage generation circuit 170 is a circuit that generates a power supply, a reference voltage, a bias voltage, a bias current, and the like, which are supplied to each section of the semiconductor circuit 7. The reference voltage generation circuit 170 is input with a high-potential side power supply via a terminal VDD connected to the high-potential side power supply and is input with a low-potential side power supply (ground) via a terminal VSS connected to the low-potential side power supply. In the Figure 2

[0056] 1.2. Structure of the semiconductor device 2

[0057] As described above, the semiconductor device 2 has the semiconductor substrate 5 and the semiconductor circuit 7.

[0058] 1.2.1. Structure of the semiconductor substrate 5

[0059] The semiconductor substrate 5 is a silicon substrate. The semiconductor substrate 5 can also use, for example, a substrate configured by a semiconductor material other than silicon, such as Ge, GaP, GaAs, InP, or the like. The semiconductor substrate 5 has an upper surface 5a as a first surface and a lower surface 5b as a second surface in a front-back relationship.

[0060] As shown in FIG. 1, the semiconductor substrate 5 has a through-hole th1, a through-hole th2, a through-hole th3, and a through-hole th4 that penetrate from the upper surface 5a to the lower surface 5b. Figure 3A Figure 4 Figure 5 Figure 6 As shown in FIG. 1, the semiconductor substrate 5 has a through-hole th1, a through-hole th2, a through-hole th3, and a through-hole th4 that penetrate from the upper surface 5a to the lower surface 5b. ​​​​​

[0061] The through electrodes 51, 52, 53, 54 are provided in the through holes th1, th2, th3, th4, respectively. The through electrodes 51, 52, 53, 54 are through silicon vias (TSVs), respectively. In addition, although not shown, the cross section of the through electrode 54 and the through hole th4 is configured similarly to the through electrodes 51, 52, 53 and the through holes th1, th2, th3.

[0062] As shown in FIG. 6, the through electrodes 51, 52, 53, 54 are disposed near the corners of the outer peripheral portion 5p of the semiconductor substrate 5, respectively. More specifically, as shown in FIG. 6 and FIG. 7, the through electrode 51 is disposed near the corner portion 5pl of the outer peripheral portion 5p compared to the center cl of the upper surface 5a of the semiconductor substrate 5 in plan view. The through electrode 52 is disposed near the corner portion 5p2 of the outer peripheral portion 5p compared to the center cl of the upper surface 5a of the semiconductor substrate 5 in plan view. The through electrode 53 is disposed near the corner portion 5p3 of the outer peripheral portion 5p compared to the center cl of the upper surface 5a of the semiconductor substrate 5 in plan view. The through electrode 54 is disposed near the corner portion 5p4 of the outer peripheral portion 5p compared to the center cl of the upper surface 5a of the semiconductor substrate 5 in plan view. In the present embodiment, the corner portion 5pl is an example of the first corner portion, the corner portion 5p2 is an example of the second corner portion, the corner portion 5p3 is an example of the third corner portion, and the corner portion 5p4 is an example of the fourth corner portion. Figure 1 Figure 4 Figure 5

[0063] As described above, in the present embodiment, the semiconductor circuit 7 including the oscillation circuit 70 is provided on the side of the semiconductor substrate 5 opposite the vibration element 3. Therefore, in order for the semiconductor circuit 7 to function, the vibration device 1 needs to be provided with at least four through electrodes 51, 52, 53, 54. In other words, in the present embodiment, at least four through holes th1, th2, th3, th4 need to be provided in the semiconductor substrate 5.

[0064] However, if the through electrodes 51, 52, 53, 54 are provided in the semiconductor substrate 5, the strength of the semiconductor substrate 5 can decrease. In the present embodiment, in order to suppress a decrease in the strength of the semiconductor substrate 5, the positions at which the through electrodes 51, 52, 53, 54 are provided are made to be close to the outer peripheral portion 5p. In other words, in the present embodiment, the positions at which the through holes th1, th2, th3, th4 are provided are made to be close to the outer peripheral portion 5p. Since the outer peripheral portion 5p is joined to the cover 4, the semiconductor substrate 5 can be reinforced by the cover 4.

[0065] ​​​Further, the through electrodes 51, 52, 53, 54 are more preferably each provided in the vicinity of the four corners 5pl, 5p2, 5p3, 5p4 of the outer peripheral portion 5p in terms of strength. This is because the lid 4 and the outer peripheral portion 5p are each rectangular, and thus the lid 4 has a higher reinforcing effect on the corners 5pl, 5p2, 5p3, 5p4 where the two sides of the outer peripheral portion 5p intersect than on the portions of the sides between the corners.

[0066] As shown in FIG. 1, the through electrodes 51, 52, 53, 54 are provided in the through holes thl, th2, th3, th4 of the semiconductor substrate 5. The through electrodes 51, 52, 53, 54 are each formed of a plated copper (Cu) electrode. The through electrodes 51, 52, 53, 54 are formed by the same process, and thus are integrated. In the present embodiment, the portions that overlap the through holes thl, th2, th3, th4 in plan view are defined as the through electrodes 51, 52, 53, 54, respectively. Figure 3A As shown in FIG. 1, the through electrodes 51, 52, 53, 54 are provided in the through holes thl, th2, th3, th4 of the semiconductor substrate 5. The through electrodes 51, 52, 53, 54 are each formed of a plated copper (Cu) electrode. The through electrodes 51, 52, 53, 54 are formed by the same process, and thus are integrated. In the present embodiment, the portions that overlap the through holes thl, th2, th3, th4 in plan view are defined as the through electrodes 51, 52, 53, 54, respectively. Figure 6 As shown in FIG. 1, the through electrodes 51, 52, 53, 54 are provided in the through holes thl, th2, th3, th4 of the semiconductor substrate 5. The through electrodes 51, 52, 53, 54 are each formed of a plated copper (Cu) electrode. The through electrodes 51, 52, 53, 54 are formed by the same process, and thus are integrated. In the present embodiment, the portions that overlap the through holes thl, th2, th3, th4 in plan view are defined as the through electrodes 51, 52, 53, 54, respectively.

[0067] The through electrodes 51 and the terminal 510 are plated copper (Cu) electrodes formed by an electroplating method. The through electrodes 51 and the terminal 510 are formed by the same process, and thus are integrated. In the present embodiment, the portions that overlap the through holes thl, th2, th3, th4 in plan view are defined as the through electrodes 51, 52, 53, 54, respectively.

[0068] A seed layer 57 is provided between the through electrode 51 and the terminal 510 and the insulating film 62. Alternatively, the through electrode 51 and the terminal 510 can be formed by copper paste printing. The through electrode 52 and the terminal 520, the through electrode 53 and the terminal 530, and the through electrode 54 and the terminal 540 are also configured in the same manner as the through electrode 51 and the terminal 510.

[0069] A conductive protective film 59 is provided so as to cover the through electrode 51 and the terminal 510. The conductive protective film 59 is provided to suppress outgassing from the through electrode 51 and the terminal 510. The through electrode 51 and the terminal 510, which are composed of plated copper electrodes, contain moisture and hydrogen, and thus the moisture and hydrogen can be emitted as outgassing. This outgassing can cause a poor contact or the like at the electrical connection surface with the mounting substrate 100. The through electrode 52 and the terminal 520, the through electrode 53 and the terminal 530, and the through electrode 54 and the terminal 540 are also covered with the conductive protective film 59 in the same manner as the through electrode 51 and the terminal 510.

[0070] Figure 3B is Figure 3A an enlarged sectional view of the region C in FIG. 1, showing the structure of the seed layer 57 and the conductive protective film 59.

[0071] The seed layer 57 has a two-layer stacked structure consisting of a sputtered film 571 of a titanium / tungsten alloy (TiW) and a sputtered film 572 of copper. Instead of the titanium / tungsten alloy of the seed layer 57, chromium (Cr) or titanium (Ti) may be used.

[0072] The conductive protective film 59 has a three-layer stacked structure including an electroless plated film 591 of nickel (Ni), an electroless plated film 592 of palladium (Pd), and an electroless plated film 593 of gold (Au).

[0073] 1.2.2. Structure of Semiconductor Circuit 7

[0074] like Figure 3A As shown, the semiconductor circuit 7 includes a plurality of elements 700 formed on the upper surface 5 a of the semiconductor substrate 5 and a stacked body 71 stacked on the upper surface 5 a of the semiconductor substrate 5 .

[0075] The laminate 71 includes a wiring layer 72 formed on the upper surface 5a of the semiconductor substrate 5, an insulating layer 73 formed on the upper surface of the wiring layer 72, a passivation film 74 formed on the upper surface of the insulating layer 73, and a terminal layer 75 formed on the upper surface of the passivation film 74. The wiring layer 72 is not limited to a single layer. A plurality of wiring layers 72 may be provided with a plurality of insulating layers 73 interposed therebetween.

[0076] The plurality of elements 700, the wiring layer 72, and the terminal layer 75 are electrically connected via contact holes 76 or connection members (not shown), thereby forming an oscillation circuit 70. The elements 700 are, for example, transistors, resistors, capacitors, and the like.

[0077] Thus, by forming the semiconductor circuit 7 on the semiconductor substrate 5, the space of the semiconductor substrate 5 can be effectively utilized. In addition, the semiconductor circuit 7 can be formed integrally with the vibration device 1, thereby achieving miniaturization of the entire device.

[0078] like Figure 3A and Figure 6 As shown, the wiring layer 72 has electrode pads 721, 722, and 723. Electrode pad 721 overlaps with through-hole th1 and through-electrode 51, and is electrically connected to through-electrode 51. Electrode pad 722 overlaps with through-hole th2 and through-electrode 52, and is electrically connected to through-electrode 52. Electrode pad 723 overlaps with through-hole th3 and through-electrode 53, and is electrically connected to through-electrode 53. Although not shown, the wiring layer 72 has an electrode pad 724 that overlaps with through-hole th4 and through-electrode 54, and is electrically connected to through-electrode 54.

[0079] The terminal layer 75 includes an internal terminal 751 and an internal terminal 752 that also serve as wiring. The internal terminal 751 electrically connects the wiring layer 72 to the bonding member B1, and the internal terminal 752 electrically connects the wiring layer 72 to the bonding member B2.

[0080] 1.3. Configuration of the lid 4

[0081] The lid 4 is also a silicon substrate like the semiconductor substrate 5. Thus, the semiconductor substrate 5 and the lid 4 have the same linear expansion coefficient, and generation of thermal stress caused by thermal expansion is suppressed, resulting in a vibrator 1 having excellent vibration characteristics. Further, the vibrator 1 can be formed by a semiconductor process, and thus, the vibrator 1 can be manufactured with high precision, and can be miniaturized. However, the lid 4 is not particularly limited, and for example, a substrate composed of a semiconductor material other than silicon, such as Ge, GaP, GaAs, InP, or the like, can also be used.

[0082] 1.4. Configuration of the vibration element 3

[0083] As shown in Figs. 1 and 2, the vibration element 3 has a vibration substrate 31 and drive electrodes 321 and 322. Figure 3A Figure 5 Figure 6 The vibration element 3 has a vibration substrate 31 and drive electrodes 321 and 322.

[0084] The vibration substrate 31 has a thickness shear vibration mode, and in the present embodiment, is formed of an AT-cut quartz substrate. The AT-cut quartz substrate has a cubic frequency temperature characteristic, and thus, the vibration element 3 has excellent temperature characteristics.

[0085] The drive electrode 321 is disposed on the upper surface of the vibration substrate 31, and is electrically connected to the terminal 323 via a wiring 325.

[0086] The drive electrode 322 is disposed on the lower surface of the vibration substrate 31, and is electrically connected to the terminal 324 via a wiring 326.

[0087] ​​Further, the structure of the vibration element 3 is not limited to the above-described structure. For example, the vibration element 3 can be a mesa type in which a vibration region protrudes from the periphery thereof with the excited electrodes 321, 322 sandwiching the vibration region, or, conversely, a reverse mesa type in which the vibration region is recessed from the periphery thereof. Further, chamfer processing of grinding the periphery of the vibration substrate 31, convex processing of making the upper surface and the lower surface convex curved surfaces can be performed. Furthermore, the vibration element 3 is not limited to vibrating in a thickness shear vibration mode, and, for example, can be a vibration element in which a plurality of vibration arms bend in the in-plane direction. That is, the vibration substrate 31 is not limited to being formed of an AT-cut quartz substrate, and can be formed of a quartz substrate other than the AT-cut quartz substrate, such as an X-cut quartz substrate, a Y-cut quartz substrate, a Z-cut quartz substrate, a BT-cut quartz substrate, an SC-cut quartz substrate, an ST-cut quartz substrate, or the like. Furthermore, in the present embodiment, the vibration substrate 31 is composed of quartz, but is not limited thereto, and, for example, can be composed of a piezoelectric single crystal such as lithium niobate, lithium tantalate, lithium tetraborate, lanthanum gallium silicate, potassium niobate, gallium phosphate, or the like, or a piezoelectric single crystal other than these. Furthermore, the vibration element 3 is not limited to being a piezoelectric drive type vibration element, and can be an electrostatic drive type vibration element using electrostatic force.

[0088] As shown in Figure 3A and Figure 6 , the vibration element 3 is joined to the internal terminals 751, 752 by the conductive joining members B1, B2. Thereby, the vibration element 3 is electrically connected to the semiconductor circuit 7 via the joining members B1, B2. In the present embodiment, the joining members B1, B2 are bumps formed by a non-electrolytic plating layer process.

[0089] 1.5. Manufacturing method of vibration device

[0090] Figures 8 to 21 is a view that explains a manufacturing method of the vibration device 1 of the present embodiment.

[0091] Figure 8 is a flowchart that explains a manufacturing process of the vibration device 1. Figure 9 is a flowchart that shows details of the through electrode formation process S4 of Figure 8 . Figures 10 to 21 is a cross-sectional view that shows one mode in the manufacturing process, and each cross-sectional view shows a cross section at a position corresponding to the A-A line of Figure 1 and Figure 4 .

[0092] As shown in Figure 8 , the manufacturing method of the vibration device 1 includes a semiconductor substrate preparation process S1, a vibration piece mounting process S2, a sealing process S3, a through electrode formation process S4, and a conductive protective film formation process S5.

[0093] In the semiconductor substrate preparation process S1, as shown inFigure 10 As shown, the semiconductor substrate 5 is prepared, and the semiconductor circuit 7 is formed on the upper surface 5a side. Thus, a base material of the semiconductor device 2 is obtained.

[0094] In the vibration piece mounting step S2, as shown in Figure 11 the vibration element 3 is joined to the internal terminals 751, 752 via the joining members B1, B2.

[0095] In the sealing step S3, as shown in Figure 12 the lid 4 is joined to the outer peripheral portion 5p of the upper surface 5a of the semiconductor substrate 5 via the joining member 40 in a reduced pressure state, and the vibration element 3 is vacuum-sealed in the accommodation space S.

[0096] As shown in Figure 9 the through-electrode forming step S4 includes a thinning step S41, a resist mask forming step S42, a through-hole forming step S43, a pad exposing step S44, an insulating film forming step S45, a pad exposing step S46, a seed layer forming step S47, a through-electrode forming step S48, and a removal step S49.

[0097] In the thinning step S41, as shown in Figure 13 the semiconductor substrate 5 is ground and polished from the lower surface 5b side to be thinned to a prescribed thickness.

[0098] In the resist mask forming step S42, as shown in Figure 14 a resist is applied to the lower surface 5b of the semiconductor substrate 5, and the resist is patterned to form a resist mask 81 having openings at positions corresponding to the through-holes th1, th2, th3, th4.

[0099] In the through-hole forming step S43, as shown in Figure 15 the semiconductor substrate 5 is dry-etched to form the through-holes th1, th2, th3, th4 of the insulating film 61 to positions corresponding to the electrode pads 721, 722, 723, 724 in the semiconductor substrate 5. Thereafter, in this step, the resist mask 81 is removed.

[0100] In the pad exposing step S44, as shown in Figure 16 the insulating film 61 of the bottoms of the through-holes th1, th2, th3, th4 is removed, and the electrode pads 721, 722, 723, 724 are exposed at the bottoms of the through-holes th1, th2, th3, th4.

[0101] In the insulating film forming step S45, as shown in Figure 17 the insulating film 62 is formed on the lower surface 5b of the semiconductor substrate 5 and the inner surfaces of the through-holes th1, th2, th3, th4.

[0102] In the pad exposure process S46, as shown in Figure 18 the insulating film 62 of the bottom of the through holes th1, th2, th3, th4 is removed, and the electrode pads 721, 722, 723, 724 are exposed at the bottom of the through holes th1, th2, th3, th4. Further, in a case where the insulating film 62 of the inner peripheral surface of the through holes th1, th2, th3, th4 is removed together when the insulating film 62 of the bottom of the through holes th1, th2, th3, th4 is removed, the organic insulating film can be provided on the inner peripheral surface of the through holes th1, th2, th3, th4.

[0103] In the seed layer film formation process S47, as shown in Figure 19 a seed layer 57 is formed by sputtering in a manner to cover the lower surface 5b of the semiconductor substrate 5 and the insulating film 62 of the inner surface of the through holes th1, th2, th3, th4. As shown in Figure 3B the seed layer 57 is a laminated film composed of a sputtered film 571 of titanium / tungsten alloy in a deep layer and a sputtered film 572 of copper in a surface layer. Instead of the titanium / tungsten alloy of the seed layer 57, chromium or titanium can be used.

[0104] In the through electrode formation process S48, as shown in Figure 20 a resist mask 82 is formed, which has openings at positions corresponding to the through holes th1, th2, th3, th4 and the terminals 510, 520, 530, 540. Thereafter, in this process, by electroplating, copper plating is formed in the openings, and the through electrodes 51, 52, 53, 54 and the terminals 510, 520, 530, 540 are formed.

[0105] In the removal process S49, as shown in Figure 21 after the resist mask 82 is removed, by etching, the seed layer 57 exposed from the through electrodes 51, 52, 53, 54 and the terminals 510, 520, 530, 540 is removed with the copper plating as a mask.

[0106] In the conductive protective film formation step S5, as shown in Figure 3A and Figure 6 a conductive protective film 59 covering the through electrodes 51, 52, 53, and 54 and the terminals 510, 520, 530, and 540 is formed by electroless plating. The conductive protective film 59 is a laminated film composed of an electroless plated film 591 of nickel in a deep layer, an electroless plated film 592 of palladium in an intermediate layer, and an electroless plated film 593 of gold in a surface layer.

[0107] As described above, the vibration device 1 of the present embodiment has the semiconductor substrate 5 having the upper surface 5a as the first surface and the lower surface 5b as the second surface in a front-back relationship, having the through-hole th1 that penetrates from the upper surface 5a to the lower surface 5b, the vibration element 3 as a vibrating reed that is disposed in the semiconductor substrate 5, the cover 4 that is joined to the outer peripheral portion 5p of the upper surface 5a of the semiconductor substrate 5, and that houses the vibration element 3 between the upper surface 5a of the semiconductor substrate 5, the oscillation circuit 70 that is provided on the upper surface 5a of the semiconductor substrate 5, and that oscillates the vibration element 3, the terminal 510 that is disposed on the lower surface 5b of the semiconductor substrate 5, and the through-electrode 51 that is provided in the through-hole th1 of the semiconductor substrate 5, and that electrically connects the terminal 510 and the oscillation circuit 70, and that is disposed in the vicinity of the outer peripheral portion 5p compared to the center cl of the upper surface 5a when the semiconductor substrate 5 is viewed from above.

[0108] Thus, in the present embodiment, the through-electrode 51 provided in the semiconductor substrate 5 is disposed in the vicinity of the outer peripheral portion 5p compared to the center cl of the upper surface 5a. Also, the outer peripheral portion 5p is joined to the cover 4, and thus, in the vibration device 1, the strength of the outer peripheral portion 5p is higher than that of the center cl. Thus, the vibration device 1 of the present embodiment can suppress a decrease in the strength of the semiconductor substrate 5 even when the through-electrode 51 is provided in the semiconductor substrate 5.

[0109] In the vibration device 1 of the present embodiment, the outer peripheral portion 5p of the upper surface 5a as the first surface has the corner portion 5pl, and the through-electrode 51 is disposed in the vicinity of the corner portion 5pl.

[0110] Thus, in the present embodiment, the through-electrode 51 is disposed in the vicinity of the corner portion 5pl. The cover 4 and the outer peripheral portion 5p are each rectangular, and thus, the position of the corner portion 5pl at which the two sides of the outer peripheral portion 5p intersect has a higher strength than the portion of the side of the outer peripheral portion 5p. Thus, the vibration device 1 of the present embodiment can suppress a decrease in the strength of the semiconductor substrate 5 even when the through-electrode 51 is provided in the semiconductor substrate 5.

[0111] In the vibration device 1 of the present embodiment, the terminal 510 and the through-electrode 51 are covered with the conductive protective film 59.

[0112] Thus, in the present embodiment, the terminal 510 and the through-electrode 51 are covered with the conductive protective film 59. Thus, when the vibration device 1 is mounted to the mounting substrate 100, it is possible to suppress a defective condition such as a contact failure at the electrical connection surface with the mounting substrate 100.

[0113] In the vibration device 1 of the present embodiment, the conductive protective film 59 is composed of a laminated film of nickel, palladium, and gold.

[0114] Thus, in the present embodiment, the terminal 510 and the through electrode 51 are covered with the conductive protective film 59 composed of a laminated film of nickel, palladium, and gold. Therefore, when the vibration device 1 is mounted to the mounting substrate 100, it is possible to suppress occurrence of a poor contact or the like at the electrical connection surface with the mounting substrate 100.

[0115] In the vibration device 1 of the present embodiment, there are provided the insulating film 62 disposed between the through hole thl and the through electrode 51, and the seed layer 57 disposed between the insulating film 62 and the through electrode 51, the through electrode 51 being composed of copper.

[0116] Thus, in the present embodiment, there are the insulating film 62, the seed layer 57, and the through electrode 51 composed of copper at the inner peripheral surface of the through hole thl. Therefore, it is possible to form the through electrode 51 having excellent electrical connectivity and conductivity.

[0117] The vibration device 1 of the present embodiment has: a semiconductor substrate 5 having an upper surface 5a as a first surface and a lower surface 5b as a second surface in a front-back relationship, having a through hole thl as a first through hole, a through hole th2 as a second through hole, a through hole th3 as a third through hole, and a through hole th4 as a fourth through hole, which pass through from the upper surface 5a to the lower surface 5b; a vibration element 3 as a vibrating piece, which is disposed on the semiconductor substrate 5; a cover 4, which is joined to the outer peripheral portion 5p of the upper surface 5a of the semiconductor substrate 5, and accommodates the vibration element 3 between the upper surface 5a of the semiconductor substrate 5; an oscillation circuit 70, which is provided on the upper surface 5a of the semiconductor substrate 5, and oscillates the vibration element 3; a terminal 510 as a first terminal, a terminal 520 as a second terminal, a terminal 530 as a third terminal, and a terminal 540 as a fourth terminal, which are disposed on the lower surface 5b of the semiconductor substrate 5; a through electrode 51 as a first through electrode, which is provided in the through hole thl of the semiconductor substrate 5, and electrically connects the terminal 510 and the oscillation circuit 70; a through electrode 52 as a second through electrode, which is provided in the through hole th2 of the semiconductor substrate 5, and electrically connects the terminal 520 and the oscillation circuit 70; a through electrode 53 as a third through electrode, which is provided in the through hole th3 of the semiconductor substrate 5, and electrically connects the terminal 530 and the oscillation circuit 70; and a through electrode 54 as a fourth through electrode, which is provided in the through hole th4 of the semiconductor substrate 5, and electrically connects the terminal 540 and the oscillation circuit 70, the through electrode 51, the through electrode 52, the through electrode 53, and the through electrode 54 being disposed near the outer peripheral portion 5p compared to the center cl of the upper surface 5a when the semiconductor substrate 5 is viewed in plan.

[0118] Thus, in the present embodiment, the through electrodes 51, 52, 53, 54 provided to the semiconductor substrate 5 are each disposed in the vicinity of the outer peripheral portion 5p from the center cl of the upper surface 5a. Also, the outer peripheral portion 5p is joined to the cover 4, and thus, in the vibration device 1, the strength of the outer peripheral portion 5p is higher than that of the center cl. Thus, the vibration device 1 of the present embodiment can suppress a decrease in the strength of the semiconductor substrate 5 even when the through electrodes 51, 52, 53, 54 are provided to the semiconductor substrate 5.

[0119] In the vibration device 1 of the present embodiment, the outer peripheral portion 5p of the upper surface 5a has a corner portion 5pl as a first corner portion, a corner portion 5p2 as a second corner portion, a corner portion 5p3 as a third corner portion, and a corner portion 5p4 as a fourth corner portion, the through electrode 51 is disposed in the vicinity of the corner portion 5pl, the through electrode 52 is disposed in the vicinity of the corner portion 5p2, the through electrode 53 is disposed in the vicinity of the corner portion 5p3, and the through electrode 54 is disposed in the vicinity of the corner portion 5p4.

[0120] Thus, in the present embodiment, the through electrodes 51, 52, 53, 54 are each disposed in the vicinity of the corner portions 5pl, 5p2, 5p3, 5p4. The cover 4 and the outer peripheral portion 5p are each rectangular, and thus, the strength of the positions of the corner portions 5pl, 5p2, 5p3, 5p4 at which the two sides of the outer peripheral portion 5p intersect is higher than that of the portions of the sides between the respective corner portions of the outer peripheral portion 5p. Thus, the vibration device 1 of the present embodiment can suppress a decrease in the strength of the semiconductor substrate 5 even when the through electrodes 51, 52, 53, 54 are provided to the semiconductor substrate 5.

[0121] The preferred embodiments have been described above, but the present application is not limited to the above-described embodiments. The structures of the respective portions of the present application can be replaced with any structures that exhibit the same functions as those of the above-described embodiments.

Claims

1. A vibration device, comprising: a semiconductor substrate having a first surface and a second surface in a front-rear relationship, and having a through-hole passing through from the first surface to the second surface; a vibrating piece disposed on the semiconductor substrate; a cover joined to a peripheral portion of the first surface of the semiconductor substrate, and housing the vibrating piece between the first surface of the semiconductor substrate; an oscillation circuit provided on the first surface of the semiconductor substrate, and oscillating the vibrating piece; a terminal disposed on the second surface of the semiconductor substrate; and a through-electrode provided on the through-hole of the semiconductor substrate, and electrically connecting the terminal and the oscillation circuit, wherein the through-electrode is disposed in the vicinity of the peripheral portion of the first surface, as viewed from the semiconductor substrate.

2. The vibration device according to claim 1, wherein the peripheral portion of the first surface has a corner portion, and the through-electrode is disposed in the vicinity of the corner portion.

3. The vibration device according to claim 1, wherein the terminal and the through-electrode are covered with a conductive protective film.

4. The vibration device according to claim 3, wherein the conductive protective film is composed of a laminated film of nickel, palladium, and gold.

5. The vibration device according to claim 3, comprising: an insulating film provided between the through-hole and the through-electrode; and a seed layer provided between the insulating film and the through-electrode, wherein the through-electrode is composed of copper.

6. A vibration device, comprising: a semiconductor substrate having a first surface and a second surface in a front-rear relationship, and having a first through-hole, a second through-hole, a third through-hole, and a fourth through-hole passing through from the first surface to the second surface; a vibrating piece disposed on the semiconductor substrate; a cover joined to a peripheral portion of the first surface of the semiconductor substrate, and housing the vibrating piece between the first surface of the semiconductor substrate; an oscillation circuit provided on the first surface of the semiconductor substrate, and oscillating the vibrating piece; a first terminal, a second terminal, a third terminal, and a fourth terminal disposed on the second surface of the semiconductor substrate; a first through-electrode provided on the first through-hole of the semiconductor substrate, and electrically connecting the first terminal and the oscillation circuit; a second through-electrode provided on the second through-hole of the semiconductor substrate, and electrically connecting the second terminal and the oscillation circuit; a third through-electrode provided on the third through-hole of the semiconductor substrate, and electrically connecting the third terminal and the oscillation circuit; and a fourth through-electrode provided on the fourth through-hole of the semiconductor substrate, and electrically connecting the fourth terminal and the oscillation circuit, wherein the first through-electrode, the second through-electrode, the third through-electrode, and the fourth through-electrode are disposed in the vicinity of the peripheral portion of the first surface, as viewed from the semiconductor substrate.

7. The vibration device according to claim 6, wherein ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ The outer peripheral portion of the first surface has a first corner portion, a second corner portion, a third corner portion, and a fourth corner portion, The first through electrode is disposed in the vicinity of the first corner portion, the second through electrode is disposed in the vicinity of the second corner portion, the third through electrode is disposed in the vicinity of the third corner portion, and the fourth through electrode is disposed in the vicinity of the fourth corner portion.

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