Circuit board and manufacturing method thereof
By setting grooves on the connection pads of the circuit board and forming conductive columns, the problem of solder paste overflow and bridging during soldering is solved, and the miniaturization of the circuit board and the improvement of its mechanical strength are achieved.
Patent Information
- Application Number
- CN202410485423.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-19
- Publication Date
- 2025-10-24
AI Technical Summary
On high-density miniaturized circuit boards, solder paste can easily overflow from the pads during soldering, causing bridging and leading to short circuit risks. This can also cause fatigue failure in solder joints.
A groove is provided on the connection pad of the circuit board, and a conductive column is formed in the groove. The conductive column protrudes from the connection pad and is used for soldering with electronic components, reducing the risk of solder paste overflow and enhancing mechanical strength.
The spacing between adjacent connection pads is reduced, which reduces the risk of solder paste overflow and bridging during soldering, improves the flatness and mechanical strength of the circuit board, and reduces the risk of solder joint fatigue.
Smart Images
Figure CN120835456A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of circuit board, in particular to a circuit board and a manufacturing method thereof. BACKGROUND
[0002] With the rapid development of science and technology, high density and miniaturization has become a major trend of electronic products, and the spacing between the solder pads on the corresponding circuit board for mounting various electronic components is getting smaller and smaller. Currently, a hot-press welding process is usually used to stack and connect electronic components and circuit boards in the height direction. Hot-press welding is to print solder paste on the solder pads of the circuit board, melt the solder paste after the reflow oven and pre-weld it on the circuit board, then place the to-be-welded object on the circuit board with solder paste printed thereon, and then use the heat of the hot-press head to melt the solder and connect the two electronic components that need to be connected. In the case of small spacing between the solder pads, the solder paste is easy to overflow the solder pads and bridge, resulting in the risk of short circuit during hot-press welding. SUMMARY
[0003] Therefore, it is necessary to provide a circuit board and a manufacturing method thereof which can solve the above problems.
[0004] The first aspect of the present application provides a manufacturing method of a circuit board, comprising the following steps:
[0005] providing a circuit substrate, the circuit substrate comprising a base layer and a plurality of connection pads, the connection pads being partially embedded in the base layer and partially exposed outside the base layer;
[0006] forming a groove on the connection pad;
[0007] forming a conductive column in the groove, the conductive column protruding outside the connection pad.
[0008] The second aspect of the present application provides a circuit board, comprising a circuit substrate and a plurality of conductive columns. The circuit substrate comprises a base layer and a plurality of connection pads, the connection pads being partially embedded in the base layer and partially exposed outside the base layer, and the connection pads being provided with a groove. The conductive columns are partially accommodated in the groove and protrude outside the connection pads.
[0009] In the circuit board and the manufacturing method thereof provided by the embodiments of the present application, the connection pads are embedded in the base layer, which is conducive to improving the flatness of the surface of the circuit board. In addition, the groove is arranged on the connection pad, and the conductive column protruding from the connection pad is formed in the groove. By welding the conductive column with the electronic component, it is helpful to reduce the risk of solder paste overflow and bridge between adjacent connection pads during welding, which is conducive to reducing the spacing between adjacent connection pads and miniaturization. Furthermore, the conductive column is partially accommodated in the groove of the connection pad, which is conducive to enhancing the overall mechanical strength and reducing the risk of fatigue of the solder joint between the circuit board and the electronic component due to repeated thermal cycling.BRIEF DESCRIPTION OF DRAWINGS BRIEF DESCRIPTION OF DRAWINGS
[0010] Figure 1 A cross-sectional view of a stack structure according to an embodiment of the present application.
[0011] Figure 2 A cross-sectional view of the stack structure shown in Figure 1 after forming a via hole.
[0012] Figure 3 A cross-sectional view of the stack structure shown in Figure 2 after forming a receiving groove.
[0013] Figure 4 A cross-sectional view of the receiving groove shown in Figure 3 after forming a connection pad.
[0014] Figure 5 A cross-sectional view of the connection pad shown in Figure 4 after covering the connection pad with a protective layer.
[0015] Figure 6 A cross-sectional view of the protective layer and the connection pad shown in Figure 5 after forming a recess.
[0016] Figure 7 A cross-sectional view of the recess shown in Figure 6 after forming a conductive pillar.
[0017] Figure 8 A cross-sectional view of a circuit substrate according to another embodiment of the present application.
[0018] Figure 9 A cross-sectional view of a stack structure according to an embodiment of the present application.
[0019] Figure 10 A cross-sectional view of the first metal layer shown in Figure 9 after forming a first conductive line layer.
[0020] Figure 11 A cross-sectional view of the first conductive line layer shown in Figure 10 after pressing a first metal clad plate against the surface of the first conductive line layer.
[0021] Figure 12 A cross-sectional view of the second metal layer shown in Figure 11 after forming a second conductive line layer.
[0022] Figure 13 A cross-sectional view of the second conductive line layer shown in Figure 12 after pressing a second metal clad plate against the surface of the second conductive line layer.
[0023] Figure 14 To make a circuit on the third metal layer shown in Figure 13 The cross-sectional view of the third conductive circuit layer after forming the third conductive circuit layer.
[0024] Figure 15 To make a circuit on the third metal layer shown in Figure 14 The cross-sectional view of the third conductive circuit layer after forming the third conductive circuit layer.
[0025] Figure 16 The cross-sectional view of the circuit substrate provided in another embodiment of the present application.
[0026] Main element symbol explanation
[0027] Laminated structure 10
[0028] Base layer 11
[0029] Conductor layer 12
[0030] First surface 111
[0031] Through hole 120
[0032] Receiving groove 110
[0033] Connection pad 13
[0034] Protective layer 14
[0035] Groove 131
[0036] Bottom wall 1311
[0037] Side wall 1312
[0038] Opening 1313
[0039] Conductive column 30
[0040] Circuit board 100
[0041] Stacked structure 200
[0042] Release film 210
[0043] First stack 220
[0044] First metal layer 222
[0045] First conductive circuit layer 223
[0046] First metal-clad plate 230
[0047] First dielectric layer 231
[0048] Second metal layer 232
[0049] second conductive circuit layer 233
[0050] second metal-clad layer 240
[0051] second dielectric layer 241
[0052] third metal layer 242
[0053] third conductive circuit layer 243
[0054] cover film 250
[0055] The following detailed description will further describe the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0056] The technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.
[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application.
[0058] An embodiment of the present application provides a manufacturing method of a circuit board, which comprises the following steps.
[0059] Step S1, referring to Figure 1 , a laminated structure 10 is provided, which comprises a base layer 11 and a conductor layer 12 laminated. The base layer 11 comprises a first surface 111, and the conductor layer 12 covers the first surface 111.
[0060] In some embodiments, the base layer 11 is made of a material with electrical insulation performance. The material of the base layer 11 can be polyimide (PI), polyethylene terephthalate (PET), polythylene naphthalate (PEN), or a prepreg containing glass fibers and epoxy resin, etc.
[0061] The conductor layer 12 has electrical conductivity, and the material thereof can be copper, silver, aluminum, etc. In some embodiments, the material of the conductor layer 12 is copper, and the laminated structure 10 is a double-sided copper-clad plate.
[0062] Step S2, please refer to Figure 2 A plurality of through holes 120 are formed on the conductor layer 12, and the through holes 120 expose the first surface 111 of the base layer 11.
[0063] In some embodiments, step S2 comprises: laminating a dry film on the side of the conductor layer away from the base layer, exposing the conductor layer to be formed into the through holes by exposing and developing the dry film, then etching to remove the conductor layer exposed outside the dry film to form the through holes, and finally removing the dry film. The etching can be dry etching or wet etching commonly used in the art, which is not limited in the present application.
[0064] Step S3, please refer to Figure 3 A plurality of accommodating grooves 110 are formed on the first surface 111 of the base layer 11, and the plurality of accommodating grooves 110 correspond one-to-one to the plurality of through holes 120.
[0065] In some embodiments, the accommodating grooves 110 are formed by etching part of the base layer 11, and the etching method for forming the accommodating grooves 110 is the same as the etching method for forming the through holes 120, which is beneficial to simplify the process steps.
[0066] Step S4, please refer to Figure 4 The connection pads 13 are formed in the accommodating grooves 110, and the conductor layer is etched to remove. The connection pads 13 are embedded in the base layer 11 and exposed outside the first surface 111 of the base layer 11. The surface of the connection pads 13 exposed outside the base layer 11 is substantially flush with the first surface 111 of the base layer 11, which is beneficial to improve the surface flatness of the circuit substrate.
[0067] In some embodiments, the connection pads 13 are formed in the accommodating grooves 110 by electroplating copper.
[0068] Step S5, please refer to Figure 5 The protective layer 14 is arranged on the first surface 111 of the base layer 11 to obtain the circuit substrate 20. The protective layer 14 covers the first surface 111 and the connection pads 13, and is used to protect the connection pads 13.
[0069] The protective layer 14 can be a solder resist layer or a cover film. In the present embodiment, the protective layer 14 is a cover film. The protective layer 14 comprises a adhesive layer and a cover layer arranged in layers. The adhesive layer covers the first surface 111 and the connection pads 13. The cover layer covers the side of the adhesive layer away from the first surface. In some embodiments, the material of the adhesive layer is a commonly used adhesive, and the material of the cover layer is polyethylene terephthalate (PET). The protective layer 14 can be arranged on the first surface 111 by lamination, lamination, curing process.
[0070] Step S6, please refer to Figure 6A groove 131 is formed on the protective layer 14 and the connecting pad 13. The groove 131 penetrates the protective layer 14 and is recessed towards the interior of the connecting pad 13 relative to the first surface 111 of the base layer 11.
[0071] In some embodiments, the groove 131 is formed by removing part of the protective layer 14 and part of the connecting pad 13 by laser cutting. The number of grooves 131 is the same as the number of connecting pads 13, and each groove 131 corresponds to one connecting pad 13.
[0072] The groove 131 includes a bottom wall 1311 and a plurality of side walls 1312 arranged around the bottom wall 1311, and the bottom wall 1311 and the plurality of side walls 1312 surround the groove 131. The side walls 1312 are arranged obliquely or perpendicularly relative to the bottom wall 1311. In some embodiments, the included angle at the junction of the side wall 1312 and the bottom wall 1311 is a right angle or an obtuse angle. The edges of the plurality of side walls 1312 away from the bottom wall 1311 surround an opening 1313. In some embodiments, the ratio of the width of the bottom wall 1311 to the width of the opening 1313 is 0.9-1, so that when the conductive pillar is formed by electroplating in the subsequent process, the electroplating solution can easily flow directly into the groove 131 through the opening 1313 without being hindered by the protective layer 14.
[0073] The shape of the groove 131 can be cylindrical, rectangular columnar, hexagonal columnar, octagonal columnar, etc. In this embodiment, the shape of the groove 131 is approximately rectangular columnar.
[0074] Step S7, please refer to Figure 7 A conductive pillar 30 is formed in the groove 131 to obtain a circuit board 100. The conductive pillar 30 protrudes from the protective layer 14. The conductive pillar 30 is used for welding with the solder pad of an electronic component (such as a chip) to achieve electrical connection between the circuit board and the electronic component.
[0075] The shape of the conductive pillar 30 is the same as the shape of the groove 131. That is, the shape of the conductive pillar 30 can also be cylindrical, rectangular columnar, hexagonal columnar, octagonal columnar, etc. In some embodiments, the conductive pillar 30 is formed by electroplating copper.
[0076] Please refer to Figure 7 An embodiment of the present application provides a circuit board 100, which includes a circuit substrate 20 and a plurality of conductive pillars 30. The circuit substrate 20 includes a base layer 11, a plurality of connecting pads 13, and a protective layer 14. The base layer 11 includes a first surface 111, and the connecting pads 13 are embedded in the base layer 11 and exposed outside the first surface 111. The protective layer 14 covers the first surface 111. The connecting pads 13 are provided with grooves 131, and the grooves 131 extend through the protective layer 14. The conductive pillars 30 are accommodated in the grooves 131 and protrude outside the protective layer 14.
[0077] Please refer toFigure 8 In some embodiments, the surface of the circuit substrate 20 is not provided with a protective layer, and the groove 131 is only provided on the connection pad 13, which is suitable for a thinner circuit board.
[0078] In some embodiments, the circuit substrate 20 is a multi-layer circuit board, and the circuit substrate 20 is manufactured by the following steps.
[0079] Step S10, please refer to Figure 9 , a stacked structure 200 is provided, which includes a release film 210 and two first laminates 220 stacked on opposite sides of the release film 210. The first laminate 220 includes a protective layer 14 and a first metal layer 222 stacked. The protective layer 14 covers the surface of the release film 210, and the first metal layer 222 is provided on the surface of the protective layer 14 away from the release film 210.
[0080] Step S20, please refer to Figure 10 A circuit is made on the first metal layer to form a first conductive circuit layer 223. The first conductive circuit layer 223 includes a plurality of connection pads 13.
[0081] The first conductive circuit layer 223 can be formed by image transfer process and etching process.
[0082] Step S30, please refer to Figure 11 The first metal-clad plate 230 is laminated on the surface of the first conductive circuit layer 223. The first metal-clad plate 230 includes a first dielectric layer 231 and a second metal layer 232. The first dielectric layer 231 covers the surface of the first conductive circuit layer 223 and fills the gap in the first conductive circuit layer 223, so that the first conductive circuit layer 223 is embedded in the first dielectric layer 231. The second metal layer 232 is provided on the surface of the first dielectric layer 231 away from the first conductive circuit layer 223.
[0083] Step S40, please refer to Figure 12 A circuit is made on the second metal layer to form a second conductive circuit layer 233. The second conductive circuit layer 233 is electrically connected to the first conductive circuit layer 223. The second conductive circuit layer 233 can be formed by image transfer process and etching process.
[0084] Step S50, please refer to Figure 13 The second metal-clad plate 240 is laminated on the surface of the second conductive circuit layer 233. The second metal-clad plate 240 includes a second dielectric layer 241 and a third metal layer 242. The second dielectric layer 241 covers the surface of the second conductive circuit layer 233 and fills the gap in the second conductive circuit layer 233. The third metal layer 242 is provided on the surface of the second dielectric layer 241 away from the second conductive circuit layer 233.
[0085] Step S 60, please refer to Figure 14 A third conductive circuit layer 243 is formed on the third metal layer. The third conductive circuit layer 243 is electrically connected with the second conductive circuit layer 233. The third conductive circuit layer 243 can be formed by an image transfer process and an etching process.
[0086] The first dielectric layer 231 and the second dielectric layer 241 are made of a material with electrical insulation performance. The material of the first dielectric layer 231 and the second dielectric layer 241 can be polyimide, polyethylene terephthalate, polyethylene naphthalate, or a prepreg containing glass fiber and epoxy resin, etc. In the embodiment, the material of the first dielectric layer 231 and the second dielectric layer 241 is polyimide.
[0087] The material of the first conductive circuit layer 223, the second conductive circuit layer 233, and the third conductive circuit layer 243 can be copper, silver, aluminum, etc. In the embodiment, the material of the first conductive circuit layer 223, the second conductive circuit layer 233, and the third conductive circuit layer 243 is copper.
[0088] Step S 70, please refer to Figure 15 A cover film 250 is arranged on the surface of the third conductive circuit layer 243. The cover film 250 covers the surface of the third conductive circuit layer 243 away from the second dielectric layer 241, and exposes part of the third conductive circuit layer 243.
[0089] Step S 80, please refer to Figure 16 The release film 210 is torn off to expose the protective layer 14, and two circuit substrates 20 are obtained.
[0090] The circuit substrate 20 includes the base layer 11, the first conductive circuit layer 223, and the protective layer 14. The base layer 11 includes the first dielectric layer 231, the second dielectric layer 241, the second conductive circuit layer 233, and the third conductive circuit layer 243. The second conductive circuit layer 233 and the third conductive circuit layer 243 are arranged on the opposite surfaces of the second dielectric layer 241, the first dielectric layer 231 is arranged on the side of the second conductive circuit layer 233 away from the third conductive circuit layer 243, and is connected with the first dielectric layer 231. The side of the first dielectric layer 231 away from the second conductive circuit layer 233 serves as the first surface 111 of the base layer 11. The first conductive circuit layer 223 is embedded in the first dielectric layer 231 and exposed outside the first surface 111. The protective layer 14 covers the first surface 111 and the first conductive circuit layer 223.
[0091] The circuit board and the manufacturing method thereof provided by the embodiments of the present application embed the connecting pad 13 in the base layer 11, which is conducive to improving the flatness of the surface of the circuit board. In addition, the recess 131 is arranged on the connecting pad 13, and the conductive column 30 protruding from the connecting pad is formed in the recess 131. The conductive column 30 is welded with the electronic component, which is conducive to reducing the risk of tin paste overflow during welding to cause bridging of adjacent connecting pads, reducing the spacing between adjacent connecting pads, and facilitating miniaturization. Furthermore, the conductive column 30 is partially accommodated in the recess 131 of the connecting pad 13, which is conducive to enhancing the overall mechanical strength and reducing the risk of fatigue of the solder joint between the circuit board 100 and the electronic component due to repeated thermal cycles.
[0092] The above only discloses the preferred embodiments of the present application, and of course cannot limit the present application. Therefore, equivalent changes made according to the present application still fall within the scope of the present application.
Claims
1. A method of manufacturing a circuit board, characterized by, The method comprises the following steps: providing a circuit substrate, the circuit substrate comprising a base layer and a plurality of connection pads, the connection pads being partially embedded in the base layer and partially exposed outside the base layer; forming a groove on the connection pads; forming a conductive column in the groove, the conductive column protruding outside the connection pads.
2. The method of manufacturing a circuit board according to claim 1, wherein The step of "providing a circuit substrate" comprises: providing a laminated structure, the laminated structure comprising the base layer and a conductor layer; forming a plurality of through holes on the conductor layer and a plurality of accommodation grooves on the base layer, the plurality of accommodation grooves corresponding to the plurality of through holes one by one; forming the connection pads in the accommodation grooves and removing the conductor layer.
3. The method of manufacturing a circuit board according to claim 2, wherein The step of "providing a circuit substrate" further comprises: forming a protective layer on the base layer, the protective layer covering the base layer and a plurality of the connection pads; when forming the groove, the groove penetrates through the protective layer.
4. The method of manufacturing a circuit board according to claim 3, wherein The groove comprises a bottom wall and a plurality of side walls, the plurality of side walls surrounding an opening away from the edge of the bottom wall, the ratio of the width of the bottom wall to the width of the opening being 0.9-0.
1.
5. The method of manufacturing a circuit board according to claim 2, wherein The base layer comprises a first surface, the accommodation grooves penetrating through the first surface, and the surface of the connection pads exposed outside the base layer being flush with the first surface.
6. The method of manufacturing a circuit board according to claim 1, wherein The step of "providing a circuit substrate" comprises: providing a stacked structure, the stacked structure comprising a release film and two first laminated bodies arranged on opposite sides of the release film, the first laminated bodies comprising a protective layer and a first metal layer stacked; forming a first conductive circuit layer by making a circuit on the first metal layer, the first conductive circuit layer comprising a plurality of the connection pads; pressing a first metal-clad plate on the surface of the first conductive circuit layer, the first metal-clad plate comprising a first dielectric layer and a second metal layer stacked, the first dielectric layer being sandwiched between the first conductive circuit layer and the second metal layer and filling the gaps in the first conductive circuit layer; forming a second conductive circuit layer by making a circuit on the second metal layer; tearing off the release film to obtain two circuit substrates.
7. A circuit board, characterized by The method comprises: a circuit substrate comprising a base layer and a plurality of connection pads, the connection pads being partially embedded in the base layer and partially exposed outside the base layer, the connection pads being provided with a groove; and a plurality of conductive columns, the conductive columns being partially accommodated in the groove and protruding outside the connection pads.
8. The circuit board of claim 7, wherein, The circuit substrate further comprises a protective layer covering the surface of the base layer, and the groove extends through the protective layer.
9. The circuit board of claim 8, wherein, The groove comprises a bottom wall and a plurality of side walls, the plurality of side walls surrounding an opening away from the edge of the bottom wall, the ratio of the width of the bottom wall to the width of the opening being 0.9-0.
1.
10. The circuit board of claim 7, wherein, The base layer comprises a first dielectric layer and a first conductive circuit layer, the first conductive circuit layer being partially embedded in the first dielectric layer, and the first conductive circuit layer comprising the connection pads.