Light-emitting device, display panel and preparation method of light-emitting device

Abstract

The invention provides a light-emitting device, a display panel and a preparation method of the light-emitting device. The light-emitting device comprises an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer, a reflecting layer and an electrode layer. The multi-quantum well layer is located on the N-type semiconductor layer, and the P-type semiconductor layer is located on the side, away from the N-type semiconductor layer, of the multi-quantum well layer. The reflecting layer is located on one side of the P-type semiconductor layer away from the N-type semiconductor layer, and the electrode layer is located on one side of the reflecting layer away from the N-type semiconductor layer and electrically connected with the reflecting layer. An annular through hole is formed in the P-type semiconductor layer, and the orthographic projection of the reflecting layer on the N-type semiconductor layer is located in an area defined by the orthographic projection of the annular through hole on the N-type semiconductor layer. According to the structure, through the annular groove formed by the annular through hole and the multi-quantum well layer, the migration path for the conductive particles in the reflecting layer to migrate to the side surface of the semiconductor layer is increased, the conductive particles can be accommodated, the risk of short circuit of the light-emitting device is reduced, and the overall quality of the light-emitting device is ensured.

Description

Technical Field

[0001] This application relates to the field of display panel manufacturing, and more specifically, to a light-emitting device, a display panel, and a method for preparing the light-emitting device. Background Technology

[0002] Currently, in order to improve the light emission efficiency of light-emitting devices in display panels, a reflective layer is usually added to the P-type semiconductor layer of the light-emitting device.

[0003] The reflective layer typically uses a metal layer (such as a silver layer) with good reflective properties to reflect light. During the manufacturing process of the display panel, conductive particles (such as silver particles) in the reflective layer are prone to migration during annealing, which can lead to abnormal performance of the light-emitting device. Summary of the Invention

[0004] To overcome the technical problems mentioned in the above background, this application provides a light-emitting device, the light-emitting device comprising: N-type semiconductor layer; A multi-quantum-well layer is located on the N-type semiconductor layer; A P-type semiconductor layer is located on the side of the multiple quantum well layer away from the N-type semiconductor layer; A reflective layer is located on the side of the P-type semiconductor layer away from the N-type semiconductor layer; An electrode layer is located on the side of the reflective layer away from the N-type semiconductor layer, and the electrode layer is electrically connected to the reflective layer; The P-type semiconductor layer has an annular via that penetrates the P-type semiconductor layer, and the orthogonal projection of the reflective layer onto the N-type semiconductor layer is located within the area enclosed by the orthogonal projection of the annular via onto the N-type semiconductor layer.

[0005] In one possible implementation, the light-emitting device further includes a first blocking layer that wraps around the end of the reflective layer; The portion of the reflective layer located on the side away from the N-type semiconductor layer includes an opening for exposing the reflective layer; The reflective layer exposed through the opening is electrically connected to the electrode layer; Preferably, the material of the first barrier layer is an insulating material; Preferably, the material of the first barrier layer is aluminum oxide.

[0006] In one possible implementation, the light-emitting device further includes a second blocking layer located on the side of the first blocking layer away from the N-type semiconductor layer; The orthographic projections of the reflective layer and the first blocking layer onto the N-type semiconductor layer are both located within the orthographic projection of the second blocking layer onto the N-type semiconductor layer; Preferably, the material of the second barrier layer is a conductive material, and the second barrier layer is electrically connected to the reflective layer through the opening; Preferably, the second barrier layer is a titanium-tungsten alloy layer.

[0007] In one possible implementation, the light-emitting device further includes a filling portion; The filling portion is located within the annular groove formed by the annular through-hole and the multiple quantum well layer; The orthographic projection of the filling portion on the N-type semiconductor layer overlaps with the orthographic projection of the first barrier layer on the N-type semiconductor layer; Preferably, the filling material is an insulating material; Preferably, the material of the filling portion is the same as the material of the first barrier layer; Preferably, the filling material is a thermally strained material.

[0008] In one possible implementation, the light-emitting device further includes a stress-adjusting layer located between the second barrier layer and the electrode layer; The magnitude of the thermal stress in the stress-adjusting layer is between the magnitude of the thermal stress in the second barrier layer and the magnitude of the thermal stress in the electrode layer; The stress-adjusting layer is made of a conductive material; The electrode layer is electrically connected to the reflective layer through the stress-adjusting layer and the second barrier layer; Preferably, in the direction away from the N-type semiconductor layer, the stress-adjusting layer includes a stacked platinum layer, a titanium-tungsten alloy layer, and a platinum layer.

[0009] Another objective of this application is to provide a display panel, the display panel including a plurality of the light-emitting devices provided in this application; Multiple light-emitting devices are arranged in an array on the display panel; An isolation trench is provided between two adjacent light-emitting devices, extending through the P-type semiconductor layer and the multiple quantum well layer to the N-type semiconductor layer; The display panel further includes an insulating layer and conductive traces. The insulating layer covers the surface of the isolation trench and includes an opening that exposes the N-type semiconductor layer. The conductive traces are electrically connected to the N-type semiconductor layer through the opening.

[0010] Another objective of this application is to provide a method for fabricating a light-emitting device, the method comprising: A substrate is provided, wherein the substrate includes an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer stacked together; A reflective material layer is fabricated on the P-type semiconductor layer, and the reflective material layer is patterned to form a reflective layer in the area where the light-emitting device is fabricated. An annular via is formed by etching the area of ​​the P-type semiconductor layer that is not covered by the reflective layer, surrounding the reflective layer and penetrating the P-type semiconductor layer, wherein the orthogonal projection of the reflective layer on the N-type semiconductor layer is located within the area enclosed by the orthogonal projection of the annular via on the N-type semiconductor layer; An electrode layer is formed on the side of the reflective layer away from the N-type semiconductor layer to form the light-emitting device.

[0011] In one possible implementation, after the step of etching the region of the P-type semiconductor layer not covered by the reflective layer to form an annular via surrounding the reflective layer and penetrating the P-type semiconductor layer, the method further includes: An insulating material is formed to create a filling portion in the annular through hole; A first barrier layer is formed on the side of the reflective layer away from the N-type semiconductor layer; A second barrier layer is formed on the side of the first barrier layer away from the N-type semiconductor layer, wherein the orthographic projections of the reflective layer and the first barrier layer on the N-type semiconductor layer are both located within the orthographic projection of the second barrier layer on the N-type semiconductor layer; A stress-adjusting layer is formed on the side of the second barrier layer away from the N-type semiconductor layer.

[0012] In one possible implementation, the step of fabricating a first barrier layer on the side of the reflective layer away from the N-type semiconductor layer includes: A first barrier layer is formed on the side of the reflective layer away from the N-type semiconductor layer, and the first barrier layer is patterned to form an opening that exposes the reflective layer.

[0013] In one possible implementation, the step of forming the light-emitting device by fabricating an electrode layer on the side of the reflective layer away from the N-type semiconductor layer includes: An electrode layer is formed on the side of the stress-adjusting layer away from the N-type semiconductor layer to form the light-emitting device.

[0014] Based on any of the above aspects, embodiments of this application provide a light-emitting device, a display panel, and a method for fabricating the light-emitting device. The light-emitting device includes an N-type semiconductor layer, a multi-quantum-well layer, a P-type semiconductor layer, a reflective layer, and an electrode layer. The multi-quantum-well layer is located on the N-type semiconductor layer, and the P-type semiconductor layer is located on the side of the multi-quantum-well layer away from the N-type semiconductor layer. The reflective layer is located on the side of the P-type semiconductor layer away from the N-type semiconductor layer, and the electrode layer is located on the side of the reflective layer away from the N-type semiconductor layer, and the electrode layer is electrically connected to the reflective layer. The P-type semiconductor layer has an annular via penetrating the P-type semiconductor layer, and the orthographic projection of the reflective layer onto the N-type semiconductor layer is located within the area enclosed by the orthographic projection of the annular via onto the N-type semiconductor layer. This structure, through the annular via and the annular groove formed by the multi-quantum-well layer, increases the migration path of conductive particles in the reflective layer to the side of the semiconductor layer and can accommodate conductive particles, reducing the risk of short circuits in the light-emitting device and ensuring the overall quality of the light-emitting device. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of a light-emitting device provided in this embodiment; Figure 2 This is a schematic diagram of a display panel provided in this embodiment; Figure 3 This is a top view of a display panel provided in this embodiment; Figure 4 This embodiment provides a flowchart of the steps involved in fabricating a light-emitting device. Figure 5 for Figure 4 Corresponding process flow chart; Figure 6 for Figure 4 A flowchart illustrating the steps following step S14; Figure 7 for Figure 6 The corresponding manufacturing process diagram.

[0017] Icons: 1-Light-emitting device; 10-N-type semiconductor layer; 20-Multiple quantum well layer; 30-P-type semiconductor layer; 31-Annular via; 40-Reflective layer; 50-Electrode layer; 60-First barrier layer; 61-Opening; 70-Second barrier layer; 80-Filling portion; 90-Stress-adjusting layer; 100-Isolation trench; 110-Insulating layer; 1101-Opening; 111-Conductive trace. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0019] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0020] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0021] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0022] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0023] The inventors discovered through research that, in order to improve the light extraction efficiency of light-emitting devices in display panels, a reflective layer is typically added to the side of the P-type semiconductor layer away from the N-type semiconductor layer. This reflective layer reflects light generated by the multi-quantum-well layer towards the P-type semiconductor layer towards the N-type semiconductor layer. For example, the reflective layer typically includes stacked nickel, silver, and nickel layers. During the fabrication of the light-emitting device, such as during high-temperature annealing, the movement of conductive particles (silver particles) intensifies, making them prone to migrating from their original positions to other areas of the light-emitting device (e.g., the sidewalls of the semiconductor layers). This can lead to a short circuit between the N-type and P-type semiconductor layers, causing malfunctions in the light-emitting device.

[0024] In order to solve the aforementioned technical problems, the inventors have innovatively designed the following technical solutions, and the specific implementation scheme of this application will be described in detail below with reference to the accompanying drawings.

[0025] See Figure 1 , Figure 1 This is a schematic diagram of a light-emitting device 1 provided in this embodiment. The light-emitting device 1 of this embodiment includes an N-type semiconductor layer 10, a multiple quantum well layer 20, and a P-type semiconductor layer 30. The multiple quantum well layer 20 is located on the N-type semiconductor layer 10, and the P-type semiconductor layer 30 is located on the side of the multiple quantum well layer 20 away from the N-type semiconductor layer 10. The multiple quantum well layer 20, as the core light-emitting region of the light-emitting device 1, is typically composed of alternating narrow-gap quantum well layers and wide-gap barrier layers. When an electrical signal passes through the light-emitting device 1, electrons in the N-type semiconductor layer 10 are injected into the multiple quantum well layer 20, and holes in the P-type semiconductor layer 30 are similarly injected into the multiple quantum well layer 20. At this time, the electrons and holes in the multiple quantum well layer 20 recombine and release energy, emitting it in the form of photons, thereby realizing the light emission of the light-emitting device 1.

[0026] The light-emitting device 1 in this embodiment further includes a reflective layer 40 and an electrode layer 50. The reflective layer 40 is located on the side of the P-type semiconductor layer 30 away from the N-type semiconductor layer 10. Its function is to reflect the light generated by the multi-quantum well layer 20 toward the P-type semiconductor layer 30 toward the N-type semiconductor layer 10, thereby improving the light extraction efficiency of the light-emitting device 1. The electrode layer 50 is located on the side of the reflective layer 40 away from the N-type semiconductor layer 10. The electrode layer 50 is electrically connected to the reflective layer 40. Exemplarily, the electrical signal generated by the driving circuit in the display panel 2 can be transmitted to the interior of the light-emitting device 1 through the electrode layer 50. The P-type semiconductor layer 30 is provided with an annular through-hole 31 penetrating the P-type semiconductor layer 30. The orthographic projection of the reflective layer 40 onto the N-type semiconductor layer 10 is located within the area enclosed by the orthographic projection of the annular through-hole 31 onto the N-type semiconductor layer 10.

[0027] The reflective layer 40 typically includes stacked nickel, silver, and nickel layers. During the fabrication of the light-emitting device 1, especially during high-temperature annealing, silver particles in the silver layer can easily migrate to the side of the semiconductor layer in the light-emitting device 1, potentially causing a short circuit. This embodiment addresses this by providing an annular via 31 in the P-type semiconductor layer 30, increasing the migration path of silver particles in the reflective layer 40 and also accommodating them while preventing further migration, thus reducing the risk of a short circuit in the light-emitting device 1. Furthermore, during the fabrication of the display panel 2, etching the light-emitting device 1 may lead to the formation of non-radiative recombination regions. When a large current is applied to the light-emitting device 1, the annular via 31 around the reflective layer 40 ensures that the current only flows through the area where the reflective layer 40 is located, reducing leakage current in the non-radiative recombination regions, lowering power consumption and heat generation in the light-emitting device 1, and ensuring good performance.

[0028] Furthermore, please see again Figure 1 The light-emitting device 1 in this embodiment also includes a first blocking layer 60, which wraps around the end of the reflective layer 40. In this way, the first blocking layer 60 protects the reflective layer 40 and prevents silver particles in the silver layer exposed on the end sidewall from migrating out.

[0029] In this embodiment, the material of the first barrier layer 60 is an insulating material, for example, the material of the first barrier layer 60 can be aluminum oxide (Al2O3).

[0030] In this embodiment, the high-temperature annealing process involves raising the temperature and then gradually lowering it. When the material of the first barrier layer 60 is aluminum oxide (Al2O3), it satisfies the oxygen environment required by the reflective layer 40, allowing the nickel layer in the reflective layer to form nickel oxide. This reduces voltage blocking caused by the work function difference, thus reducing power consumption. Furthermore, it increases the number of holes in the P-type semiconductor layer, further reducing resistance. Moreover, due to the atomic structure and chemical bonds of aluminum oxide (Al2O3), silver particles cannot move freely within it, effectively preventing silver particle migration and further reducing the risk of short circuits in the light-emitting device 1 caused by silver migration.

[0031] The portion of the first barrier layer 60 located on the side of the reflective layer 40 away from the N-type semiconductor layer 10 includes an opening 61 for exposing the reflective layer 40. The reflective layer 40 exposed through the opening 61 is electrically connected to the electrode layer 50. In this embodiment, the first barrier layer 60 can be patterned to form the opening 61. The function of the opening 61 is to achieve the electrical connection between the reflective layer 40 and the electrode layer 50. In this way, the electrical signal provided by the driving backplane (not shown in the figure) can pass through the electrode layer 50 and the reflective layer 40 and then act on the P-type semiconductor layer 30, ensuring the normal operation of the light-emitting device 1.

[0032] Furthermore, please see again Figure 1 In this embodiment, the light-emitting device 1 further includes a second barrier layer 70, which is located on the side of the first barrier layer 60 away from the N-type semiconductor layer 10. The orthographic projections of the reflective layer 40 and the first barrier layer 60 onto the N-type semiconductor layer 10 are both within the orthographic projection of the second barrier layer 70 onto the N-type semiconductor layer 10, meaning the second barrier layer 70 covers both the first barrier layer 60 and the reflective layer 40. Thus, the second barrier layer 70 provides further protection for the reflective layer 40, further preventing silver particles from migrating from the sides of the reflective layer 40 and reducing the risk of short circuits caused by silver migration in the light-emitting device 1.

[0033] Furthermore, the second barrier layer 70 is made of a conductive material and is electrically connected to the reflective layer 40 through the opening 61. The second barrier layer 70 is located between the first barrier layer 60 and the electrode layer 50. Thus, the electrical signal provided by the driving backplane in the display panel 2 passes through the electrode layer 50, the second barrier layer 70, the opening 61, and the reflective layer 40 before acting on the P-type semiconductor layer 30, ensuring the normal operation of the light-emitting device 1. The second barrier layer 70 can be a titanium-tungsten alloy layer (TiW). If silver particles break through the first barrier layer 60 and reach the second barrier layer 70, due to the relatively compact crystal structure of the titanium-tungsten alloy layer (TiW) and the strong bonding force between its atoms, it is difficult for the silver particles to diffuse and migrate within it. The titanium-tungsten alloy layer (TiW) can thus hinder the silver particles. Specifically, the silver particles may be captured by the atoms of the titanium-tungsten alloy layer (TiW), or the silver particles may form an adsorption layer on the surface of the titanium-tungsten alloy layer (TiW), thus preventing them from migrating to other areas of the light-emitting device 1.

[0034] It is worth noting that the second barrier layer 70 can also be made of materials such as tantalum nitride (TaN), tantalum (Ta), and titanium nitride (TiN), which have good electrical conductivity, thermal stability, and corrosion resistance.

[0035] Furthermore, please see again Figure 1 The light-emitting device 1 also includes a filling portion 80, which is located within the annular groove formed by the annular through-hole 31 and the multiple quantum well layer 20. In this embodiment, the filling portion 80 located within the annular groove can, on the one hand, increase the migration path of silver particles in the reflective layer 40, making it more difficult for silver particles to migrate; on the other hand, silver particles migrating from the reflective layer 40 can be contained within the filling portion 80, thereby preventing the silver particles from continuing to migrate and avoiding the occurrence of a short circuit in the light-emitting device 1.

[0036] In this embodiment, the orthographic projection of the filling portion 80 on the N-type semiconductor layer 10 overlaps with the orthographic projection of the first barrier layer 60 on the N-type semiconductor layer 10. When silver particles migrate from the end of the reflective layer 40, they are first blocked by the first barrier layer 60, whose insulating material provides some barrier effect. If some silver particles break through the first barrier layer 60, a portion of these particles can be further blocked by the second barrier layer 70. If another portion of silver particles migrates through the first barrier layer 60 to the filling portion 80 in the annular groove, it increases the migration path and may result in them being stored in the annular groove. This design increases the complexity of silver particle migration and prevents silver particles from migrating to other areas of the light-emitting device 1 (e.g., the sides of the semiconductor layer) and causing a short circuit.

[0037] Furthermore, the material of the filling part 80 can be an insulating material. When silver particles migrate to the filling part 80, due to the atomic structure and chemical bonds of the insulating material, the silver particles are difficult to move freely in the insulating material, thereby preventing the migration of silver particles.

[0038] Furthermore, the material of the filling portion 80 is the same as the material of the first barrier layer 60. The material of the filling portion 80 is a thermally strained material. In this embodiment, if the substrate formed by the P-type semiconductor layer 30, the multiple quantum well layer 20, and the N-type semiconductor layer 10 is under compressive stress, it will cause the originally regularly arranged crystal lattice to become distorted. When the crystal lattice is distorted, an electric field is easily generated in the electron-hole recombination region (i.e., the multiple quantum well layer), which will hinder the injection of electrons and holes. Therefore, by filling the annular groove formed by the P-type semiconductor layer 30 and the multiple quantum well layer 20 with a thermally strained material, since it will deform to a certain extent when the temperature changes, it can provide compressive stress to the substrate, thereby reducing the stress of the substrate itself and improving the luminous efficiency of the light-emitting device 1. In addition, the deformation generated by the thermally strained material can further change the migration path of silver particles. Specifically, when silver particles migrate to the filling portion 80 of the thermally strained material, they may be squeezed or have their movement direction changed, thereby increasing the difficulty of silver particle migration. Furthermore, thermally strained materials can also capture metal atoms (such as silver particles) and form complexes with them, thereby preventing their migration.

[0039] In this embodiment, the thermal strain material includes colloidal materials such as polyimide (PI).

[0040] Furthermore, please see again Figure 1The light-emitting device 1 in this embodiment also includes a stress-adjusting layer 90, which is located between the second barrier layer 70 and the electrode layer 50. During the fabrication of the light-emitting device 1, different film layers (e.g., the electrode layer 50 and the second barrier layer 70) may have different coefficients of thermal expansion (CTE), hardness, and film formation morphology, resulting in stress differences between them. For example, during high-temperature annealing, the different coefficients of thermal expansion of the different film layers result in varying expansion and contraction amounts, potentially causing tensile phenomena between them. Furthermore, differences in hardness between different film layers can easily affect their resistance to deformation. Additionally, differences in film formation morphology can also affect the film's performance under stress. Therefore, this embodiment introduces a stress-adjusting layer 90 between the electrode layer 50 and the second barrier layer 70 to buffer against cracking and separation caused by excessive stress differences, thus preventing issues affecting the quality of the light-emitting device 1.

[0041] Specifically, when the temperature of the light-emitting device 1 changes during operation, the second barrier layer 70, the stress-adjusting layer 90, and the electrode layer 50 will experience different degrees of thermal strain. In this embodiment, the thermal stress of the stress-adjusting layer 90 is between that of the second barrier layer 70 and the electrode layer 50. When the temperature rises, the electrode layer 50 may experience significant thermal expansion, while the thermal expansion of the second barrier layer 70 is relatively small. The stress-adjusting layer 90 can absorb and disperse the difference in thermal stress through its own deformation, preventing excessive stress concentration on a single layer, thus ensuring the reliability and stability of the light-emitting device 1.

[0042] Furthermore, the stress-adjusting layer 90 in this embodiment is made of a conductive material. Since the stress-adjusting layer 90 is located between the electrode layer 50 and the reflective layer 40, and the electrode layer 50 is electrically connected to the reflective layer 40 through the stress-adjusting layer 90 and the second barrier layer 70, the material of the stress-adjusting layer 90 should have both conductive and stress-adjusting properties.

[0043] Furthermore, in the direction away from the N-type semiconductor layer 10, the stress adjustment layer 90 includes a stacked platinum layer (Pt), a titanium-tungsten alloy layer (TiW), and another platinum layer (Pt). Both the platinum layer (Pt) and the titanium-tungsten alloy (TiW) possess good electrical conductivity, ensuring smooth transmission of electrical signals. Simultaneously, their coefficients of thermal expansion and thermal stress characteristics can complement each other, such that the magnitude of the thermal stress in the stress adjustment layer 90 is between the magnitude of the thermal stress in the second barrier layer 70 and the magnitude of the thermal stress in the electrode layer 50.

[0044] Based on the same inventive concept, this application also provides a display panel 2, please refer to... Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of a display panel 2 provided in this embodiment. Figure 3 This is a top view of the display panel 2 provided in this embodiment. The display panel 2 includes a plurality of light-emitting devices 1 provided in this application, which are arranged in an array on the display panel 2.

[0045] In this embodiment, each light-emitting device 1 in the display panel 2 is equivalent to a pixel. The display function of the display panel 2 is achieved by controlling the light-emitting state of different light-emitting devices 1.

[0046] An isolation trench 100 is provided between two adjacent light-emitting devices 1, penetrating the P-type semiconductor layer 30 and the multiple quantum well layer 20 up to the N-type semiconductor layer 10. For example, Figure 3 As shown, the isolation groove 100 can surround the light-emitting device 1. The isolation groove 100 plays a role in isolating and protecting two adjacent light-emitting devices 1, preventing mutual interference between them. For example, when one light-emitting device 1 is working, the electric field, magnetic field, etc. it generates may affect adjacent light-emitting devices 1, and the isolation groove 100 can effectively reduce this effect, ensuring that each light-emitting device 1 can work independently and stably, thereby ensuring the normal display of the display panel 2.

[0047] The display panel 2 also includes an insulating layer 110 and conductive traces 111. The insulating layer 110 covers the surface of the isolation trench 100 and includes an opening 1101 exposing the N-type semiconductor layer 10. The conductive traces 111 are electrically connected to the N-type semiconductor layer 10 through the opening 1101. In this embodiment, the design of the insulating layer 110 serves two purposes: firstly, it provides insulation protection for two adjacent light-emitting devices 1, ensuring the independent operation of the light-emitting devices 1; secondly, the insulating layer 110 prevents the conductive traces 111 from short-circuiting with other structures around the isolation trench 100, thereby affecting the stability of the display panel 2.

[0048] In this embodiment, the electrode layer 50 of the light-emitting device 1 is used as the anode, and the multiple light-emitting devices 1 of the display panel 2 adopt a common cathode structure, that is, the N-type semiconductor layer 10 of each light-emitting device 1 is arranged on the same layer, and the conductive trace 111 is electrically connected to the N-type semiconductor layer 10 through the opening 1101, so that the same common voltage can be provided to different light-emitting devices 1. In this embodiment, the light-emitting device 1 can prevent the migration of silver particles in the reflective layer 40, reduce the phenomenon of short circuit in the light-emitting device 1, ensure the quality of the light-emitting device 1, and thus ensure the stability and reliability of the display panel 2, and improve the market competitiveness of the display panel 2.

[0049] Based on the same inventive concept, please see Figure 4 and Figure 5 , Figure 4This is a flowchart illustrating the steps of fabricating a light-emitting device 1 according to this embodiment. Figure 5 for Figure 4 The corresponding process flow diagram. This application also provides a method for fabricating a light-emitting device 1, the method comprising: Step S11: A substrate is provided, wherein the substrate includes an N-type semiconductor layer 10, a multiple quantum well layer 20 and a P-type semiconductor layer 30 stacked together.

[0050] In this embodiment, the N-type semiconductor layer 10 is used to provide electrons, the multi-quantum well layer 20 is the core region for light emission, and the P-type semiconductor layer 30 is used to provide holes. Electrons and holes recombine at the multi-quantum well layer 20 to emit light, thereby realizing the light emission function of the light-emitting device 1.

[0051] Step S12: A reflective material layer is fabricated on the P-type semiconductor layer 30, and the reflective material layer is patterned to form a reflective layer 40 in the area where the light-emitting device 1 is fabricated.

[0052] In this step, a reflective material layer can be deposited on the side of the P-type semiconductor layer 30 away from the N-type semiconductor layer 10 using a deposition process. Specifically, a nickel layer, a silver layer, and another nickel layer are sequentially deposited on the side of the P-type semiconductor layer 30 away from the N-type semiconductor layer 10 to form the reflective material layer. Furthermore, the reflective material layer can be patterned using a photolithography process. This involves first coating the reflective material layer with a layer of photoresist, then patterning the photoresist, followed by etching down to the exposed reflective material layer, and finally removing the photoresist to form the reflective layer 40.

[0053] In this embodiment, the reflective layer 40 can reflect the light generated by the multi-quantum well layer 20 toward the P-type semiconductor layer 30 toward the N-type semiconductor layer 10, thereby improving the light extraction efficiency of the light-emitting device 1.

[0054] Step S13: Etch the area of ​​the P-type semiconductor layer 30 that is not covered by the reflective layer 40 to form an annular via 31 that surrounds the reflective layer 40 and penetrates the P-type semiconductor layer 30, wherein the orthogonal projection of the reflective layer 40 on the N-type semiconductor layer 10 is located within the area enclosed by the orthogonal projection of the annular via 31 on the N-type semiconductor layer 10.

[0055] In related technologies, during the fabrication of the light-emitting device 1, for example during high-temperature annealing, the reflective layer 40 gains energy, causing the movement of conductive particles (e.g., silver particles) within it to intensify and easily migrate, leading to abnormal performance of the light-emitting device 1. However, in this embodiment, an annular via 31 is etched around and through the P-type semiconductor layer 30 in the area not covered by the reflective layer 40. This annular via 31 exposes part of the surface of the multiple quantum well layer 20. Thus, the annular groove formed by the annular via 31 and the multiple quantum well layer 20 increases the migration path of conductive particles in the reflective layer 40 to the side of the semiconductor layer and can accommodate conductive particles, thereby reducing the risk of short circuit in the light-emitting device 1.

[0056] Step S14: An electrode layer 50 is fabricated on the side of the reflective layer 40 away from the N-type semiconductor layer 10 to form a light-emitting device 1.

[0057] In this embodiment, the electrode layer 50 provides an electrical signal to the light-emitting device 1, so that the holes in the N-type semiconductor layer 10 and the electrons in the P-type semiconductor layer 30 can recombine and emit light in the multi-quantum well layer 20, thereby achieving stable light emission of the light-emitting device 1.

[0058] Further, see Figure 6 and Figure 7 , Figure 6 for Figure 4 Flowchart of steps after step S14 Figure 7 for Figure 6 The corresponding process flow diagram. After step S14, the method further includes: Step S15: Filling material is made in the annular through hole 31 to form a filling part 80.

[0059] In this step, an insulating material or a thermally strained material can be prepared into the annular through-hole 31. On the one hand, the filling portion 80 can increase the migration path of silver particles in the reflective layer 40, making it more difficult for silver particles to migrate. On the other hand, silver particles that migrate out of the reflective layer 40 may be contained within the filling portion 80, thereby preventing the silver particles from continuing to migrate.

[0060] Step S16: A first barrier layer 60 is formed on the side of the reflective layer 40 away from the N-type semiconductor layer 10.

[0061] In this embodiment, the first barrier layer 60 wraps around the end of the reflective layer 40, thus protecting the reflective layer 40 and preventing silver particles in the silver layer from migrating out from the end of the reflective layer 40. The material of the first barrier layer 60 can be an insulating material, such as aluminum oxide (Al2O3).

[0062] Step S17: A second barrier layer 70 is formed on the side of the first barrier layer 60 away from the N-type semiconductor layer 10, wherein the orthogonal projections of the reflective layer 40 and the first barrier layer 60 on the N-type semiconductor layer 10 are both located within the orthogonal projection of the second barrier layer 70 on the N-type semiconductor layer 10.

[0063] In this embodiment, the second barrier layer 70 covers the first barrier layer 60 and the reflective layer 40. Thus, the second barrier layer 70 provides further protection for the reflective layer 40, further preventing silver particles from migrating out of the reflective layer 40 and reducing the risk of silver migration causing a short circuit in the light-emitting device 1.

[0064] Step S18: A stress-adjusting layer 90 is formed on the side of the second barrier layer 70 away from the N-type semiconductor layer 10.

[0065] In this embodiment, the stress adjustment layer 90 may include a stacked platinum layer, a titanium-tungsten alloy layer, and a platinum layer, which can be formed by a deposition process. The stress adjustment layer 90 can be used to adjust the thermal stress between the electrode layer 50 and the second barrier layer 70, ensuring the reliability and stability of the light-emitting device 1.

[0066] Furthermore, step S16 can be implemented in the following way.

[0067] A first barrier layer 60 is formed on the side of the reflective layer 40 away from the N-type semiconductor layer 10, and the first barrier layer 60 is patterned to form an opening 61 that exposes the reflective layer 40.

[0068] In this embodiment, an opening 61 is formed to expose the reflective layer 40 by photolithography. The second barrier layer 70 is electrically connected to the reflective layer 40 through the opening 61. In this way, the electrical signal generated by the driving backplane acts on the P-type semiconductor layer 30 through the electrode layer 50, the second barrier layer 70 and the reflective layer 40, ensuring the normal operation of the light-emitting device 1.

[0069] Furthermore, step S14 can also be implemented in the following ways.

[0070] An electrode layer 50 is fabricated on the side of the stress-adjusting layer 90 away from the N-type semiconductor layer 10 to form a light-emitting device 1.

[0071] In this embodiment, the electrode layer 50 includes a gold layer, a tin layer and a gold layer stacked together. The electrical signal generated by driving the backplane acts on the P-type semiconductor layer 30 through the electrode layer 50, the stress adjustment layer 90, the second barrier layer 70 and the reflective layer 40 to ensure the normal operation of the light-emitting device 1.

[0072] In summary, this application provides a light-emitting device, a display panel, and a method for fabricating the light-emitting device. The light-emitting device includes an N-type semiconductor layer, a multi-quantum-well layer, a P-type semiconductor layer, a reflective layer, and an electrode layer. The multi-quantum-well layer is located on the N-type semiconductor layer, and the P-type semiconductor layer is located on the side of the multi-quantum-well layer away from the N-type semiconductor layer. The reflective layer is located on the side of the P-type semiconductor layer away from the N-type semiconductor layer, and the electrode layer is located on the side of the reflective layer away from the N-type semiconductor layer, and the electrode layer is electrically connected to the reflective layer. The P-type semiconductor layer has an annular via penetrating the P-type semiconductor layer, and the orthographic projection of the reflective layer onto the N-type semiconductor layer lies within the area enclosed by the orthographic projection of the annular via onto the N-type semiconductor layer. This structure, through the annular via and the annular groove formed by the multi-quantum-well layer, increases the migration path of conductive particles in the reflective layer to the side of the semiconductor layer and can accommodate conductive particles, reducing the risk of short circuits in the light-emitting device and ensuring the overall quality of the light-emitting device.

[0073] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A light-emitting device, characterized in that, The light-emitting device includes: N-type semiconductor layer; A multi-quantum-well layer is located on the N-type semiconductor layer; A P-type semiconductor layer is located on the side of the multiple quantum well layer away from the N-type semiconductor layer; A reflective layer is located on the side of the P-type semiconductor layer away from the N-type semiconductor layer; An electrode layer is located on the side of the reflective layer away from the N-type semiconductor layer, and the electrode layer is electrically connected to the reflective layer; The P-type semiconductor layer has an annular via that penetrates the P-type semiconductor layer, and the orthogonal projection of the reflective layer onto the N-type semiconductor layer is located within the area enclosed by the orthogonal projection of the annular via onto the N-type semiconductor layer.

2. The light-emitting device as described in claim 1, characterized in that, The light-emitting device further includes a first blocking layer, which wraps around the end of the reflective layer; The portion of the reflective layer located on the side away from the N-type semiconductor layer includes an opening for exposing the reflective layer; The reflective layer exposed through the opening is electrically connected to the electrode layer; Preferably, the material of the first barrier layer is an insulating material; Preferably, the material of the first barrier layer is aluminum oxide.

3. The light-emitting device as described in claim 2, characterized in that, The light-emitting device further includes a second blocking layer, which is located on the side of the first blocking layer away from the N-type semiconductor layer; The orthographic projections of the reflective layer and the first blocking layer onto the N-type semiconductor layer are both located within the orthographic projection of the second blocking layer onto the N-type semiconductor layer; Preferably, the material of the second barrier layer is a conductive material, and the second barrier layer is electrically connected to the reflective layer through the opening; Preferably, the second barrier layer is a titanium-tungsten alloy layer.

4. The light-emitting device according to any one of claims 2-3, characterized in that, The light-emitting device further includes a filling portion; The filling portion is located within the annular groove formed by the annular through-hole and the multiple quantum well layer; The orthographic projection of the filling portion on the N-type semiconductor layer overlaps with the orthographic projection of the first barrier layer on the N-type semiconductor layer; Preferably, the filling material is an insulating material; Preferably, the material of the filling portion is the same as the material of the first barrier layer; Preferably, the filling material is a thermally strained material.

5. The light-emitting device as described in claim 3, characterized in that, The light-emitting device further includes a stress-adjusting layer, which is located between the second barrier layer and the electrode layer; The magnitude of the thermal stress in the stress-adjusting layer is between the magnitude of the thermal stress in the second barrier layer and the magnitude of the thermal stress in the electrode layer; The stress-adjusting layer is made of a conductive material; The electrode layer is electrically connected to the reflective layer through the stress-adjusting layer and the second barrier layer; Preferably, in the direction away from the N-type semiconductor layer, the stress-adjusting layer includes a stacked platinum layer, a titanium-tungsten alloy layer, and a platinum layer.

6. A display panel, characterized in that, The display panel includes a plurality of light-emitting devices as described in any one of claims 1-5; Multiple light-emitting devices are arranged in an array on the display panel; An isolation trench is provided between two adjacent light-emitting devices, extending through the P-type semiconductor layer and the multiple quantum well layer to the N-type semiconductor layer; The display panel further includes an insulating layer and conductive traces. The insulating layer covers the surface of the isolation trench and includes an opening that exposes the N-type semiconductor layer. The conductive traces are electrically connected to the N-type semiconductor layer through the opening.

7. A method for fabricating a light-emitting device, characterized in that, The method includes: A substrate is provided, wherein the substrate includes an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer stacked together; A reflective material layer is fabricated on the P-type semiconductor layer, and the reflective material layer is patterned to form a reflective layer in the area where the light-emitting device is fabricated. An annular via is formed by etching the area of ​​the P-type semiconductor layer that is not covered by the reflective layer, surrounding the reflective layer and penetrating the P-type semiconductor layer, wherein the orthogonal projection of the reflective layer on the N-type semiconductor layer is located within the area enclosed by the orthogonal projection of the annular via on the N-type semiconductor layer; An electrode layer is formed on the side of the reflective layer away from the N-type semiconductor layer to form the light-emitting device.

8. The method for fabricating a light-emitting device as described in claim 7, characterized in that, After the step of etching the region of the P-type semiconductor layer not covered by the reflective layer to form an annular via surrounding the reflective layer and penetrating the P-type semiconductor layer, the method further includes: An insulating material is formed to create a filling portion in the annular through hole; A first barrier layer is formed on the side of the reflective layer away from the N-type semiconductor layer; A second barrier layer is formed on the side of the first barrier layer away from the N-type semiconductor layer, wherein the orthographic projections of the reflective layer and the first barrier layer on the N-type semiconductor layer are both located within the orthographic projection of the second barrier layer on the N-type semiconductor layer; A stress-adjusting layer is formed on the side of the second barrier layer away from the N-type semiconductor layer.

9. The method for fabricating a light-emitting device as described in claim 8, characterized in that, The step of fabricating a first barrier layer on the side of the reflective layer away from the N-type semiconductor layer includes: A first barrier layer is formed on the side of the reflective layer away from the N-type semiconductor layer, and the first barrier layer is patterned to form an opening that exposes the reflective layer.

10. The method for fabricating a light-emitting device as described in claim 8, characterized in that, The step of forming the light-emitting device by fabricating an electrode layer on the side of the reflective layer away from the N-type semiconductor layer includes: An electrode layer is formed on the side of the stress-adjusting layer away from the N-type semiconductor layer to form the light-emitting device.

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