Printed wiring board

Abstract

The invention provides a printed wiring board having high quality. A printed wiring board according to an embodiment includes: a first conductor layer; a resin insulating layer formed on the first conductor layer and having an opening for a via conductor exposing the first conductor layer, a first surface, and a second surface on the opposite side to the first surface; a second conductor layer formed on the first surface of the resin insulating layer; and a via hole conductor formed in the opening and connecting the first conductor layer and the second conductor layer. The second conductor layer and the via conductor are formed of a seed layer and a plating layer formed on the seed layer. The seed layer is formed by sputtering and is composed of an alloy containing copper, aluminum, and a specific metal, and the specific metal is at least one of nickel, zinc, gallium, silicon, and magnesium. The resin insulating layer is formed of glass particles and a resin, the second conductor layer includes a signal wiring, a first surface of the resin insulating layer is formed of a resin, and an inner wall surface of the opening is formed of surfaces of the resin and the glass particles.

Description

Technical Field

[0001] The technology disclosed in this specification relates to printed wiring boards. Background Technology

[0002] Patent Document 1 discloses a printed wiring board having a resin substrate, a resin insulating layer formed on the resin substrate, and conductive circuits. The conductive circuits are formed on the resin insulating layer with an alloy layer containing a specific metal as a buffer. For example, the specific metal is shown in paragraph 8 of Patent Document 1.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2000-124602

[0004] [The issue of patent document 1]

[0005] In the printed wiring board with an alloy layer in Patent Document 1, it is believed that the adhesion between the conductor circuit and the resin insulation layer is insufficient. Summary of the Invention

[0006] The printed wiring board of the present invention comprises: a first conductor layer; a resin insulating layer formed on the first conductor layer, having an opening for a via conductor exposing the first conductor layer, a first surface, and a second surface opposite to the first surface; a second conductor layer formed on the first surface of the resin insulating layer; and a via conductor formed within the opening, connecting the first conductor layer and the second conductor layer. The second conductor layer and the via conductor are formed from a seed layer and an electroplated layer formed on the seed layer. The seed layer is formed by sputtering and is composed of an alloy containing copper, aluminum, and a specific metal, wherein the specific metal is at least one selected from nickel, zinc, gallium, silicon, and magnesium. The resin insulating layer is formed from glass particles and resin, the second conductor layer contains signal wiring, the first surface of the resin insulating layer is formed by the resin, and the inner wall surface of the opening is formed by the surfaces of the resin and the glass particles.

[0007] In the printed wiring board of the embodiment of the present invention, the seed layer is formed of an alloy containing copper, aluminum, and a specific metal. Aluminum has high ductility and high malleability. Therefore, the adhesion between the resin insulating layer and the seed layer is high. Aluminum is considered to be easily oxidized. The seed layer formed on the inner wall surface of the opening is considered to be bonded to the glass particles via oxygen in the glass particles forming the inner wall surface. The adhesion between the inner wall surface of the opening and the seed layer is considered to be high. Furthermore, in the printed wiring board of the embodiment of the present invention, the first surface of the resin insulating layer is formed of resin. The first surface of the resin insulating layer is formed only of resin. The first surface does not contain inorganic particles. It is possible to suppress the increase of the standard deviation of the relative permittivity of the portion near the first surface of the resin insulating layer. The relative permittivity of the first surface of the resin insulating layer is approximately the same. When a second conductor layer is formed on the first surface, it is possible to reduce the difference in propagation speed of electrical signals between the signal wirings contained in the second conductor layer. Noise is suppressed in the printed wiring board of the embodiment. A high-quality printed wiring board is provided. Attached Figure Description

[0008] Figure 1 This is a schematic cross-sectional view of a printed wiring board according to an embodiment.

[0009] Figure 2A This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0010] Figure 2B This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0011] Figure 2C This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0012] Figure 2D This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0013] Figure 2E This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0014] Figure 2F This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0015] Figure 2G This is a cross-sectional view schematically illustrating a method for manufacturing a printed wiring board according to an embodiment.

[0016] Label Explanation

[0017] 2: Printed wiring board; 4: Insulating layer; 10: First conductor layer; 20: Resin insulating layer; 22: First side; 24: Second side; 26: Opening; 27: Inner wall surface; 30: Second conductor layer; 30a: Seed layer; 30b: Electroplating layer; 31a: First layer; 31b: Second layer; 32: First signal wiring; 34: Second signal wiring; 36: Pad; 40: Via conductor; 80: Resin; 90: Inorganic particles. Detailed Implementation

[0018] [Implementation Method]

[0019] Figure 1 This is a cross-sectional view illustrating the printed wiring board 2 of the embodiment. (See attached image.) Figure 1 As shown, the printed wiring board 2 has an insulating layer 4, a first conductor layer 10, a resin insulating layer 20, a second conductor layer 30, and a via conductor 40.

[0020] The insulating layer 4 is formed using resin. The insulating layer 4 may also contain inorganic particles such as glass. The insulating layer 4 may also contain reinforcing materials such as glass cloth. The insulating layer 4 has a third surface 6 and a fourth surface 8 opposite to the third surface 6.

[0021] A first conductive layer 10 is formed on the third surface 6 of the insulating layer 4. The first conductive layer 10 includes signal wiring 12 and pads 14. Although not shown in the figure, the first conductive layer 10 also includes conductive circuitry other than the signal wiring 12 and pads 14. The first conductive layer 10 is primarily formed of copper. The first conductive layer 10 is formed from a seed layer 10a and an electroplated layer 10b on the seed layer 10a. The seed layer 10a is formed by sputtering. The seed layer 10a is formed from a first layer 11a on the third surface 6 and a second layer 11b on the first layer 11a. The first layer 11a is in contact with the insulating layer 4. The second layer 11b is not mandatory.

[0022] The first layer 11a is composed of an alloy containing copper, aluminum, and a specific metal. Examples of specific metals include nickel, zinc, gallium, silicon, and magnesium. The alloy preferably contains one, two, or three specific metals. The aluminum content in the alloy is 1.0 at% or more and 15.0 at% or less. An example of a specific metal is silicon. The content of the specific metal in the alloy is 0.5 at% or more and 10.0 at% or less. The first layer 11a may also contain impurities. Examples of impurities are oxygen and carbon. The first layer 11a may contain oxygen or carbon. The first layer 11a may contain both oxygen and carbon. In an embodiment, the alloy also contains carbon. The carbon content in the alloy is 50 ppm or less. The alloy also contains oxygen. The oxygen content in the alloy is 100 ppm or less. The values ​​of the contents of the above elements are examples. Among the elements forming the first layer 11a, copper is present in the largest amount. Next, aluminum is present in the largest amount. The amount of the specific metal is less than the amount of aluminum. Therefore, copper is the primary metal, aluminum is the first accessory metal, and a specific metal is the second accessory metal. The amount of impurities is less than the amount of the specific metal.

[0023] The second layer 11b is formed of copper. The copper content in the second layer 11b is 99.9 at% or more. Preferably, the copper content in the second layer 11b is 99.95 at% or more. The electroplated layer 10b is formed of copper. The copper content in the electroplated layer 10b is 99.9 at% or more. Preferably, the copper content in the electroplated layer 10b is 99.95 at% or more.

[0024] A resin insulating layer 20 is formed on the third surface 6 of the insulating layer 4 and the first conductor layer 10. The resin insulating layer 20 has a first surface 22 and a second surface 24 opposite to the first surface 22. An opening 26 is formed in the resin insulating layer 20 to expose the gasket 14. The resin insulating layer 20 is formed of resin 80 and a plurality of inorganic particles 90 dispersed within the resin 80. The resin 80 is an epoxy resin. Examples of the resin are thermosetting resins and photocurable resins. The inorganic particles 90 are glass particles. The inorganic particles 90 may also be alumina.

[0025] The first surface 22 of the resin insulating layer 20 is formed solely of resin 80. Inorganic particles 90 are not exposed from the first surface 22. The first surface 22 does not contain the surface of inorganic particles 90. No unevenness is formed on the first surface 22 of the resin insulating layer 20. The first surface 22 is not roughened. The first surface 22 is formed smoothly. On the other hand, the inorganic particles 90 are exposed on the inner wall surface 27 of the opening 26. The inner wall surface 27 of the opening 26 contains the surface of inorganic particles 90. The inner wall surface 27 of the opening 26 has unevenness. The inner wall surface 27 of the opening 26 is formed by the exposed surface of resin 80 and the exposed surface of inorganic particles 90.

[0026] The thickness T of the resin insulating layer 20 is more than twice the thickness of the second conductor layer 30. The thickness T of the resin insulating layer 20 is the distance between the first surface 22 and the upper surface of the first conductor layer 10.

[0027] A second conductor layer 30 is formed on the first surface 22 of the resin insulating layer 20. The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34, and pads 36. Although not shown in the figure, the second conductor layer 30 also includes conductor circuitry other than the first signal wiring 32, the second signal wiring 34, and the pads 36. The first signal wiring 32 and the second signal wiring 34 form paired wirings. The second conductor layer 30 is primarily formed of copper. The second conductor layer 30 is formed from a seed layer 30a and an electroplated layer 30b on the seed layer 30a. The seed layer 30a is formed by sputtering. The seed layer 30a is formed from a first layer 31a on the first surface 22 and a second layer 31b on the first layer 31a. The first layer 31a is in contact with the first surface 22. The second layer 31b is not mandatory.

[0028] The first layer 31a forming the second conductor layer 30 is the same as the first layer 11a forming the first conductor layer 10.

[0029] The second layer 31b forming the second conductor layer 30 is the same as the second layer 11b forming the first conductor layer 10. The electroplated layer 30b is formed of copper.

[0030] A via conductor 40 is formed within the opening 26. The via conductor 40 connects the first conductor layer 10 and the second conductor layer 30. Figure 1 In this circuit, the via conductor 40 connects the pad 14 and the solder pad 36. The via conductor 40 is formed from a seed layer 30a and an electroplated layer 30b on the seed layer 30a. The seed layer 30a forming the via conductor 40 and the seed layer 30a forming the second conductor layer 30 are common. The seed layer 30a forming the via conductor 40 is formed from a first layer 31a formed on the inner wall surface 27 of the opening 26 and on the pad 14 exposed from the opening 26, and a second layer 31b on the first layer 31a. The first layer 31a is in contact with the upper surface of the pad 14 and the inner wall surface 27.

[0031] [Method for manufacturing printed wiring board 2 according to the embodiment]

[0032] Figures 2A to 2G A method for manufacturing the printed wiring board 2 according to an embodiment is shown. Figures 2A to 2G It is a sectional view. Figure 2A An insulating layer 4 and a first conductive layer 10 formed on the third surface 6 of the insulating layer 4 are shown. The first conductive layer 10 is formed by a semi-additive process. A first layer 11a and a second layer 11b are formed by sputtering. The first layer 11a is formed of an alloy containing copper, aluminum, and a specific metal. Examples of the specific metal are silicon or nickel. The second layer 11b is formed of copper. An electroplated layer 10b is formed by electroplating. The electroplated layer 10b is formed of copper.

[0033] like Figure 2BAs shown, a resin insulating layer 20 and a protective film 50 are formed on the insulating layer 4 and the first conductor layer 10. The second surface 24 of the resin insulating layer 20 faces the third surface 6 of the insulating layer 4. The protective film 50 is formed on the first surface 22 of the resin insulating layer 20. The first surface 22 of the resin insulating layer 20 is formed solely of resin 80. Inorganic particles 90 are not exposed from the first surface 22. The first surface 22 does not contain the surface of inorganic particles 90. No irregularities are formed on the first surface 22 of the resin insulating layer 20.

[0034] The protective film 50 completely covers the first surface 22 of the resin insulating layer 20. An example of the protective film 50 is a film made of polyethylene terephthalate (PET). A release agent is formed between the protective film 50 and the resin insulating layer 20.

[0035] like Figure 2C As shown, a laser L is irradiated over the protective film 50. The laser L penetrates both the protective film 50 and the resin insulating layer 20, forming an opening 26 for a via conductor reaching the pad 14 of the first conductor layer 10. The laser L is, for example, a UV laser or a CO2 laser. The pad 14 is exposed through the opening 26. When the opening 26 is formed, the first surface 22 is covered by the protective film 50. Therefore, even if resin scatters when the opening 26 is formed, resin adhesion to the first surface 22 can be suppressed.

[0036] Next, the opening 26 is cleaned. By cleaning the opening 26, resin residue generated during its formation is removed. The cleaning of the opening 26 is performed using plasma; that is, the cleaning is performed using a dry process. The cleaning includes a resin residue removal treatment. Resin 80 is selectively removed using plasma. Plasma removes resin 80 more quickly than inorganic particles 90. The inner wall surface 27 of the opening 26 is roughened by plasma.

[0037] By cleaning the opening 26, inorganic particles 90 are exposed on the inner wall surface 27 of the opening 26. Figure 2C The inner wall surface 27 of opening 26 contains the surface of inorganic particles 90. Unevennesses are formed on the inner wall surface 27 of opening 26. On the other hand, the first surface 22 of resin insulating layer 20 is covered by protective film 50. The first surface 22 is unaffected by plasma. The first surface 22 is formed solely of resin 80. Inorganic particles 90 are not exposed from the first surface 22. The first surface 22 does not contain the surface of inorganic particles 90. No unevenness is formed on the first surface 22 of resin insulating layer 20. The first surface 22 is formed smoothly.

[0038] like Figure 2D As shown, the protective film 50 is removed from the resin insulating layer 20. After removing the protective film 50, the first surface 22 of the resin insulating layer 20 is not roughened.

[0039] like Figure 2EAs shown, a seed layer 30a is formed on the first surface 22 of the resin insulating layer 20. The seed layer 30a is formed by sputtering. The formation of the seed layer 30a is performed by a dry process. The seed layer 30a is also formed on the upper surface of the gasket 14 exposed from the opening 26 and the inner wall surface 27 of the opening 26. A first layer 31a is formed on the first surface 22 by sputtering. The first layer 31a is formed on the inner wall surface 27 exposed from the opening 26 and the gasket 14 by sputtering. A second layer 31b is formed on the first layer 31a by sputtering.

[0040] The first layer 31a of the seed layer 30a is formed of an alloy containing copper, aluminum, and silicon. Aluminum has high elongation and ductility. Therefore, the adhesion between the resin insulating layer 20 and the first layer 31a is high. It is believed that even if the resin insulating layer 20 expands or contracts, the aluminum-containing seed layer 30a can follow its expansion and contraction. Even if the first surface 22 is smooth, the seed layer 30a is difficult to peel off from the resin insulating layer 20. It is believed that aluminum is easily oxidized. It is believed that the first layer 31a formed on the inner wall surface 27 of the opening 26 is bonded to the inorganic particles 90 (glass particles) forming the inner wall surface 27 by oxygen. The first layer 31a is firmly bonded to the inner wall surface 27. The adhesion between the inner wall surface 27 of the opening 26 and the first layer 31a can be improved. The seed layer 30a is difficult to peel off from the inner wall surface 27.

[0041] like Figure 2F As shown, an anti-plating agent 60 is formed on the seed layer 30a. The anti-plating agent 60 has features for forming the first signal wiring 32, the second signal wiring 34, and the pads 36. Figure 1 ) opening.

[0042] like Figure 2G As shown, an electroplated layer 30b is formed on the seed layer 30a exposed from the resist 60. The electroplated layer 30b fills the opening 26. A first signal wiring 32, a second signal wiring 34, and a pad 36 are formed through the seed layer 30a and the electroplated layer 30b on the first surface 22. A second conductor layer 30 is formed. A via conductor 40 is formed using the seed layer 30a and the electroplated layer 30b within the opening 26. The via conductor 40 connects the pad 14 to the pad 36. The first signal wiring 32 and the second signal wiring 34 form a paired wiring.

[0043] Next, the resist 60 is removed. The seed layer 30a exposed from the electroplated layer 30b is removed. The second conductor layer 30 and the via conductor 40 are formed simultaneously. The printed wiring board 2 of the embodiment is obtained. Figure 1 ).

[0044] In the implementation of the printed wiring board 2 ( Figure 1In this embodiment, the first surface 22 of the resin insulating layer 20 is formed of resin 80. Inorganic particles 90 are not exposed on the first surface 22. No unevenness is formed on the first surface 22. This suppresses the increase in the standard deviation of the relative permittivity of the portion near the first surface 22 of the resin insulating layer 20. The relative permittivity of the first surface 22 does not change significantly depending on its position. Even if the first signal wiring 32 and the second signal wiring 34 are connected to the first surface 22, the difference in propagation speed of the electrical signals between the first signal wiring 32 and the second signal wiring 34 can be reduced. Therefore, noise is suppressed in the printed wiring board 2 of this embodiment. Even if a logic IC is mounted on the printed wiring board 2 of this embodiment, the data transmitted by the first signal wiring 32 and the data transmitted by the second signal wiring 34 arrive at the logic IC with almost no delay. Malfunctions of the logic IC can be suppressed. Even if the lengths of the first signal wiring 32 and the second signal wiring 34 are 5 mm or more, the difference in their propagation speeds can be reduced. Even if the lengths of the first signal wiring 32 and the second signal wiring 34 are 10 mm or more and 20 mm or less, malfunctions of the logic IC can be suppressed. Although not illustrated, the length of each side of the printed wiring board 2 is 50 mm or more. Preferably, the length of each side is 100 mm or more. Alternatively, the length of each side is 250 mm or less. A high-quality printed wiring board 2 is provided.

[0045] In the implementation of the printed wiring board 2 ( Figure 1 In this circuit, the thickness T of the resin insulating layer 20 is more than twice the thickness of the second conductor layer 30. It is assumed that when the printed wiring board 2 is subjected to thermal cycling, the stress applied between the inner wall surface 27 of the opening 26 and the via conductor 40 is greater than the stress applied between the first surface 22 and the second conductor layer 30. The inner wall surface 27 of the opening 26 has irregularities. Therefore, the adhesion strength between the inner wall surface 27 of the opening 26 and the via conductor 40 is higher than the adhesion strength between the first surface 22 and the second conductor layer 30. The via conductor 40 is difficult to peel off from the resin insulating layer 20. The second conductor layer 30 is also difficult to peel off from the resin insulating layer 20.

[0046] In the printed wiring board 2 of the embodiment, the seed layer 30a is formed by sputtering. Figure 2EThe particles forming the seed layer 30a collide with the first surface 22 approximately perpendicularly. Therefore, the adhesion strength between the first surface 22 and the seed layer 30a is high. On the other hand, the particles forming the seed layer 30a collide with the inner wall surface 27 of the opening 26 at an angle. The inner wall surface 27 of the opening 26 has irregularities. The inner wall surface 27 of the opening 26 includes exposed surfaces of glass particles. The seed layer 30a contains aluminum. Therefore, the adhesion strength between the seed layer 30a and the inner wall surface 27 of the opening 26 can be improved. The difference between the adhesion strength between the second conductor layer 30 and the first surface 22 and the adhesion strength between the via conductor 40 and the inner wall surface 27 of the opening 26 can be reduced. Stress is less likely to concentrate at the interface between the second conductor layer 30 and the first surface 22. Stress is less likely to concentrate at the interface between the via conductor 40 and the inner wall surface 27 of the opening 26. Even if the printed wiring board 2 is subjected to thermal shock, the via conductor 40 is difficult to peel off from the resin insulating layer 20. The second conductor layer 30 is difficult to peel off from the resin insulating layer 20. A high-quality printed wiring board 2 is provided.

[0047] [Another example of the implementation method 1]

[0048] In another embodiment 1, the alloy containing the first layers 11a and 31a forming the seed layers 10a and 30a contains at least one of nickel, zinc, gallium, silicon, and magnesium.

[0049] [Another example of the implementation method 2]

[0050] In another embodiment 2, the alloys forming the first layers 11a and 31a of the seed layers 10a and 30a do not contain carbon.

[0051] [Another example of the implementation method 3]

[0052] In another embodiment, 3, the alloys forming the first layers 11a and 31a of the seed layers 10a and 30a are oxygen-free.

Claims

1. A printed wiring board, comprising: First conductor layer; A resin insulating layer is formed on the first conductor layer, having an opening for a via conductor that exposes the first conductor layer, a first surface, and a second surface opposite to the first surface. A second conductor layer is formed on the first surface of the resin insulating layer; as well as A via conductor, formed within the opening, connects the first conductor layer to the second conductor layer. in, The second conductor layer and the via conductor are formed by a seed layer and an electroplated layer formed on the seed layer. The seed layer is formed by sputtering and is composed of an alloy containing copper, aluminum, and a specific metal, wherein the specific metal is at least one selected from nickel, zinc, gallium, silicon, and magnesium. The resin insulating layer is formed of glass particles and resin, and the second conductor layer contains signal wiring. The first surface of the resin insulating layer is formed of the resin. The inner wall of the opening is formed by the surfaces of the resin and the glass particles.

2. The printed wiring board according to claim 1, wherein, The signal wiring includes a pair of wirings formed by a first signal wiring and a second signal wiring.

3. The printed wiring board according to claim 1, wherein, The first surface does not contain the glass particles.

4. The printed wiring board according to claim 3, wherein, The first surface is formed solely of the resin.

5. The printed wiring board according to claim 3, wherein, The glass particles are not exposed from the first surface.

6. The printed wiring board according to claim 1, wherein, The specific metal contains silicon. The silicon content in the alloy is 0.5 at% or more and 10.0 at% or less.

7. The printed wiring board according to claim 1, wherein, The aluminum content in the alloy is above 1.0 at% and below 15.0 at%.

8. The printed wiring board according to claim 1, wherein, The alloy also contains carbon. The carbon content in the alloy is below 50 ppm.

9. The printed wiring board according to claim 1, wherein, The alloy also contains oxygen. The oxygen content in the alloy is below 100 ppm.

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