PCB (Printed Circuit Board) back drilling processing method

Abstract

The invention discloses a PCB (Printed Circuit Board) back drilling processing method, which comprises the step of performing back drilling from the front surface and / or the back surface of a PCB at the position of an electroplated through hole so as to disconnect a preset functional layer and the electroplated through hole. According to the invention, an etching mode is not adopted, and the electroplated through hole is disconnected from the ground source layer, the power source ground layer and the signal ground layer by using the back drilling technology, so that the copper bridge size of the power source ground layer and the signal ground layer is wider, more signals can take grounding as reference, and high-power transmission is realized.

Description

TECHNICAL FIELD

[0001] The application relates to a PCB back drilling processing method and belongs to the technical field of PCB processing. BACKGROUND

[0002] Printed circuit boards are composed of power supply layers, power supply ground layers, signal layers and signal ground layers, etc. These layers have their own functions in the circuit board structure. Anti-pads are added on the power supply layers, power supply ground layers and signal layers to disconnect these layers from the through holes. This occupies space and, with the reduction of the density of ball grid array (BGA), causes the signal ground layer to be reduced, thereby affecting the integrity of the signal; at the same time, it causes the reduction of the width of the power supply copper bridge corresponding to the power supply layer, thereby affecting the current carrying capacity of the power supply between the copper bridges. In the printed circuit board, the signal ground layer and the power supply ground layer are crucial to the signal and power capacity.

[0003] In high-speed PCB design, shielding sensitive circuits from electromagnetic interference (EMI) is also another key role of the signal ground layer. If the signal ground layer reduces or incompletely covers the signal lines of the corresponding signal layer, it will cause EMI to exceed the standard. SUMMARY

[0004] The application aims to overcome the deficiencies in the prior art and provide a PCB back drilling processing method, which disconnects the electroplated through holes from the ground source layer, the power supply layer and the signal layer by using the back drilling technology, so that the copper bridge size of the power supply ground layer and the signal ground layer is wider, more signals can be referenced to the ground, and high power transmission is achieved.

[0005] To achieve the above-mentioned purpose, the application adopts the following technical scheme:

[0006] The application provides a PCB back drilling processing method, which comprises the following steps:

[0007] At the position of the electroplated through hole, back drilling is performed from the front and / or back of the PCB to disconnect the preset functional layer from the electroplated through hole.

[0008] Further, the electroplated through hole comprises a signal hole, a shielding hole and a power supply hole.

[0009] Further, at the position of the signal hole, back drilling is performed from the front of the PCB to disconnect the signal hole from the signal ground layer, the power supply layer and the power supply ground layer above the signal layer.

[0010] Further, the signal ground layer, the power supply layer and the power supply ground layer are located at a preset thickness distance above the signal layer in the range of 0.5-1.5 mil, as represented by the following formula:

[0011] ;

[0012] wherein, represents the length of the back-drilling stub, represents the preset safety distance of the back-drilling stub to the metal closest to the front surface of the substrate medium layer, represents the maximum tolerance of back-drilling, and the back-drilling depth is - .

[0013] Further, the shielding hole includes a shielding hole one provided with a solder ball and a shielding hole two not provided with a solder ball.

[0014] Further, at the position of the shielding hole one, back-drilling is performed from the front surface of the PCB;

[0015] wherein the first functional layer connected with the hole wall of the shielding hole one in the functional layer downward from the front surface of the PCB is defined as layer, the number of functional layers between the layer and the front surface of the PCB is ≥ 3 layers, and the thickness of the layer above is satisfies the formula , wherein, represents the length of the back-drilling stub, represents the preset safety distance of the back-drilling stub to the metal closest to the front surface of the substrate medium layer, represents the thickness of the layer from the front surface of the PCB to layer, represents the maximum tolerance of back-drilling;

[0016] the back-drilling depth is - .

[0017] Further, the first functional layer connected with the hole wall of the shielding hole two in the functional layer downward from the front surface of the PCB is defined as layer, the number of functional layers between the layer and the front surface of the PCB is ≥ 3 layers, and the thickness of the layer above is satisfies the formula when, at the position of the shielding hole two, back-drilling is performed from the front surface of the PCB;

[0018] wherein, represents the length of the back-drilling stub, represents the preset safety distance of the back-drilling stub to the metal closest to the front surface of the substrate medium layer, represents the thickness of the layer from the front surface of the PCB to layer, represents the maximum tolerance of back-drilling; the back-drilling depth is .

[0019] Further, define the first functional layer connected with the hole wall of the second shielding hole from the functional layer upward the back of the PCB as layer, the number of functional layers between the layer and the back of the PCB is ≥ 3 layers, and the thickness of the layer above is satisfy the formula at the position of the second shielding hole, back drilling is performed from the back of the PCB;

[0020] In the formula, represents the length value of the back drilling stub, represents the preset safety distance of the back drilling stub to the metal closest to the front of the substrate medium layer, represents the thickness of the layer above the PCB front, represents the maximum tolerance of back drilling; the back drilling depth is - .

[0021] Further, at the position of the power hole, back drilling is performed from the front of the PCB to disconnect the signal hole from the signal ground layer above the signal layer, the power layer, and the power ground layer.

[0022] Further, the signal ground layer, the power layer, and the power ground layer are located within a preset thickness distance mil range above the signal layer, satisfy the formula:

[0023] ;

[0024] In the formula, represents the length value of the back drilling stub, represents the preset safety distance of the back drilling stub to the metal closest to the front of the substrate medium layer, represents the maximum tolerance of back drilling, and the back drilling depth is - .

[0025] Compared with the prior art, the present application has the following beneficial effects:

[0026] The present application provides a PCB back drilling processing method, by performing back drilling from the front and / or back of the PCB at the position of the plated through hole to disconnect the preset functional layer from the plated through hole. The present application uses back drilling technology to disconnect the plated through hole from the ground layer, the power ground layer, and the signal ground layer, etc. functional layer, which can make the copper bridge size of the power ground layer and the signal ground layer wider, so that more signals can be referenced to the ground, and high power transmission is realized. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 ​is a PCB sectional view of the prior art in which etching is used to disconnect the electroplated via, the ground source layer, the power source layer and the signal ground layer;

[0028] Figure 2 is a PCB sectional view of a PCB back drilling processing method provided by an embodiment of the present application;

[0029] Figure 3 is a structural schematic diagram of a signal hole of a PCB back drilling processing method provided by an embodiment of the present application;

[0030] Figure 4 is a structural schematic diagram of a shielding hole one with solder balls of a PCB back drilling processing method provided by an embodiment of the present application;

[0031] Figure 5 is a single-side shielding structural schematic diagram of a shielding hole two of a PCB back drilling processing method provided by an embodiment of the present application;

[0032] Figure 6 is a two-side shielding structural schematic diagram of a shielding hole two of a PCB back drilling processing method provided by an embodiment of the present application;

[0033] Figure 7 is a structural schematic diagram of a power source hole of a PCB back drilling processing method provided by an embodiment of the present application;

[0034] Figure 8 is a comparison diagram of a back drilling hole diameter of a PCB back drilling processing method provided by an embodiment of the present application and an anti-pad diameter of the prior art.

[0035] Figure 9 is a signal ground layer width change diagram of a PCB back drilling processing method provided by an embodiment of the present application (A represents a signal ground layer width of the prior art, and B represents a signal ground layer width based on the back drilling processing method of the embodiment);

[0036] Figure 10 is a metal copper amount change diagram of a PCB back drilling processing method provided by an embodiment of the present application (A represents a metal copper amount of the prior art, and B represents a metal copper amount based on the back drilling processing method of the embodiment).

[0037] In the figure, A, power source layer; B, power source ground layer; C, signal layer; D, signal ground layer; E, electroplated via; P1, signal hole; P2, shielding hole; P3, power source hole; F, signal line; G, anti-pad; J, substrate dielectric layer; K, back drilling hole; L, power source copper bridge; M, ground layer copper bridge. DETAILED DESCRIPTION

[0038] The application will be further described below with reference to the drawings. The following examples are only used to more clearly illustrate the technical solutions of the application, and cannot be used to limit the protection scope of the application.

[0039] In the description of the present application, it needs to be understood that the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, which are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second" and the like are only for description purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" and the like can be explicitly or implicitly included one or more. In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0040] In the description of the present application, it needs to be understood that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integrally connected; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, or the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood through specific circumstances.

[0041] Embodiment 1, this embodiment introduces a PCB back drilling processing method, comprising the following steps:

[0042] S100, at the position of the electroplated through hole, the ball grid array (BGA) region of the PCB is designed and analyzed to define the characteristics of the BGA inner hole, the BGA inner hole includes signal holes P1, shielding holes P2 and power holes P3.

[0043] S200, at the position of the electroplated through hole, back drilling is performed from the front and / or back of the PCB to disconnect the pre-set functional layer from the electroplated through hole.

[0044] Specifically, corresponding to different electroplated through holes, i.e. signal holes P1, shielding holes P2 and power holes P3, the processing methods are also different, which are as follows:

[0045] Please refer to Figure 3 At the position of the signal hole, back drilling is performed from the front of the PCB to disconnect the signal hole from the signal layer above the signal ground layer, the power layer and the power ground layer.

[0046] The signal ground layer, power layer, and the preset thickness distance between the power ground layer and the signal layer. Within the range of mil, As shown in the following formula:

[0047] ;

[0048] In the formula, This indicates the length of the back-drilled residual pile. This indicates a pre-defined safety distance between the back drill bit residue and the metal on the nearest substrate dielectric layer front side. This safety distance is used to prevent short circuits caused by high current. This indicates the maximum tolerance for back drilling, and the back drilling depth = - .

[0049] In this embodiment, please refer to Figure 4 , Figure 5 and Figure 6 The shielding holes include shielding hole one with solder balls and shielding hole two without solder balls.

[0050] Specifically, at the location of shielding hole one, back drilling is performed from the front of the PCB. The first functional layer connecting the front of the PCB to the hole wall of shielding hole one is defined as... layer, The number of functional layers between the first layer and the front of the PCB is ≥3, and Thickness above layer Satisfy the formula In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the metal on the nearest front side of the substrate dielectric layer. Indicates the front side of the PCB to The thickness of the layer, Indicates the maximum tolerance for back drilling; back drilling depth = .

[0051] Please see Figure 4 For those with solder ball shielding holes (P2-2) Above the floor The signal ground layer, power layer, and power ground layer corresponding to mil can be processed using this back-drilling method. All layers below this layer will retain their original design and will not be processed using this back-drilling method.

[0052] At the location of shielding hole two, two shielding designs are implemented: a single-sided shielding design where back-drilling is performed only from the reverse side, and a double-sided shielding design where back-drilling is performed from both the front and back sides. The signal ground layer, power layer, and power ground layer that were originally designed with anti-pads are now directly treated with solid copper plating, achieving a zero distance between the back-drilled hole and the metal area.

[0053] Specifically, back-drilling is performed from the front of the PCB, defining the first functional layer connected to the wall of the shielding hole 2 from the front of the PCB. layer, The number of functional layers between the front and back of the PCB is ≥3, and Thickness above layer Satisfy the formula At that time, back drilling was performed from the front of the PCB at the location of shielding hole two.

[0054] In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the metal on the nearest front side of the substrate dielectric layer. Indicates the front side of the PCB to The thickness of the layer, Indicates the maximum tolerance for back drilling; back drilling depth = .

[0055] Define the first functional layer connected to the wall of the shielding hole 1 from the back of the PCB as... layer, The number of functional layers between the first layer and the back of the PCB is ≥3, and Thickness above layer Satisfy the formula At that time, back drilling was performed from the back of the PCB at the location of shielding hole two.

[0056] In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the metal on the nearest front side of the substrate dielectric layer. Indicates the front side of the PCB to The thickness of the layer, Indicates the maximum tolerance for back drilling; back drilling depth = - .

[0057] Please see Figure 5 and Figure 6 For the solderless shielding holes (P2-1 / P2-3) in Xmil or above The functional layers corresponding to Xmil below, including the signal ground layer, power layer, and power ground layer, can be drilled using the back-drilling method of this invention. , and ~ The layers between the signal layer and the power layer remain original design, and the back drilling method is not used. The signal layer, the power layer and the power ground layer through which the corresponding back drilling hole passes are directly replaced by solid copper to realize the distance between the back drilling hole and the metal copper of 0.

[0058] Please refer to Figure 7 , the signal hole and the signal layer above the signal layer, the power layer and the power ground layer are disconnected by back drilling from the front of the PCB at the position of the power hole.

[0059] The signal layer, the power layer and the power ground layer are located above the signal layer at a preset thickness distance mil range, as represented by the following formula:

[0060] ;

[0061] In the formula, represents the length value of the back drilling residual stub, represents the preset safety distance of the back drilling residual stub to the metal of the front of the closest substrate medium layer.

[0062] Wherein, the corresponding layer connected from the first hole wall of the front of the PCB is >= 3 layers, and the thickness above the corresponding layer is If the following expression is satisfied, the back drilling hole can be increased:

[0063] .

[0064] The signal layer, the power layer and the power ground layer through which the corresponding back drilling hole passes are directly replaced by solid copper to realize the distance between the back drilling hole and the metal copper of 0, and the back drilling depth is - .

[0065] Please refer to Figure 1 and Figure 2 ​​Where H represents the distance between the plated through hole and the signal line F; I represents the distance between the signal lines F. The present application does not use etching, but uses back drilling technology to disconnect the plated through hole E, the ground source layer A, the power ground layer B and the signal ground layer D. This technology can make the copper bridge size of the power ground layer and the signal ground layer wider, so that more signals can be referenced to the ground, and high power transmission is realized. Fig 2-2 shows the PCB processed by the method of the present embodiment, in which the power copper bridge L and the power ground copper bridge M are directly connected to the back drilling hole K, and the size is obviously larger than the copper bridge size of the power layer and the ground layer formed by copper etching of the power copper bridge L and the ground copper bridge M of Fig 2-1.

[0066] It should be noted that in the BGA back drilling structure of the present embodiment, there are different structure designs, that is, whether the material for plugging the hole is filled in the plated through hole and the back drilling through hole. The type of whether to fill and the type of the filling material have a great influence on the safe distance of the back drilling residual stub to the flat metal. In the present embodiment, the filling material types shown in the following table can be used:

[0067] Type Electroplated via (E) Back-drilling (K) 1 No blockage No blockage 2 Resin Resin 3 Resin No blockage 4 Ink Ink 5 Ink No blockage

[0068] Where the trend of the relationship between the type of different filling materials and the corresponding safe distance length is type2<type3<type1<type5<type4.

[0069] After applying the PCB back drilling processing method provided by the present embodiment, the PCB product has the following advantages:

[0070] 1. The residual copper rate of the power layer is improved.

[0071] 1) Please refer to Figure 8 Taking a 2*2 pitch of 1mm BGA as an example, the Anti-PAD in the prior art directly uses DHS (drilling diameter) + R1, R1 is the neutral value of the alignment and the safe distance, for example, R1 is 0.4mm, DHS is 0.2mm, then:

[0072] The BGA power area S = BGA length * BGA width - Anti-PAD area * hole number = 2*2-3.14*[(0.2+0.4) / 2]^2*4 = 2.8696mm 2 .

[0073] 2) Using the method provided by the present application, the Anti-PAD is filled with solid copper, and the material is opened by back drilling, the back drilling diameter = DHS + R2, R2 is the back drilling alignment value, for example, R2 is 0.1524mm, and for example, DHS is 0.2mm, then:

[0074] BGA power area S = BGA length * width - back drilling area * hole number = 2 * 2 - 3.14 * (0.2 + 0.1524)2*4 = 3.6100mm 2 .

[0075] 3) Throughflow area increase = (S of the present invention - S of prior art) / S of prior art = (3.6100 - 2.8696) / 2.8696 * 100% = 25.80%, that is, the present invention can increase 25.80% of the throughflow area in the BGA area, and the smaller the BGA pitch, the greater the increase of the throughflow area.

[0076] 4) Wherein R is a technical capability value of the PCB length, which can be different due to the factory equipment, process flow and parameters.

[0077] 2, Signal ground layer width increase

[0078] Please refer to Figure 9 , due to the adoption of back drilling instead of Anti-PAD design, the signal ground layer width will increase, as described in 1) above, the corresponding signal ground layer width will increase: 0.4mm - 0.1524mm = 0.2476mm, which can better cover the corresponding signal layer, as shown in Fig. 4-2B, the increase of the ground signal is to increase the coverage and allow process changes (relative to Fig. 4-2A) to produce a better impedance reference. More ground signals can make the signal response clearer. The improved ground signal can minimize electromagnetic interference (EMI), which is beneficial to sensitive circuits.

[0079] 3, Improvement of PCB heat dissipation.

[0080] High-power chips generate a large amount of heat during operation, and if the heat cannot be dissipated in time, it will cause the machine to shut down. The thermal conductivity of copper is 401 W / (m.k), which is an excellent heat sink, while the thermal conductivity of the PCB substrate is only about 1 W / (m.k). The increase of copper can effectively increase the heat dissipation of the PCB, thereby improving the performance of the product. Please refer to Figure 10 , the increase of the power layer and the ground layer copper bridge can make more power transmitted through the BGA copper bridge. This change can make those products that cannot work normally due to excessive consumption of the power layer and only due to overheating during operation (Fig. 4-3A) become a feasible solution (Fig. 4-3B).

[0081] Example 2

[0082] The present embodiment provides a PCB processed by the PCB back drilling processing method provided in the above embodiment 1.

[0083] It should be pointed out finally that the above embodiments are only used to illustrate the technical solutions of the present disclosure but not to limit the protection scope thereof, and although the present disclosure is described in detail with reference to the above embodiments, it should be understood by those skilled in the art that the specific embodiments of the present disclosure can be changed, modified or replaced by equivalents after reading the present disclosure, but these changes, modifications or equivalent replacements are within the protection scope of the disclosed claims.

Claims

1. A method for back-drilling PCB fabrication, characterized in that, include: At the location of the electroplated via, back drilling is performed from the front and / or back of the PCB to disconnect the pre-defined functional layer from the electroplated via.

2. The PCB back-drilling processing method according to claim 1, characterized in that, The electroplated through-holes include signal holes, shielding holes, and power supply holes.

3. The PCB back-drilling processing method according to claim 2, characterized in that, At the location of the signal hole, back-drill from the front of the PCB to disconnect the signal hole from the signal ground layer, power layer, and power ground layer above the signal layer.

4. The PCB back-drilling processing method according to claim 3, characterized in that, The signal ground layer, power layer, and the predetermined thickness distance of the power ground layer above the signal layer are described. Within the range of mil, As shown in the following formula: ； In the formula, This indicates the length of the back-drilled residual pile. This indicates the preset safe distance between the back drill residue and the metal on the front of the PCB; This indicates the maximum tolerance for back drilling, and the back drilling depth = - .

5. The PCB back-drilling processing method according to claim 1, characterized in that, The shielding hole includes a shielding hole one with solder balls and a shielding hole two without solder balls.

6. The PCB back-drilling method according to claim 5, characterized in that, At the location of shielding hole one, back drilling is performed from the front of the PCB; Among them, the first functional layer that connects to the wall of the shielding hole one from the functional layers descending from the front of the PCB is defined as... layer, The number of functional layers between the first layer and the front of the PCB is ≥3, and Thickness above layer Satisfy the formula In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the nearest front metal of the substrate dielectric layer. Indicates the front side of the PCB to The thickness of the layer, Indicates the maximum tolerance for back drilling; back drilling depth = - .

7. The PCB back-drilling processing method according to claim 5, characterized in that, Define the first functional layer connected to the wall of shielding via two among the functional layers from the front of the PCB downwards as... layer, The number of functional layers between the first layer and the front of the PCB is ≥3, and Thickness above layer Satisfy the formula At that time, back drilling was performed from the front of the PCB at the location of shielding hole two; In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the metal on the nearest front side of the substrate dielectric layer. Indicates the front side of the PCB to The thickness of the layer, Indicates the maximum tolerance for back drilling; back drilling depth = - .

8. The PCB back-drilling processing method according to claim 5, characterized in that, Define the first functional layer connected to the wall of shielding via two from the back of the PCB upwards as... layer, The number of functional layers between the first layer and the back of the PCB is ≥3, and Thickness above layer Satisfy the formula At that time, back drilling was performed from the back of the PCB at the location of shielding hole two; In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the metal on the nearest front side of the substrate dielectric layer. Indicates the front side of the PCB to The thickness of the layer, Indicates the maximum tolerance for back drilling; back drilling depth = - .

9. The PCB back-drilling method according to claim 1, characterized in that, At the location of the power hole, back-drill from the front of the PCB to disconnect the signal hole from the signal ground layer, power layer, and power ground layer above the signal layer.

10. The PCB back-drilling method according to claim 9, characterized in that, The signal ground layer, power layer, and the predetermined thickness distance of the power ground layer above the signal layer are described. Within the range of mil, Satisfy the following formula: ； In the formula, This indicates the length of the back-drilled residual pile. This indicates the pre-defined safe distance between the back drill bit residue and the metal on the nearest front side of the substrate dielectric layer. This indicates the maximum tolerance for back drilling, and the back drilling depth = - .

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