Modeling method of aging model

Abstract

The invention discloses a modeling method for an aging model, and the method comprises the steps: S1, selecting a target transistor, and selecting at least one model parameter from all model parameters as a selected parameter P; s2, establishing an aging model aiming at the to-be-determined coefficient of the selected parameter; s3, collecting test data of the target transistor, wherein the test data comprises threshold voltage related data and source drain current related data; s4, based on the aging model of the coefficient to be determined, according to the test data, respectively extracting correlation coefficients in a time index nn1, a stress condition correlation coefficient ns1 and a degradation coefficient nd1 corresponding to the selected parameter P; and S5, obtaining the aging model of which the coefficient is determined. By means of the aging model established through the method, the parameter aging trend of the transistor can be visually seen.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and specifically to a modeling method for an aging model. Background Technology

[0002] In the semiconductor manufacturing industry, reliability is related to product yield and manufacturing cost. Therefore, reliability assessment of semiconductor devices (such as metal-oxide-semiconductor field-effect transistors (MOSFETs, hereinafter referred to as "MOS"), such as the assessment of hot carrier injection (HCI) effect and negative bias temperature instability (NBTI), has become an important consideration in the design and manufacturing of semiconductor devices.

[0003] The currently used parameter aging models cannot intuitively show the trend of parameter aging; in addition, the aging models basically adopt the parameter form that can be binning, which is not conducive to intuitive analysis of parameter aging. Summary of the Invention

[0004] This application provides a modeling method for an aging model, which can intuitively show the aging trend of parameters.

[0005] This application provides a modeling method for an aging model, including: S1: Select the target transistor, and choose at least one model parameter from all model parameters as the selected parameter P; S2: Establish an aging model for the coefficients to be determined for the selected parameters: ; Among them, the The initial value of the selected parameter P at time t=0 for the target transistor when no electrical stress is applied. To select the parameter P after aging, ns1 is the stress condition correlation coefficient, nd1 is the degradation coefficient, and the... A is a scaling function used to describe the selected parameter P of the target transistor as a function of the channel length L and the channel width W, where A is a preset aging amplitude coefficient, t is the stress time, and nn1 is the time exponent. S3: Collect test data of the target transistor, including threshold voltage related data and source-drain current related data; S4: Based on the aging model with the coefficients to be determined, and according to the test data, extract the time exponent nn1, stress condition correlation coefficient ns1, and degradation coefficient nd1 corresponding to the selected parameter P, respectively. The correlation coefficient in; S5: Obtain the aging model with determined coefficients.

[0006] In some embodiments, the model parameters include threshold voltage Vth related parameters and source / drain current Ids related parameters.

[0007] In some embodiments, the threshold voltage Vth related parameters include, but are not limited to, Vth0 and Voff, where Vth0 is the threshold voltage of the zero-body voltage channel device and Voff is the process drift of the threshold voltage.

[0008] In some embodiments, the source-drain current Ids related parameters include, but are not limited to, U0 and Vsat, wherein U0 is the low field mobility and Vsat is the channel carrier saturation velocity at standard temperature.

[0009] In some embodiments, S4 includes: S41: Taking the logarithm of both ends of the aging model for the coefficients to be determined, we get: ; Wherein, InB is a constant, and the and The relationship is linear; S42: Based on the aging model with the coefficient to be determined, extract the time exponent nn1 corresponding to the selected parameter P according to the test data; S43: Based on the aging model with the coefficients to be determined, extract the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P according to the test data; S44: Based on the aging model with the coefficients to be determined, and according to the test data, extract the coefficients corresponding to the selected parameter P. The correlation coefficient in.

[0010] In some embodiments, S42 includes: Based on the relationship between the attenuation degree of the selected parameter P in the test data and time under a fixed gate-source voltage stress, the time exponent nn1 corresponding to the selected parameter P is extracted.

[0011] In some embodiments, S43 includes: When the selected parameter P is a threshold voltage Vth related parameter, based on the relationship between the value and change of the selected parameter P in the test data and time under a fixed gate-source voltage stress, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P are extracted. When the selected parameter P is a parameter related to the source-drain current Ids, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to Vsat are extracted based on the relationship between the decay of the saturation current and time when the target transistor is operating in the saturation region under a fixed gate-source voltage stress. The stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to U0 are extracted based on the relationship between the decay of the saturation current and time when the target transistor is operating in the linear region under a fixed gate-source voltage stress.

[0012] In some embodiments, the , wherein , , , , That is, the aforementioned The correlation coefficient in, the , , , , The scaling factors are, in order: the first-order scaling factor of the channel length L, the first-order scaling factor of the channel width W, the cross-term scaling factor of the channel length L and the channel width W, the second-order scaling factor of the channel length L, and the second-order scaling factor of the channel width W.

[0013] In some embodiments, S44 includes: extracting the value corresponding to the selected parameter P based on the relationship between the attenuation of the source-drain current and time under a specific channel width and channel length. The correlation coefficient in.

[0014] In some embodiments, after step S5, the method further includes: S6: Verify the reliability of the aging model with determined coefficients.

[0015] The technical solution of this application has at least the following advantages: 1. On the one hand, an aging model for the coefficients to be determined for selected parameters is established, and a scaling function is introduced into the aging model. On the other hand, a method for obtaining the determined values ​​of the coefficients to be determined based on test data is given, thus providing a highly reliable aging model that helps to intuitively see the parameter aging trend of transistor devices. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of an aging model modeling method provided in an exemplary embodiment of this application.

[0018] Figure 2 This is a graph provided by an exemplary embodiment of the present application, which illustrates the relationship between the attenuation of a selected parameter P and time under a fixed gate-source voltage stress.

[0019] Figure 3 This is an exemplary embodiment of the present application, which provides a graph showing the relationship between the value and change of a selected parameter P in the test data under a fixed gate-source voltage stress and time.

[0020] Figure 4 This is an exemplary embodiment of the present application, which provides a graph showing the relationship between the decay of the saturation current and time when the target transistor is operating in the saturation region under a fixed gate-source voltage stress.

[0021] Figure 5 This is an exemplary embodiment of the present application, which provides a graph showing the relationship between the decay of the saturation current and time when the target transistor is operating in the linear region under a fixed gate-source voltage stress.

[0022] Figure 6 This is a graph provided by an exemplary embodiment of the present application, which illustrates the change in the decay of the source and drain current of a target transistor operating in the saturation region over time, given a specific channel width and channel length.

[0023] Figure 7 This is a graph provided by an exemplary embodiment of the present application, which illustrates the change in the decay of the source and drain current of a target transistor operating in the linear region over time, given a specific channel width and channel length.

[0024] Figure 8 This is a schematic diagram provided by an exemplary embodiment of the present application for comparing the transfer characteristic curves obtained from actual testing and the transfer characteristic curves obtained from simulation testing.

[0025] Figure 9 This is a schematic diagram provided by an exemplary embodiment of the present application for comparing the output characteristic curves obtained from actual testing and the output characteristic curves obtained from simulation testing. Detailed Implementation

[0026] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0028] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0029] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0030] This application provides a modeling method for an aging model, which is mainly used for aging prediction of MOS transistor devices. (Reference) Figure 1 The method includes: S1: Select the target transistor and choose at least one model parameter from all model parameters as the selected parameter P.

[0031] For example, to perform aging prediction as required, a specified type of transistor is selected as the target transistor, and the model parameter to be used for aging prediction is selected from all model parameters as the selected parameter P.

[0032] Furthermore, the model parameters mentioned above may include threshold voltage Vth related parameters and source / drain current Ids related parameters.

[0033] Furthermore, the threshold voltage Vth related parameters include, but are not limited to, Vth0 and Voff, where Vth0 is the threshold voltage of the zero-body voltage channel device and Voff is the process drift of the threshold voltage.

[0034] Furthermore, the source-drain current Ids related parameters include, but are not limited to, U0 and Vsat, where U0 is the low field mobility and Vsat is the channel carrier saturation velocity at standard temperature.

[0035] S2: Establish an aging model for the coefficients to be determined for the selected parameters: .

[0036] in, The initial value of the selected parameter P at time t=0 when no electrical stress is applied to the target transistor. Here, parameter P is the selected parameter value after aging, ns1 is the stress condition correlation coefficient, and nd1 is the degradation coefficient. A is a scaling function used to describe the selected parameter P of the target transistor as a function of the channel length L and the channel width W, where A is a preset aging amplitude coefficient, t is the stress time, and nn1 is the time exponent.

[0037] S3: Collect test data for the target transistor, including threshold voltage-related data and source-drain current-related data.

[0038] For example, electrical tests are performed on several target transistors, and test data of the target transistors are collected. The channel dimensions of different target transistors may differ, and the test data may include threshold voltage-related data and source-drain current-related data.

[0039] S4: Based on the aging model with undetermined coefficients, extract the time exponent nn1, stress condition correlation coefficient ns1, and degradation coefficient nd1 corresponding to the selected parameter P according to the test data. The correlation coefficient in.

[0040] For example, by analyzing the test data and substituting the test data into the aging model with coefficients to be determined, the time exponent nn1, stress condition correlation coefficient ns1, and degradation coefficient nd1 corresponding to the selected parameter P can be extracted respectively. The correlation coefficient in.

[0041] Furthermore, this step may include the following processing: S41: Taking the logarithm of both sides of the aging model with known coefficients, we get: ; Where InB is a constant, and The relationship is linear.

[0042] S42: Based on the aging model with undetermined coefficients, extract the time exponent nn1 corresponding to the selected parameter P according to the test data.

[0043] Furthermore, this step may include: Based on the relationship between the attenuation degree of the selected parameter P in the test data and time under a fixed gate-source voltage stress, the time exponent nn1 corresponding to the selected parameter P is extracted.

[0044] For example, the test data includes the relationship between the attenuation of a selected parameter P and time under a fixed gate-source voltage stress. Figure 2 As shown, the horizontal axis represents time, and the vertical axis represents the attenuation degree of the selected parameter P, under the test conditions of constant trench length L, trench width W, temperature T, and drain-source voltage. Figure 2 The three curves in the figure, from top to bottom, represent the attenuation trend of the selected parameter P over time under fixed gate-source voltages V0, V1, and V2. By calculating the slope of these curves, the time exponent nn1 corresponding to the selected parameter P can be obtained.

[0045] S43: Based on the aging model with undetermined coefficients, extract the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P according to the test data.

[0046] Furthermore, this step may include the following processing procedures: When the selected parameter P is a parameter related to the threshold voltage Vth, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P are extracted based on the relationship between the value and change of the selected parameter P in the test data under a fixed gate-source voltage stress and time.

[0047] For example, when the selected parameter P is a threshold voltage Vth related parameter, such as the threshold voltage Vth0 of a zero-body voltage channel device, based on the relationship between the value and change of the selected parameter P in the test data under a fixed gate-source voltage stress and time, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P are extracted, such as... Figure 3 As shown. In Figure 3 In the graph, the horizontal axis represents time, and the vertical axis represents the threshold voltage Vth, under test conditions where the trench length L, trench width W, temperature T, and drain-source voltage remain constant. Figure 3 The two curves, from top to bottom, represent the variation of the threshold voltage Vth over time under fixed gate-source voltages V0 and V1, respectively. Through analysis of... Figure 3 The analysis of the curve will Figure 3By substituting the specific coordinates of the curve into the aging model, the corresponding stress condition correlation coefficient ns1 and degradation coefficient nd1 can be obtained.

[0048] When parameter P is selected as the source-drain current Ids related parameter, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to Vsat can be extracted based on the relationship between the decay of the saturation current and time when the target transistor is operating in the saturation region under a fixed gate-source voltage stress. Similarly, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to U0 can be extracted based on the relationship between the decay of the saturation current and time when the target transistor is operating in the linear region under a fixed gate-source voltage stress.

[0049] For example, when parameter P is selected as a parameter related to the source-drain current Ids, it can be based on the relationship between the decay of the saturation current and time when the target transistor is operating in the saturation region under a fixed gate-source voltage stress (e.g., Figure 4 (As shown) Extract the stress condition correlation coefficient ns1 and degradation coefficient nd1 of Vsat, based on the relationship between the decay of the saturation current and time when the target transistor is operating in the linear region under a fixed gate-source voltage stress (e.g.) Figure 5 As shown, the stress condition correlation coefficient ns1 and degradation coefficient nd1 of U0 are extracted.

[0050] S44: Based on the aging model with undetermined coefficients, extract the coefficients corresponding to the selected parameter P from the test data. The correlation coefficient in.

[0051] For example, ,in, , , , , That is The correlation coefficient in, and , , , , The scaling factors are, in order: the first-order scaling factor of the channel length L, the first-order scaling factor of the channel width W, the cross-term scaling factor of the channel length L and the channel width W, the second-order scaling factor of the channel length L, and the second-order scaling factor of the channel width W.

[0052] Furthermore, this step may include the following processes: Based on the relationship between the attenuation of source and drain currents over time under specific channel widths and lengths, the parameters corresponding to the selected parameter P are extracted. The correlation coefficient in.

[0053] For example, under test conditions where the gate-source voltage, source-drain voltage, and test temperature remain constant, refer to Figure 6 This diagram illustrates the decay of source-drain current over time for several target transistors operating in the saturation region under specific channel widths and lengths. The topmost curve represents the decay over time under maximum channel width and length; the middle curve represents the decay over time under maximum channel width and median channel length; and the bottom curve represents the decay over time under maximum channel width and minimum channel length. (Refer to...) Figure 7 This paper presents curves showing the decay of source-drain current over time for target transistors operating in the linear region under specific channel widths and lengths. The top curve represents the decay over time under the conditions of maximum channel width and minimum channel length; the middle curve represents the decay over time under the conditions of maximum channel width and median channel length; and the bottom curve represents the decay over time under the conditions of maximum channel width and maximum channel length. Through analysis of the above... Figure 6 and Figure 7 By analyzing the mid-curve and combining it with the aging model, we can obtain... The correlation coefficient in.

[0054] S5: Obtain an aging model with definite coefficients.

[0055] For example, the time exponent nn1, stress condition correlation coefficient ns1, degradation coefficient nd1, and other parameters extracted in the above steps are used as examples. By substituting the correlation coefficients into the aging model with the coefficients to be determined, the aging model with the coefficients to be determined can be obtained.

[0056] Furthermore, after step S5, the following processing may also be included: S6: Verify the reliability of the aging model with determined coefficients.

[0057] For example, a deterministic aging model can be used to simulate current-voltage characteristics, and the simulation results can be compared with actual test data to verify the reliability of the deterministic aging model. (Refer to...) Figure 8 It shows the curves of drain current versus gate voltage obtained from actual testing under given stress conditions (i.e., transfer characteristic curves) and the curves of drain current versus gate voltage obtained from simulation, for reference. Figure 9It shows the curve of drain current versus drain voltage obtained by actual testing under given stress conditions (i.e., output characteristic curve) and the curve of drain current versus drain voltage obtained by simulation. It can be found that the actual test results and simulation results basically coincide.

[0058] The present application provides a modeling method for an aging model. On the one hand, it establishes an aging model for the coefficients to be determined for selected parameters and introduces a scaling function into the aging model. On the other hand, it provides a method for obtaining the determined values ​​of the coefficients to be determined based on test data, thereby providing a highly reliable aging model that helps to intuitively see the parameter aging trend of transistor devices.

[0059] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A modeling method of an aging model, characterized by, include: S1: Select the target transistor, and choose at least one model parameter from all model parameters as the selected parameter P; S2: Establish an aging model for the coefficients to be determined for the selected parameters: ； Among them, the The initial value of the selected parameter P at time t=0 for the target transistor when no electrical stress is applied. To select the parameter P after aging, ns1 is the stress condition correlation coefficient, nd1 is the degradation coefficient, and the... A is a scaling function used to describe the selected parameter P of the target transistor as a function of the channel length L and the channel width W, where A is a preset aging amplitude coefficient, t is the stress time, and nn1 is the time exponent. S3: Collect test data of the target transistor, including threshold voltage related data and source-drain current related data; S4: Based on the aging model with the coefficients to be determined, and according to the test data, extract the time exponent nn1, stress condition correlation coefficient ns1, and degradation coefficient nd1 corresponding to the selected parameter P, respectively. The correlation coefficient in; S5: Obtain the aging model with determined coefficients.

2. The modeling method for the aging model according to claim 1, characterized in that, The model parameters include threshold voltage Vth related parameters and source / drain current Ids related parameters.

3. The modeling method for the aging model according to claim 2, characterized in that, The threshold voltage Vth related parameters include, but are not limited to, Vth0 and Voff, where Vth0 is the threshold voltage of the zero-body voltage channel device and Voff is the process drift of the threshold voltage.

4. The modeling method for the aging model according to claim 2, characterized in that, The source-drain current Ids related parameters include, but are not limited to, U0 and Vsat, wherein U0 is the low field mobility and Vsat is the channel carrier saturation velocity at standard temperature.

5. The modeling method for the aging model according to any one of claims 3 or 4, characterized in that, S4 includes: S41: Taking the logarithm of both ends of the aging model for the coefficients to be determined, we get: ； Wherein, InB is a constant, and the and The relationship is linear; S42: Based on the aging model with the coefficient to be determined, extract the time exponent nn1 corresponding to the selected parameter P according to the test data; S43: Based on the aging model with the coefficients to be determined, extract the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P according to the test data; S44: Based on the aging model with the coefficients to be determined, and according to the test data, extract the coefficients corresponding to the selected parameter P. The correlation coefficient in.

6. The modeling method for the aging model according to claim 5, characterized in that, S42 includes: Based on the relationship between the attenuation degree of the selected parameter P in the test data and time under a fixed gate-source voltage stress, the time exponent nn1 corresponding to the selected parameter P is extracted.

7. The modeling method for the aging model according to claim 5, characterized in that, S43 includes: When the selected parameter P is a threshold voltage Vth related parameter, based on the relationship between the value and change of the selected parameter P in the test data and time under a fixed gate-source voltage stress, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to the selected parameter P are extracted. When the selected parameter P is a parameter related to the source-drain current Ids, the stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to Vsat are extracted based on the relationship between the decay of the saturation current and time when the target transistor is operating in the saturation region under a fixed gate-source voltage stress. The stress condition correlation coefficient ns1 and degradation coefficient nd1 corresponding to U0 are extracted based on the relationship between the decay of the saturation current and time when the target transistor is operating in the linear region under a fixed gate-source voltage stress.

8. The modeling method for the aging model according to claim 5, characterized in that: The , wherein , , , , That is, the aforementioned The correlation coefficient in, the , , , , The scaling factors are, in order: the first-order scaling factor of the channel length L, the first-order scaling factor of the channel width W, the cross-term scaling factor of the channel length L and the channel width W, the second-order scaling factor of the channel length L, and the second-order scaling factor of the channel width W.

9. The modeling method for the aging model according to claim 8, characterized in that: S44 includes: based on the relationship between the attenuation of source and drain current over time under specific channel width and channel length, extracting the value corresponding to the selected parameter P. The correlation coefficient in.

10. The modeling method for the aging model according to claim 1, characterized in that, After step S5, the method further includes: S6: Verify the reliability of the aging model with determined coefficients.

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