Layout data file generation method and computer program product

Abstract

The invention discloses a layout data file generation method and a computer program product, and relates to the technical field of semiconductor manufacturing. The method comprises the following steps: firstly, acquiring target layout information of a target layout, and extracting at least one category of target layout elements from a plurality of categories of layout elements contained in the target layout information; secondly, aiming at each category, constructing a numerical value identifier mapping table containing the target layout element of the category and the unique numerical value identifier corresponding to each target layout element in the category; and finally, based on the numerical value identification mapping table of each category and the target layout information, generating a numerical layout data file of the target layout. Namely, for each target layout element in the target layout information of the target layout, the unique numerical identifier in one-to-one mapping with the target layout element is determined in the category to which the target layout element belongs, so that the numerical layout data file is generated, and the storage cost and the transmission cost of the target layout are reduced.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor manufacturing, and particularly relates to a layout data file generation method and a computer program product. BACKGROUND

[0002] With the continuous evolution of semiconductor integrated circuit technology to the 7nm and below nodes, the complexity of chip design increases exponentially, resulting in the amount of layout information data of a system on chip (SoC) breaking through the TB level. Taking a 7nm process chip as an example, the volume of an Open Artwork System Interchange Specification (OASIS) format layout file of an open layout system is as high as 11GB, and the complete reading time exceeds 30 minutes.

[0003] At present, the generation of a layout data file generally adopts a string description method, that is, the string identifiers of layout elements, process layers and the like in a target layout are determined, and based on these string identifiers, a layout data file of the target layout is generated. However, the string identifier is usually composed of multiple characters, and the information of the layout elements, process layers and the like is repeatedly recorded in the layout data file. Such repeated recording results in a large amount of data of the layout data file generated by the string description, high storage and transmission costs, and affects the overall efficiency of the chip design, verification and manufacturing process. SUMMARY

[0004] The embodiments of the present application provide a layout data file generation method and a computer program product, which can make the generated layout data file have a small amount of data, low storage and transmission costs, and improve the overall efficiency of the chip design, verification and manufacturing process.

[0005] In a first aspect, the embodiments of the present application provide a layout data file generation method, comprising:

[0006] obtaining target layout information of a target layout, and extracting target layout elements of at least one category from a plurality of categories of layout elements contained in the target layout information;

[0007] respectively constructing a numerical identifier mapping table of the target layout elements of each category, each numerical identifier mapping table comprising each target layout element of a category and a unique numerical identifier corresponding to the target layout element;

[0008] generating a numerical layout data file of the target layout according to the numerical identifier mapping table of each category and the target layout information.

[0009] In a second aspect, the embodiments of the present application provide a layout data file generation device, comprising:

[0010] an element obtaining module configured to obtain target layout information of a target layout, and extract target layout elements of at least one category from a plurality of categories of layout elements contained in the target layout information;

[0011] a mapping table constructing module configured to construct a numerical value and identification mapping table of the target layout elements of each category respectively, each of the numerical value and identification mapping tables comprising each of the target layout elements of a category and a unique numerical value and identification corresponding to the target layout element;

[0012] a file generating module configured to generate a numerical layout data file of the target layout according to the numerical value and identification mapping table of each category and the target layout information.

[0013] In a third aspect, an electronic device is provided. The device includes a memory and a program or instructions stored on the memory and executable on a processor. The program or instructions, when executed by the processor, implement the layout data file generation method according to any one of the aspects of the embodiments of the present application.

[0014] In a fourth aspect, a readable storage medium is provided. The readable storage medium stores a program or instructions. The program or instructions, when executed by a processor, implement the layout data file generation method according to any one of the aspects of the embodiments of the present application.

[0015] In a fifth aspect, a computer program product is provided. The instructions in the computer program product, when executed by a processor of an electronic device, cause the electronic device to perform the layout data file generation method according to any one of the aspects of the embodiments of the present application.

[0016] The technical solutions provided by the embodiments of the present application at least have the following beneficial effects:

[0017] In the layout data file generation method provided by the embodiments of the present application, first, target layout information of a target layout is obtained, and target layout elements of at least one category are extracted from a plurality of categories of layout elements contained in the target layout information. Second, for each category, a numerical value and identification mapping table containing the target layout elements of the category and the unique numerical value and identification corresponding to each of the target layout elements in the category is constructed. Finally, based on the numerical value and identification mapping table of each category and the target layout information, a numerical layout data file of the target layout is generated. That is, for each target layout element in the target layout information of the target layout, a unique numerical value and identification that is one-to-one mapped with the target layout element is determined in the category to which the target layout element belongs, so as to generate a numerical layout data file, thereby reducing the storage cost and transmission cost of the target layout. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly introduced as follows, and other drawings can also be obtained by those of ordinary skill in the art without creative labor on the premise of not paying the creative labor.

[0019] Figure 1 is a flow diagram of a layout data file generation method provided by an embodiment of the present application;

[0020] Figure 2 is a structure diagram of a multi-element numerical identifier provided by an embodiment of the present application;

[0021] Figure 3a is a schematic diagram of a target layout provided by an embodiment of the present application;

[0022] Figure 3b is a schematic diagram of a target layout unit provided by an embodiment of the present application;

[0023] Figure 4 is a structure diagram of a layout data file generation device provided by an embodiment of the present application;

[0024] Figure 5 is a schematic diagram of a layout data file generation device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0025] The features and exemplary embodiments of various aspects of the present application will be described in detail below, in order to make the purposes, technical solutions and advantages of the present application more clear and apparent, the present application will be further described in detail below in combination with the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, but not to limit the present application. The present application can be implemented without some of these specific details by those skilled in the art. The following description of the embodiments is only to provide a better understanding of the present application by showing examples of the present application.

[0026] It is to be noted that, in the present document, relational terms such as first and second, and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0027] It is to be noted that, in the present document, relational terms such as first and second, and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises", "comprising", or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0028] First, the technical terms related to one or more embodiments of the present application are explained.

[0029] The semiconductor integrated circuit process refers to a series of process technologies used for manufacturing semiconductor integrated circuits, including photolithography, etching, doping, deposition, etc.

[0030] System on Chip (SoC) is a semiconductor device that integrates a complete computing system on a single chip.

[0031] Target layout information refers to data describing physical structures and electrical characteristics in semiconductor integrated circuit design.

[0032] Target layout elements refer to basic units used to describe and identify chip physical structures and electrical characteristics in layout information.

[0033] Target layout cells refer to basic modules or functional blocks with specific functions in the layout.

[0034] Layout cell names refer to identifiers that are descriptive and used to uniquely identify individual layout cells.

[0035] Process layers refer to layers of different material layers or process steps in the chip manufacturing process.

[0036] Process Layer Name refers to an identifier with a descriptive meaning and used to uniquely identify a single process layer.

[0037] Polygon refers to a polygon in a layout design used to represent various physical structures for defining the physical structure of a chip.

[0038] Polygon Attribute Information refers to attribute information used to describe and define a polygon, such as polygon type, vertex coordinates, and other geometric attributes.

[0039] Instantiation refers to the process of placing a layout unit into a higher-level layout.

[0040] Instance refers to the specific implementation or copy of a layout unit in a deeper-level layout.

[0041] Layout Data File refers to a file containing all information of units, layers, electrical connections, and other information in a chip layout design.

[0042] Secondly, as the semiconductor integrated circuit process continues to evolve to 7nm and below nodes, the complexity of chip design increases exponentially, resulting in the amount of layout information data of system on chip (SoC) breaking through the TB level. Taking a 7nm process chip as an example, the volume of its OASIS format layout file is as high as 11GB, and the time for complete reading is more than 30 minutes.

[0043] Currently, the generation of layout data files generally adopts the method of string description, that is, the string identifier of the layout unit, process layer and other information in the target layout is determined, and based on these string identifiers, the layout data file of the target layout is generated. However, the string identifier is usually composed of multiple characters, and in the layout data file, the information of layout unit, process layer and other information is repeatedly recorded. This repeated recording results in a large amount of data in the layout data file generated by string description, high storage and transmission cost, and affects the overall efficiency of chip design, verification and manufacturing process.

[0044] To solve the above technical problems, the application provides a layout data file generation method and a computer program product. In the layout data file generation method provided in the embodiment of the application, first, target layout information of a target layout is obtained, and target layout elements of at least one category are extracted from a plurality of categories of layout elements contained in the target layout information. Second, the target layout elements of each category are numerically mapped to construct, for each category, a numerical identification mapping table containing the target layout elements of the category and the unique numerical identification of each target layout element in the category. Finally, based on the numerical identification mapping table of each category and the target layout information, a numerical layout data file of the target layout is generated. That is, the application determines the numerical identification mapped one-to-one with the target layout elements for the target layout elements repeatedly recorded in the layout data file to generate the numerical layout data file, thereby reducing the storage cost and transmission cost of the target layout.

[0045] For example, the layout data file generation method provided in the embodiment of the application can be applied to the production line of a semiconductor manufacturing enterprise to optimize key manufacturing processes such as mask making, photolithography, and etching, thereby improving efficiency and chip quality. In actual application, first, target layout information of a target layout is obtained, and target layout elements of at least one category are extracted from a plurality of categories of layout elements contained in the target layout information. Second, the target layout elements of each category are numerically mapped to construct, for each category, a numerical identification mapping table containing the target layout elements of the category and the unique numerical identification of each target layout element in the category. Finally, based on the numerical identification mapping table of each category and the target layout information, a numerical layout data file of the target layout is generated. That is, the application determines the numerical identification mapped one-to-one with the target layout elements for the target layout elements repeatedly recorded in the layout data file to generate the numerical layout data file, thereby reducing the storage cost and transmission cost of the target layout.

[0046] Taking the photolithography process as an example, the photolithography process is a key step of accurately transferring a design pattern to a silicon wafer. Through the layout data file generation method provided in the application, the data transmission time from the design database to the photolithography equipment can be reduced, thereby improving the photolithography efficiency by improving the analysis efficiency of the photolithography equipment. Therefore, through the layout data file generation method provided in the embodiment of the application, the storage and transmission cost of the layout data file can be effectively reduced, thereby improving the overall efficiency of the chip design, verification, and manufacturing process.

[0047] It should be noted that the application scenarios described in the embodiments of the present application are used to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that with the emergence of new application scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems. The layout data file generation method provided by the embodiments of the present application can be applied to various application scenarios that need to map and store layout information.

[0048] The layout data file generation method provided by the embodiments of the present application is introduced below. In actual application, the execution subject of the layout data file generation method of the embodiments of the present application can be a terminal device, such as a desktop computer, a notebook computer, etc., or a remote device similar to a server. Of course, the embodiments of the present application can also use an execution subject in the form of presentation software, such as a client, a software program, etc. installed in a terminal device. The specific type of the execution subject corresponding to the technical solutions provided by the embodiments of the present application is not strictly limited here, and can be flexibly selected according to actual application scenarios and actual needs.

[0049] The specific embodiments of the layout data file generation method, device, electronic device, storage medium and computer program product provided by the embodiments of the present application are introduced below. First, a layout data file generation method is introduced.

[0050] Figure 1 The flowchart of the layout data file generation method provided by the embodiments of the present application is shown in FIG. 1. Figure 1 As shown in FIG. 1, the method includes steps S100 to S102.

[0051] S100: Obtain target layout information of a target layout, and extract target layout elements of at least one category from a plurality of categories of layout elements contained in the target layout information.

[0052] In one or more embodiments of the present application, in order to construct a numerical identification mapping table of each category in the subsequent steps. In this step, the present application needs to obtain the target layout information of the target layout, and extract the target layout elements from the target layout information.

[0053] Specifically, the present application needs to obtain the target layout information of the target layout, and extract target layout elements of at least one category from a plurality of categories of layout elements contained in the target layout information.

[0054] It should be noted that the layout information is usually data stored in a GDSII file, LEF / DEF file or other format, which is used to describe the physical structure and electrical characteristics in the layout design. In the present application, the categories to which the target layout elements belong are not limited, such as the layout cell name, process layer name and graphic attribute information. In the present application, the specific way of extracting the layout elements from the target layout information is not limited, and can be set according to actual needs, such as by a layout analysis tool, to parse and extract the target layout elements of at least one category of the layout cell name, process layer name and graphic attribute information from the target layout information. For example, if part of the target layout information of the target layout is used to describe a static random access memory (SRAM) with an additional function module, the following is obtained:

[0055] “CELL_NAME:SRAM128x8_With_Extra_Features

[0056] LAYER:Metal1

[0057] SHAPE_COORDS_ATTRIBUTE:RECTANGLE_0,0 50000,0 50000,10000 0,10000_POWER_GRID

[0058] CELL_NAME:NAND2X1

[0059] LAYER:Via3

[0060] SHAPE_COORDS_ATTRIBUTE:RECTANGLE_1000,1000 1500,1000 1500,15001000,1500_VDD_VIA”

[0061] In the target layout information, "CELL_NAME" refers to the layout cell name, "LAYER" refers to the process layer, and "SHAPE_COORDS_ATTRIBUTE" is used to describe the field of the graphic attribute information, indicating the graphic type, vertex coordinates and other geometric properties of the graphic, and the accompanying attributes (such as functional attributes); the layout cell name is "SRAM128x8_With_Extra_Features", which contains geometric graphics and attributes on multiple process layers, and in the layout cell name, "SRAM128x8" indicates that the storage array structure is a static random access memory with a size of 128*8, and "With_Extra_Features" indicates that the static random access memory contains additional functional modules; the layout cell name is "NAND2X1", which contains a NAND logic gate with two inputs and one output, and in the layout cell name, "NAND" indicates an AND gate, "2" indicates that there are two input ports, and "X1" indicates that the driving strength is 1 times the standard driving. In the target layout information, two graphics are described, one is a rectangular graphic on the Metal 1 layer, which is used for power grid; and one is a rectangular graphic on the Via 3 layer, which is used for connecting the VDD power supply. The process layer name is "Metal1", which refers to the Metal 1 layer, which is usually used for global power wiring or signal wiring, and the process layer name is "Via3", which refers to the Via 3 layer, which is used for vertical connection between different metal layers. The via is a conductive via hole used to connect different layers in multi-layer wiring.

[0062] First graphic: In the graphic attribute information of "SHAPE_COORDS_ATTRIBUTE: RECTANGLE_0,0 50000,0 50000,10000 0,10000_POWER_GRID", "SHAPE: RECTANGLE" indicates that the graphic is a rectangle; "COORDS: 0,0 50000,0 50000,10000 0,10000" is the four vertex coordinates of the graphic, the width of the graphic is 50000 units, and the height is 10000 units; "ATTRIBUTE: POWER_GRID" is the functional attribute of the graphic, indicating that the graphic is part of the power grid, and is used to provide power for the layout cell (SRAM).

[0063] The second graph: in the graph attribute information of "RECTANGLE_1000, 1000 1500, 1000 1500, 1500 1000, 1500_VDD_VIA", "SHAPE: RECTANGLE" indicates that the graph is a rectangle; "COORDS: 1000, 1000 1500, 1000 1500, 1500 1000, 1500" is the four vertex coordinates of the graph, the width of the graph is 500 units, and the height is 500 units; "ATTRIBUTE: VDD_VIA" is the functional attribute of the graph, indicating that the graph is a via for connecting the VDD power supply.

[0064] S101: respectively constructing a numerical identification mapping table of each category of the target layout element, each numerical identification mapping table including each target layout element of a category and a unique numerical identification corresponding to the target layout element.

[0065] In one or more embodiments of the present application, in order to generate the numerical layout data file of the target layout in the subsequent step, the present application needs to construct a numerical identification mapping table of each category of the target layout element based on the target layout elements extracted in step S100 in this step.

[0066] Specifically, the present application constructs a numerical identification mapping table for each category of the target layout element based on the target layout element of the category, and includes the target layout element of the category and the unique numerical identification corresponding to each target layout element in the category in the numerical identification mapping table.

[0067] It should be noted that the present application does not limit the manner of determining the numerical identification of the target layout element in each category, which can be set according to actual needs, such as assigning a unique numerical identification to each target layout element of the category according to the order of extraction from the target layout information for each category. The uniqueness of the unique numerical identification means that each target layout element and its numerical identification in the numerical identification mapping table of a single category have a one-to-one mapping relationship. This way of separately setting the numerical identification mapping table of a single category can reduce the complexity of global management and facilitate subsequent maintenance and update. Meanwhile, the present application does not limit the manner of assigning a numerical identification to each target layout element in each category, which can be set according to actual needs, such as assigning the numerical identification "1, 2, 3, …, n" to each target layout element in the category in turn according to the extraction order in step S100 for each category.

[0068] Continuing with the above example, for the target layout elements of the category of layout cell name, in the above example the layout cell name includes only "SRAM128x8_With_Extra_Features" and "NAND2X1", then according to the extraction order, the unique numerical identifier of "SRAM128x8_With_Extra_Features" is determined as 1, and the unique numerical identifier of "NAND2X1" is determined as 2. For the target layout elements of the category of process layer name, in the above example the process layer name includes "Metal1" and "Via3", then according to the extraction order, the unique numerical identifier of "Metal1" is determined as 1, and the unique numerical identifier of "Via3" is determined as 2. For the target layout elements of the category of graphic attribute information, in the above example the graphic attribute information includes the shape, vertex coordinates, and functional attribute of two graphics, etc., then according to the extraction order, the unique numerical identifier of "RECTANGLE_0,0 50000,050000,10000 0,10000_POWER_GRID" is determined as 1, and the unique numerical identifier of "RECTANGLE_1000,1000 1500,1000 1500,1500 1000,1500_VDD_VIA" is determined as 2.

[0069] Then, based on the target layout elements of the example, the numerical identifier mapping table of each category is determined, which can refer to Table 1, Table 2, and Table 3, as shown below:

[0070] Table 1

[0071] Layout cell name Unique numeric identifier SRAM 128x8_With_Extra_Features 1 NAND 2X1 2

[0072] Table 2

[0073] Process layer name Unique numeric identifier Metal 1 1 Via 3 2

[0074] Table 3

[0075]

[0076] Of course, the above Table 1, Table 2, and Table 3 are only used to illustrate the numerical identifier mapping table, and do not constitute any limitation on the specific form of the numerical identifier mapping table constructed in the present application. In the present application, the specific form of the numerical identifier mapping table is not limited, and can be set according to actual needs, such as a dictionary form of the mapping table, that is, storing the one-to-one mapping relationship between the target layout elements of each category and the numerical identifier in the form of key-value pairs, or a database table, etc.

[0077] S102: generating the numerical layout data file of the target layout according to the numerical identifier mapping table of each category and the target layout information.

[0078] In one or more embodiments of the present application, a numerical identification mapping table of each category and target layout information are used to generate a numerical layout data file of the target layout.

[0079] Specifically, a numerical identification mapping table of each category and target layout information are used to generate a numerical layout data file of the target layout.

[0080] It should be noted that the present application does not limit the specific format of the numerical layout data file, which can be set according to actual needs, such as database storage, OASIS format, etc. The present application does not limit the specific way of generating a numerical layout data file, such as using a numerical identification of each category to directly replace the original layout cell name, process layer name and graphic attribute information.

[0081] Using the above example, the layout cell name is "SRAM128x8_With_Extra_Features", which has a string length of 27 characters, each character occupying 1 byte, so the layout cell name occupies 27 bytes. When the layout data file contains a large number of similar long strings, the storage cost will increase significantly. However, the present application uses a unique numerical identification 1 to replace the layout cell name "SRAM128x8_With_Extra_Features" to reduce storage costs. Assuming that an integer type (4 bytes) numerical identification is used to represent the layout cell name, the storage cost of the layout cell name is reduced by 23 bytes, and the 4-byte numerical identification can express an integer range of 0~(2^32-1), that is, it can be used to express 2^32 different layout cell names, which is enough to meet the needs of a single complex chip.

[0082] In the above layout data file generation method, the present application determines a numerical identification that is one-to-one mapped with each target layout element, such as the layout cell name, process layer name and graphic attribute information in the layout data file, to generate a numerical layout data file, thereby reducing the storage and transmission costs of the target layout. That is, the present application essentially replaces the layout cell name that may appear multiple times, the process layer name that may appear multiple times, and the byte-long graphic attribute information (which may include vertex coordinates, graphic attributes, etc.) with a numerical identification that occupies fewer bytes, to reduce the storage and transmission costs of the layout data file.

[0083] In step S101, it is mentioned that a unique numerical identifier can be assigned to each target layout element of each category according to the extraction order, but the extraction order can be transformed due to the reading order, processing method, etc. of the target layout information, resulting in that the numerical identifiers are not assigned in a unified standard, the order is poor, and the subsequent search complexity is high. Therefore, in one or more embodiments of the present application, the present application can assign a first numerical identifier to each layout cell name belonging to the layout cell name category according to the alphabetical order of the layout cell name, then assign according to the size order of the layer number for the process layer name, and assign according to the size order of the distance between the figure and the preset origin for the figure attribute information, as follows:

[0084] Firstly, in the case that the target layout element includes a layout cell name, the present application can assign a first numerical identifier to each layout cell name in turn according to the alphabetical order of the layout cell name, and then construct a numerical identifier mapping table of the layout cell name according to the one-to-one mapping relationship between each layout cell name and its first numerical identifier.

[0085] Secondly, in the case that the target layout element includes a process layer name, the present application can assign a second numerical identifier to each process layer name in turn according to the size order of the layer number, and then construct a numerical identifier mapping table of the process layer name according to the one-to-one mapping relationship between each process layer name and its second numerical identifier. The layer number refers to the digital number used to identify the process layer in the design of the target layout.

[0086] Finally, in the case that the target layout element includes figure attribute information, the present application can assign a third numerical identifier to each figure attribute information in turn according to the size order of the distance between the figure and the preset origin, and then construct a numerical identifier mapping table of the figure attribute information according to the one-to-one mapping relationship between each figure attribute information and its third numerical identifier.

[0087] In addition, since the target layout cell can be instantiated multiple times, but the position, rotation angle or attribute of each instance can be different. Therefore, an instance descriptor needs to be set to distinguish different instances of a single target layout cell, and in one or more embodiments of the present application, a fourth numerical identifier can be assigned to multiple instances of the layout cell after instantiation for each target layout cell, further reducing the storage and transmission cost of the target layout element, as follows:

[0088] Firstly, the present application takes the target layout cell with non-unique instantiation times as a first layout cell.

[0089] Secondly, the present application can assign a one-to-one mapping fourth numerical identifier to each instance of the first layout cell after instantiation for each first layout cell.

[0090] Finally, this application can construct a numerical identifier mapping table for the names of the layout units based on the one-to-one mapping relationship between each layout unit name and its first numerical identifier, and the one-to-one mapping relationship between each instance of the first layout unit after instantiation and its fourth numerical identifier.

[0091] In step S102, this application can generate a multi-dimensional numerical identifier corresponding to each target map information based on the unique numerical identifiers of various target map elements contained in the target map information, and generate a numerical map data file based on the multi-dimensional numerical identifiers, as follows:

[0092] First, for each target map information, this application needs to obtain the unique numerical identifier of each target map element in the target map information from the numerical identifier mapping table of each category.

[0093] Secondly, this application requires, for each target map information, to determine the multivariate numerical identifier of the target map information based on the unique numerical identifier of each target map element in the target map information.

[0094] Finally, this application generates a numerical map data file of the target map based on the target map information and the multivariate numerical identifier of the target map information.

[0095] It should be noted that this application does not limit the specific method of determining the multivariate numerical identifiers. The method can be set according to actual needs, such as using a multivariate array composed of the unique numerical identifiers of each target layout element in the target layout information as the multivariate numerical identifiers. Since there are hierarchical relationships between layout units, instances, process layers, and graphics in the target layout, in order to improve the structure and interpretability of the multivariate numerical identifiers, in one or more embodiments of this application, the numerical identifiers can be combined according to preset rules to form a structured multivariate numerical identifier, as follows:

[0096] This application can, for each target layout information, where the target layout information includes layout unit name, instance, process layer name and graphic attribute information, concatenate the unique numerical identifier of the layout unit name and the unique numerical identifier of the instance to obtain a concatenated numerical identifier. Then, the concatenated numerical identifier, the unique numerical identifier of the process layer name and the unique numerical identifier of the graphic attribute information are combined according to a preset combination order to obtain a multi-dimensional numerical identifier for the target layout information.

[0097] like Figure 2 The diagram shown is a structural schematic of a multi-dimensional numerical identifier provided in one embodiment of this application. Figure 2 The multi-dimensional numerical identifier 200 shown is composed of numerical identifiers corresponding to the unique identifier layout unit 201, the process layer 202, and the graphic 203, respectively.

[0098] It should be noted that in the present application, the specific form of the multi-element value identifier is not limited, and can be set according to actual needs, such as "(spliced value identifier, unique value identifier of process layer name, unique value identifier of graphic attribute information)", or "spliced value identifier-unique value identifier of process layer name-unique value identifier of graphic attribute information". The unique value identifier of the layout cell name and the unique value identifier of the instance are spliced to form a spliced value identifier, which uniquely identifies the cell and the instance after the instantiation of the cell. Therefore, the spliced value identifier needs to ensure that it does not coincide with other first value identifiers of layout cell names, and ensure the uniqueness of the value identifier. Of course, in the present application, the specific way of determining the uniqueness between the spliced value identifier and the first value identifier is not limited, such as when determining the fourth value identifier, traversing the value identifier mapping table of the layout cell name, determining the existing first value identifier, avoiding the coincidence between the spliced value identifier after the splicing of the new fourth value identifier and the first value identifier, and ensuring the uniqueness of the spliced value identifier determined based on the first value identifier and the fourth value identifier. However, the time cost of traversing the value identifier mapping table is high, which will lead to a decrease in the efficiency of generating the layout data file.

[0099] Based on this, in order to ensure the uniqueness of the spliced value identifier and the generation efficiency of the layout data file, in one or more embodiments of the present application, first, the present application can determine the instance identification bit number according to the number of layout cell names and the number of instances after the instantiation of the first layout cell. Second, the present application can assign an initial value to each instance after the instantiation of the first layout cell according to the natural order of the value. Finally, the present application can supplement the length of the initial value of each instance after the instantiation of the first layout cell to the instance identification bit number through the pre-zero padding formatting operation, to obtain the fourth value identifier of the instance.

[0100] It should be noted that in the present application, the order of assigning the initial value is not limited, such as random assignment or according to the order of referring to the first layout cell. In addition, the present application uses the following example to illustrate the principle of ensuring the uniqueness of the subsequent spliced value identifier and the first value identifier based on the instance identification bit number and the pre-zero padding. For example, if the number of layout cell names is N and the number of instances after the instantiation of the first layout cell is M. Assuming that N is 11 and M is 2, the initial values of the instances corresponding to the first layout cell are 1 and 2, and if the first value identifier of the first layout cell is 1, then the spliced value identifier obtained by direct splicing is 11 and 12, which coincides with the first value identifier 11 of the target layout cell, and cannot ensure uniqueness.

[0101] This application determines the instance identifier bit length based on N and M. Specifically, based on N (2 bits for 11-bit instances) and M (1 bit for 2-bit instances), the instance identifier bit length is determined to be at least 2 bits. If the instance identifier bit length is 2 bits, a leading zero-padding formatting operation is used to supplement the length of the initial value of the instance to the instance identifier bit length, resulting in fourth value identifiers 01 and 02. These are then concatenated with the first value identifier 1, resulting in 101 and 102. Since the first value identifier has 2 bits, the values ​​101 and 102 cannot be achieved, thus ensuring the uniqueness of the concatenated value identifiers. Of course, if only ensuring the uniqueness of the concatenated value identifiers is required, the instance identifier bit length can be greater than or equal to the number of bits in the name and the number of instances. However, to reduce storage and transmission costs, the instance identifier bit length is generally chosen to be the largest of the number of bits in the name and the number of instances.

[0102] like Figure 3a The diagram shown is a schematic representation of a target layout provided in one embodiment of this application. Figure 3a The target layout 300 shown contains 7 target layout units, including one top-level unit "TOP" and six sub-units. The layout unit names include: "TOP" 301, "CELL A" 302, "CELL B" 303, "CELL C", "CELL D" 304, "CELL E" 305, and "CELL F" 306. The first numerical identifier of each layout unit name can be determined sequentially according to the alphabetical order of the layout unit names: 0 for "TOP", 1 for "CELL A", 2 for "CELL B", 3 for "CELL C", 4 for "CELL D", 5 for "CELL E", and 6 for "CELL F". In the target layout of this diagram, the layout cell named "CELL A" is instantiated twice. To distinguish between these two instances, the fourth numerical identifier of each instance of "CELL A" can be determined according to the order in which "CELL A" is referenced. Specifically, the fourth numerical identifier corresponding to the instance of "TOP" referencing "CELL A" is set to 1, and the fourth numerical identifier corresponding to the instance of "CELL B" referencing "CELL A" is set to 2. Therefore, the concatenation numerical identifier corresponding to "CELL A" at the second level is 11, and the concatenation numerical identifier corresponding to "CELL A" at the third level is 12.

[0103] like Figure 3b The diagram shown is a schematic representation of a target layout unit provided in one embodiment of this application. Figure 3bIn the layout design of the shown "CELL A", different fill patterns represent different process layers, and the figures represent layout areas involved in different process layers. Assuming that the preset origin is the lower-left vertex of the layout design, then according to the size order of the distance between the figures and the preset origin, the third numerical identifier corresponding to the leftmost figure can be 1. If the process layer to which the leftmost figure belongs corresponds to a second numerical identifier of 2, then the multi-element numerical identifier of the leftmost figure can be "11-2-1" or "12-2-1".

[0104] Since the layout unit, the process layer, and the figure are not completely independent, that is, the figure is a geometric object in the layout unit, each figure needs to indicate the process layer to which it belongs, that is, the layout unit defines the figure, the figure belongs to the process layer, and the process layer is the process attribute used by the figure in the chip design or manufacturing process. Therefore, for the figure attribute information, the corresponding target layout information must describe the target process layer and the target layout unit to which it belongs. If the multi-element numerical identifier is used to indicate the target layout information in the subsequent (such as 11-2-1, which can represent the process layer and the layout unit to which the figure belongs), in order to further effectively utilize the identification space of the figure attribute information category, in one or more embodiments of the present application, for each target process layer and / or target layout unit in the target layout, a numerical identifier mapping table of the figure attribute information on the target process layer and / or target layout unit can be constructed, that is, a plurality of numerical identifier mapping tables of the figure attribute information are constructed, so as to fully utilize the numerical identifier with a lower bit number, and further reduce the storage cost and the transmission cost, as follows:

[0105] First, for each target process layer and / or each target layout unit in the target layout, the present application assigns a third numerical identifier to the figure attribute information corresponding to the target figure belonging to the target process layer and / or the target layout unit according to the size order of the distance between the figure and the preset origin. Second, the present application can construct a numerical identifier mapping table of the figure attribute information based on the target figure belonging to the target process layer and / or the target layout unit according to the one-to-one mapping relationship between the figure attribute information and the third numerical identifier. Finally, the present application can obtain a plurality of numerical identifier mapping tables of the figure attribute information category according to the target layout unit and / or the target process layer as the division benchmark, each numerical identifier mapping table including part of the figure attribute information and the unique numerical identifier of the part of the figure attribute information.

[0106] Continuing with the above example, for each target process layer, a value-identifier mapping table of the graphic attribute information on the target process layer is determined. Assuming that the preset origin is the lower-left vertex of the layout design, then according to the size order of the distance between the graphic and the preset origin, the third value-identifier corresponding to the rightmost graphic can be 5. If the process layer to which the rightmost graphic belongs corresponds to a second value-identifier of 2, then the multi-element value-identifier of the rightmost graphic can be "11-2-5" or "12-2-5".

[0107] In addition, the target layout can be gradually built, and each adjustment can add new layout elements, process layers, or graphics. Therefore, in one or more embodiments of the present application, the present application can be incrementally updated based on the final value-identifier already allocated in the value-identifier mapping table to efficiently handle layout changes, as follows:

[0108] First, the present application can obtain new layout information of the target layout after the target layout is adjusted, and extract new layout elements from the new layout information.

[0109] Second, the present application can determine the final value-identifier already allocated in the value-identifier mapping table of each category.

[0110] Finally, if the new layout elements include layout element names, the present application can allocate a one-to-one mapping first value-identifier to each layout element name in the new layout information according to the final value-identifier already allocated to the layout element names in the order of the letters of the layout element names. If the new layout elements include process layer names, the present application can allocate a one-to-one mapping second value-identifier to each process layer name in the new layout information according to the final value-identifier already allocated to the process layer names in the size order of the layer numbers. If the new layout elements include graphic attribute information, the present application can allocate a third value-identifier to each graphic attribute information in the new layout information according to the final value-identifier already allocated to the graphic attribute information in the size order of the distance between the graphic and the preset origin.

[0111] After the new layout elements are assigned, the value-identity mapping table needs to be updated according to the value-identity of each new layout element, to ensure the real-time and validity of the value-identity mapping table. In one or more embodiments of the present application, the value-identity mapping table of the layout cell name is updated according to the one-to-one mapping relationship between the layout cell name and the first value-identity in the new layout information; the value-identity mapping table of the process layer name is updated according to the one-to-one mapping relationship between the process layer name and the second value-identity in the new layout information; the value-identity mapping table of the graphic attribute information is updated according to the one-to-one mapping relationship between the graphic attribute information and the third value-identity in the new layout information. The new layout information is recorded in the valueized layout data file according to the updated value-identity mapping table of each category.

[0112] Similarly, the new layout cell can be instantiated multiple times. In order to distinguish each instance of the new layout cell, in one or more embodiments of the present application, for each new layout cell, if the number of instances of the new layout cell is not unique, a fourth value-identity is assigned to each instance of the new layout cell after instantiation on a one-to-one basis, and the value-identity mapping table of the layout cell name is updated according to the one-to-one mapping relationship between the layout cell name and the first value-identity in the new layout information, and the one-to-one mapping relationship between each instance of the new layout cell after instantiation and the fourth value-identity.

[0113] In the example shown in Figure 3a If the new layout cell name appears in the processing of the target layout, the first value-identity of the new layout cell name can continue to be determined based on the final value-identity 6 that has been assigned, following the alphabetical order of the layout cell name. If the new layout cell name is "CELL G" and "CELL H", the first value-identity of "CELL G" is 7, and the first value-identity of "CELL H" is 8.

[0114] Based on the layout data file generation method, the present application also provides a specific embodiment of a wafer topography scanning signal processing device.

[0115] As shown in Figure 4 The layout data file generation device 400 provided by the embodiments of the present application includes an element acquisition module 401, a mapping table construction module 402, and a file generation module 403.

[0116] The element acquisition module 401 is configured to acquire target layout information of a target layout, and extract target layout elements of at least one category from a plurality of categories of layout elements contained in the target layout information.

[0117] The mapping table construction module 402 is configured to construct a numerical identification mapping table of the target layout elements of each category, respectively, each of the numerical identification mapping tables including each of the target layout elements of a category and a unique numerical identification corresponding to the target layout element.

[0118] The file generation module 403 is configured to generate a numerical layout data file of the target layout according to the numerical identification mapping table of each category and the target layout information.

[0119] In some embodiments, the mapping table construction module 402 is specifically configured to: the plurality of categories of layout elements include layout cell names, process layer names and graphic attribute information; in a case where the target layout elements include the layout cell names, sequentially assign first numerical identifications to each of the layout cell names in alphabetical order of the layout cell names; construct the numerical identification mapping table of the layout cell names according to a one-to-one mapping relationship between each of the layout cell names and the first numerical identification thereof; in a case where the target layout elements include the process layer names, sequentially assign second numerical identifications to each of the process layer names in order of size of layer numbers, the layer number being a digital number used to identify a process layer in the design of the target layout; construct the numerical identification mapping table of the process layer names according to a one-to-one mapping relationship between each of the process layer names and the second numerical identification thereof; in a case where the target layout elements include the graphic attribute information, sequentially assign third numerical identifications to each of the graphic attribute information in order of size of a distance between a graphic and a preset origin point; and construct the numerical identification mapping table of the graphic attribute information according to a one-to-one mapping relationship between each of the graphic attribute information and the third numerical identification thereof.

[0120] In some embodiments, the mapping table construction module 402 is further configured to: take a target layout cell with a non-unique instantiation number as a first layout cell; assign a one-to-one mapped fourth numerical identification to each instance of the first layout cell after instantiation of the first layout cell; and construct the numerical identification mapping table of the layout cell names according to a one-to-one mapping relationship between each of the layout cell names and the first numerical identification thereof, and a one-to-one mapping relationship between each of the instances of the first layout cell after instantiation and the fourth numerical identification thereof.

[0121] In some embodiments, the mapping table constructing module 402 is further configured to: determine an instance identification bit number according to a name number of the cell name and an instance number of the first cell instance; assign an initial value to each instance of the first cell instance in a natural order of values; and obtain the fourth value identification of each instance of the first cell instance by a pre-padded zero formatting operation to pad the initial value of the instance to the instance identification bit number.

[0122] In some embodiments, the file generating module 403 is specifically configured to: for each target layout information, obtain a unique value identification of each target layout element in the target layout information from the value identification mapping table of each category; for each target layout information, determine a multi-element value identification of the target layout information according to the unique value identification of each target layout element in the target layout information; and generate the value layout data file of the target layout according to the target layout information and the multi-element value identification of the target layout information.

[0123] In some embodiments, the file generating module 403 is further configured to: in a case where the target layout information includes a cell name, an instance, a process layer name and a graphic attribute information, splice the unique value identification of the cell name and the unique value identification of the instance to obtain a spliced value identification; and combine the spliced value identification, the unique value identification of the process layer name and the unique value identification of the graphic attribute information in a preset combination order to obtain the multi-element value identification of the target layout information.

[0124] In some embodiments, the device can further comprise a new layout module, which is specifically configured to: after the target layout is adjusted, obtain new layout information of the target layout, and extract new layout elements from the new layout information; determine the final value identifier assigned to each category in the value identifier mapping table of each category; in the case that the new layout elements comprise the layout cell name, assign the first value identifier to each layout cell name in the new layout information in a one-to-one mapping manner according to the final value identifier assigned to the layout cell name in the order of the alphabetical order of the layout cell name; in the case that the new layout elements comprise the process layer name, assign the second value identifier to each process layer name in the new layout information in a one-to-one mapping manner according to the final value identifier assigned to the process layer name in the order of the size of the layer number; and in the case that the new layout elements comprise the graphic attribute information, assign the third value identifier to each graphic attribute information in the new layout information in a one-to-one mapping manner according to the final value identifier assigned to the graphic attribute information in the order of the size of the distance between the graphic and the preset origin.

[0125] In some embodiments, the device can further comprise a new layout module, which can be further configured to: update the value identifier mapping table of the layout cell name according to the one-to-one mapping relationship between each layout cell name in the new layout information and the first value identifier thereof; update the value identifier mapping table of the process layer name according to the one-to-one mapping relationship between each process layer name in the new layout information and the second value identifier thereof; update the value identifier mapping table of the graphic attribute information according to the one-to-one mapping relationship between each graphic attribute information in the new layout information and the third value identifier thereof; and record the new layout information in the value layout data file according to the value identifier mapping table of each category after the update.

[0126] In some embodiments, the device can further comprise a new layout module, which can be further configured to: for each new layout cell, assign a fourth value identifier to each instance of the new layout cell in a one-to-one mapping manner in the case that the number of instances of the new layout cell is not unique; and update the value identifier mapping table of the layout cell name according to the one-to-one mapping relationship between each layout cell name in the new layout information and the first value identifier thereof, and the one-to-one mapping relationship between each instance of the new layout cell after instantiation and the fourth value identifier thereof.

[0127] A layout data file generation method is provided. Accordingly, a specific embodiment of a layout data file generation device is also provided.

[0128] Figure 5 A hardware structure diagram of a layout data file generation device is shown.

[0129] The layout data file generation device can include a processor 501 and a memory 502 storing computer program instructions.

[0130] Specifically, the processor 501 can include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present application.

[0131] The memory 502 can include a mass storage for data or instructions. By way of example and not limitation, the memory 502 can include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. The memory 502 can include removable or non-removable (or fixed) media, where appropriate. The memory 502 can be integral to, or external to, the integrated gateway disaster recovery device, as appropriate. In particular embodiments, the memory 502 is non-volatile, solid-state memory.

[0132] The processor 501 reads and executes the computer program instructions stored in the memory 502 to implement any of the layout data file generation methods described above.

[0133] In one example, the electronic device can further include a communication interface 503 and a bus 510. As shown, the processor 501, the memory 502, and the communication interface 503 are connected by the bus 510 and complete communication among each other. Figure 5

[0134] The communication interface 503 is mainly used to realize the communication between the modules, devices, units and / or equipment in the embodiments of the present application.

[0135] ​Bus 510 includes hardware, software, or both, to couple components of the electronic device to each other and to couple components to other components in communication coupling. By way of example, and not limitation, bus can be an Accelerated Graphics Port (AGP) or other graphics bus, a Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand (IB) interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association local (VLB) bus, or some other suitable bus or a combination of two or more of these. Where appropriate, bus 510 can include one or more buses. Although the application embodiments described and illustrated herein focus on particular buses, the application contemplates any suitable bus or interconnect.

[0136] In addition, in combination with the layout data file generation method in the above embodiment, the embodiment of the application can provide a computer storage medium to implement. The computer storage medium has computer program instructions stored thereon; the computer program instructions are executed by a processor to implement any of the layout data file generation methods in the above embodiments.

[0137] In addition, in combination with the layout data file generation method in the above embodiment, the embodiment of the application can provide a computer program product to implement, the instructions in the computer program product are executed by the processor of the electronic device to make the electronic device execute the layout data file generation method provided by any of the above embodiments of the application.

[0138] It needs to be clear that the application is not limited to the specific configurations and processes described above and shown in the drawings. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between steps, after understanding the spirit of the application.

[0139] The functions noted in the description of the structural block diagrams above can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application specific integrated circuits (ASICs), appropriate firmware, plug-ins, functional cards, and the like. When implemented in software, the elements of the present application are program or code segments that are used to perform the required tasks. The program or code segments can be stored in a machine-readable medium or transmitted through a data signal carried in a carrier wave over a transmission medium or communication link. A "machine-readable medium" includes any medium that can store or transport information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, and the like. The code segments can be downloaded via computer networks such as the Internet, intranets, and the like.

[0140] It is also important to note that the examples mentioned in the present application describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the steps mentioned above, that is, the steps can be performed in the order mentioned in the examples, or in an order different from the examples, or several steps can be performed simultaneously.

[0141] The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other processing device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other processing device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. These computer program instructions can also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other processing device to operate in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function / act specified in the flowchart and / or block diagram block or blocks. The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other processing device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other processing device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. These computer program instructions can also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other processing device to operate in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function / act specified in the flowchart and / or block diagram block or blocks.

[0142] The above merely describes a specific implementation of the present application. Those skilled in the art can clearly understand the specific working processes of the system, modules and units described above for the convenience and brevity of description, and can refer to the corresponding processes in the foregoing method embodiments, which will not be described herein again. It should be understood that the protection scope of the present application is not limited to this, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be covered within the protection scope of the present application.

Claims

1. A method for generating a map data file, characterized in that, include: Obtain target map information of the target map, and extract at least one category of target map elements from the multiple categories of map elements contained in the target map information; Construct a numerical identifier mapping table for each category of target map elements, each numerical identifier mapping table including each target map element of a category and the unique numerical identifier corresponding to the target map element; Based on the numerical identifier mapping table for each category and the target map information, a numerical map data file for the target map is generated.

2. The method as described in claim 1, characterized in that, The multiple categories of layout elements include layout unit names, process layer names, and graphic attribute information; Construct a numerical identifier mapping table for each category of the target map elements, including: When the target map element includes the map unit name, a first numerical identifier is assigned to each map unit name in alphabetical order; and a numerical identifier mapping table for the map unit name is constructed based on the one-to-one mapping relationship between each map unit name and its first numerical identifier. When the target layout element includes the process layer name, a second numerical identifier is assigned to each process layer name in order of layer number size. The layer number refers to the numerical number used to identify the process layer in the design of the target layout. A numerical identifier mapping table for the process layer name is constructed based on the one-to-one mapping relationship between each process layer name and its second numerical identifier. When the target map element includes the graphic attribute information, a third numerical identifier is assigned to each graphic attribute information in order of the distance between the graphic and the preset origin; and a numerical identifier mapping table for the graphic attribute information is constructed based on the one-to-one mapping relationship between each graphic attribute information and its third numerical identifier.

3. The method as described in claim 2, characterized in that, Based on the one-to-one mapping relationship between each layout unit name and its first numerical identifier, a numerical identifier mapping table for the layout unit names is constructed, specifically including: The target layout unit that is instantiated more than once is used as the first layout unit; For each of the first layout units, a fourth numerical identifier with a one-to-one mapping is assigned to each instance of the first layout unit after instantiation; Based on the one-to-one mapping relationship between each of the layout unit names and their first numerical identifiers, and the one-to-one mapping relationship between each of the instances of the first layout unit after instantiation and their fourth numerical identifiers, a numerical identifier mapping table for the layout unit names is constructed.

4. The method as described in claim 3, characterized in that, Assign a fourth numerical identifier, with a one-to-one mapping, to each instance of the first map unit name, specifically including: The number of bits for the instance identifier is determined based on the number of names of the layout unit and the number of instances of the first layout unit after instantiation; Initial values ​​are assigned to each instance of the first layout unit after it is instantiated, in the natural order of the values. For each instance instantiated after the first layout unit is instantiated, the length of the initial value of the instance is padded with zeros to the number of bits of the instance identifier through a formatting operation, so as to obtain the fourth numerical identifier of the instance.

5. The method as described in claim 1, characterized in that, Based on the numerical identifier mapping table for each category and the target map information, a numerical map data file for the target map is generated, specifically including: For each target map information, the unique numerical identifier of each target map element in the target map information is obtained from the numerical identifier mapping table of each category; For each target map information, a multi-dimensional numerical identifier for the target map information is determined based on the unique numerical identifier of each target map element in the target map information; The numerical map data file of the target map is generated based on the target map information and the multi-dimensional numerical identifier of the target map information.

6. The method as described in claim 5, characterized in that, Based on the unique numerical identifier of each target map element in the target map information, a multi-dimensional numerical identifier for the target map information is determined, specifically including: When the target layout information includes layout unit name, instance, process layer name and graphic attribute information, the unique numerical identifier of the layout unit name and the unique numerical identifier of the instance are concatenated to obtain the concatenated numerical identifier. The splicing numerical identifier, the unique numerical identifier of the process layer name, and the unique numerical identifier of the graphic attribute information are combined in a preset combination order to obtain the multi-dimensional numerical identifier of the target map information.

7. The method as described in claim 2, characterized in that, After generating the numerical layout data file of the target layout, the method further includes: After the target map is adjusted, the newly added map information of the target map is obtained, and the newly added map elements are extracted from the newly added map information; Determine the final numerical identifier assigned to each category in the numerical identifier mapping table for each category; When the newly added map element includes the map unit name, according to the final numerical identifier already assigned to the map unit name, the first numerical identifier with a one-to-one mapping is assigned to each map unit name in the newly added map information in alphabetical order of the map unit name. When the newly added layout element includes the process layer name, according to the final numerical identifier already assigned to the process layer name, and in the order of the layer numbers, a one-to-one mapping of the second numerical identifier is assigned to each process layer name in the newly added layout information. When the newly added map element includes the graphic attribute information, according to the final numerical identifier already assigned to the graphic attribute information, and in order of the distance between the graphic and the preset origin, a one-to-one mapping third numerical identifier is assigned to each graphic attribute information in the newly added map information.

8. The method as described in claim 7, characterized in that, The method further includes: Based on the one-to-one mapping relationship between each of the map unit names and their first numerical identifiers in the newly added map information, update the numerical identifier mapping table of the map unit names; Based on the one-to-one mapping relationship between each process layer name and its second numerical identifier in the newly added layout information, update the numerical identifier mapping table of the process layer name; Based on the one-to-one mapping relationship between each graphic attribute information in the newly added map information and its third numerical identifier, update the numerical identifier mapping table of the graphic attribute information; The newly added map information is recorded in the numerical map data file according to the updated numerical identifier mapping table for each category.

9. The method as described in claim 8, characterized in that, Based on the one-to-one mapping relationship between each of the newly added map unit names and their first numerical identifiers in the map information, the numerical identifier mapping table for the map unit names is updated, specifically including: For each newly added layout unit, if the number of times the newly added layout unit is instantiated is not unique, a fourth numerical identifier with a one-to-one mapping is assigned to each instance of the newly added layout unit after instantiation. Based on the one-to-one mapping relationship between each of the new map unit names and their first numerical identifiers in the newly added map information, and the one-to-one mapping relationship between each of the instantiated new map units and their fourth numerical identifiers, the numerical identifier mapping table of the map unit names is updated.

10. A computer program product, characterized in that, When the instructions in the computer program product are executed by the processor of the electronic device, the electronic device performs the layout data file generation method as described in any one of claims 1-9.

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