Laminate for manufacturing flexible transparent thin film transistor, flexible transparent thin film transistor, and method for manufacturing flexible transparent thin film transistor

Abstract

The present invention relates to a laminate for manufacturing a flexible thin film transistor, a flexible thin film transistor manufactured using the same, and a method for manufacturing the flexible thin film transistor, the laminate for manufacturing the flexible thin film transistor comprising: a carrier substrate; a separation layer disposed on the carrier substrate; a protective layer disposed so as to cover the separation layer; a gate electrode disposed on the protective layer; a gate insulating film disposed on the gate electrode; a source electrode and a drain electrode disposed on the gate insulating film so as to be spaced apart from each other; and a transparent active layer disposed on the gate insulating film provided with the source electrode and the drain electrode so as to be in contact with the source electrode and the drain electrode.

Description

Technical Field

[0001] This invention relates to a laminate for manufacturing flexible transparent thin-film transistors, a flexible transparent thin-film transistor, and a method for manufacturing the same. Background Technology

[0002] Transparent thin-film transistors (TFTs) are fabricated on transparent substrates based on transparent semiconductors, conductors, and insulators. Oxide semiconductors suitable for such TFTs primarily utilize oxides such as indium oxide (IO), gallium oxide (GaO), tin oxide (TO), and zinc oxide (ZNO) as semiconductor materials with high mobility and wide bandgap. In particular, flexible transparent TFTs offer the advantages of being applicable to bendable electronic components and facilitating the development of transparent TFTs with improved flexibility that can replace existing opaque TFTs.

[0003] However, in order to form the aforementioned oxide semiconductor used as a transparent active layer, a high-temperature process is required. But when the oxide semiconductor layer is formed directly on a transparent plastic substrate, there is a problem that the high-temperature process cannot be applied due to the shrinkage or deformation of the transparent plastic substrate.

[0004] To address the issue of the inability to perform high-temperature heat treatment processes as described above, transfer printing methods are being developed. For example, Korean Patent Publication No. 10-2011-0011889 discloses the following process: after forming a sacrificial layer from germanium or germanium oxide, an oxide semiconductor layer is formed; the sacrificial layer is removed by wet etching; and only the semiconductor layer is transferred onto a transparent plastic substrate. However, this requires a separate wet etching process to remove the sacrificial layer, resulting in complex processes, increased manufacturing time, and decreased process efficiency.

[0005] Therefore, there is a need to develop flexible transparent thin-film transistors and their manufacturing methods that can utilize high-temperature processes for forming transparent active layers containing oxide semiconductors and have simpler transfer processes to transparent plastic substrates, thereby improving process efficiency. Summary of the Invention

[0006] Technical issues

[0007] The purpose of this invention is to provide a flexible thin-film transistor with transparency, flexibility, and excellent electrical properties, and a method for manufacturing the same.

[0008] In addition, the present invention aims to provide a laminate for manufacturing flexible thin-film transistors and methods thereof.

[0009] Furthermore, the present invention aims to provide a laminate for manufacturing flexible thin-film transistors that can be used in high-temperature processes for forming oxide semiconductors and has a relatively simple transfer process to a transparent plastic substrate, a method for manufacturing flexible transparent thin-film transistors, and a flexible transparent thin-film transistor manufactured by the method.

[0010] Methods for solving problems

[0011] The present invention relates to a laminate for manufacturing flexible thin-film transistors, comprising: a carrier substrate; a separation layer disposed on the carrier substrate; a protective layer disposed to cover the separation layer; a gate electrode disposed on the protective layer; a gate insulating film disposed on the gate electrode; a source electrode and a drain electrode disposed on the gate insulating film spaced apart from each other; and a transparent active layer disposed on the gate insulating film having the source electrode and the drain electrode in contact with the source electrode and the drain electrode.

[0012] In addition, the present invention relates to a flexible thin-film transistor, comprising: a flexible substrate; a protective layer disposed on the flexible substrate; a gate electrode disposed on the protective layer; a gate insulating film disposed on the gate electrode; a source electrode and a drain electrode disposed on the gate insulating film spaced apart from each other; and a transparent active layer disposed on the gate insulating film having the source electrode and the drain electrode in a manner that contacts the source electrode and the drain electrode.

[0013] According to one embodiment of the present invention, the charge carrier substrate may comprise one or more of the following: wafer, copper (Cu), nickel (Ni), copper-nickel alloy, and glass.

[0014] According to one embodiment of the present invention, the cone angle formed between the end of the source electrode and the drain electrode on the side in contact with the transparent active layer and the gate insulating film can be less than 40°.

[0015] According to one embodiment of the present invention, the gate electrode, source electrode and drain electrode may comprise one or more of the following: indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), aluminum zinc oxide (AZO) and indium tin zinc oxide (ITZO).

[0016] According to one embodiment of the present invention, the above-mentioned transparent active layer may be configured to cover a portion of the source electrode and the drain electrode.

[0017] According to one embodiment of the present invention, the above-mentioned transparent active layer may include one or more selected from the group consisting of ZnSnO, CdSnO, GaSnO, TlSnO, InGaZnO, CuAlO, SrCuO, LaCuOS, GaN, InGaN, AlGaN, AlGaN, and InGaAlN.

[0018] According to one embodiment of the present invention, the flexible thin-film transistor may further include a separation layer between the flexible substrate and the protective layer.

[0019] In addition, the present invention relates to a method for manufacturing a flexible thin-film transistor, comprising: forming a separation layer on a carrier substrate; forming a protective layer on the carrier substrate on which the separation layer is formed, such that the separation layer is covered; forming a gate electrode on the protective layer; forming a gate insulating film on the gate electrode; forming a source electrode and a drain electrode on the gate insulating film in a spaced-apart manner; forming a passivation layer on the source electrode, the drain electrode and the transparent active layer; removing the portion of the carrier substrate in direct contact with the protective layer to peel off the carrier substrate; and transferring the laminate after peeling off the carrier substrate to a flexible substrate.

[0020] According to one embodiment of the present invention, in the above-described step of peeling off the carrier substrate, the carrier substrate and the release layer can be peeled off together.

[0021] Invention Effects

[0022] When using the laminate for manufacturing flexible thin-film transistors according to the present invention, after the high-temperature process for forming the transparent active layer, the transparent semiconductor element can be transferred to the flexible substrate without damage, thus providing a flexible thin-film transistor with transparent and flexible characteristics and excellent electrical properties.

[0023] Furthermore, the flexible thin-film transistor manufacturing laminate and the manufacturing method of the flexible thin-film transistor using the present invention allow for simple peeling off of the charge carrier substrate without separate wet etching processes. Therefore, the process of transferring transparent semiconductor elements onto a flexible substrate can be simplified, thereby improving process efficiency.

[0024] Furthermore, in the flexible thin-film transistor manufacturing stack and flexible thin-film transistor of the present invention, a transparent active layer is disposed on a gate insulating film having a source electrode and a drain electrode in such a way that it is in contact with the source electrode and the drain electrode. In the process of forming the transparent active layer, only the transparent active layer can be selectively etched, thereby simplifying the overall process and improving process efficiency. Attached Figure Description

[0025] Figure 1 A schematic cross-sectional view showing a laminate for manufacturing a flexible thin-film transistor according to an embodiment of the present invention.

[0026] Figure 2 and Figure 3 A schematic cross-sectional view of a flexible thin-film transistor according to an embodiment of the present invention.

[0027] Figure 4 A schematic cross-sectional view showing a method for manufacturing a laminate for manufacturing a flexible thin-film transistor according to an embodiment of the present invention, step by step.

[0028] Figure 5 , Figure 6 and Figure 7 A schematic cross-sectional view showing a method for manufacturing a flexible thin-film transistor according to an embodiment of the present invention, step by step.

[0029] Figure 8 This is a scanning electron microscope (SEM) image of a cross-section of a flexible thin-film transistor according to an embodiment of the present invention.

[0030] Figure 9 A graph illustrating the IV transfer curve of a flexible thin-film transistor according to an embodiment of the present invention. Detailed Implementation

[0031] The present invention relates to flexible thin-film transistors, methods for manufacturing the same, and laminates for manufacturing flexible thin-film transistors using the same method. The flexible thin-film transistors can be manufactured using high-temperature processes for forming a transparent active layer containing an oxide semiconductor, and the transfer process to a transparent plastic substrate is relatively simple, thus improving process efficiency.

[0032] More specifically, the present invention relates to a laminate for manufacturing flexible thin-film transistors, comprising: a carrier substrate; a separation layer disposed on the carrier substrate; a protective layer disposed to cover the separation layer; a gate electrode disposed on the protective layer; a gate insulating film disposed on the gate electrode; a source electrode and a drain electrode disposed on the gate insulating film spaced apart from each other; and a transparent active layer disposed on the gate insulating film having the source electrode and the drain electrode in contact with the source electrode and the drain electrode.

[0033] In addition, the present invention relates to a flexible thin-film transistor, comprising: a flexible substrate; a protective layer disposed on the flexible substrate; a gate electrode disposed on the protective layer; a gate insulating film disposed on the gate electrode; a source electrode and a drain electrode disposed on the gate insulating film spaced apart from each other; and a transparent active layer disposed on the gate insulating film having the source electrode and the drain electrode in a manner that contacts the source electrode and the drain electrode.

[0034] In addition, the present invention relates to a method for manufacturing a flexible thin-film transistor, comprising: forming a separation layer on a carrier substrate; forming a protective layer on the carrier substrate on which the separation layer is formed, such that the separation layer is covered; forming a gate electrode on the protective layer; forming a gate insulating film on the gate electrode; forming a source electrode and a drain electrode on the gate insulating film in a spaced-apart manner; forming a passivation layer on the source electrode, the drain electrode and the transparent active layer; removing the portion of the carrier substrate in direct contact with the protective layer to peel off the carrier substrate; and transferring the laminate after peeling off the carrier substrate to a flexible substrate.

[0035] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. However, the following drawings accompanying this specification are merely illustrative of preferred embodiments of the present invention and serve to further illustrate the above-described invention and its technical concept. Therefore, the present invention should not be interpreted solely as described in these drawings, and the present invention is defined only by the scope of the claims.

[0036] The terminology used in this specification is intended to illustrate embodiments and is not intended to limit the invention. In this specification, the singular form includes the plural form unless the context specifically indicates otherwise.

[0037] The terms "comprises" and / or "comprising" as used herein are used to mean that they do not exclude the presence or addition of more than one other component, step, operation, and / or element besides those mentioned. Throughout this specification, the same reference numerals refer to the same components.

[0038] As illustrated in the accompanying drawings, spatially relative terms such as "above," "below," "upper surface," "lower surface," "upper part," and "lower part" are used to readily describe the relationship between an element or component and other elements or components. Spatially relative terms should be understood in accordance with terms relating to the different orientations of the elements during use or operation, in addition to those illustrated in the drawings. For example, when the elements illustrated in the drawings are flipped, an element described as "below" or "lower part" of another element can be placed "above" or "upper surface" of that element. Therefore, the illustrative term "below" can include both the lower and upper directions. Elements can also face other directions, so spatially relative terms can be interpreted according to orientation.

[0039] In the following figures, the direction parallel to the upper surface of the charge carrier substrate 110 or the flexible substrate 150 is defined as the "top view direction," and the direction perpendicular to the upper surface of the charge carrier substrate 110 or the flexible substrate 150 is defined as the "vertical direction." For example, the top view direction and the vertical direction can be perpendicular to each other.

[0040] Implementation

[0041] <Laminated structure for manufacturing flexible thin-film transistors>

[0042] Figure 1 A schematic cross-sectional view showing a laminate for manufacturing a flexible thin-film transistor according to an embodiment of the present invention.

[0043] Reference Figure 1 The flexible thin-film transistor manufacturing laminate of the present invention may include a charge carrier substrate 110, a separation layer 120 disposed on the charge carrier substrate 110, a protective layer 130 disposed to cover the separation layer 120, and a transparent semiconductor element 200 disposed on the protective layer 130.

[0044] The aforementioned charge carrier substrate 110 is not particularly limited as long as it can be used in high-temperature processes. For example, it may include one or more of the following: wafer, copper (Cu), nickel (Ni), copper-nickel alloy, and glass.

[0045] The aforementioned separation layer 120 may, for example, comprise one or more substances selected from the group consisting of polyimide, polyvinyl alcohol, polyamic acid, polyamide, polyethylene, polystyrene, polynorbornene, phenylmaleimide copolymer, polyazobenzene, polyphenylenephthalamide, polyester, polymethylmethacrylate, polyarylate, melamine-based polymers, cinnamate-based polymers, coumarin-based polymers, phthalimidine-based polymers, chalcone-based polymers, and aromatic acetylene-based polymers as a polymeric organic membrane.

[0046] The peel force of the aforementioned release layer 120 from the charge carrier substrate can be less than 1 N / 25 mm, preferably 0.01 to 1 N / 25 mm, and more preferably 0.01 to 0.1 N / 25 mm. When the peel force of the release layer 120 is within the above range, the release layer and the charge carrier substrate are stably attached during the formation process of the transparent semiconductor element 200, and can be cleanly separated from the charge carrier substrate 110 without cracking.

[0047] Furthermore, the thickness of the aforementioned release layer 120 is preferably 1 to 1000 nm, more preferably 10 to 500 nm. When the thickness of the release layer meets the above range, it is possible to prevent a decrease in uniformity during the coating of the release layer, thereby preventing an increase in local peeling force or tearing, and maintaining good flexibility properties; therefore, this is preferable.

[0048] The aforementioned protective layer 130 is configured to cover the separation layer 120, and is able to protect the transparent semiconductor element 200 from damage and breakage during and / or after the stripping of the charge carrier substrate 110.

[0049] The aforementioned protective layer 130 can be formed to completely cover the separation layer 120 on the carrier substrate 110. Thus, a portion of the protective layer 130 is in direct contact with and attached to the carrier substrate 110, allowing the separation layer 120 to be stably and tightly bonded to the carrier substrate 110 during the process before the carrier substrate 110 is peeled off.

[0050] The aforementioned protective layer 130 may comprise inorganic insulating materials such as inorganic oxides and inorganic nitrides, or polymeric organic insulating materials. Examples of inorganic oxides include silicon oxide, aluminum oxide, and titanium oxide; examples of inorganic nitrides include silicon nitride and titanium nitride. To achieve excellent mechanical strength, transmittance, and flexibility, the protective layer 130 may comprise a cycloolefin polymer (COP).

[0051] Examples of the aforementioned cyclic olefin polymers (COPs) include polynorbornene, polycycloalkene, and polydicyclopentadiene, but they are not limited to these.

[0052] Furthermore, the thickness of the protective layer 130 is preferably 1 to 5 μm. When the thickness of the protective layer meets this range, the flexibility properties will not decrease and the layer can still function as a protective layer, which is therefore preferable. If the thickness of the protective layer 130 is greater than 5 μm, the flexibility properties may decrease; if it is less than 1 μm, the layer may lose its function as a protective layer.

[0053] The transparent semiconductor element 200 may include: a gate electrode 210, a gate insulating film 220 disposed on the gate electrode, a source electrode 230S and a drain electrode 230D disposed on the gate insulating film 220 spaced apart from each other, and a transparent active layer 230 disposed on the gate insulating film 220 having the source electrode 230S and the drain electrode 230D in a manner that contacts the source electrode and the drain electrode.

[0054] The gate electrode 210 is provided on the protective layer 130, and signal wiring (not shown) made of the same material as the gate electrode 210 can also be formed thereon.

[0055] A gate insulating film 220 is provided on the gate electrode 210. The gate insulating film 220 can be formed of inorganic or organic insulating materials, and is preferably made of a transparent material. For example, it can be formed of silicon oxide film or silicon nitride film, but is not limited to these, and can be formed of various materials.

[0056] The active electrode 230S and the drain electrode 230D are arranged on the gate insulating film 220 in a manner that keeps them apart from each other.

[0057] The cone angle formed between the ends of the source electrode 230S and drain electrode 230D that are in contact with the transparent active layer and the gate insulating film (refer to...) Figure 1The taper angle (TA) can be 40° or less, preferably 2 to 40°, and more preferably 5 to 35°. When the taper angle (TA) of the end of the source electrode 230S and the drain electrode 230D that is in contact with the transparent active layer is greater than 40°, the step coverage decreases when the transparent active layer 240 described later is formed, which may cause a short circuit and result in a deterioration of electrical characteristics.

[0058] Figure 8 and Figure 9 A scanning electron microscope (SEM) image of a cross-section of a flexible thin-film transistor according to an embodiment of the present invention and a graph of the IV transfer curve of the flexible thin-film transistor accordingly. Specifically, by... Figure 8 A cross-sectional photograph of a flexible thin-film transistor according to an embodiment of the present invention confirms that the cone angle formed by one end of the source / drain electrode and the gate insulating film is 25°, and the thickness of the thin film is [missing information]. (angstrom).

[0059] Reference Figure 8 and Figure 9 When the cone angle formed between one end of the source / drain electrode and the gate insulating film is less than 40°, it can be confirmed that the IGZO transparent active layer formed on the ITO source / drain electrode is smoothly formed without short circuit (see reference). Figure 8 ), and it can be confirmed that this results in very excellent electrical properties (see reference). Figure 9 ).

[0060] The gate electrode 210, source electrode 230S, and drain electrode 230D described above may contain one or more of the following: ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), In2O3 (indium oxide), IGO (indium gallium oxide), AZO (zinc aluminum oxide), and ITZO (indium tin zinc oxide). Furthermore, from the perspective of transparency and selective etching in the process, it is preferable to include ITO (indium tin oxide). In particular, when the source electrode 230S and drain electrode 230D contain ITO, there is an advantage that when forming the IGZO layer as the transparent active layer described later, only the IGZO layer can be selectively etched without damaging the source electrode 230S and drain electrode 230D.

[0061] A transparent active layer 240 may be disposed on the gate insulating film having the source electrode 230S and drain electrode 230D, in such a way that it is in contact with the source electrode and drain electrode, and may be disposed in such a way that it covers a portion of the source electrode 230S and drain electrode 230D.

[0062] The aforementioned transparent active layer 240 can be formed of a semiconductor comprising amorphous silicon or crystalline silicon. The transparent active layer 240 may include a channel region, and source and drain regions doped with ionic impurities inside the channel region. The source and drain regions of the aforementioned transparent active layer 240 can be in contact with the source electrode 230S and the drain electrode 230D.

[0063] The aforementioned transparent active layer 240 may comprise one or more selected from the group consisting of ZnSnO, CdSnO, GaSnO, TlSnO, InGaZnO, CuAlO, SrCuO, LaCuOS, GaN, InGaN, AlGaN, AlGaN, and InGaAlN. In particular, from the perspective of electrical characteristics and selective etching in the process, InGaZnO (IGZO) is preferably included. IGZO has low off-current, low power consumption, and high mobility, thus enabling its application in high-resolution products. Furthermore, the lower processing temperature prevents degradation of flexibility and transmittance, and its similarity to existing a-Si processing equipment reduces investment costs.

[0064] Flexible thin film crystals

[0065] Figure 2 and Figure 3 A schematic cross-sectional view of a flexible thin-film transistor according to an embodiment of the present invention.

[0066] Reference Figure 2 The flexible thin-film transistor of the present invention may include a flexible substrate 150, a protective layer 130 disposed on the flexible substrate 150, and a transparent semiconductor element 200 disposed on the protective layer 130. The transparent semiconductor element 200 may also include a passivation layer 160 and a protective film 170.

[0067] Omission for reference Figure 1 The above-described separation layer 120, protective layer 130, gate electrode 210, gate insulating film 220, source electrode 230S, drain electrode 230D and transparent active layer 240 are described in detail.

[0068] The aforementioned flexible substrate 150 is not particularly limited as long as it is a transparent material with flexible properties. For example, it may contain one or more materials selected from the group consisting of cyclic olefin polymers (COP), polyethylene terephthalate (PET), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), polyallylate, clear polyimide (CPI), polyimide (PI), cellulose acetate propionate (CAP), polyethersulfone (PES), cellulose triacetate (TAC), polycarbonate (PC), cyclic olefin copolymers (COC), and polymethyl methacrylate (PMMA). Preferably, it may contain materials selected from polyethylene terephthalate (PET), clear polyimide (CPI), and cyclic olefin polymers (COP). More preferably, it may include one or more of the following: polyethylene terephthalate (PET), cyclic olefin polymer (COP), polyethylene naphthalate (PEN), and polycarbonate (PC).

[0069] In one embodiment of the present invention, an adhesive layer 140 may be provided on the upper surface of the flexible substrate 150. For example, the separation layer 120 or the protective layer 130 may be tightly bonded to the flexible substrate 150 through the adhesive layer 140, thereby preventing the flexible substrate 150 from peeling off or lifting.

[0070] The passivation layer 160 described above is used to protect the transparent semiconductor element 20 from external damage such as moisture. It can be formed of the same material as the gate insulating film 220 described above, and can be formed of a single layer or multiple layers, but is not limited thereto.

[0071] The aforementioned protective film 170 is used to protect against physical damage caused by subsequent processes and the external environment, and can be disposed on the aforementioned passivation layer 160.

[0072] The aforementioned protective film 170 may comprise one or more polymers selected from the group consisting of polyethylene terephthalate (PET), polyethylene isophthalate (PEI), polyethylene naphthalate (PEN), polybutylene terephthalate (PBT), diacetyl cellulose, triacetyl cellulose (TAC), polycarbonate (PC), polyethylene (PE), polypropylene (PP), polymethyl acrylate (PMA), polymethyl methacrylate (PMMA), polyethyl acrylate (PEA), polyethyl methacrylate (PEMA), and cyclic olefin polymers (COP).

[0073] <Manufacturing Methods of Flexible Thin Film Transistors>

[0074] Figure 4 A schematic cross-sectional view showing a method for manufacturing a laminate for manufacturing a flexible thin-film transistor according to an embodiment of the present invention, step by step. Figure 5 , Figure 6 and Figure 7 A schematic cross-sectional view showing a method for manufacturing a flexible thin-film transistor according to an embodiment of the present invention, step by step.

[0075] Omission for reference Figures 1 to 3 The following is a detailed description of the charge carrier substrate 110, separation layer 120, protective layer 130, gate electrode 210, gate insulating film 220, source electrode 230S, drain electrode 230D, transparent active layer 240, flexible substrate 150, adhesive layer 140, passivation layer 160 and protective film 170 described above.

[0076] Reference Figure 4 First, a separation layer 120 is formed on the carrier substrate 110. The separation layer 120 can be formed by drying after coating the separation layer forming composition onto the carrier substrate 110, or by stacking the separately formed separation layer 120 onto the carrier substrate 110.

[0077] Then, a protective layer 130 is formed on the carrier substrate 110 on which the separation layer 120 is formed, in a manner that covers the separation layer 120. At this time, the protective layer 130 can be formed in a manner that completely covers the separation layer 120. The protective layer 130 can be formed by a process of applying a protective layer forming composition to the carrier substrate 110 and then drying it, but is not limited thereto.

[0078] Next, a gate electrode 210 is formed on the aforementioned protective layer 130. The gate electrode 210 is formed in a predetermined pattern, and signal wiring (not shown) made of the same material as the gate electrode 210 may also be formed thereon.

[0079] A gate insulating film 220 is formed on the gate electrode 210, and a source electrode 230S and a drain electrode 230D are formed on the gate insulating film 220 in a spaced-apart manner. The source electrode 230S and the drain electrode 230D are formed in a predetermined pattern and can be formed of the same material as the gate electrode 210.

[0080] The aforementioned source electrode 230S and drain electrode 230D can be formed such that the end of the side that will contact the transparent active layer 240 in a subsequent process forms a cone angle with the aforementioned gate insulating film (see reference). Figure 1 The taper angle (TA) is 40° or less, preferably 2 to 40°, and more preferably 5 to 35°. When the taper angle (TA) of the end of the source electrode 230S and drain electrode 230D that contacts the transparent active layer 240 is greater than 40°, the step coverage decreases when the transparent active layer 240 is subsequently formed, which may cause a short circuit and result in a deterioration of electrical characteristics.

[0081] Finally, a transparent active layer 240 is formed on the gate insulating film 220 on which the source electrode 230S and drain electrode 230D are formed, in such a way that it is in contact with the source electrode 230S and drain electrode 230D. At this time, a predetermined pattern can be formed by selectively etching the transparent active layer 240 without damaging the underlying source electrode 230S and drain electrode 230D.

[0082] In contrast, in structures where the transparent active layer is formed first, followed by the source and drain electrodes, the etchant composition used to etch the source and drain electrodes also etches the underlying transparent active layer. Therefore, to prevent damage to the transparent active layer, additional steps such as a separate etch stop layer (ESL) or lift-off are required, potentially reducing overall process efficiency.

[0083] The layers included in the transparent semiconductor element 200 can be formed at a temperature below 400°C, preferably below 300°C, and more preferably below 200°C. If the layers included in the transparent semiconductor element 200 are formed at a temperature above 400°C, damage may be caused to the underlying separation layer 120 and protective layer 130. Therefore, the separation layer 120 and protective layer 130 need to be formed thicker to maintain their function. However, with the increased thickness of the separation layer 120 and protective layer 130, there is a problem that the flexibility and transmittance of the flexible thin-film transistor may decrease. That is, if the layers included in the transparent semiconductor element 200 are formed at a temperature below 400°C, the reduction in the flexibility and transmittance of the flexible thin-film transistor can be prevented, which is therefore preferable.

[0084] Furthermore, a passivation layer 160 can be formed to protect the aforementioned source electrode 230S, drain electrode 230D, and transparent active layer 240.

[0085] Figure 5 This is a schematic cross-sectional view showing some steps of manufacturing a flexible thin-film transistor from a laminate for manufacturing a flexible thin-film transistor according to an embodiment of the present invention.

[0086] Reference Figure 5 The side portion of the carrier substrate 110 that directly contacts the protective layer 130 is cut from the laminate for manufacturing the flexible thin-film transistor of the present invention. That is, along a direction perpendicular to the upper surface of the carrier substrate 110 (see reference). Figure 5 The two side faces of the separation layer 120 are cut off by A and A'. This removes the portion of the charge carrier substrate 110 that is in direct contact with the protective layer 130 from the laminate. The cutting method is not particularly limited; for example, a laser can be used for the cutting process. Through the above cutting process, in addition to the charge carrier substrate 110, separation layer 120, and protective layer 130, a portion of other layers can also be cut off while maintaining the function of the transparent semiconductor element 200.

[0087] Then, a protective film 170 can be attached to the passivation layer 160 of the laminate after the cutting process.

[0088] Figure 6 This is a schematic cross-sectional view showing the steps of manufacturing a flexible thin-film transistor according to an embodiment of the present invention from a laminate in which the portions of the charge carrier substrate 110 and the protective layer 130 that are in direct contact have been removed.

[0089] Reference Figure 6 First, the carrier substrate 110 and the separation layer 120 are peeled off from the laminate from the portion where the carrier substrate 110 and the protective layer 130 are in direct contact.

[0090] As described above, the portion where the charge carrier substrate 110 directly contacts the protective layer 130 ensures a stable and tight bond between the charge carrier substrate 110 and the separation layer 120. Therefore, by applying physical force only to the laminate where the corresponding portion has been removed, the charge carrier substrate 110 and the separation layer 120 can be easily peeled off without damaging the transparent semiconductor element 200, and without requiring a separate chemical processing step or a laser-based decomposition step.

[0091] Then, the laminate after peeling off the carrier substrate 110 and the separation layer 120 is transferred to a flexible substrate 150 on one side of which an adhesive layer 140 is formed to manufacture a flexible thin film transistor. At this time, the adhesive layer 140 is preferably formed with a thickness of 1 μm or less.

[0092] Figure 7 This is a schematic cross-sectional view showing the steps of manufacturing a flexible thin-film transistor according to another embodiment of the present invention from a laminate in which the portions of the charge carrier substrate 110 and the protective layer 130 that are in direct contact have been removed.

[0093] Reference Figure 7 First, the carrier substrate 110 is peeled off from the portion of the laminate where it directly contacts the protective layer 130. That is, as described above... Figure 6 Unlike the carrier substrate 110, the separation layer 120 is not peeled off together, but exists in close contact with the protective layer 130.

[0094] Then, the laminate after stripping the charge carrier substrate 110 is transferred to a flexible substrate 150 on one side having an adhesive layer 140 to manufacture a flexible thin film transistor.

[0095] According to one embodiment of the present invention, the peel force between the separation layer 120 and the protective layer 130 can be appropriately adjusted by adjusting the components contained in the separation layer 120 and / or the protective layer 130. When the peel force of the protective layer 130 on the separation layer 120 is less than that of the carrier substrate 110 on the separation layer 120, the separation layer 120 and the carrier substrate 110 can be peeled off together from the protective layer 130 with the protective layer 130 and the separation layer 120 as the interface (see reference). Figure 6 Furthermore, when the peeling force of the protective layer 130 on the separation layer 120 is greater than the peeling force of the carrier substrate 110 on the separation layer 120, the carrier substrate 110 can be peeled off from the separation layer 120 using the separation layer 120 and the carrier substrate 110 as the interface (see reference). Figure 7 ).

[0096] Industrial availability

[0097] When using the laminate for manufacturing flexible thin-film transistors according to the present invention, after the high-temperature process for forming the transparent active layer, the transparent semiconductor element can be transferred to the flexible substrate without damage, thus providing a flexible thin-film transistor with transparent and flexible characteristics and excellent electrical properties.

Claims

1. A laminate for manufacturing flexible thin-film transistors, characterized in that, include: Carrier substrate; A separation layer disposed on the current-carrying substrate; A protective layer configured to cover the separation layer; Gate electrode disposed on the protective layer; A gate insulating film disposed on the gate electrode; The source electrode and drain electrode are spaced apart from each other on the gate insulating film; as well as A transparent active layer is disposed on a gate insulating film having the source electrode and drain electrode in such a manner as to be in contact with the source electrode and drain electrode.

2. The laminate for manufacturing flexible thin-film transistors according to claim 1, characterized in that, The charge carrier substrate comprises one or more selected from the group consisting of wafers, copper, nickel, copper-nickel alloys, and glass.

3. The laminate for manufacturing flexible thin-film transistors according to claim 1 or 2, characterized in that, The cone angle formed between the end of the source electrode and the drain electrode on the side in contact with the transparent active layer and the gate insulating film is less than 40°.

4. The laminate for manufacturing flexible thin-film transistors according to claim 1 or 2, characterized in that, The gate electrode, source electrode, and drain electrode comprise one or more of the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), aluminum zinc oxide (AZO), and indium tin zinc oxide (ITZO).

5. The laminate for manufacturing flexible thin-film transistors according to claim 1 or 2, characterized in that, The transparent active layer is configured to cover a portion of the source and drain electrodes.

6. The laminate for manufacturing flexible thin-film transistors according to claim 1 or 2, characterized in that, The transparent active layer comprises one or more selected from the group consisting of ZnSnO, CdSnO, GaSnO, TlSnO, InGaZnO, CuAlO, SrCuO, LaCuOS, GaN, InGaN, AlGaN, AlGaN, and InGaAlN.

7. A flexible thin-film transistor, characterized in that, include: Flexible substrate; A protective layer disposed on the flexible substrate; Gate electrode disposed on the protective layer; A gate insulating film disposed on the gate electrode; The source electrode and drain electrode are spaced apart from each other on the gate insulating film; as well as A transparent active layer is disposed on a gate insulating film having the source electrode and the drain electrode in such a way as to be in contact with the source electrode and the drain electrode.

8. The flexible thin-film transistor according to claim 7, characterized in that, The cone angle formed between the end of the source electrode and the drain electrode on the side in contact with the transparent active layer and the gate insulating film is less than 40°.

9. The flexible thin-film transistor according to claim 7 or 8, characterized in that, The gate electrode, source electrode, and drain electrode comprise one or more of the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), aluminum zinc oxide (AZO), and indium tin zinc oxide (ITZO).

10. The flexible thin-film transistor according to claim 7 or 8, characterized in that, The transparent active layer is configured to cover a portion of the source and drain electrodes.

11. The flexible thin-film transistor according to claim 7, characterized in that, The transparent active layer comprises one or more selected from the group consisting of ZnSnO, CdSnO, GaSnO, TlSnO, InGaZnO, CuAlO, SrCuO, LaCuOS, GaN, InGaN, AlGaN, AlGaN, and InGaAlN.

12. The flexible thin-film transistor according to claim 7 or 8, characterized in that, A separation layer is also included between the flexible substrate and the protective layer.

13. A method for manufacturing a flexible thin-film transistor, characterized in that, include: The step of forming a separation layer on a charge carrier substrate; The step of forming a protective layer on the current-carrying substrate on which the separation layer is formed, in a manner that covers the separation layer; The step of forming a gate electrode on the protective layer; The step of forming a gate insulating film on the gate electrode; The step of forming source electrodes and drain electrodes on the gate insulating film in a spaced-apart manner; The step of forming a transparent active layer on the gate insulating film on which the source electrode and drain electrode are formed, in a manner that contacts the source electrode and drain electrode; The step of forming a passivation layer on the source electrode, drain electrode and transparent active layer; The step of cutting off the portion of the charge carrier substrate that is in direct contact with the protective layer to peel off the charge carrier substrate; as well as The step of transferring the laminate after stripping the charge carrier substrate to a flexible substrate.

14. The method for manufacturing a flexible thin-film transistor according to claim 13, characterized in that, In the step of peeling off the carrier substrate, the carrier substrate and the release layer are peeled off together.

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