A field effect transistor quality detection system and apparatus therefor

By designing a field-effect transistor quality inspection system that combines image analysis and multi-parameter detection, the problem of the inability to comprehensively evaluate transistor quality in existing technologies has been solved. This enables efficient and accurate inspection and production control, thereby improving product quality and production efficiency.

CN121069136BActive Publication Date: 2026-05-08GUANGDONG OUXIN MICROELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
GUANGDONG OUXIN MICROELECTRONICS CO LTD
Filing Date
2025-08-18
Publication Date
2026-05-08

AI Technical Summary

Technical Problem

Existing technologies cannot effectively combine structural reliability testing and multi-performance characteristic testing to gradually and comprehensively assess the quality status of field-effect transistors (FETs). They cannot reasonably judge and provide timely warnings on the production control status of FETs, which is not conducive to ensuring the production testing efficiency of FETs and improving product quality. Furthermore, the level of intelligence and automation is low.

Method used

A field-effect transistor (FET) quality inspection system was designed, comprising a transistor scanning module, a structural reliability analysis module, a signal excitation generation module, an intelligent feature analysis module, a transistor quality assessment decision module, and an interactive alarm terminal. Through image analysis, generation of multiple excitation signals, multi-parameter acquisition, and in-depth analysis, combined with preset quality standards and evaluation models, the system performs a comprehensive and efficient quality assessment of FETs. During inspection, it generates production control signals to remind back-end management personnel to adjust production strategies.

Benefits of technology

It enables comprehensive, efficient, and accurate testing of field-effect transistors, improves automation levels, ensures production stability and quality, provides detailed testing reports and production control suggestions, and enhances product quality and production efficiency.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The application belongs to the technical field of transistor detection, and specifically relates to a field effect transistor quality detection system and equipment thereof, wherein the system comprises a transistor scanning module, a structure reliability analysis module, a signal excitation generation module, an intelligent feature analysis module, a transistor quality evaluation decision module and an interactive alarm end; the structure reliability analysis module is used for analyzing a transistor image to evaluate the structure reliability of the field effect transistor, a plurality of excitation signals suitable for field effect transistor detection are generated when a structure reliable signal is generated, the intelligent feature analysis module collects a plurality of electrical parameters and non-electrical parameters of the field effect transistor under signal excitation and performs in-depth analysis, the field effect transistor is comprehensively and objectively evaluated in quality according to an analysis report and in combination with a preset quality standard and an evaluation model, comprehensive, efficient and accurate detection of the field effect transistor is realized, and the quality detection level and production efficiency are improved.
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Description

Technical Field

[0001] This invention relates to the field of transistor testing technology, specifically to a field-effect transistor quality testing system and equipment. Background Technology

[0002] A field-effect transistor (FET) is a semiconductor device that uses the electric field effect to control the magnitude of current. It mainly has three electrodes: the source, the gate, and the drain. Its core structure is formed on a semiconductor substrate through a specific process, and the current in the channel is controlled by the gate voltage. As a key component in electronic circuits, the quality of the FET directly affects the performance and stability of the entire electronic system.

[0003] Chinese invention patent CN113805030A discloses a microcontroller-based intelligent transistor parameter detection system. This invention only requires inserting the transistor into three connectors. The microcontroller module controls the three connector circuits, conducting multiple tests on the three electrodes of the transistor every two circuits. The analog voltage drop signals of the corresponding two electrodes are converted to digital signals via an analog-to-digital converter (ADC). The judgment unit can determine the transistor type and electrode distribution, and output the detection data to the display unit. This system provides convenience for testing personnel while improving testing efficiency.

[0004] However, in practical applications, the above-mentioned invention only focuses on the detection of transistor electrical parameters. It cannot combine structural reliability testing and multi-performance characteristic testing to gradually and comprehensively evaluate the quality of field-effect transistors. Furthermore, it cannot make reasonable judgments and timely warnings on the production control status of field-effect transistors, which is not conducive to ensuring the production testing efficiency of field-effect transistors and improving product quality. The level of intelligence and automation needs to be improved.

[0005] To address the aforementioned technical shortcomings, a solution is proposed. Summary of the Invention

[0006] The purpose of this invention is to provide a field-effect transistor (FET) quality inspection system and equipment, which solves the problems of existing technologies that cannot effectively combine structural reliability testing and multi-performance characteristic testing to gradually and comprehensively evaluate the quality status of FETs, cannot reasonably judge and provide timely warnings on the production control status of FETs, are not conducive to ensuring the production inspection efficiency of FETs and improving product quality, and have low levels of intelligence and automation.

[0007] To achieve the above objectives, the present invention provides the following technical solution:

[0008] A field-effect transistor (FET) quality inspection system includes a transistor scanning module, a structural reliability analysis module, a signal excitation generation module, an intelligent feature analysis module, a transistor quality assessment and decision module, and an interactive alarm terminal. The transistor scanning module performs an external scan of the FET and sends the scanned transistor image to the structural reliability analysis module. The structural reliability analysis module analyzes the transistor image to assess the structural reliability of the FET, generates a structurally reliable signal or a structurally unreliable signal accordingly, and sends the structurally unreliable signal to the interactive alarm terminal.

[0009] When generating a structurally reliable signal, the signal excitation generation module generates various excitation signals suitable for field-effect transistor (FET) detection, stimulating different performance characteristics of the FET; the intelligent feature analysis module collects various electrical and non-electrical parameters of the FET under signal excitation, performs in-depth analysis on the collected data, and extracts the key performance characteristics of the FET; the transistor quality assessment decision module, based on the analysis report provided by the intelligent feature analysis module, combined with preset quality standards and assessment models, comprehensively assesses the quality of the FET and sends the transistor quality test report to the interactive alarm terminal.

[0010] Furthermore, the signal excitation generation module determines the required excitation signal type based on the type of field-effect transistor and the detection requirements. Through its internal signal generation circuit and combined with digital signal processing technology, it controls the frequency, amplitude, and duty cycle parameters of the signal. After amplification and buffering, the generated excitation signal is output to the intelligent feature analysis module.

[0011] Furthermore, the intelligent feature analysis module is used to receive the excitation signal output by the signal excitation generation module and apply it to the field-effect transistor to be tested. It also uses high-precision sensors and acquisition circuits to collect various parameters of the field-effect transistor in real time. The collected electrical parameters include drain current, source voltage, gate voltage and transconductance, while the non-electrical parameters include temperature and packaging stress. The collected multi-parameter data is then converted from analog to digital.

[0012] Furthermore, the intelligent feature analysis module is also used to preprocess the collected multi-parameter data, including data calibration and noise removal operations, and uses signal processing algorithms and machine learning techniques to extract features from the processed data; after feature extraction and analysis, an analysis report containing key performance features is generated and transmitted to the transistor quality assessment decision module.

[0013] Furthermore, the specific operation process of the transistor quality assessment decision module is as follows:

[0014] The system receives the analysis report generated by the intelligent feature analysis module, compares it with the preset quality standards stored internally, and calculates the comprehensive quality score by weighting the various performance characteristics of the field-effect transistor through the establishment of a multi-parameter comprehensive evaluation model.

[0015] Based on the overall quality score, field-effect transistors are classified into different quality levels, including qualified products, substandard products, and scrap products. A detailed test report is generated based on the evaluation results, including the quality level, the evaluation of various performance indicators, and the problems and suggestions.

[0016] Furthermore, the specific analysis process of the structural reliability analysis module includes:

[0017] The transistor image is acquired and its contour is compared with the corresponding standard image. Based on this, the contour overlap degree of the field-effect transistor is collected. The contour overlap degree is compared with a preset contour overlap degree threshold. If the contour overlap degree does not exceed the preset contour overlap degree threshold, a structural unreliability signal of the corresponding field-effect transistor is generated. If the contour overlap degree exceeds the preset contour overlap degree threshold, a defect identification decision analysis is performed.

[0018] Furthermore, the specific analysis process for defect identification decision analysis is as follows:

[0019] Based on the transistor image capture of defects existing on the surface of the field-effect transistor, the detection data of various parameters of the corresponding defects are collected. The detection data of each parameter is compared with the corresponding preset data safety threshold. If there is a parameter whose detection data exceeds the corresponding preset data safety threshold, the corresponding defect is marked as a fatal defect. If there is a fatal defect on the field-effect transistor, the structural unreliability signal of the corresponding field-effect transistor is generated.

[0020] If there are no fatal defects on the field-effect transistor, several sub-inspection areas are defined on the field-effect transistor. If a defect is involved in the corresponding sub-inspection area, the corresponding sub-inspection area is marked as a dangerous area. The number of dangerous areas on the field-effect transistor is obtained and the ratio of it to the number of sub-inspection areas is calculated to obtain the dangerous area detection value. The dangerous area detection value is compared with a preset dangerous area detection threshold. If the dangerous area detection value exceeds the preset dangerous area detection threshold, a structural unreliable signal for the corresponding field-effect transistor is generated.

[0021] If the detected hazard value does not exceed the preset hazard detection threshold, the accumulation area of ​​the hazard zone on the field-effect transistor is obtained, and the corresponding accumulation area is marked as the target area; the number of hazard zones involved in the corresponding target area is obtained and marked as the hazard accumulation value. The hazard accumulation value is compared with the preset hazard accumulation threshold. If the hazard accumulation value exceeds the preset hazard accumulation threshold, the corresponding target area is marked as a hazard accumulation area.

[0022] The number of potential hazard regions on the corresponding field-effect transistor is obtained and marked as the potential hazard value, and the largest potential hazard value is marked as the potential hazard amplitude value. The structural reliability impact value is calculated by weighted summation of the potential hazard detection value, the potential hazard value, and the potential hazard amplitude value. The structural reliability impact value is compared with the preset structural reliability impact threshold. If the structural reliability impact value exceeds the preset structural reliability impact threshold, a structural unreliable signal for the corresponding field-effect transistor is generated; if the structural reliability impact value does not exceed the preset structural reliability impact threshold, a structural reliable signal for the corresponding field-effect transistor is generated.

[0023] Furthermore, both the structural reliability analysis module and the transistor quality assessment decision module are communicatively connected to the transistor production strategy analysis module. The structural reliability analysis module sends the structural reliability signal or structural unreliability signal of the corresponding field-effect transistor to the transistor production strategy analysis module, and the transistor quality assessment decision module sends the transistor quality inspection report to the production strategy analysis module.

[0024] The transistor production strategy analysis module is used to set the detection period, analyze the production status of field-effect transistors during the detection period, generate production control qualified signals or production control abnormal signals through analysis, and send the production control qualified signals or production control abnormal signals to the back-end management terminal. When the back-end management terminal receives the production control abnormal signal, it issues a corresponding warning.

[0025] Furthermore, the specific analysis process of the transistor production strategy analysis module is as follows:

[0026] The number of field-effect transistors corresponding to structurally unreliable signals produced during the inspection period and the number of field-effect transistors that were not evaluated as qualified products are obtained. The two are summed to obtain the transistor defect value. The transistor defect value is calculated as a ratio to the total number of field-effect transistors produced during the inspection period to obtain the transistor substandard value. The transistor substandard value is compared with a preset transistor substandard threshold. If the transistor substandard value exceeds the preset transistor substandard threshold, a production control abnormal signal is generated.

[0027] If the transistor sagging value exceeds the preset transistor sagging threshold, all faults that occur during the production process of the field-effect transistor during the detection period are obtained. The resolution time of the corresponding fault is compared with the corresponding preset resolution time threshold. If the resolution time exceeds the corresponding preset resolution time threshold, the corresponding fault is assigned the reactivation non-timely symbol XW-1.

[0028] The system obtains the total number of faults occurring during the production process of field-effect transistors within the detection period and marks them as fault occurrence frequency values. It also marks the number of times the reconnection delay symbol XW-1 is generated within the detection period as a reconnection delay value. Furthermore, it calculates the reconnection time measurement value by comparing the resolution time with a corresponding preset resolution time threshold, and calculates the average of all reconnection time measurement values ​​within the detection period to obtain the reconnection status value. Finally, it calculates the production strategy impact value by weighted summing of the fault occurrence frequency value, reconnection delay value, and reconnection status value. The production strategy impact value is then compared with a preset production strategy impact threshold. If the production strategy impact value exceeds the preset production strategy impact threshold, a production control anomaly signal is generated; otherwise, a production control qualified signal is generated.

[0029] Furthermore, the present invention also proposes a field-effect transistor quality testing device, which adopts the field-effect transistor quality testing system described above.

[0030] Compared with the prior art, the beneficial effects of the present invention are:

[0031] 1. In this invention, the structural reliability of the field-effect transistor is evaluated by analyzing the transistor image through a structural reliability analysis module. When generating a structural reliability signal, multiple excitation signals suitable for field-effect transistor detection are generated. Multiple electrical and non-electrical parameters of the field-effect transistor under signal excitation are collected and analyzed in depth. Based on the analysis report and combined with preset quality standards and evaluation models, the quality of the field-effect transistor is evaluated, realizing comprehensive, efficient and accurate detection of the field-effect transistor with a high level of automation.

[0032] 2. In this invention, the production status of field-effect transistors during the detection period is analyzed by the transistor production strategy analysis module. The analysis generates a production control qualified signal or a production control abnormal signal. When a production control abnormal signal is generated, the back-end management terminal issues a corresponding warning to remind the back-end management personnel to adjust the production control plan of field-effect transistors in a timely manner, strengthen subsequent production supervision, and ensure subsequent production stability and production quality. The invention has a high level of intelligence. Attached Figure Description

[0033] To facilitate understanding by those skilled in the art, the present invention will be further described below with reference to the accompanying drawings;

[0034] Figure 1 This is a system block diagram of Embodiment 1 of the present invention;

[0035] Figure 2 This is a system block diagram of Embodiment 2 of the present invention. Detailed Implementation

[0036] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] Example 1: As Figure 1 As shown, the present invention proposes a field-effect transistor quality testing system and device, including a transistor scanning module, a structural reliability analysis module, a signal excitation generation module, an intelligent feature analysis module, a transistor quality assessment decision module, and an interactive alarm terminal; and the present invention also proposes a field-effect transistor quality testing device, which adopts the above-mentioned field-effect transistor quality testing system.

[0038] In detail, the transistor scanning module performs an external scan of the field-effect transistor and sends the scanned transistor image to the structural reliability analysis module; the structural reliability analysis module analyzes the transistor image to evaluate the structural reliability of the field-effect transistor, and generates a structurally reliable signal or a structurally unreliable signal accordingly, and sends the structurally unreliable signal to the interactive alarm terminal.

[0039] When the interactive alarm terminal receives a structural unreliability signal, it issues a corresponding warning, enabling accurate judgment of the surface condition of the field-effect transistor. Furthermore, when a structural unreliability signal is generated, it reminds inspection personnel not to perform subsequent quality inspection operations on the field-effect transistor, avoiding unnecessary waste of manpower, resources, and funds. The specific analysis process of the structural reliability analysis module is as follows:

[0040] The transistor image is acquired and its contour is compared with the corresponding standard image. The contour overlap of the field-effect transistor is collected accordingly. The contour overlap is compared with a preset contour overlap threshold. If the contour overlap does not exceed the preset contour overlap threshold, it indicates that the size contour of the corresponding field-effect transistor does not meet the standard, and a structural unreliable signal of the corresponding field-effect transistor is generated.

[0041] If the contour overlap exceeds the preset contour overlap threshold, the defects (including scratches, pinholes, etc.) existing on the surface of the field-effect transistor are captured based on the transistor image, and the detection data of various parameters of the corresponding defects (such as the length, width, depth, etc. of the scratch) are collected. The detection data of each parameter are compared with the corresponding preset data safety threshold.

[0042] If any parameter in the test data exceeds the corresponding preset data safety threshold, it indicates that the corresponding defect has a significant adverse impact on the performance and quality of the field-effect transistor, and the corresponding defect is marked as a fatal defect; if a fatal defect exists on the field-effect transistor, it indicates that the structural reliability of the corresponding field-effect transistor is poor, and a structural unreliable signal for the corresponding field-effect transistor is generated.

[0043] If there are no fatal defects on the field-effect transistor, several sub-inspection areas are defined on the field-effect transistor. If a defect is involved in the corresponding sub-inspection area, the corresponding sub-inspection area is marked as a dangerous area. The number of dangerous areas on the field-effect transistor is obtained and the ratio of it to the number of sub-inspection areas is calculated to obtain the dangerous area detection value. The dangerous area detection value is compared with a preset dangerous area detection threshold. If the dangerous area detection value exceeds the preset dangerous area detection threshold, it indicates that the structural reliability of the corresponding field-effect transistor is poor, and a structural unreliability signal for the corresponding field-effect transistor is generated.

[0044] If the detected hazard value does not exceed the preset hazard detection threshold, the clustered area of ​​the hazard region on the field-effect transistor is obtained, and the corresponding clustered area is marked as the target area; the number of hazard regions involved in the corresponding target area is obtained and marked as the hazard cluster value, and the hazard cluster value is compared with the preset hazard cluster threshold. If the hazard cluster value exceeds the preset hazard cluster threshold, the corresponding target area is marked as a hazard cluster area; the number of hazard cluster areas on the corresponding field-effect transistor is obtained and marked as a hazard cluster value, and the hazard cluster value with the largest value is marked as the hazard cluster amplitude value.

[0045] The structural reliability impact value is calculated by weighting and summing the surface hazard detection value, the cluster hazard value, and the surface hazard cluster amplitude value. Specifically, each of the surface hazard detection value, cluster hazard value, and surface hazard cluster amplitude value is assigned a corresponding preset weight coefficient, and then each of these values ​​is multiplied by its respective preset weight coefficient. The sum of these three products is then labeled as the structural reliability impact value. It should be noted that the larger the structural reliability impact value, the worse the overall structural reliability of the corresponding field-effect transistor.

[0046] The structural reliability impact value is compared with the preset structural reliability impact threshold. If the structural reliability impact value exceeds the preset structural reliability impact threshold, it indicates that the overall structural reliability of the corresponding field-effect transistor is poor, and a structural unreliable signal for the corresponding field-effect transistor is generated. If the structural reliability impact value does not exceed the preset structural reliability impact threshold, it indicates that the overall structural reliability of the corresponding field-effect transistor is good, and a structural reliable signal for the corresponding field-effect transistor is generated.

[0047] When generating a structurally reliable signal, the signal excitation generation module generates a variety of excitation signals suitable for field-effect transistor (FET) detection, which excite different performance characteristics of the FET. It can generate various types of excitation signals with adjustable parameters to meet the needs of different FETs and detection projects, providing rich signal conditions for comprehensive detection of FET performance and improving the comprehensiveness and accuracy of detection.

[0048] It should be noted that the signal excitation generation module determines the required excitation signal type, such as square wave signal, sine wave signal, pulse signal, etc., based on the type of field-effect transistor and detection requirements. Through the internal signal generation circuit and combined with digital signal processing technology, it precisely controls the signal parameters such as frequency, amplitude, and duty cycle. After amplification and buffering, the generated excitation signal is output to the intelligent feature analysis module.

[0049] For example, when testing the switching characteristics of a field-effect transistor, a square wave signal with a specific frequency and amplitude is generated to simulate the switching control signal in an actual circuit; when testing its frequency response characteristics, sine wave signals of different frequencies are generated, and the frequency range is gradually scanned to observe the response of the field-effect transistor to signals of different frequencies.

[0050] The intelligent feature analysis module collects various electrical and non-electrical parameters of the field-effect transistor (FET) under signal excitation, performs in-depth analysis on the collected data, and extracts the key performance characteristics of the FET. It can not only collect multiple parameters of the FET simultaneously, comprehensively reflecting the performance status of the device under different operating conditions, but also provide rich data support for accurately evaluating its quality, avoiding the limitations of single parameter detection. Furthermore, it can accurately extract the key performance characteristics of the FET, providing a scientific and objective basis for quality evaluation, and improving the accuracy and reliability of quality evaluation.

[0051] It should be noted that the intelligent feature analysis module is used to receive the excitation signal output by the signal excitation generation module and apply it to the field-effect transistor to be detected. It also uses high-precision sensors and acquisition circuits to collect various parameters of the field-effect transistor in real time and performs analog-to-digital conversion on the collected multi-parameter data.

[0052] The electrical parameters collected include drain current, source voltage, gate voltage, and transconductance. High-precision current and voltage sensors convert the current and voltage signals into digital signals, which are then amplified and filtered to improve the signal-to-noise ratio and accuracy. Non-electrical parameters, such as temperature and packaging stress, are collected using temperature and stress sensors. The temperature sensor monitors the temperature changes of the field-effect transistor in real time, while the stress sensor detects the impact of stress generated during packaging on device performance.

[0053] Furthermore, the intelligent feature analysis module is used to preprocess the collected multi-parameter data, including data calibration and noise removal, to improve data quality and reliability. Then, signal processing algorithms and machine learning techniques are used to extract features from the processed data. For example, by analyzing the drain current versus time curve, feature parameters such as rise time, fall time, and overshoot are extracted to evaluate the switching speed and dynamic characteristics of the field-effect transistor (FET). Analysis of the transconductance versus gate voltage curve determines its maximum value, linearity, and other characteristics, reflecting the gain characteristics of the FET. Simultaneously, this module also combines non-electrical parameters such as temperature and stress to analyze their impact on electrical parameters, comprehensively evaluating the performance stability of the FET under different environmental conditions. After feature extraction and analysis, an analysis report containing key performance characteristics is generated and transmitted to the transistor quality assessment decision module.

[0054] The transistor quality assessment decision module, based on the analysis report provided by the intelligent feature analysis module and combined with preset quality standards and assessment models, comprehensively evaluates the quality of field-effect transistors (FETs) and sends the transistor quality inspection report to the interactive alarm terminal. This allows for a comprehensive and objective quality assessment of FETs according to preset quality standards and assessment models, facilitating targeted improvement measures for quality control during the production process and contributing to improved overall product quality and market competitiveness. The specific operation process of the transistor quality assessment decision module is as follows:

[0055] The system receives the analysis report generated by the intelligent feature analysis module and compares it with the preset quality standards stored internally. It should be noted that these quality standards are formulated based on the application scenarios and performance requirements of the field-effect transistor and cover multiple indicators such as switching characteristics, gain characteristics, and stability. By establishing a multi-parameter comprehensive evaluation model, the system performs weighted scoring on various performance characteristics of the field-effect transistor and calculates the comprehensive quality score.

[0056] Based on the comprehensive quality score, field-effect transistors are classified into different quality levels, including qualified products, substandard products, and scrap products. Detailed test reports are generated based on the evaluation results, including the quality level, the evaluation of various performance indicators, and possible problems and suggestions, providing a reference for production and use.

[0057] Example 2: Figure 2 As shown, the difference between this embodiment and Embodiment 1 is that both the structural reliability analysis module and the transistor quality assessment decision module are communicatively connected to the transistor production strategy analysis module. The structural reliability analysis module sends the structural reliability signal or structural unreliability signal of the corresponding field-effect transistor to the transistor production strategy analysis module, and the transistor quality assessment decision module sends the transistor quality inspection report to the production strategy analysis module.

[0058] The transistor production strategy analysis module is used to set the detection period, analyze the production status of field-effect transistors during the detection period, and generate production control pass or fail signals through analysis. These signals are then sent to the back-end management terminal. Upon receiving a production control fail signal, the back-end management terminal issues a corresponding warning to remind back-end managers to adjust the field-effect transistor production control plan in a timely manner, strengthen subsequent production supervision, and ensure subsequent production stability and quality. The module exhibits a high level of intelligence. The specific analysis process of the transistor production strategy analysis module is as follows:

[0059] The number of field-effect transistors (FETs) corresponding to structurally unreliable signals produced during the testing period and the number of FETs not evaluated as qualified products are obtained. The two are summed to obtain the transistor defect value. The transistor defect value is then compared with the total number of FETs produced during the testing period to obtain the transistor substandard value. The transistor substandard value is then compared with a preset transistor substandard threshold. If the transistor substandard value exceeds the preset transistor substandard threshold, it indicates that the production quality during the testing period is poor and the production control performance of the FETs is poor. In this case, a production control abnormality signal is generated.

[0060] If the transistor sagging value exceeds the preset transistor sagging threshold, all faults that occur during the production process of the field-effect transistor during the detection period are obtained. The resolution time of the corresponding fault is compared with the corresponding preset resolution time threshold. If the resolution time exceeds the corresponding preset resolution time threshold, the corresponding fault is assigned the reactivation non-timely symbol XW-1.

[0061] The total number of faults that occurred during the production process of field-effect transistors during the detection period is obtained and marked as the fault generation frequency value. The number of times the reconnection delay symbol XW-1 is generated during the detection period is marked as the reconnection delay value. The reconnection time measurement value is obtained by calculating the ratio of the resolution time to the corresponding preset resolution time threshold. The reconnection status value is obtained by averaging all the reconnection time measurement values ​​during the detection period.

[0062] The production strategy impact value is calculated by weighting and summing the fault occurrence frequency value, reconnection delay value, and reconnection status value. Specifically, each of the three values ​​is assigned a corresponding preset weight coefficient, and then multiplied by its respective preset weight coefficient. The sum of these three products is then marked as the production strategy impact value. It should be noted that the larger the production strategy impact value, the worse the overall production control performance of the field-effect transistor during the testing period.

[0063] The production strategy impact value is compared with the preset production strategy impact threshold. If the production strategy impact value exceeds the preset production strategy impact threshold, it indicates that the overall production control performance of the field-effect transistor during the detection period is poor, and a production control abnormality signal is generated. If the production strategy impact value does not exceed the preset production strategy impact threshold, it indicates that the overall production control performance of the field-effect transistor during the detection period is good, and a production control qualified signal is generated.

[0064] The working principle of this invention is as follows: During use, the transistor scanning module performs an external scan of the field-effect transistor (FET). The structural reliability analysis module analyzes the transistor image to assess its structural reliability. When a structurally unreliable signal is generated, the testing personnel are alerted not to perform subsequent quality testing operations on the FET, avoiding unnecessary waste of manpower, resources, and funds. When a structurally reliable signal is generated, the signal excitation generation module generates various excitation signals suitable for FET testing. The intelligent feature analysis module collects and deeply analyzes various electrical and non-electrical parameters of the FET under signal excitation, extracting key performance characteristics. The transistor quality assessment decision module, based on the analysis report provided by the intelligent feature analysis module and combined with preset quality standards and evaluation models, performs a comprehensive and objective quality assessment of the FET. This facilitates targeted improvement measures for quality control during the production process, helping to improve the overall product quality and market competitiveness. It achieves comprehensive, efficient, and accurate testing of FETs, thereby improving quality testing levels and production efficiency.

[0065] In this invention, the threshold, preset value, or preset range settings are for result comparison and analysis to determine whether the result is good or bad. The magnitude of these values ​​is determined by a combination of large-scale model analysis of sample data and human experience, and can also be appropriately adjusted based on seasonal or common-sense influence conditions. Similarly, the preset weight coefficients and influence factors are assigned specific values ​​based on the magnitude of each parameter's influence on the result, ultimately reflecting the impact on the result. These settings are also determined by a combination of large-scale model analysis of sample data and human experience, and can also be appropriately adjusted based on seasonal or common-sense influence conditions.

[0066] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to any specific implementation. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, enabling those skilled in the art to better understand and utilize it. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A field-effect transistor quality inspection system, characterized in that, It includes a transistor scanning module, a structural reliability analysis module, a signal excitation generation module, an intelligent feature analysis module, a transistor quality assessment decision module, and an interactive alarm terminal; the transistor scanning module performs an appearance scan on the field-effect transistor, and the structural reliability analysis module analyzes the transistor image to assess the structural reliability of the field-effect transistor, thereby generating a structurally reliable signal or a structurally unreliable signal; When generating a structurally reliable signal, the signal excitation generation module generates a variety of excitation signals suitable for field-effect transistor detection, and the intelligent feature analysis module collects a variety of electrical and non-electrical parameters of the field-effect transistor under signal excitation, performs in-depth analysis on the collected data, and extracts the key performance characteristics of the field-effect transistor. The transistor quality assessment decision module, based on the analysis report provided by the intelligent feature analysis module and combined with the preset quality standards and assessment model, comprehensively assesses the quality of the field-effect transistor and sends the transistor quality test report to the interactive alarm terminal. The specific analysis process of the structural reliability analysis module includes: The transistor image is acquired and its contour is compared with the corresponding standard image. Based on this, the contour overlap degree of the field-effect transistor is collected. If the contour overlap degree does not exceed the preset contour overlap degree threshold, the structural unreliability signal of the corresponding field-effect transistor is generated; if the contour overlap degree exceeds the preset contour overlap degree threshold, defect identification decision analysis is performed. The specific analysis process for defect identification decision analysis is as follows: Based on the transistor image capture of defects existing on the surface of the field-effect transistor, the detection data of various parameters of the corresponding defects are collected. The detection data of each parameter is compared with the corresponding preset data safety threshold. If there is a parameter whose detection data exceeds the corresponding preset data safety threshold, the corresponding defect is marked as a fatal defect. If there is a fatal defect on the field-effect transistor, the structural unreliability signal of the corresponding field-effect transistor is generated. If there are no fatal defects on the field-effect transistor, several sub-inspection areas are defined on the field-effect transistor. If a defect is involved in the corresponding sub-inspection area, the corresponding sub-inspection area is marked as a dangerous area. The number of dangerous areas on the field-effect transistor is obtained and the ratio of it to the number of sub-inspection areas is calculated to obtain the dangerous area detection value. The dangerous area detection value is compared with a preset dangerous area detection threshold. If the dangerous area detection value exceeds the preset dangerous area detection threshold, a structural unreliable signal for the corresponding field-effect transistor is generated. If the detected hazard value does not exceed the preset hazard detection threshold, the accumulation area of ​​the hazard zone on the field-effect transistor is obtained, and the corresponding accumulation area is marked as the target area; the number of hazard zones involved in the corresponding target area is obtained and marked as the hazard accumulation value. The hazard accumulation value is compared with the preset hazard accumulation threshold. If the hazard accumulation value exceeds the preset hazard accumulation threshold, the corresponding target area is marked as a hazard accumulation area. The number of potential hazard regions on the corresponding field-effect transistor is obtained and marked as the potential hazard value, and the largest potential hazard value is marked as the potential hazard amplitude value. The structural reliability impact value is calculated by weighted summation of the potential hazard detection value, the potential hazard value, and the potential hazard amplitude value. The structural reliability impact value is compared with the preset structural reliability impact threshold. If the structural reliability impact value exceeds the preset structural reliability impact threshold, a structural unreliable signal for the corresponding field-effect transistor is generated; if the structural reliability impact value does not exceed the preset structural reliability impact threshold, a structural reliable signal for the corresponding field-effect transistor is generated.

2. The field-effect transistor quality inspection system according to claim 1, characterized in that, The signal excitation generation module determines the required excitation signal type based on the type of field-effect transistor and the detection requirements. It controls the signal parameters through its internal signal generation circuit and digital signal processing technology. The generated excitation signal is amplified and buffered before being output to the intelligent feature analysis module.

3. The field-effect transistor quality inspection system according to claim 1, characterized in that, The intelligent feature analysis module receives the excitation signal output by the signal excitation generation module and applies it to the field-effect transistor to be tested. It also uses high-precision sensors and acquisition circuits to collect various parameters of the field-effect transistor in real time and performs analog-to-digital conversion on the collected multi-parameter data.

4. The field-effect transistor quality inspection system according to claim 3, characterized in that, The intelligent feature analysis module is also used to preprocess the collected multi-parameter data and to extract features from the processed data using signal processing algorithms and machine learning techniques. After feature extraction and analysis, an analysis report containing key performance characteristics is generated and transmitted to the transistor quality assessment decision module.

5. The field-effect transistor quality inspection system according to claim 1, characterized in that, The specific operation process of the transistor quality assessment decision module is as follows: The system receives the analysis report generated by the intelligent feature analysis module, compares it with the preset quality standards stored internally, and calculates the comprehensive quality score by weighting the various performance characteristics of the field-effect transistor through the establishment of a multi-parameter comprehensive evaluation model. Based on the overall quality score, field-effect transistors are classified into different quality levels, including qualified products, substandard products, and scrap products. A detailed test report is generated based on the evaluation results, including the quality level, the evaluation of various performance indicators, and the problems and suggestions.

6. The field-effect transistor quality inspection system according to claim 1, characterized in that, Both the structural reliability analysis module and the transistor quality assessment decision module are communicatively connected to the transistor production strategy analysis module. The transistor production strategy analysis module is used to analyze the production status of field-effect transistors during the testing period and send production control qualified signals or production control abnormal signals to the back-end management terminal.

7. The field-effect transistor quality inspection system according to claim 6, characterized in that, The specific analysis process of the transistor production strategy analysis module is as follows: If the transistor sagging value exceeds the preset transistor sagging threshold, a production control abnormality signal is generated; if the transistor sagging value exceeds the preset transistor sagging threshold, the production strategy impact value is calculated by weighting and summing the fault generation frequency value, the reconnection delay value, and the reconnection status value; if the production strategy impact value exceeds the preset production strategy impact threshold, a production control abnormality signal is generated; otherwise, a production control qualified signal is generated.

8. A field-effect transistor quality testing device, characterized in that, The testing equipment uses the field-effect transistor quality testing system as described in any one of claims 1-7.

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