Power semiconductor element testing device

Abstract

The invention relates to a power semiconductor element testing device. A power supply device (132) that supplies a test current or a test voltage to the power semiconductor element (117); and a gate driver circuit (113) that applies an ON voltage (Vg), a first OFF voltage, and a second OFF voltage (Vt) lower than the first OFF voltage to the signal terminal (g). And a constant current circuit (118) that supplies a constant current (Ic) between the first element terminal (c) and the second element terminal (e). And a voltage output circuit (116) that outputs a voltage (Vi) between the first element terminal (c) and the second element terminal (e). And a temperature acquisition circuit (117) that applies a first off voltage (Vt) to the signal terminal (g), applies a second off voltage (Vt) to the signal terminal (g), supplies a constant current (Ic) between the first element terminal (c) and the second element terminal (e), and acquires the voltage output by the voltage output circuit (116) as temperature information (Tj) of the power semiconductor element (117) in a state where the constant current (Ic) is supplied.

Description

[0001] This invention application is a divisional application filed with a Chinese invention application that has entered the Chinese national phase based on the international application PCT application number PCT / JP2020 / 020629, entitled "Semiconductor Component Testing Apparatus and Test Method for Semiconductor Components". The application number of the Chinese invention application is 202080040749.2, and the application date is May 25, 2020. Technical Field

[0002] This invention relates to semiconductor components, electrical component testing apparatus for testing electrical components, and testing methods for electrical components. Background Technology

[0003] In life testing of electrical components such as semiconductor devices, the current flow is switched on and off. This is especially true for power semiconductor devices, where the current applied can reach hundreds of amperes. There are many types of electrical component tests, requiring adjustments to the wiring connections accordingly.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2017-17822 Summary of the Invention

[0007] The technical problem that the invention aims to solve

[0008] The constant current applied to test semiconductor components such as transistors is hundreds of amps or more, so the wiring needs to be made of thick wire with low resistance.

[0009] Thicker connecting cables are stiffer and lack flexibility. Changes to thicker connecting cables, especially for test projects, require a significant amount of time.

[0010] Solution to the above technical problems

[0011] The semiconductor device testing apparatus of the present invention uses a partition wall 214 to separate the space inside the semiconductor device testing apparatus in which transistors 117 and the like are arranged for testing from the arrangement location of the circuit board that generates control signals for the transistors 117 and the like.

[0012] A fork-shaped plug is used in the connection with the circuit board, etc. Connection and connection changes are performed by inserting the fork-shaped plug 205 through the opening 216 provided in the partition 214, so that the fork-shaped plug 215 makes electrical contact with the conductor plate 204 of the circuit board.

[0013] Invention Effects

[0014] By changing the position of the fork-shaped plug 205 inserted into the insertion opening portion 216, the connection of the semiconductor element 117 to the test circuit can be easily changed. The connection work of the connection wiring 211 for each test item, or the connection change is performed by the change of the position of the fork-shaped plug 205, so that the time for the connection change can be greatly shortened. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 is a block diagram of a semiconductor element test device of the present application and an explanatory diagram.

[0016] Figure 2 is a configuration diagram of a semiconductor element test device of the present application.

[0017] Figure 3 is an explanatory diagram of a semiconductor element subjected to a test and an equivalent circuit diagram.

[0018] Figure 4 is a block diagram of a semiconductor element test device of the present application and an explanatory diagram.

[0019] Figure 5 is an explanatory diagram and a configuration diagram of a semiconductor element test device of the present application.

[0020] Figure 6 is an explanatory diagram and a configuration diagram of a semiconductor element test device of the present application.

[0021] Figure 7 is an explanatory diagram and a configuration diagram of a heat pipe portion of the present application.

[0022] Figure 8 is an explanatory diagram and a configuration diagram of a heat pipe portion of the present application.

[0023] Figure 9 is an explanatory diagram and a configuration diagram of a mounting portion of a semiconductor element of the present application.

[0024] Figure 10 is an explanatory diagram and a configuration diagram of a mounting portion of a semiconductor element of the present application.

[0025] Figure 11 is an explanatory diagram and a configuration diagram of a mounting portion of a semiconductor element of the present application.

[0026] Figure 12 is an explanatory diagram and a configuration diagram of a mounting portion of a semiconductor element of the present application.

[0027] Figure 13 is an explanatory diagram of an electrical connection portion of a semiconductor element test device of the present application.

[0028] Figure 14 is an explanatory diagram and a configuration diagram of an electrical connection portion of a semiconductor element test device of the present application.

[0029] Figure 15 is a diagram and a configuration diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0030] Figure 16 is a diagram and a configuration diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0031] Figure 17 is a diagram and a block diagram of a semiconductor element testing device of the present application.

[0032] Figure 18 is a diagram and a configuration diagram of an electrical connection portion of a semiconductor element testing device of the present application.

[0033] Figure 19 is a timing chart of a testing method of a semiconductor element of the present application.

[0034] Figure 20 is a diagram of a circuit portion of a semiconductor element testing device of the present application.

[0035] Figure 21 is a diagram of a circuit portion of a semiconductor element testing device of the present application.

[0036] Figure 22 is a diagram of a testing method of a semiconductor element of the present application.

[0037] Figure 23 is a diagram of a testing method of a semiconductor element of the present application.

[0038] Figure 24 is a diagram of a testing method of a semiconductor element of the present application.

[0039] Figure 25 is a diagram of a testing method of a semiconductor element of the present application.

[0040] Figure 26 is a diagram of a testing method of a semiconductor element of the present application.

[0041] Figure 27 is a block diagram and a timing chart of a semiconductor element testing device of the present application. DETAILED DESCRIPTION

[0042] Hereinafter, a testing device and a testing method of an electrical element of an embodiment of the present application will be described with reference to the drawings.

[0043] In the embodiment described in the specification, as a power semiconductor element of an electrical element, an IGBT is mainly described as an example.

[0044] The present application is not limited to IGBTs, and can be applied to SiC transistors, MOSFETs, JFETs, thyristors, diodes, thermistors, resetters, and various semiconductor elements.

[0045] In addition, the present application is not limited to semiconductor elements, and can of course be applied to resistance elements, capacitors, coils, crystal elements, ZNRs, and electrical elements other than semiconductor elements.

[0046] Embodiments of the present application can be combined with some or all of the respective embodiments, and can be modified and combined.

[0047] Figure 2 is a configuration diagram and explanatory diagram of a semiconductor element testing device of the present application. As shown in (a) of Figure 2 The semiconductor element testing device of the present application has a housing 210, a cooler (cooling / warming device) 136, a heating cooling plate 134, and a circulation water pipe 135 circulating between the heating cooling plate 134 and the cooler 136. On the heating cooling plate 134, a transistor 117 or the like to be tested is arranged in close contact with the heating cooling plate 134.

[0048] As shown in (b) of Figure 2 An opening 216 of a connection structure 218 described in (a) to (c) is arranged in a partition wall 217. A hole into which a power supply wiring 212 is inserted is arranged in the partition wall 215. Figure 7 Figure 9 Figure 11 The connection structure 218 is arranged in the opening 216 of the partition wall 217.

[0049] The control rack 131 has a power supply device 132 supplying a test current and a test voltage to the semiconductor element 117, and a control circuit 133 controlling the semiconductor element 117 or the like or setting a test condition.

[0050] The control circuit 133 changes the current Id, the gate voltage Vg, and the voltage Vce to set a test condition and perform a test in such a manner that the temperature information Tj of the semiconductor element 117 reaches a prescribed value.

[0051] The control circuit 133 controls the power supply device 132, and the power supply device 132 supplies a test voltage or a test current to the semiconductor element 117 to be tested.

[0052] When the temperature information Tj changes or changes to a prescribed value, it is determined that the semiconductor element 117 is deteriorated or a characteristic is changed, and the test of the semiconductor element 117 is stopped, or the test method or the control method is changed.

[0053] ​​The temperature of the semiconductor element 117 is maintained at a predetermined value or a prescribed value by warming or cooling the circulating water of the cooler 136. In addition, the temperature of the semiconductor element and the like is periodically changed in correspondence with the test conditions, and cooling or heating is performed in a constant manner.

[0054] As an example, the semiconductor element test device and the test method of the semiconductor element of the present application can cope with Figure 3 various semiconductor elements 117, semiconductor modules 117 shown in the drawing. Figure 3 The semiconductor element 117 and the like of the present application have a terminal P electrode terminal, an O electrode terminal, and an N electrode terminal to which a large current is applied or output.

[0055] Figure 3 is a schematic diagram and an equivalent circuit diagram of a semiconductor element. Figure 3 (a1), (a2) of the present application are configurations having one transistor 117 and a diode Di.

[0056] Figure 3 (b1), (b2) of the present application are configurations having a transistor 117 (transistor 117m, transistor 117s) and a diode Di (diode Dim, diode Dis).

[0057] Figure 3 (c1), (c2) of the present application are configurations in which a plurality of transistors are connected by connecting terminals of semiconductor elements having a transistor 117 (transistor 117m, or transistor 117s) and a diode Di (diode Dim, or diode Dis).

[0058] Figure 3 (d1), (d2) of the present application are configurations having a transistor 117 (transistor 117m, transistor 117s) and a diode D (diode Ds, diode Dm) having a terminal independent of the terminal of the transistor.

[0059] Figure 3 (e1), (e2) of the present application are configurations in which a plurality of transistors are connected by connecting terminals of semiconductor elements having a transistor 117 (transistor 117m or transistor 117s) and a diode D (diode Dm or diode Ds) having a terminal independent of the terminal of the transistor.

[0060] In the following embodiments, mainly Figure 3 semiconductor elements 117 shown in the drawing are described.

[0061] Figure 1 is a block diagram and an explanatory diagram of the semiconductor element test device of the present application.

[0062] The power supply device 132 outputs a constant current of a large current for testing the transistor 117. The power supply device 132 supplies power (current, voltage) in synchronization with a control signal from the control circuit substrate (controller) 111. The power supply device 132 can set a maximum voltage value of the output.

[0063] The switching circuit 122 (SWa) has a function of turning on (supplying, applying) and turning off (blocking, opening) the supply of the constant current output from the power supply device 132.

[0064] In the semiconductor element testing device of the present application, the power supply device 132 is not limited to one. Two or more power supply devices 132 can be provided.

[0065] In the embodiment of the present application, as the connection plug 205, a fork-shaped plug is exemplified and described. As the fork-shaped plug 205e connected to the collector terminal of the transistor 117, the fork-shaped plug 205d connected to one terminal of the power supply device 132, the fork-shaped plug 205 is connected to one end of each of the connection wiring 211 and the power supply wiring 212, and to the conductor plate 204.

[0066] Note that, in the present specification and the drawings, the conductor plate 204 is described, but is not limited to a plate, and can be a rod. It can be composed of a plurality of structures. It can be any shape or the like as long as it can be engaged with the fork-shaped plug 205 or the like. For example, it can be a socket, a connector, or the like. Alternatively, the conductor plate 204 can be provided in a fork-shaped plug shape, and the fork-shaped plug 205 can be connected to the fork-shaped plug.

[0067] The present application can be any configuration as long as the fork-shaped plug 205 or the like is formed or disposed at least one terminal of the transistor 117 on which the test is performed, and is electrically connected to the connection object such as the fork-shaped plug 205 and the conductor plate 204.

[0068] The fork-shaped plug 205 is described as the fork-shaped plug 205 inserted into the partition wall 214 or the like that constitutes or structures a separate space. However, it is not limited thereto. For example, the fork-shaped plug 205c can be connected to the conductor plate 204b, and the fork-shaped plug 205c can be inserted from the partition wall 214 to be electrically connected to one terminal (emitter terminal e) of the transistor 117.

[0069] The partition wall 214, the partition wall 215, and the partition wall 217 of the semiconductor element testing device of the present application can be any partition wall as long as it divides or separates a space or an area. Various configurations or structures such as a wall shape, a plate shape, a mesh shape, a film shape, a foil shape, and the like are applicable.

[0070] The fork plug 205 can be any of a configuration, structure, method, form, or the like that can be electrically connected to an object such as the conductor plate 204 by press-fitting, press-contacting, inserting, press-fitting, clamping, fitting, or the like.

[0071] The test current Id flowing through the transistor 117 is supplied by operating the power supply device 132. The power supply device 132 is controlled to operate / operate (turn on / off) in accordance with a signal from the control circuit board (controller) 111. In addition, the output and non-output of the current Id can be switched. The device control circuit board 209 is controlled by the control circuit board (controller) 111.

[0072] In Figure 1 , the transistor 117 to be tested is exemplified Figure 3 by the transistor having the diode Di shown in (a). The transistor 117 is described with the emitter terminal e grounded. The gate driver circuit 113 is connected to the gate terminal g of the transistor 117.

[0073] In the sample connection circuit 203, the gate driver circuit 113, the variable resistance circuit 125, the constant current circuit 118, and the operational amplifier (buffer circuit) 116 are disposed or formed.

[0074] The sample connection circuit 203 is separated from the device control circuit board 209 in a manner that it can be disposed in a position close to the transistor 117 to be tested, and is electrically connected by the connector 208.

[0075] The sample connection circuit 203 is connected to the transistor 117 by the connection pin 206 of the connector 202. The gate driver circuit 113 is disposed in a short distance of 30 mm or less from the gate terminal g of the transistor 117. If the gate driver circuit 113 is farther from the gate terminal g of the transistor 117, noise and the like are superimposed on the gate terminal g, and the transistor 117 can malfunction due to the noise.

[0076] As shown in Figure 1 , a test signal is applied from the gate driver circuit 113 to the gate terminal g of the transistor 117. The gate driver circuit 113 has an operational amplifier circuit.

[0077] As shown in Figure 5 , the device control circuit board 209 is disposed in the B chamber of the housing 210 of the semiconductor element testing device. The housing 210 is assembled with the power supply device 132, the drive circuit system, the heating and cooling plate 134, and the like.

[0078] The sample connection circuit 203 is arranged near the transistor 117 to be tested, and thus in the Cl chamber of the housing 210 of the semiconductor device testing apparatus. The sample connection circuit 203 is connected to the connector 208 arranged on the side surface of the housing 210. The wiring connected to the connection pin 206 of the connector 208 is connected to the device control circuit board 209 in the B chamber.

[0079] The sample connection circuit 203 is connected to the device control circuit board 209 through the connection pin 206 of the connector 208. The sample connection circuit 203 is separately arranged corresponding to each transistor 117 to be tested, and is configured to be easily detached through the connector 202 or the like.

[0080] The constant current circuit 118 supplies a constant current Ic to the diode Di arranged or formed between the channels of the transistor 117. The operational amplifier circuit 116 buffers (reduces the output impedance) the terminal voltage of the diode Di, and outputs it as the Vi voltage. The Vi voltage is analog-digital converted by the temperature measuring circuit 115.

[0081] The temperature measuring circuit 115 obtains the temperature information Tj of the transistor 117 from the terminal voltage Vi, and transmits it to the control circuit board 111. The temperature information is output from the connector 213 of the device control circuit board 209 to the mother board 207, and transmitted to the control circuit board 111.

[0082] The gate driver circuit 113 applies a set frequency (on-off period), a set on voltage to the gate terminal of the transistor 117. As an example, as shown in (b) of FIG. 1, the on-off period of the transistor 117 is tcycle, and the on time is ton. Figure 27

[0083] The transistor 117 operates / non-operations (turns on / off) by the Vg signal voltage output from the gate driver circuit 113, and during the on period of the transistor 117, the current Id flows between the channels of the transistor 117.

[0084] The gate driver circuit 113 has a variable resistance circuit 125. The resistance value Vr of the variable resistance circuit 125 is configured to be able to be set to a constant voltage or a voltage varying with time between 0 (Ω) and 500 (Ω).

[0085] The gate driver circuit 113 can set the slope (rise time Tr) of the rising edge waveform and the slope (fall time Td) of the falling edge waveform of the gate signal applied to the gate terminal g of the transistor 117.

[0086] In the case of the transistor 117 to be tested, the gate driver circuit 113 sets the rise time Tr and the fall time Td of the gate signal applied to the gate terminal g of the transistor 117. Figure 1 ​The resistance value Vr of the variable resistance circuit 125 of the gate driver circuit 113 is variable, but is not limited thereto. For example, the variable resistance circuit 125 can be an external resistor.

[0087] The constant current circuit 118 causes a prescribed constant current Ic to flow. The constant current Ic is applied to the diode Di. By monitoring the terminal voltage of the diode Di, the temperature change of the transistor 117 can be measured or observed.

[0088] To prevent the transistor 117 from heating due to the constant current Ic, the constant current Ic is made to be a current value sufficiently smaller than the constant current Id flowing through the channel of the transistor 117.

[0089] Specifically, the constant current Ic is set to be 1 / 1000 or less of the current Id flowing through the transistor 117 at the time of the test. It is preferable that the current Ic flowing through the transistor 117 be 1 x 10 6 or more and 1 x 10 4 or less. The constant current Ic is 0.1 mA or more and 100 mA or less.

[0090] The channel current Id is varied, the diode Di voltage (the voltage between the collector and the emitter terminals of the transistor 117) is measured, and the temperature coefficient K is calculated. The calculated temperature coefficient K is stored in the temperature measuring circuit 115.

[0091] As the temperature coefficient K, the transistor 117 is made to be a prescribed temperature by heating and cooling the cooling plate 134, the constant current Ic is caused to flow through the diode Di, and the terminal voltage is measured. By varying the prescribed temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode Di with respect to the temperature of the transistor 117 can be acquired. Therefore, the temperature coefficient K of the transistor 117 can be calculated from the terminal voltage of the diode Di with respect to the temperature.

[0092] The constant current Ic flows through the diode Di when the channel current Id does not flow. That is, when the transistor 117 is not turned on, the constant current Ic flows to measure the voltage between the terminals of the diode Di.

[0093] The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi (terminal c-terminal e) of the diode Di.

[0094] Furthermore, the operational amplifier circuit 116 is not limited to being constituted by an operational amplifier element. As long as the output impedance is lower than the input impedance, it can be any circuit.

[0095] The calculated temperature information Tj is sent to the control circuit board (controller) 111. The control circuit board (controller) 111 judges that the transistor 117 is in a prescribed stress state or a deterioration state when the temperature information Tj reaches a prescribed set value or more, and performs control change of the test or test stop or the like.

[0096] In Figure 1 In the embodiment of the switch circuit Ssa 124a, the switch circuit Sab 124b, and the like, a symbol of a switch circuit is used. As the switch circuit 124, a transistor, a mechanical relay, a phototransistor, a photodiode switch, a photo-MOS relay, and the like can be exemplified.

[0097] Figure 4 Fig. 1 is an equivalent circuit diagram of a semiconductor element test device in a first embodiment of the present application and an explanatory diagram. In the present embodiment, as shown in (a) of Fig. 1, a switch circuit Ssa 124a, a switch circuit Sab 124b, and the like are formed in a switch circuit board (printed board) 201. Figure 4 In the present embodiment, as shown in (b) of Fig. 1, the switch circuit Ssa 124a, the switch circuit Sab 124b, and the like are formed using a power MOSFET 124. The voltage (Vsd) between the channels of the MOSFET is small, and thus is preferable.

[0098] The channel voltage (Vsdb) when the power MOSFET 124b is on is selected to be a channel voltage lower than the channel voltage (Vsda) when the power MOSFET 124a is on. That is, the channel voltage (Vsdb) when the power MOSFET 124b is on is smaller than the channel voltage (Vsda) when the power MOSFET 124a is on. This is to stably flow the current Im when the terminal of the power supply device 132 is short-circuited while the switch circuit 124b is on.

[0099] The switch circuit 124 is mounted or formed in the switch circuit board 201. The switch circuit 124 is connected to the conductor plate 204. As an example, the conductor plate 204 is a plate composed of copper having a thickness of 5 mm and a width of 50 mm. As an example, the length of the conductor plate 204 is 250 mm.

[0100] Figure 5 、 Figure 13 Fig. 2 shows the fork-shaped plug 205 and the connection (contact) state of the fork-shaped plug 205 and the conductor plate 204.

[0101] Figure 13 (a) of Fig. 3 is a diagram schematically showing a state in which the conductor plate 204 is mounted to the switch circuit board (printed board) 201 in which the switch circuit and the like are formed and the fork-shaped plug 205 is connected to the conductor plate 204 from above. Figure 13 (b) of Fig. 3 is an explanatory diagram in a state in which one end of the conductor plate 204 is gripped by the fork-shaped plug 205.

[0102] As shown in (a) of Fig. 4, the switch circuit 124 is formed in the switch circuit board 201. Figure 1As shown in FIG. 2, two conductor boards 204 are installed in the switching circuit substrate 201. The conductor boards 204 and the switching circuit substrate 201 are fixed by screws.

[0103] The electrical connection is achieved by mechanically fitting the fork-shaped plug 205 to the conductor board 204. When the U-shaped portion of the fork-shaped plug 205 is inserted into the conductor board 204, the fork-shaped plug 205 is well engaged with the conductor board 204.

[0104] As shown in FIG. 2, two conductor boards 204 are installed in the switching circuit substrate 201. The conductor boards 204 and the switching circuit substrate 201 are fixed by screws. Figure 13 As shown in FIG. 2, two conductor boards 204 are installed in the switching circuit substrate 201. The conductor boards 204 and the switching circuit substrate 201 are fixed by screws.

[0105] Figure 13 (b) shows a cross section at AA' of (a). The conductor board 204 and the fork-shaped plug 205 are in contact with each other at the contact portions 220a, 220b formed in the fork-shaped plug 205. The contact portions 220 are made of phosphor bronze or nickel alloy, and have spring characteristics. The surfaces of the contact portions 220 are plated with gold or silver. The electrical stability of the contact portions 220 is improved by plating. Figure 13

[0106] As shown in FIG. 2, two conductor boards 204 are installed in the switching circuit substrate 201. The conductor boards 204 and the switching circuit substrate 201 are fixed by screws. Figure 5 Figure 6 As shown in FIG. 2, two conductor boards 204 are installed in the switching circuit substrate 201. The conductor boards 204 and the switching circuit substrate 201 are fixed by screws.

[0107] Figure 5 The configuration of each component of the semiconductor element testing device according to the present application is shown. The housing 210 of the semiconductor element testing device has a plurality of sections. The lower portion of the housing is divided into an A chamber and a B chamber. The power supply device 132 is disposed in the A chamber. The A chamber and the B chamber are separated by a partition wall 215. The C1 chamber and the C2 chamber are separated by a partition wall 217.

[0108] The power supply device 132, the switching circuit substrate 201, and the transistor 117 generate large noise by repeatedly performing the operation / non-operation. Due to the noise, the circuit substrate and the like are misoperated. By electrostatically and electromagnetically shielding the partition walls of the chambers, the misoperation can be prevented.

[0109] The electrostatic and electromagnetic shielding is achieved by installing or forming a conductive plate, a metal plate, a metal thin film, or a metal mesh around each chamber or on the surface or inside of the partition walls.

[0110] In the C1 chamber, a heating and cooling plate 134, a circulating water pipe 135, and the like shown in FIG. 2 are disposed, and the transistor 117 to be tested is tightly disposed in the heating and cooling plate 134. Figure 2

[0111] ​​​A water leakage sensor (not shown) is installed around the heating and cooling plate in chamber C1. The sensor is configured to activate and stop the semiconductor component testing equipment or issue an alarm when leakage occurs, such as in the case of circulating water (cooling medium).

[0112] A drainage channel (not shown) is formed around the heating and cooling plate 134. The configuration is such that when circulating water (cooling medium) leaks from the heating and cooling plate, the circulating water (cooling medium) flows into the drainage channel and is discharged outside the semiconductor device testing apparatus.

[0113] The heating and cooling plate 134 is mounted on a tray (not shown), which is configured to be detachable from the partition wall 214.

[0114] As described above, the partition wall 214 is configured such that even if the circulating water pipe 135 or the like is damaged, the circulating water (cooling medium) or the like will not leak into the lower chambers A and B.

[0115] A partition wall 215 is formed between chamber A, which is equipped with power supply device 132, and chamber B, which is equipped with drive circuit system. An electrostatic shielding plate or an electromagnetic shielding plate is provided in partition wall 215 to shield the noise of power supply device 132, so that the noise is not applied to drive circuit system in chamber B.

[0116] In an embodiment of the invention, a fork-shaped plug 205 is inserted into chamber C2 and connected to the conductor plate 204 in chamber B. An opening 216 for inserting the fork-shaped plug 205 is formed in the partition wall 214.

[0117] In an embodiment of the invention, the fork-shaped plug 205 is inserted from the top to the bottom. The invention is not limited thereto. For example, a conductor plate 204 may be configured in chamber C2, and the fork-shaped plug 205 may be inserted from chamber B to electrically connect the fork-shaped plug 205 to the conductor plate 204.

[0118] like Figure 13 As shown in (c), a connector 213 is mounted on the mother substrate 207. A control circuit board 111, a device control circuit board 209, and a switch circuit board 201 are mounted on the connector 213 on the mother substrate 207. The switch circuit board 201 is prepared according to the number of transistors 117 being tested. The number of switch circuit boards 201 mounted on the mother substrate 207 can be easily adjusted.

[0119] Temperature information Tj, voltage Vi, control signals for the variable resistor circuit 125, and control signals for the constant current circuit 118 are transmitted to the motherboard 207. In addition, power supply wiring and ground wiring for each circuit are formed and supplied to each circuit board via connector 213.

[0120] like Figure 13As shown in (c), the conductor plate 204 is arranged so as to protrude from the switching circuit substrate 201. The fork-shaped plug 205 is connected to the protruding portion.

[0121] The fork-shaped plug 205a is connected to the conductor plate 204a of the switching circuit substrate 201a. The power supply wiring 212 is connected to the switching circuit substrate 201a via the opening portion 216 of the partition wall 215.

[0122] As shown in (a) and (b), Figure 1 , Figure 5 the fork-shaped plug 205d is connected to the conductor plate 204c of the switching circuit substrate 201b. The power supply wiring 212 is connected to the switching circuit substrate 201b via the opening portion 216 of the partition wall 215. The fork-shaped plug 205b is connected to the conductor plate 204b of the switching circuit substrate 201a. The power supply wiring 212 is connected to the switching circuit substrate 201a via the opening portion 216 of the partition wall 215.

[0123] As shown in (a) and (b), Figure 1 , Figure 4 the switching circuit 124a is arranged between the conductor plate 204d and the conductor plate 204c of the switching circuit substrate 201b, and electrically shorts the conductor plate 204d and the conductor plate 204c. By the shorting, the current Id output from the power supply device 132 is supplied to the transistor 117 as the test current Id.

[0124] As shown in (a) and (b), Figure 4 the switching circuit 124b is arranged between the conductor plate 204a and the conductor plate 204b of the switching circuit substrate 201a. By turning on the switching circuit 124b, the conductor plate 204a and the conductor plate 204b are shorted. By the shorting, the current Id output from the power supply device 132 flows to the ground as the discharge current Im. Therefore, no voltage is applied between the channels of the transistor 117, and no current flows through the transistor 117, and no overvoltage and overcurrent are applied to the electrical elements such as the transistor 117.

[0125] The fork-shaped plug 205c is connected to the conductor plate 204b. The fork-shaped plug 205b is connected to the conductor plate 204a. Further, the fork-shaped plug 205e is connected to the conductor plate 204d. The fork-shaped plug 205d is connected to the conductor plate 204c.

[0126] The fork-shaped plug 205 is made of a metal such as aluminum. The fork-shaped plug 205 is subjected to nickel treatment on a plating base, and silver plating is performed on the surface.

[0127] The fork-shaped plug 205 is formed with a threaded groove, and is configured so that the connection wiring 211 can be attached to the fork-shaped plug 205 by a connection bolt 219.

[0128] Figure 5The two switching circuit substrates 201a, 201b are shown. The switching circuit substrates 201 are connected to the connector 213 of the mother substrate 207.

[0129] As shown in Figure 5 , Figure 6 , the fork plug 205c is inserted from the opening portion 216 of the partition wall 214 provided between the C2 chamber and the B chamber, and is connected to the conductor plate 204b. The fork plug 205e is inserted from the opening portion 216 of the partition wall 214 provided between the C2 chamber and the B chamber, and is connected to the conductor plate 204d.

[0130] The current flowing through the transistor 117 during the test is as large as several hundred amperes, and therefore the connection wiring 211 used is thick. Therefore, the thick connection wiring 211 and the power supply wiring 212 are hard. Therefore, the connection wiring 211 and the power supply wiring 212 are not easily changed.

[0131] In the semiconductor element test apparatus of the present application, the fork plug 205 is inserted from the C2 chamber to any of the opening portions 216 of the partition wall 214. By changing the position of the opening portion 216 into which the fork plug 205 is inserted, connection with any of the switching circuit substrates 201 can be made. Therefore, connection change of the switching circuit substrate 201 used in accordance with the test conditions of the transistor 117 does not require wiring change of the connection wiring 211, but only the position of the opening portion 216 into which the fork plug 205 is inserted needs to be changed. In addition, as shown in Figure 13 (c), the switching circuit substrate 201 only needs to change the position of the connector 213 connected to the mother substrate 207.

[0132] As described above, the switching circuit substrate 201 and the device control circuit substrate 209 connected to the mother substrate 207 are arranged in accordance with the test contents of the electrical element 117 such as a semiconductor element, and the number of electrical elements 117 to be tested. In addition, connection switching with the switching circuit substrate 201 and the like is performed by changing the position of the fork plug 205 inserted into the opening portion 216 of the partition wall 214.

[0133] As shown in Figure 1 , Figure 4 , Figure 5 , Figure 6 , the connection wiring 211b connected to the transistor 117 is connected to the fork plug 205c. The connection wiring 211a connected to the transistor 117 is connected to the fork plug 205e. By attaching and detaching the fork plugs 205c, 205e and the conductor plates 204, the semiconductor element 117 to be tested can be attached and detached from the test circuit.

[0134] As shown in Figure 4The number of the switch circuit boards 201b that short-circuit the output of the constant current circuit 121 can be the same as the number of the constant current circuits 121, as shown in FIG. 1. For example, in the case where the number of the constant current circuits 121 is one in the semiconductor element testing device, the number of the switch circuit boards 201b (switch circuit 124b) can be one.

[0135] The number of the switch circuit boards 201b needs to correspond to the number of the transistors 117 to be tested. For example, if the number of the transistors 117 to be tested is twelve, it is preferable to prepare twelve switch circuit boards 201b. Specifically, the number of the switch circuit boards 201b is prepared corresponding to the number of the electrical elements 117 to be tested.

[0136] If the switch circuit board 201a that tests the electrical element 117 and the switch circuit board 201b that shorts the output of the power supply device 132 are the same in the board specifications, it is advantageous in terms of cost. That is, the switch circuit board 201 is common in structure.

[0137] It is preferable to mount a plurality of transistors or the like as the switch circuit 124 on the switch circuit board 201. The more the number of the switch circuits 124, the more the impedance that shorts the two conductor boards 204 can be reduced.

[0138] Figure 14 (a) and (b) of FIG. 2 illustrate a state in which the fork plug 205 is inserted into the opening portion 216 of the partition wall 214. Figure 14 (a) of FIG. 2 is a view as seen from the front of the partition wall 214, Figure 14 (b) of FIG. 2 is a view as seen from the back of the partition wall 214.

[0139] As an example, in the case where the number of the switch circuit boards 201 is two, the switch circuit boards 201a and 201b are the same in the board specifications. Figure 14 The conductor board 204b is connected with the fork plug 205b and a plurality of fork plugs 205c (fork plug 205cl to fork plug 205c5). The conductor board 204dl is connected with the fork plug 205el, the conductor board 204d2 is connected with the fork plug 205e2, the conductor board 204d3 is connected with the fork plug 205e3, the conductor board 204d4 is connected with the fork plug 205e4, and the conductor board 204d5 is connected with the fork plug 205e5.

[0140] A large noise is generated by the on-off of the switch circuit 124 of the switch circuit board 201. As a countermeasure, although not illustrated in (c) of FIG. 2, a metal plate that functions as a shield is arranged between the two switch circuit boards 201, and the metal plate ground is grounded. Figure 13

[0141] ​Heat generated by the switching circuit 124 is dissipated to the conductor plate 204. A heat sink (not shown) is attached to the switching circuit 124. The ground terminal of the switching circuit 124 is connected to the ground of the switching circuit substrate 201. Heat of the conductor plate 204 is also dissipated via the ground copper foil of the switching circuit substrate 201.

[0142] As shown in FIG. 2, the conductor plate 204a is connected to the fork plug 205a. The fork plug 205a is connected to the output terminal of the power supply device 132. The conductor plate 204b is connected to the fork plug 205b. The fork plug 205b is connected to the ground terminal of the power supply device 132. Figure 1 、 Figure 4 As shown in FIG. 2, the conductor plate 204a is connected to the fork plug 205a. The fork plug 205a is connected to the output terminal of the power supply device 132. The conductor plate 204b is connected to the fork plug 205b. The fork plug 205b is connected to the ground terminal of the power supply device 132.

[0143] When the switching circuit 124b is on (closed), the output terminals of the power supply device 132 are short-circuited, and a short-circuit current Im flows to the ground. Therefore, the output current of the power supply device 132 is not supplied to the transistor 117. When the switching circuit 124b is open, the output current Id of the power supply device 132 is supplied to the transistor 117.

[0144] The conductor plate 204c is connected to the fork plug 205d. The fork plug 205d is connected to the output terminal of the power supply device 132. The conductor plate 204d is connected to the fork plug 205e. The fork plug 205e is connected to the collector terminal of the transistor 117 under test.

[0145] In the configuration of FIG. 2, the connection wiring 211 attached to the fork plug 205 becomes complicated. In addition, the fork plug 205 is difficult to be inserted into the opening portion 216 due to the interference of the connection wiring 211. Figure 14 As shown in FIG. 3, the present application separates the column positions of the fork plug 205 connected to the common conductor plate 204b, and the column positions of the fork plug 205 connected to one or more conductor plates 204a.

[0146] Figure 15

[0147] FIG. 1 is a diagram for explaining the technical idea of the present application. In FIG. 1, as an example, the conductor plate 204b connecting three or more fork plugs 205b and 205d is arranged. A plurality of fork plugs 205b and 205d are attached to the conductor plate 204b. Figure 15 Figure 16 FIG. 1 is a diagram for explaining the technical idea of the present application. In FIG. 1, as an example, the conductor plate 204b connecting three or more fork plugs 205b and 205d is arranged. A plurality of fork plugs 205b and 205d are attached to the conductor plate 204b. Figure 15

[0148] ​​​Conductor plates 204a1 to 204a6 are configured to connect fork-shaped plugs 205a and 205c, and fork-shaped plugs 205a and 205c are installed on each conductor plate 204a1 to 204a6.

[0149] Conductor plates 204a1 to 204a6 are arranged in a straight line. In addition, each conductor plate 204 is arranged in a manner that is approximately parallel to conductor plate 204b and conductor plate 204a.

[0150] Terminal 226a of transistor 117 is connected to fork-shaped plug 205b via connection wiring 211b. Terminal 226b of transistor 117 is connected to fork-shaped plug 205a via connection wiring 211a.

[0151] The first terminal of the switch circuit board 201 is connected to the fork plug 205d via the connection wiring 211d. The second terminal of the switch circuit board 201 is connected to the fork plug 205c via the connection wiring 211c.

[0152] Fork-shaped plugs 205a and 205c share electricity through conductor plate 204a, and fork-shaped plugs 205b and 205d share electricity through conductor plate 204b.

[0153] Each fork-shaped plug 205 is inserted into the opening 216, which is arranged in a straight line. Therefore, the fork-shaped plugs 205 are arranged in a straight line, and thus the connecting wires 211 are arranged in parallel. The semiconductor element 117 used for testing is also arranged in a straight line on the heating and cooling plate 134.

[0154] like Figure 16 As shown in (a), an opening 216b is formed in the fork-shaped plug insertion plate 241a, and an opening 216b is formed in the fork-shaped plug insertion plate 241b. The opening 216b of the fork-shaped plug insertion plate 241a is arranged along the conductor plate 204b.

[0155] Connecting wires 211a, 211b, 211c, and 211d are connected to each fork plug 205, and each connecting wire 211 is arranged in a generally parallel manner.

[0156] By configuring the connection wiring 211 in a roughly parallel position, such as Figure 14 The intersections with the connecting wiring 211 shown disappear, making it easy to insert the fork-shaped plug 205 into the opening 216. Therefore, it is easy to switch which of the transistors 117a to 117e to be tested by inserting or not inserting the fork-shaped plug 205 into the opening 216.

[0157] likeFigure 16 As shown in (b) of FIG. 21, the fork plug insertion plate 241a and the fork plug insertion plate 241b constitute or are formed so as to have a step in the vertical direction with a height H.

[0158] The opening portion 216b is formed in the fork plug insertion plate 241a and the fork plug insertion plate 241b. The opening portion 216a is formed in the partition wall 214. The fork plug 205 is inserted into the opening portion 216a and the opening portion 216b, and is supported by the opening portion 216a and the opening portion 216b and the conductor plate 204. Therefore, the support of the fork plug 205 becomes firm.

[0159] As shown in (b) of FIG. 21, the connection wiring 211b and the connection wiring 211d are arranged in the lower position, and the connection wiring 211a and the connection wiring 211c are arranged in the upper position. Therefore, the wiring position spaces of the connection wiring 211b and the connection wiring 211d and the connection wiring 211a and the connection wiring 211c are different in the vertical direction, and the crossing of the connection wiring 211 and the like does not occur. Therefore, the attachment and detachment, the press-in, and the like of the fork plug 205 inserted into the opening portion 216 become easy. Figure 16 The matters described above in (b) of FIG. 21, (b) of FIG. 22, and the like can of course be applied to other embodiments of the present application or in combination with other embodiments.

[0160] Figure 15 For the convenience of illustration, Figure 16 FIG. 1 illustrates one transistor 117. The connection structure 218a is inserted into the opening portion 216a of the partition wall 217, and the connection structure 218b is inserted into the opening portion 216b of the partition wall 217.

[0161] For the convenience of illustration, Figure 6 FIG. 1 illustrates one transistor 117. The connection structure 218a is inserted into the opening portion 216a of the partition wall 217, and the connection structure 218b is inserted into the opening portion 216b of the partition wall 217.

[0162] The semiconductor test device of the present application arranges a plurality of semiconductor elements 117 on the heating cooling plate 134 to perform a test. Therefore, as shown in (b) of FIG. 21, a plurality of opening portions 216 are formed in the partition wall 217. Figure 2

[0163] Figure 2 (b) of FIG. 21, (b) of FIG. 22, and the like are formed with n (n is a positive number of 1 or more) opening portions 216. The connection structure 218al is inserted into the opening portion 216al, and the connection structure 218bl is inserted into the opening portion 216bl. The connection structure 218a2 is inserted into the opening portion 216a2, and the connection structure 218b2 is inserted into the opening portion 216b2. The connection structure 218an is inserted into the opening portion 216an, and the connection structure 218bn is inserted into the opening portion 216bn.

[0164] ​​The connection structure 218a is connected to the element terminal 226a of the transistor 117, and the connection structure 218b is connected to the element terminal 226b of the transistor 117.

[0165] The terminal of the transistor 117 is connected to the connector 202, and the signal wiring 222 connected to the connector 202 is connected to the sample connection circuit 203. The signal wiring 235 of the sample connection circuit 203 is connected to the device control circuit substrate 209 via the connector 208.

[0166] The partition (the partition 214, the partition 215, the partition 217) has a function of separating the chambers (the C1 chamber, the C2 chamber, the A chamber, the B chamber) and a function of not allowing outside air to flow in. In particular, the C1 chamber sometimes dew condenses in a test in a low temperature state, and thus dry air is caused to flow into the C1 chamber.

[0167] The fixing screw 221 is attached to the other end of the connection structure 218, and the connection wiring 211 is connected to the connection structure 218. The fork plug 205 as a connection member is attached to the other end of the connection wiring 211.

[0168] The fixing screw 221 is not limited to a screw, and can be any member as long as the connection wiring 211 is electrically connected to the connection structure 218.

[0169] The sample connection circuit 203 is connected to the device control circuit substrate 209 via the connection pin 206 of the connector 208. The sample connection circuit 203 is separately provided corresponding to each transistor 117 subjected to a test, and the sample connection circuit 203 is configured to be easily detached.

[0170] Figure 7 is a diagram illustrating the connection structure 218 as an embodiment of the semiconductor element test device of the present application. Figure 7 (a) of FIG. 1 is a diagram schematically illustrating the back surface, Figure 7 (b) of FIG. 1 is a diagram schematically illustrating the side surface.

[0171] The heat pipe 223 is fitted in the recess 234 of the connection structure 218. A heat-conducting lubricant or a heat-dissipating silicone oil compound can be applied between the recess 234 of the connection structure 218 and the heat pipe.

[0172] The heat pipe 223 is provided in the recess 234 in a manner of being fitted therein. By providing the heat pipe 223 in the recess of the back surface of the connection structure 218, the risk of damage to the heat pipe 223 is reduced. The heat pipe 223 can be provided on both surfaces of the connection structure 218.

[0173] The connection structure 218 is heated at the time of the test. Therefore, the heat pipe 223 and the heat pipe metal piece 231 are also heated. By the heating, the heat pipe 223 and the heat pipe metal piece 231 expand.

[0174] In the present application, the heat pipe metal piece 231 of the connection structure 218 is made of a material having a smaller linear expansion coefficient than the heat pipe 223. Alternatively, the heat pipe 223 of the connection structure 218 is made of a material having a larger linear expansion coefficient than the heat pipe metal piece 231. The heat pipe 223 expands and becomes larger in the recessed portion 234, and the heat pipe 223 is firmly embedded by the recessed portion 234. Therefore, the heat pipe 223 does not come off.

[0175] As the material of the heat pipe metal piece 231, copper (linear expansion coefficient 16.8), brass (linear expansion coefficient 19), iron (linear expansion coefficient 12.1), and stainless steel (SUS304) (linear expansion coefficient 17.3) can be exemplified. As the material of the heat pipe 223, a material having a larger linear expansion coefficient than the heat pipe metal piece 231, such as aluminum (linear expansion coefficient 23), tin (linear expansion coefficient 26.9), and lead (linear expansion coefficient 29.1) can be exemplified. Among them, as the material of the heat pipe metal piece 231, copper (linear expansion coefficient 16.8) is preferable, and as the material of the heat pipe 223, aluminum (linear expansion coefficient 23) is preferable. The heat pipe metal piece 231 can also be made of carbon or the like other than metal.

[0176] The connection structure 218 is mainly composed of the heat pipe metal piece 231, the connection pressure portion 232, and the connection holding portion 233. The element terminal 226 of the semiconductor element is inserted between the connection pressure portion 232 and the connection holding portion 233.

[0177] Figure 9 is an explanatory view that explains the connection state of the transistor 117 and the connection structure 218. The heat pipe 223 is disposed on the back surface of the connection structure 218.

[0178] The transistor 117 is fixedly attached to the heating and cooling plate 134a. The fixing is performed by pressing by a spring (not shown). If necessary, a heating and cooling plate is also disposed on the upper side of the transistor 117, and the transistor 117 can be set to a prescribed temperature condition.

[0179] The transistor 117 to be tested is fixedly attached to the heating and cooling plate 134, and therefore, it is difficult to easily detach. The mounting work of the transistor 117 fixes a plurality of transistors 117 to be initially tested to the heating and cooling plate 134. Then, the transistor 117 to be tested is selected, the connection structure 218 is inserted from the opening portion 216 of the partition 217, and is mounted to the element terminal 226 of the semiconductor element 117.

[0180] That is, the selected transistor 117 is connected by inserting the connection structure 218 into the opening 216 where the selected transistor 117 is located from the C2 chamber side, thereby making an electrical connection with the component terminal 226.

[0181] The electrical connection to transistor 117 can be easily made by simply inserting it into the connection structure 218. Furthermore, by changing the applied signal of the connection wiring 211 connected to the connection structure 218, the test conditions and test content of transistor 117 can be easily changed.

[0182] A connection wire 211 is connected to one end of the connection structure 218, and a constant current Id is applied to the transistor 117 through the connection wire 211. A heat pipe 223 is disposed on the back side of the connection structure 218.

[0183] A current of several hundred amperes (A) flows through component terminal 226. Even with a small resistance at the contact portion 225, a large amount of heat is generated due to the current of several hundred amperes (A), causing component terminal 226 to overheat. When component terminal 226 overheats, transistor 117 overheats, causing transistor 117 to deteriorate or be damaged.

[0184] In this invention, the heat generated by the component terminal 226 is transferred to the connection wiring 211 side of the connection structure 218 through the heat pipe 223. Therefore, the contact portion 225 will not overheat. A cooling fan 227 is disposed on the lower side of the connection structure 218 to dissipate the heat from the heat pipe 223.

[0185] like Figure 8 As shown in (a), the heat dissipation fins 228 can also be formed or configured in a manner that closely conforms to the heat pipe 223. For example... Figure 8 As shown in (b), a circulating water pipe 135 may also be formed or configured within the connecting structure 218 to cool the connecting structure 218.

[0186] exist Figure 9 In this example, the transistor 117 (semiconductor element 117) has two terminals 226: terminal 226a (P) and terminal 226b (N). For example... Figure 10 As shown, even if the transistor 117 has three terminals 226 (terminal 226a (P), terminal 226b (N), and terminal 226c), the technical concept of this invention can still be applied.

[0187] Figure 10 It is a diagram. Figure 3 The diagram illustrates the connection state of the semiconductor module 117, which has three component terminals 226 (component terminal 226a (P), component terminal 226b (N), component terminal 226c (O)) and the connection structure 218, as shown in (b), (c), (d), and (e).

[0188] In Figure 10 which a heat pipe 223a is formed or arranged in the connection structure 218a, and a heat pipe 223b is formed or arranged in the connection structure 218b, in contrast to which no heat pipe 223 is formed or arranged in the connection structure 218c. The connection structure 218c is connected to the element terminal 226c. A large current does not flow through the element terminal 226c (O) of the transistor 117. It is not necessary to form a heat pipe 223 in the connection structure 218c.

[0189] By forming the connection structure 218c to be thinner than the other connection structures 218 (connection structure 218a, connection structure 218b), connection of the connection structure 218 to the element terminal 226 of the transistor 117 becomes easy. In addition, the space in which the transistor 117 is arranged can also be narrow, and thus the number of transistors 117 that can be mounted on the heating and cooling plate 134 can be increased.

[0190] As shown in (a) of Figure 11 , the connection structure 218 in another embodiment of the present application is mainly composed of a heat pipe metal piece 231, a connection receiving portion 225, a connection pressure portion 232, and a connection holding portion 233. The element terminal 226 of the semiconductor element is inserted or arranged between the connection receiving portion 225 and the connection holding portion 233.

[0191] A spring 236 is inserted or arranged in the spring hole 239 of the connection receiving portion 225 and the connection pressure portion 232. A positioning screw 237 is inserted or arranged in the positioning screw hole 240 of the central portion of the connection receiving portion 225, so that the connection receiving portion 225 and the connection pressure portion 232 are positioned.

[0192] The spring 236 is a pressing unit, or a sliding unit, or a positioning unit. As an example, the spring 236 can be exemplified by a coil spring. In addition, a leaf spring, a spiral spring, and a disc spring can be exemplified. The spring 236 is formed or composed of a metal material. It can also be formed of a rubber, a plastic, or a ceramic material having heat resistance.

[0193] A coil spring 236 is arranged between the connection receiving portion 225 and the connection pressure portion 232. The connection pressure portion 232 is connected by one or more fixing screws 224b. By tightening or mounting the fixing screw 224b, pressure (pressing) is applied between the connection receiving portion 225 and the connection holding portion 233.

[0194] The element terminal 226 is sandwiched between the connection receiving portion 225 and the connection holding portion 233, and the element terminal 226 is held between the connection receiving portion 225 and the connection holding portion 233 with a prescribed pressure (prescribed pressing) by the pressure of the spring 236.

[0195] The pressure (pressing) can be easily adjusted by changing the spring 236. Additionally, the pressure (pressing) can be adjusted or set by the tightness of the fixing screw 224b. The heat pipe metal part 231 and the connection retaining part 233 are fixed by one or more fixing screws 224a.

[0196] A connection bearing portion 225 is disposed between the connection pressure portion 232 and the connection retaining portion 233. Platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy thereof are used as the constituent material or at least the surface material of the connection bearing portion 225.

[0197] Similarly, on the surface where the connection retainer 233 contacts the component terminal 226, platinum, gold, silver, tungsten, copper, nickel, molybdenum, or an alloy of these materials are used as the surface material.

[0198] The connection retaining part 233 is fixed to the heat pipe metal part 231 by a fixing screw 224a. The connection pressure part 232 is fixed to the connection retaining part 233 by a fixing screw 224b. A connection wire 211 is fixed to the left end of the heat pipe metal part 231 by a fixing screw 221.

[0199] Figure 11 of (a), Figure 11 (d) is an explanatory diagram illustrating the combined state of the connection retaining part 233, the connection bearing part 225, and the connection pressure part 232.

[0200] The connection retaining part 233 connects and secures the heat pipe 223 to the heat pipe metal part 231 via screws 224a (not shown) inserted into threaded holes 238a1 and 238a2. The heat pipe 223 and the heat pipe metal part 231 are connected and secured in a tight manner with good thermal and electrical conductivity. Furthermore, the connection retaining part 233 is connected and secured to the connection pressure part 232 via screws 224b (not shown) inserted into threaded holes 238b1 and 238b2.

[0201] The connecting receiving portion 225 has protrusions 251 formed at both ends, and the connecting pressure portion 232 has grooves 252 formed at both ends. The protrusions 251 of the connecting receiving portion 225 are embedded in the grooves 252 of the connecting pressure portion 232. The protrusions 251 of the connecting receiving portion 225 and the grooves 252 of the connecting pressure portion 232 form an electrical contact.

[0202] To ensure good contact between the component terminal 226 and the connection receiving portion 225, such as Figure 11 As shown in (c), it is preferable to form a triangle or other irregular shape on the surface of the connecting bearing portion 225.

[0203] Figure 11The configuration is to sandwich the element terminal 226 between the plane of the connection pressure portion 232 and the plane of the connection holding portion 233.

[0204] Figure 12 The configuration is to sandwich the element terminal 226 between the presser mounting plate 313 and the connection holding portion 233. The presser mounting plate 313 has mounted thereon the presser 311a, the presser 311b. The presser 311 can be exemplified by a plate spring made of metal, for example. Alternatively, the presser 311 can be formed of a non-conductive material such as a silicone material. The presser 311 is embedded in the presser mounting plate 313.

[0205] The element terminal 226 is sandwiched between the presser 311 and the plane of the connection holding portion 233. The element terminal 226 is electrically connected to the connection holding portion 233 by the pressing of the presser 311.

[0206] In Figure 11 In the embodiment of (a), the spring (pressure metal piece) 236 is inserted into the spring hole 239 of the contact portion 225. In the case where the spring (pressure metal piece) 236, the contact portion 225, and the connection pressure portion 232 are made of a conductive material, there is a case where current flows in the element terminal 226 -> the contact portion 225 -> the spring (pressure metal piece) 236 -> the connection pressure portion 232. In this case, in the case where the spring (pressure metal piece) 236 has a large electric resistance value, current flows through the spring (pressure metal piece) 236, which causes the spring to heat and burn out.

[0207] In Figure 12 In the embodiment of the present application of (b), the spring hole 239 is formed in the insulating plate 312. The presser 311 is in contact with the element terminal 226, and the spring 236 presses the presser mounting plate 313. The insulating plate 312 is arranged on the upper side of the presser mounting plate 313 to insulate the presser mounting plate 313 from the spring 236. The spring hole 239 is formed in the insulating plate 312, and the spring 236 is inserted into the spring hole 239. The other configurations are the same as those of Figure 11 , and thus the description thereof is omitted.

[0208] Alternatively, the insulating plate 312 can be an insulating film, an insulating film, or an insulating gas such as air.

[0209] Figure 12 (b) of FIG. 10 is a view of the presser mounting plate 313 portion as viewed from the side. The presser 311a, the presser 311b are arranged and inserted in the presser mounting plate 313. Figure 12 (c) of FIG. 10 is a view of the presser mounting plate 313 portion as viewed from the Figure 12 (b) of FIG. 10.

[0210] Since the insulating plate 312 is made of an insulating material, even if the pressing member mounting plate 313 is made of a conductive material such as metal, current does not flow through the spring (pressure metal member) 236. Therefore, a current path of the element terminal 226 -> the contact portion 225 -> the spring (pressure metal member) 236 -> the connection pressure portion 232 is not generated.

[0211] Figure 12 An embodiment of (a) is a configuration in which the insulating plate 312 is insulated. As shown in (a) of Figure 12 the present application is not limited to the configuration using the insulating plate 312. For example, a configuration shown in (d) of Figure 12 the present application is not limited to the configuration using the insulating plate 312. For example, a configuration shown in (d) of

[0212] Figure 17 (d) is a configuration in which an insulating portion 315 made of a resin material or the like is arranged around the threaded hole 238b of the connection pressure portion 232. Since the threaded hole 238b is insulated by the insulating portion 315, current does not flow through the fixing screw 224b. Therefore, a current path of the element terminal 226 -> the contact portion 225 -> the spring (pressure metal member) 236 -> the connection pressure portion 232 is not generated, and the spring (pressure metal member) 236 is not burned.

[0213] As described above, the present application is configured to arrange the insulating plate 312 on the side of the spring 236 to which a pressing force is applied, so that current does not flow through the pressing member mounting plate 313 and the contact portion 225 side.

[0214] When current flows, the spring 236 and the fixing screw 224b are burned by the current flowing through the pressing member such as the spring 236 and the fixing screw 224b. Test current is supplied to the element terminal 226 via the connection holding portion 233 side having a small resistance such as the spring 236.

[0215] Figure 3 is an equivalent circuit diagram of a semiconductor element test device in the first embodiment of the present application and an explanatory diagram. A semiconductor module to be tested is exemplified by Figure 17 (d), but is not limited thereto.

[0216] In Figure 20 , by turning on the switching circuit 124b, the output of the power supply device 132 is short-circuited, and the current Id output from the power supply device 132 flows as the current Im' to the ground. Alternatively, by turning on the switching circuit 124b, the electric charge charged between the terminals of the power supply device 132 is discharged.

[0217] By turning on the switching circuit 124c and the switching circuit 124d at the same time, the current Im also flows, the output of the power supply device 132 is short-circuited, and the electric charge or the like of the power supply device 132 is discharged. In this configuration or method, the switching circuit 124b is not needed.

[0218] It is also effective to stagger the timing of turning on the switch circuits 124c and 124d. For example, the switch circuit 124c is turned on before the switch circuit 124d, thereby causing a short circuit between the channels of the transistor 117s.

[0219] Next, by turning on the switch circuit 124d, a short circuit between the channels of the transistor 117m is caused. Alternatively, the switch circuit 124d is turned on before the switch circuit 124c, thereby causing a short circuit between the channels of the transistor 117m. Next, by turning on the switch circuit 124c, a short circuit between the channels of the transistor 117s is caused.

[0220] As described above, by sequentially turning on the switch circuit 124, the generation of surge voltage and the like generated in the semiconductor element 117 can be further suppressed.

[0221] By turning on the switch circuit 124a, the current Id output from the power supply device 132 is supplied to the transistor 117.

[0222] The fork-shaped plug 205 is inserted from the opening 216 of the partition wall 214 and is electrically connected to the switch circuit board 201.

[0223] Figure 21 、 Figure 20 are explanatory diagrams of the circuit part and the circuit operation of the semiconductor test device of the present invention. As Figure 21 、 Figure 20 shown, the semiconductor element test device of the present invention includes an isolation type DCDC converter circuit 138m and an isolation type DCDC converter circuit 138s.

[0224] Figure 3 As an example of the semiconductor module to be tested, Figure 3 of (d), Figure 21 of (e). Figure 3 As an example of the semiconductor module to be tested, Figure 3 of (c), Figure 3 of (c). In the electrical component test device and the test method of electrical components of the present invention, it can of course also be applied to Figure 20 examples other than those illustrated.

[0225] The isolation type DCDC converter circuit 138m generates two voltages (Vpm1 voltage based on the Vmm1 potential and Vpm2 voltage based on the Vmm2 potential) from the input voltage (Vc voltage of the circuit voltage). GND, Vmm1 voltage, and Vmm2 voltage are insulated. In addition, GND, Vpm1 voltage, and Vpm2 voltage are insulated.

[0226] The insulation type DCDC converter circuit 138s generates two voltages (Vpsl voltage with Vmsl potential as reference, Vps2 voltage with Vms2 potential as reference) from the input voltage (Vc voltage). The GND, Vmsl voltage, and Vms2 voltage are insulated. In addition, the GND, Vpsl voltage, and Vps2 voltage are insulated.

[0227] The Vmm1 voltage, Vmm2 voltage, Vmsl voltage, and Vms2 voltage can also consider a ground voltage as a reference voltage. Among them, the ground voltage is insulated from each voltage. The Vmm1 voltage and Vmm2 voltage can also be set to a common potential without being insulated from the time of voltage generation. The Vmsl voltage and Vms2 voltage can also be set to a common potential without being insulated from the time of voltage generation.

[0228] As needed, an insulation type DCDC converter circuit that generates Vt1 voltage and Vt2 voltage is provided. The Vt1 voltage and Vt2 voltage are insulated with respect to the Vc voltage. The Vt1 voltage becomes a potential in the negative direction with the Vmm1 voltage as a reference. The Vt2 voltage becomes a potential in the negative direction with the Vmsl voltage as a reference.

[0229] The Vt1 voltage can also be generated with the Vmm1 voltage or Vmm2 voltage as a reference. The Vt2 voltage can also be generated with the Vmsl voltage or Vms2 voltage as a reference.

[0230] It is configured so that the Vt1 voltage and the Vmm1 voltage are applied to the gate terminal gm of the transistor 117m. It is configured so that the Vt2 voltage and the Vmsl voltage are applied to the gate terminal gs of the transistor 117s (Qs). The voltage selection circuit 302 uses an analog switch or the like.

[0231] The potential difference between the Vmm1 voltage and the Vpm1 voltage of the insulation type DCDC converter circuit 138m becomes the on voltage Vg applied to the gate terminal gm of the transistor 117m (Qm). The insulation type DCDC converter circuit 138m is configured in a manner that the on voltage Vg is variable.

[0232] The potential difference between the Vmsl voltage and the Vpsl voltage of the insulation type DCDC converter circuit 138s becomes the on voltage Vg applied to the gate terminal gs of the transistor 117s (Qs). The insulation type DCDC converter circuit 138s is configured in a manner that the on voltage Vg is variable.

[0233] Figure 21 、 Figure 17 The A module, B module, and C module of the insulation type DCDC converter circuit 138m shown are insulated. In addition, the A module, D module, and E module of the insulation type DCDC converter circuit 138s are insulated.

[0234] Power is transmitted between modules A and B, between modules A and C, between modules A and D, and between modules A and E using coils or similar devices. Furthermore, control signals between modules are transmitted and received using phototransistors or similar devices with insulation.

[0235] The circuit ground (GND), Vc voltage, Vpm1 voltage, Vmm1 voltage, Vpm2 voltage, and Vmm2 voltage are in an insulated state. That is, each voltage is in a floating state relative to the other voltages.

[0236] Floating refers to a state in which the voltage or potential is not electrically connected relative to other voltages or potentials, and is independent of other voltages or potentials.

[0237] This invention generates a signal potential, etc., applied to the gate terminal in a floating state. Therefore, it is less susceptible to noise.

[0238] The voltage generated by the isolated DC-DC converter circuit 138 is set to float. The potential difference between voltages Vmm1 and Vpm1 is set to Vm1, and the potential difference between voltages Vmm2 and Vpm2 is set to Vm2.

[0239] For example, if Vmm1 is connected to circuit ground (GND) and Vpm1 is short-circuited to Vmm2, then Vpm2 becomes the voltage obtained by adding Vm2 to Vm1 relative to circuit ground (GND). That is, by setting the potential with other voltages, a floating potential can be determined. The potential level can be changed, moved, and set in correspondence with the potentials of other voltages.

[0240] In the semiconductor device testing apparatus of the present invention, the circuit ground (GND) is isolated from other power supply voltages. Furthermore, it is configured to allow wiring or connection of the isolated power supply voltages. For example, Vmm1 and Vmm2 can be wired to the same potential. Similarly, Vms1 and Vms2 can be wired to the same potential.

[0241] like Figure 22 As shown, the sample connection circuit 203m1 includes a gate driver circuit 113m that generates a gate signal waveform applied to the gate terminal gm of transistor 117m (Qm), a variable resistor circuit 125m that adjusts or sets the rising edge waveform and falling edge waveform of the gate signal, a short circuit circuit 137m, a voltage selection circuit 302m, etc.

[0242] The sample connection circuit 203m2 includes a constant current setting circuit 130m that generates a constant current Icm applied to the diode Dm of transistor 117m, and a voltage detection circuit 129m that measures or detects the terminal voltage of diode Dm.

[0243] The sample connection circuit 203s1 holds a gate driver circuit 113s that generates a gate signal waveform applied to the gate terminal gs of the transistor 117s, a variable resistance circuit 125s that adjusts or sets the rising and falling waveforms of the gate signal, a short circuit circuit 137s, a voltage selection circuit 302s, and the like.

[0244] The sample connection circuit 203s2 holds a constant current setting circuit 130s that generates a constant current Ics applied to the diode Ds of the transistor 117s, and a voltage detection circuit 129s that measures or detects the terminal voltage of the diode Ds.

[0245] Hereinafter, the N electrode terminal of the semiconductor element 117 is described as a reference potential (AGND, 0 (V)) unless otherwise specified.

[0246] In the case where the N electrode terminal of the semiconductor element 117 is the reference potential, the potential of the emitter terminal es of the transistor 117s becomes the channel-to-channel voltage Vcem of the transistor 117m. That is, it becomes the potential of the O electrode terminal of the semiconductor element 117.

[0247] The potential of the P electrode terminal of the semiconductor element 117 becomes a voltage obtained by adding the channel-to-channel voltage Vcem of the transistor 117m to the channel-to-channel voltage Vces of the transistor 117s. Depending on the magnitude of the current Id flowing through the transistor 117m and the transistor 117s, the on-off state of the transistor 117m and the transistor 117s, the potential of the O electrode terminal, and the potential of the P electrode terminal vary. In particular, the potential of the emitter terminal es of the transistor 117s varies greatly.

[0248] Vms1, which is the potential of the emitter terminal es of the transistor 117s, is preferably configured to be able to vary in accordance with the variation of the channel-to-channel voltage Vcem of the transistor 117m.

[0249] In the present application, Vmm1, which is the potential of the emitter terminal em of the transistor 117m, floats with respect to Vms1, which is the potential of the emitter terminal es of the transistor 117s. Therefore, when the channel-to-channel voltage Vcem of the transistor 117m varies, the Vces voltage also varies in the same direction and by the same potential.

[0250] The power supply potential of the diode Dm of the transistor 117m is preferably referenced to the potential of the emitter terminal em of the transistor 117m. The diode Ds of the transistor 117s is preferably referenced to the potential of the emitter terminal es of the transistor 117s.

[0251] In the present application, the Vc voltage, the Vmsl voltage / Vpsl voltage, the Vms2 voltage / Vps2 voltage of the insulation type DCDC converter circuit 138s are insulated. The Vc voltage, the Vmm1 voltage / Vpm1 voltage, the Vmm2 voltage / Vpm2 voltage of the insulation type DCDC converter circuit 138m are insulated. Each voltage is configured to be able to be connected to an arbitrary voltage, and wiring is performed.

[0252] Figure 22 is an explanatory view illustrating the wiring of the power supply system of the semiconductor element testing device of the present application. The N electrode terminal of the transistor 117 is connected to AGND. As an example, AGND is a ground potential.

[0253] As Figure 23 , Figure 24 , Figure 25 , Figure 19 indicated, the present application can arbitrarily connect and change the wiring. In addition, by the switching circuit 123, the selector 127, the connection wiring, and the applied voltage can be changed.

[0254] The emitter terminal em of the transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm1 terminal. In addition, the emitter terminal em is connected to the Vmm2 terminal. The emitter terminal es of the transistor 117s is connected to the Vmsl terminal. In addition, the emitter terminal es is connected to the Vms2 terminal.

[0255] The potential of the emitter terminal es of the transistor 117s becomes a voltage obtained by adding the channel-to-channel voltage Vcem of the transistor 117m to the potential at the N electrode terminal. Therefore, the potential of the emitter terminal es of the transistor 117s varies depending on the on / off state of the transistor 117m and the magnitude of the constant current Id.

[0256] The gate signal Vsg applied to the gate terminal gm of the transistor 117m is based on the potential of the emitter terminal em. If the voltage that makes the transistor 117m conduct is Vg, when the Vg voltage is applied from the AGND potential of the N electrode terminal, the transistor 117m becomes in the on state.

[0257] Figure 19 is a timing chart illustrating the operation of the circuit section of the semiconductor testing device of the present application. In Figure 19 The Vt voltage applied during tn2 and during tn1 in (a) of Figure 19 As shown in (b), (c), and (i) of

[0258] During at least one or more of the periods of tcs, tcm, and tcc, the switch Si is turned on, and the voltage Ve across the variable resistance circuit 125 is measured.

[0259] Figure 19 St2 of (d) is a timing signal for causing the current Ic to flow through the diode D (diode Ds, diode Dm), and when St2 is at the H level, the current flows through the diode D of the transistor 117. The voltage detection circuit 129 acquires the voltage across the diode D, and the temperature measurement circuit converts the voltage across the diode D into the temperature information Tj. The temperature information Tj is transmitted to the control circuit substrate 111 (controller 111). St1 and St2 are the time for causing the measurement current to flow through the diode for temperature measurement or the measurement time of the temperature.

[0260] Figure 19 Vce of (g) is the voltage across the channel of the transistor 117 (transistor 117m, transistor 117s), and the temperature information Tj shows the change in the temperature of the transistor 117 (transistor 117m, transistor 117s) measured.

[0261] In Figure 19 In (a), the 0 (V) potential is a voltage for turning off the transistor 117m. In Figure 19 In (a) and the like, the Vt1 voltage is illustrated as the Vt voltage. The Vt1 voltage is a voltage that is negative compared to the 0 (V) potential. The Vt1 voltage of the negative side is applied with the Vmm1 voltage as a reference.

[0262] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as a power source. Since the Vmm2 voltage is common to the Vmm1 voltage, the voltage across the terminals of the diode Dm is in the range of Vmm1 and Vpm2, and is a voltage with AGND as a reference.

[0263] The gate signal Vsg applied to the gate terminal gs of the transistor 117s is with the potential of the emitter terminal es as a reference. The potential of the emitter terminal es becomes a voltage obtained by adding the voltage across the channel Vcem of the transistor 117m to the AGND potential at the N electrode terminal.

[0264] As shown in (a) of Figure 19 If the voltage for turning on the transistor 117s is set to Vg, the voltage for turning on the transistor 117s is with the voltage obtained by adding the voltage across the channel Vcem of the transistor 117m to the AGND potential at the N electrode terminal as a reference, and when the Vg voltage is applied, the transistor 117s becomes in the on state.

[0265] The Vmsl voltage is insulated from the Vmm 1 voltage and is in a floating state. Therefore, even if the channel-to-channel voltage Vcem of the transistor 117m varies, the emitter terminal es potential of the transistor 117s varies in accordance with the variation of the channel-to-channel voltage Vcem of the transistor 117m. The Vmsl voltage is generated with the emitter terminal es potential as a reference.

[0266] The gate signal Vsg applied to the gate terminal gs of the transistor 117s is referenced to the potential of the emitter terminal es. As shown in (a) of FIG. 17, if the voltage that makes the transistor 117s conductive is set to Vg, when the Vg voltage is applied from the emitter terminal es potential, the transistor 117s becomes in a conductive state. Figure 19

[0267] In addition, in (a) and the like of FIG. 17, the Vt2 voltage is illustrated as the Vt voltage. The Vt2 voltage is a voltage that is negative compared to the 0 (V) potential. The Vt2 voltage is applied on the negative side with the Vmsl voltage as a reference. Figure 23

[0268] The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power sources. Since the Vms2 voltage is common to the Vmsl voltage, the voltage of the terminal of the diode Ds is in the range of Vmsl and Vps2.

[0269] The Vmsl voltage is insulated from the Vmm 1 voltage and is in a floating state. In addition, the Vmsl voltage is connected to the collector terminal cm of the transistor 117m. Therefore, even if the channel-to-channel voltage Vcem of the transistor 117m varies, the voltage (Vg) that makes the transistor 117s conductive and the voltage (0 (V)) that makes the transistor 117s non-conductive do not vary. Therefore, the transistor 117s can be favorably controlled to be in a conductive or non-conductive state.

[0270] Figure 23 is a diagram illustrating the wiring of the power supply system in the semiconductor element testing device of another application. In the wiring of Figure 24 In the wiring of FIG. 17, the N electrode terminal of the transistor 117 is connected to the AGND. As an example, the AGND is a ground potential.

[0271] The emitter terminal em of the transistor 117m is electrically connected to the N electrode terminal, and the emitter terminal em is connected to the Vmm 1 terminal. The emitter terminal es of the transistor 117s is connected to the Vmsl terminal. The Vmm2 terminal, the Vms2 terminal, and other power supply terminals are insulated and are in a floating state.

[0272] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power sources. The voltage of the terminal of the diode Dm is substantially in the range of Vmm2 and Vpm2.

[0273] ​​The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power sources. The voltage of the terminals of the diode Ds is substantially in the range of Vms2 and Vps2.

[0274] The potential of the Vmm2 terminal is held as a potential with AGND as a reference, and the potential of the Vms2 terminal is held as a potential with the potential of the emitter terminal es of the transistor 117s as a reference.

[0275] Figure 24 is an explanatory view that explains the wiring of the power supply system in the semiconductor element testing device of another invention. In Figure 24 the wiring, the N electrode terminal of the transistor 117 is connected to AGND.

[0276] The emitter terminal em and the N electrode terminal of the transistor 117m are electrically connected, and the emitter terminal em is connected to the Vmm1 terminal. In addition, the Vmm2 terminal is connected to the Vms2 terminal. The emitter terminal es of the transistor 117s is connected to the Vms1 terminal. The Vmm1 terminal is not wired to the Vmm2 terminal.

[0277] The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as power sources. The voltage of the terminals of the diode Dm is substantially in the range of Vmm2 and Vpm2. The current Ics flowing through the diode Ds generates the Vms2 voltage and the Vps2 voltage as power sources. The voltage of the terminals of the diode Ds is substantially in the range of Vms2 and Vps2. Since the Vmm2 voltage and the Vms2 voltage are common, the potential of the diode Dm and the potential of the diode Ds operate within the common potential.

[0278] In Figure 24 , the switching circuit 123 is arranged in the middle of the power supply connection wiring. The switching circuit 123 can be switched to connect the Vms2 voltage and the Vpm2 voltage, or to connect the Vms2 voltage and the Vmm2 voltage.

[0279] As shown in Figure 24 , by arranging or providing the switching circuit 123, a variety of tests can be dealt with. As the switching circuit 123, an analog switch, a relay circuit, a magnetic switch, or the like can be exemplified.

[0280] The switching circuit 123 is not limited to Figure 25 the embodiment. For example, it can be configured to select the Vmm1 and Vpm1 voltages to be connected to other potentials (for example, to be connected to the Vmm1 voltage). As described above, the present invention is characterized in that it is configured so that the wiring state of the potential generated by the insulated type DCDC converter circuit or the like can be changed.

[0281] Figure 25is an explanatory view of the wiring of a power supply system in a semiconductor element testing device of another application. In Figure 26 In the wiring, the N electrode terminal of the transistor 117 is connected to AGND.

[0282] The emitter terminal em and the N electrode terminal of the transistor 117m are electrically connected, and the emitter terminal em is connected to the Vmm1 terminal. The Vmm1 terminal is connected to the Vmm2 terminal, and the Vmm1 terminal is connected to the Vmsl terminal. The emitter terminal es of the transistor 117s is connected to the Vmsl terminal.

[0283] The Vmm2 terminal is connected to the Vms2 terminal. The current Icm flowing through the diode Dm generates the Vmm2 voltage and the Vpm2 voltage as a power supply. The voltage of the terminal of the diode Dm is substantially in the range of Vmm2 and Vpm2.

[0284] The current Ics flowing through the diode Ds generates the Vmm2 voltage and the Vps2 voltage as a power supply. The voltage of the terminal of the diode Ds is substantially in the range of Vmm2 and Vps2. Since the Vmm2 voltage and the Vms2 voltage are common, the potential of the diode Dm and the potential of the diode Ds operate within the common potential.

[0285] When the potential of the Vmm1 voltage changes, the potential of the Vpm1 voltage also shifts. When the potential of the Vmm2 voltage changes, the potential of the Vpm2 voltage also shifts.

[0286] When the potential of the Vmsl voltage changes, the potential of the Vpsl voltage also shifts in linkage. When the potential of the Vms2 voltage changes, the potential of the Vps2 voltage also shifts in linkage.

[0287] The Vmm1 voltage and the Vmsl voltage are set to be floating. Therefore, when the channel-to-channel voltage Vcem of the transistor 117m changes, the Vmsl changes in linkage with the change of the Vcem.

[0288] The gate signal (on-off signal) applied to the gate terminal gm of the transistor 117m is output with the Vmm1 voltage as a reference. The gate signal (on-off signal) applied to the gate terminal gs of the transistor 117s is output with the Vmsl voltage as a reference.

[0289] When the current Id flowing through the transistor 117m changes and the applied voltage of the gate terminal gm of the transistor 117m changes, even if the channel-to-channel voltage Vcem of the transistor 117m changes, since the Vmsl voltage is floating, the Vmsl voltage changes in linkage with the Vcem voltage.

[0290] Even if the channel-to-channel voltage Vcem of the transistor 117m changes, since the Vmsl voltage is floating, the gate signal of the transistor 117s is generated with the Vmsl voltage as a reference, and thus the transistor 117s is also able to perform on-off control without problems.

[0291] The Vmmi voltage of the diode Ds and the Vmsl voltage are floating. Thus, even if the Vmmi voltage changes, or the channel-to-channel voltage Vcem of the transistor 117m changes, the temperature of the transistor 117s can be measured without damage.

[0292] Figure 26 is a diagram of a test state of the semiconductor element test apparatus and the test method or test state of the semiconductor element component of the present application. By sequentially implementing or randomly implementing any of the states or methods of Figure 26 the test of the semiconductor element 117 is performed.

[0293] Figure 26 (a) of is a diagram of a method (state) of short-circuiting the terminals of the transistor 117 (between the P electrode terminal and the N electrode terminal) to discharge the electric charge, thereby causing no surge voltage or transient current to flow through the transistor 117.

[0294] The gate terminal gm of the transistor 117m is applied with an off voltage as a gate signal Vsgm, and the transistor 117m becomes an off state. The gate terminal gs of the transistor 117s is applied with an off voltage as a gate signal Vsgs, and the transistor 117s becomes an off state. The short-circuit circuit 137s and the short-circuit circuit 137m are off (open). The switching circuit 124c and the switching circuit 124d are on (closed).

[0295] Figure 26 (b) of shows a state of turning on the short-circuit circuit 137s to make the transistor 117s a diode connection state, turning on the transistor 117m to make a constant current Id flow through the semiconductor element 117, and testing the semiconductor element 117.

[0296] The gate terminal gm of the transistor 117m is periodically or intermittently applied with an on voltage or an off voltage as a gate signal Vsgm, and the transistor 117m is controlled to be in an on state or an off state.

[0297] The short-circuit circuit 137s connected between the gate terminal gs and the emitter terminal es of the transistor 117s is turned on, and the transistor 117s becomes a diode connection state. The switching circuit 124c and the switching circuit 124d are off (open).

[0298] In the semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal. The transistor 117m is subjected to on-off control by a gate signal Vsgm applied to the gate terminal gm of the transistor 117m, and the test of the semiconductor element 117 is performed.

[0299] Figure 26 (c) of FIG. 17 shows a state in which the transistor 117m is made into a diode connection state, the transistor 117s is made into an on state, and a constant current Id flows through the semiconductor element 117, and the semiconductor element 117 is tested.

[0300] The transistor 117s is controlled to be in an on state or an off state by periodically or intermittently applying an on voltage or an off voltage as a gate signal Vsgs to the gate terminal gs of the transistor 117s.

[0301] The short circuit 137m connected between the gate terminal gm and the emitter terminal em of the transistor 117m is made into an on state, and the transistor 117m is made into a diode connection state. The switch circuit 124c and the switch circuit 124d are made into an off (open) state. In the semiconductor element 117, a constant current Id flows between the P electrode terminal and the N electrode terminal.

[0302] The transistor 117s is subjected to on-off control by a gate signal Vsgs applied to the gate terminal gs of the transistor 117s, and the test of the semiconductor element 117 is performed.

[0303] Figure 26 (d) of FIG. 17 shows a state in which the transistor 117s is made into an on state, and the transistor 117m is made into an off state. The transistor 117s is controlled to be in an on state by periodically or intermittently applying an on voltage or an off voltage as a gate signal Vsgs to the gate terminal gs of the transistor 117s. The transistor 117m is controlled to be in an off state.

[0304] The short circuit 137 connected between the gate terminals g and the emitter terminals e of the transistor 117m and the transistor 117s is made into an off (open) state. The switch circuit 124c is made into an off state, and the switch circuit 124d is made into an on (closed) state.

[0305] In the semiconductor element 117, a current Id flows from the P electrode terminal through the channel of the transistor 117s, and the current Id flows through the switch circuit 124d. The transistor 117s is subjected to on-off control by a gate signal Vsgs applied to the gate terminal gs of the transistor 117s, and the test of the semiconductor element 117 is performed.

[0306] Figure 26(e) turns on transistor 117m and turns off transistor 117s. A turn-on voltage or turn-off voltage is periodically or intermittently applied as a gate signal Vsgm to the gate terminal gm of transistor 117m. Transistor 117s is controlled to be in the off state.

[0307] The short-circuit circuit 137, connecting the gate terminal g and emitter terminal e of transistors 117m and 117s, is turned off (open circuit). Switching circuit 124d is turned off (open circuit) and turned on (closed circuit).

[0308] In semiconductor device 117, current Id flows from the P-electrode terminal through switching circuit 124c, and current Id flows between the channels of transistor 117m. By applying a gate signal Vsgm to the gate terminal gm of transistor 117m, the transistor 117m is controlled to turn on and off, and the semiconductor device 117 is tested.

[0309] Figure 19 (f) shows the state in which a gate signal is applied to the gate terminals g (gate terminal gm, gate terminal gs) of transistors 117m and 117s, causing a constant current Id to flow through the semiconductor element 117, and the semiconductor element 117 is tested.

[0310] A turn-on voltage or a turn-off voltage is periodically or intermittently applied to the gate terminal gs of transistor 117s and the gate terminal gm of transistor 117m. Transistors 117s and 117m are controlled to be in a turn-on state or a turn-off state.

[0311] The short-circuit circuit 137 connecting the gate terminal g and emitter terminal e of transistors 117m and 117s is turned off. Switching circuits 124c and 124d are turned off (open circuit). A constant current Id flows between the P-electrode terminal and the N-electrode terminal in semiconductor element 117.

[0312] By controlling the transistors 117m and 117s to be turned on at different times, or by controlling the transistors 117m and 117s to be turned on for only a very short period of time, surge voltage and transient current can be allowed to flow through the semiconductor element 117, enabling more stringent testing.

[0313] By selection or combination Figure 26 Timing waveforms and Figure 26 (a)~ Figure 26 The test of semiconductor device 117 is carried out by test (f). The combination can be illustrated by performing the test sequentially. Figure 26 (a)~ Figure 26 The circumstances of the (f) trial, randomized implementation Figure 26 (a)~Figure 27 the case of the test of (f) of (a).

[0314] Figure 3 is a diagram for explaining the semiconductor element testing device and the testing method of a semiconductor element in another embodiment of the present application. The test circuit module 301 can be exemplified by Figure 27 and the like. The test circuit module 301 is connected to the A, B, C sections of (a). Figure 26 The test circuit module 301 is prepared in correspondence with each semiconductor element 117. The test circuit module 301 can be exemplified by Figure 3 , Figure 27 The test circuit module 301 is connected to the three switching circuit boards 201 (switching circuit board 201b, switching circuit board 201c, switching circuit board 201d). As shown in (a), Figure 27 The switching circuit board 201b is prepared in correspondence with the semiconductor element 117 under test, as shown in (a). In (a), Figure 27 The switching circuit 124aa is arranged in the test circuit module 301a, the switching circuit 124ab is arranged in the test circuit module 301b, and the switching circuit 124ac is arranged in the test circuit module 301c.

[0315] Figure 27 The embodiment of (a) is an embodiment in which a plurality of semiconductor elements 117 are tested. The semiconductor element testing device of the present application can test a plurality of test circuit modules 301 at the same time or sequentially by controlling the switching circuit 124a.

[0316] The test circuit module 301 is controlled by one control circuit board 111. The power supply device 132 can be prepared in one for a plurality of test circuit modules 301 (semiconductor elements 117) under test.

[0317] ​ (b) is a timing chart for explaining the operation of the semiconductor element testing device of the present application. The transistor 117m of the test circuit module 301 is sequentially applied with the on voltage Vsg to make it operate, and the test is performed.

[0318] The matters or contents described in the specification and the drawings can of course be combined with each other.

[0319] Industrial applicability

[0320] The present application can provide a semiconductor element testing device and a semiconductor testing method in which connection change can be easily performed in accordance with the contents of the test of a transistor or the like semiconductor element and the number of simultaneous tests of semiconductor elements.

[0321] Explanation of reference numerals

[0322] 111 control circuit substrate (controller)

[0323] 112 gate signal control circuit

[0324] 113 gate driver circuit

[0325] 115 temperature measurement circuit

[0326] 116 operational amplifier (buffer amplifier)

[0327] 117 power transistor

[0328] 118 constant current circuit

[0329] 121 constant current circuit

[0330] 122 switching circuit

[0331] 124 switching circuit

[0332] 125 variable resistance circuit

[0333] 126 variable resistance circuit

[0334] 127 selector

[0335] 128 current detection circuit

[0336] 129 voltage detection circuit

[0337] 130 constant current setting circuit

[0338] 131 control frame

[0339] 132 power supply device

[0340] 133 control circuit

[0341] 134 heating and cooling plate

[0342] 135 circulating water pipe

[0343] 136 cooler

[0344] 137 short circuit

[0345] 138 insulation type DCDC converter circuit

[0346] 201 switching circuit substrate

[0347] 202 connector

[0348] 203 sample connection circuit

[0349] 204 conductor plate

[0350] 205 fork plug

[0351] 206 connecting pin

[0352] 207 female substrate

[0353] 208 connector

[0354] 209 device control circuit substrate

[0355] 210 housing

[0356] 211 connecting wiring

[0357] 212 power supply wiring

[0358] 213 connector

[0359] 214 partition

[0360] 215 partition

[0361] 216 opening portion

[0362] 219 connecting bolt

[0363] 220 contact portion

[0364] 221 fixing screw

[0365] 222 signal wiring

[0366] 223 heat pipe

[0367] 224 fixing screw

[0368] 225 contact portion

[0369] 226 element terminal

[0370] 227 cooling fan

[0371] 228 heat dissipation fin

[0372] 231 heat pipe metal piece

[0373] 232 connecting pressure portion

[0374] 233 connecting holding portion

[0375] 236 spring (pressure metal piece)

[0376] 237 position fixing screw

[0377] 238 screw hole

[0378] 239 spring hole

[0379] 240 positioning screw hole

[0380] 241 fork plug insertion plate

[0381] 251 protrusion

[0382] 252 groove

[0383] 301 test circuit module

[0384] 302 voltage selection circuit

[0385] 311 presser

[0386] 312 insulating plate

[0387] 313 presser mounting plate

[0388] 315 insulating portion

Claims

1. A power semiconductor device testing apparatus for testing a power semiconductor device having a first element terminal, a second element terminal, and a signal terminal, characterized in that, have: The power supply device supplies test current or test voltage to the power semiconductor element; A gate driver circuit applies an on-state voltage, a first off-state voltage, and a second off-state voltage lower than the first off-state voltage to the signal terminal; A constant current circuit supplies a constant current between the terminals of the first element and the second element; The voltage output circuit outputs the voltage between the terminals of the first and second components. Apply the second cutoff voltage to the signal terminal. The constant current is supplied between the first element terminal and the second element terminal. With the constant current supplied, the voltage output by the voltage output circuit is used as the temperature information of the power semiconductor element.

2. A power semiconductor device testing apparatus for testing a power semiconductor device having a first element terminal, a second element terminal, and a signal terminal, characterized in that, have: The power supply device supplies test current or test voltage to the power semiconductor element; A gate driver circuit applies an on-state voltage, a first off-state voltage, and a second off-state voltage lower than the first off-state voltage to the signal terminal; A constant current circuit supplies a constant current between the terminals of the first element and the second element; The voltage output circuit outputs the voltage between the terminals of the first and second components. The gate driver circuit applies the on-state voltage, the second off-state voltage, and the first off-state voltage to the signal terminal. By applying the conduction voltage to the signal terminal, the test current or test voltage is supplied to the power semiconductor element. The system comprises a first period before the test current or test voltage is supplied to the power semiconductor element, and a second period after the test current or test voltage is supplied to the power semiconductor element. During the first period, A second cutoff voltage is applied to the signal terminal. The constant current is supplied between the first element terminal and the second element terminal. Under the condition of supplying the constant current, the voltage output by the voltage output circuit is obtained as the first temperature information of the power semiconductor element. During the second period, A second cutoff voltage is applied to the signal terminal. The constant current is supplied between the first element terminal and the second element terminal. The voltage output by the voltage output circuit is obtained as the second temperature information of the power semiconductor element under the condition of supplying the constant current.

3. A power semiconductor device testing apparatus for testing a power semiconductor device having a first element terminal, a second element terminal, a signal terminal, a diode, and a connection terminal of the diode, characterized in that, have: The power supply device supplies test current or test voltage to the power semiconductor element; A gate driver circuit applies an on-state voltage, a first off-state voltage, and a second off-state voltage lower than the first off-state voltage to the signal terminal; A constant current circuit supplies a constant current to the connection terminals of the diode; The voltage output circuit outputs the voltage at the connection terminals of the diode. Apply the second cutoff voltage to the signal terminal. The constant current is supplied to the connection terminal. With the constant current supplied, the voltage output by the voltage output circuit is used as the temperature information of the power semiconductor element.

4. A power semiconductor device testing apparatus for testing a power semiconductor device having a first element terminal, a second element terminal, a signal terminal, a diode, and a connection terminal of the diode, characterized in that, have: The power supply device supplies test current or test voltage to the power semiconductor element; A gate driver circuit applies an on-state voltage, a first off-state voltage, and a second off-state voltage that is lower than the first off-state voltage. A constant current circuit supplies a constant current to the connection terminals of the diode; The voltage output circuit outputs the voltage at the connection terminals of the diode. The gate driver circuit applies the on-state voltage, the first off-state voltage, and the second off-state voltage to the signal terminal. By applying the conduction voltage to the signal terminal, the test current or test voltage is supplied to the power semiconductor element. The system includes a first period during which the on-state voltage is applied to the signal terminal and a second period during which the second off-state voltage is applied to the signal terminal. During the first period, The constant current is supplied to the connection terminal. Under the condition of supplying the constant current, the voltage output by the voltage output circuit is obtained as the first temperature information of the power semiconductor element. During the second period, The constant current is supplied to the connection terminal. The voltage output by the voltage output circuit is obtained as the second temperature information of the power semiconductor element under the condition of supplying the constant current.

5. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also has: A resistor circuit is connected to the signal terminal; A terminal voltage measuring circuit measures the terminal voltage of the resistor circuit.

6. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also has: The first switch circuit board has a first conductor plate or conductor rod and a first switch circuit connected to the first conductor plate or conductor rod; The first connecting component is connected to the terminal of the first element. The test current or test voltage is supplied to the terminal of the first element via the first switching circuit. It is provided with an opening corresponding to the position of the first conductor plate or conductor rod, allowing the first connecting component to be inserted. By inserting the first connecting member into the opening, the first connecting member can be connected to the first conductor plate or conductor rod.

7. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also includes: a first conductor plate or conductor rod; a first switching circuit board, on which a first switching circuit is disposed; and a first connecting component, connected to the first element terminal of the power semiconductor element. It is housed in a shell divided into Part 1 and Part 2. The power semiconductor element is disposed in the first part. The first switch circuit board is disposed in the second part. An opening is provided between the first part and the second part. The first connecting component is connected to the first conductor plate or conductor rod by inserting the first connecting component into the opening.

8. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also has: A first switch circuit board has: a first conductor plate or conductor rod; a second conductor plate or conductor rod; and a first switch circuit connected to the first conductor plate or conductor rod and the second conductor plate or conductor rod. The first connecting component is connected to the terminal of the first element; The second connection terminal is connected to the output terminal of the power supply device that outputs the test current or test voltage. The first conductor plate or conductor rod is connected to the first connecting component. The second conductor plate or conductor rod is connected to the second connecting component.

9. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also includes: a first switch circuit board, on which a first switch circuit is mounted or formed; and a second switch circuit board, on which a second switch circuit is mounted or formed. The first switching circuit is configured between the terminal of the first element and the output terminal of the power supply device that outputs the test current or test voltage. The second switching circuit is connected between the output terminals of the power supply device. The test current or test voltage is supplied to the terminal of the first component by the operation of the first switching circuit. The second switching circuit is activated to short-circuit the output terminals of the power supply device.

10. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also has a connecting structure. The connecting structure has: The connection retaining part contacts the first surface of the first element terminal; The connection receiving part is disposed spatially away from the connection holding part and contacts the second surface of the first element terminal; Screws; The connecting pressure section has a threaded hole for the screw to be inserted. The distance between the connecting bearing part and the connecting pressure part is adjusted or set by the screw. The first component terminal is held between the connection retaining portion and the connection receiving portion.

11. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also has a connecting structure. The connection structure is connected to the terminal of the first element. The test current or the test voltage is supplied to the power semiconductor element via the connection structure. The connecting structure has a heat pipe metal component with a recess. A heat pipe is disposed in the recess. The coefficient of linear expansion of the heat pipe metal component of the connecting structure is smaller than that of the heat pipe.

12. The power semiconductor device testing apparatus according to any one of claims 1 to 4, characterized in that, It also features a heating and cooling plate and a water leakage sensor. The power semiconductor element is disposed on the heating and cooling plate. The leakage sensor is disposed around the heating and cooling plate. The action of the leak sensor can trigger at least one of the following actions: a stop action or an alarm action.

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