Large-current half-bridge packaging structure adopting TOLL packaging and production method

Abstract

The invention discloses a large-current half-bridge packaging structure adopting TOLL packaging and a production method, and particularly relates to the field of semiconductor packaging structures.The large-current half-bridge packaging structure comprises a lead frame, the lead frame is provided with two packaging units, the two packaging units comprise unit base islands and pins, the two unit base islands are arranged in a central symmetry mode with respect to the center point of the lead frame, and the pins are arranged on the two unit base islands; the pins comprise a D pole, an S pole and a G pole, and the pin S pole and the pin G pole in the same packaging unit are located on the same side of the unit base island to which the packaging unit belongs. According to the invention, the two MOSFET chips are integrated in the single TOLL package, and the source electrode of the upper tube and the drain electrode of the lower tube are directly connected through the lead frame, so that internal D2amp is formed; and S1 shares a pole, so that a complete half-bridge circuit function is realized in one package, and compared with a traditional scheme of using two independent TOLL packages, the occupied area of a PCB is reduced by about 50%, and the space utilization rate of the terminal equipment is remarkably improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging structure technology, and more specifically, to a high-current half-bridge packaging structure and manufacturing method using TOLL packaging. Background Technology

[0002] Currently, in the field of power semiconductor devices, TOLL (Tiny Outline Leadless) packaging is widely used in high-current applications such as high-power density power supplies, motor drives, new energy vehicles, and industrial control due to its advantages such as small size, low thermal resistance, low inductance, and good heat dissipation. Traditional half-bridge circuits typically consist of two independent power switching devices (such as MOSFETs or IGBTs), each using a standard TOLL package. The source (S) of one device is then connected to the drain (D) of the other device via traces on the PCB (printed circuit board), thus forming a half-bridge topology.

[0003] However, this discrete TOLL packaging solution has obvious drawbacks: First, it requires twice the PCB board area, making it difficult to achieve miniaturization and weight reduction of terminal devices; second, the DS connection is achieved through PCB traces, which has a long path and introduces large parasitic resistance and inductance, affecting circuit efficiency and switching performance, especially under high-frequency and high-current operating conditions, which can easily generate electromagnetic interference (EMI) and power loss; third, the reliability of PCB wiring is subject to the influence of soldering process and thermal stress, and there is a risk of poor soldering and cracking during long-term operation, which reduces the overall stability and lifespan of the system.

[0004] Although the TOLL package itself is an industry standard and easy to source and replace, the aforementioned structural limitations severely restrict its further development in highly integrated, high-efficiency power electronic systems. Therefore, there is an urgent need for a new TOLL package structure that can integrate two power switching units within a single package, directly achieving half-bridge connection within the package, thereby significantly reducing system size, lowering parasitic parameters, and improving power density and reliability. Summary of the Invention

[0005] The problem to be solved by the high-current half-bridge package structure and manufacturing method using TOLL packaging provided by the present invention is that the existing high-current half-bridge package structure using TOLL packaging requires two TOLLs to form a half-bridge circuit, which occupies a large area of ​​PCB board.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a high-current half-bridge package structure using TOLL packaging, comprising a lead frame, wherein two package units are disposed on the lead frame, the two package units comprising a base island and pins, the two base islands being centrally symmetrically arranged about the center point of the lead frame, the pins comprising a drain (D), source (S), and gate (G) terminal, the source (S) and gate (G) terminals of the same package unit being located on the same side of the base island to which the package unit belongs, the drain (D) and gate (G) or source (S) terminals of the same package unit being located on opposite sides of the base island to which the package unit belongs, and the source (S) and gate (G) terminals being spaced apart, the drain (D) terminal of one package unit being connected to the source (S) terminal of another package unit through the lead frame to form a D2&S1 or D1&S2 terminal, the gate (G) terminals of the two package units being located at the lower left and upper right corners of the lead frame, respectively, and the drain (D) terminals of the two package units being located at the upper left and lower right corners of the lead frame, respectively.

[0007] In a preferred embodiment, the pins of both package units are exposed outside the lead frame, and the pins exiting below the lead frame are from left to right G2, S2, S2, S2, D1, D1, D1, D1, and the pins exiting above the lead frame are from left to right D2&S1, D2&S1, D2&S1, G1.

[0008] In a preferred embodiment, the entire high-current half-bridge package structure is encapsulated in a molding compound, with the connection points of D2&S1 or D1&S2 located within the lead frame, and the back side of the connection points of D2&S1 or D1&S2 exposed outside the molding compound.

[0009] In a preferred embodiment, the front of the unit base island is provided with a dovetail groove and a semi-enclosed single V groove, and the single V groove corresponds to the dovetail groove end to end.

[0010] In a preferred embodiment, the circumferential side of the unit base island is provided with interconnected grooves.

[0011] In a preferred embodiment, the surface of the pin is provided with a double V-groove.

[0012] In a preferred embodiment, the drain terminals of the two package units are named D1 and D2, respectively, and only one of the D1 and D2 terminals is connected to the source terminal (S), and the contact surface of the pin connected to the source terminal is larger than the contact surface of the other pin not connected to the source terminal.

[0013] A method for manufacturing a high-current half-bridge package structure using TOLL packaging includes the following steps: Step 1: Prepare the lead frame and integrate two centrally symmetrically arranged package units on the lead frame. Each unit includes a base island and D, S, and G pins. Machining dovetail grooves and semi-enclosed single V grooves on the front of the base island, and machining interconnected grooves on the circumferential side of the base island. Machining double V grooves on the upper surface of the G and S pins to ensure that the D of one package unit and the S of the other package unit are electrically connected inside the lead frame, forming a shared pole for D2 & S1. Step 2: Mount the MOSFET chips. Mount the two MOSFET chips onto the two unit base islands respectively using eutectic bonding, silver sintering or conductive adhesive bonding processes. Step 3: Bonding with thick aluminum wire. High-purity thick aluminum wire is used for bonding to connect high-current paths. Step 4: Bond fine aluminum wires and use fine aluminum wires for signal stage connections; Step 5: Molding. Place the bonded lead frame into the mold and use epoxy molding compound for overall injection molding. During the molding process, ensure that the back of the D2 & S1 connection is not completely covered, so that part of it is exposed outside the molded body. Step 6: Post-curing, subjecting the molded body to high-temperature post-curing treatment; Step 7: Electroplating. Perform solderability electroplating on the exposed pins and surface treatment on the D2 & S1 connection. Step 8: Cutting and shaping the lead frame. Remove the process connection ribs on the lead frame to form the final lead shape. The lead sequence at the bottom is: G2, S2, S2, S2, D1, D1, D1, D1; the lead sequence at the top is: D2&S1, D2&S1, D2&S1, G1. Step 9: Conduct electrical and reliability tests on the product after the reinforcement is cut and formed.

[0014] The technical effects and advantages of this invention are as follows: This invention integrates two MOSFET chips into a single TOLL package, directly connecting the source (S1) of the upper MOSFET and the drain (D2) of the lower MOSFET through a lead frame, forming an internal D2 & S1 common electrode. This achieves a complete half-bridge circuit function within a single package. Compared to the traditional solution using two independent TOLL packages, the PCB area is reduced by approximately 50%, significantly improving the space utilization of terminal devices and facilitating miniaturization and lightweight design of products.

[0015] This invention achieves direct connection between the D and S terminals within the package using a lead frame, avoiding long PCB traces and minimizing the current path. This effectively reduces parasitic resistance and inductance in the connection path. This not only reduces power loss and improves conversion efficiency but also mitigates voltage spikes and oscillations during switching, enhancing the system's electromagnetic compatibility (EMC) and dynamic response capabilities.

[0016] In this invention, the back side of the D2&S1 connection is exposed outside the molding compound, allowing direct contact with the PCB copper foil or heat sink, forming an efficient heat conduction path, significantly reducing thermal resistance and improving overall heat dissipation. Simultaneously, the symmetrical layout of the dual-unit base islands facilitates a balanced distribution of thermal stress, preventing localized overheating and extending device lifespan.

[0017] The present invention provides a dovetail groove and a semi-enclosed single V groove on the front side of the unit base island, interconnected grooves on the circumferential side, and double V grooves on the pin surface (especially the G and S poles). These structural designs significantly increase the mechanical interlocking force and interface bonding strength between the base island, pins and molding material, effectively preventing failure modes such as delamination and cracking caused by thermal cycling or mechanical stress, and improving the long-term reliability of the package.

[0018] In this invention, the pins D1 and D2 connected to the source (S) terminal are designed with a larger contact surface, which can carry a larger current and meet the current carrying requirements of high-current applications. Combined with the parallel bonding of multiple thick aluminum wires (e.g., 2 x 20mil aluminum wires), a single package can support a continuous current of up to 100A, making it suitable for high power density applications.

[0019] This invention still uses the standard TOLL outline size and bottom pin layout, and is fully compatible with existing PCB design and mounting processes. It can upgrade products without changing downstream production lines, making it easy to promote and apply. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the internal design of the packaging structure of the present invention.

[0021] Figure 2 For the present invention Figure 2 A cross-sectional diagram from the perspective of AA.

[0022] Figure 3 This is a schematic diagram of the packaging structure of the present invention after the chip is placed.

[0023] Figure 4 This is a schematic diagram of the packaging structure of the present invention after the bonding of coarse aluminum wire.

[0024] Figure 5 This is a schematic diagram of the packaging structure of the present invention after the bonding of fine aluminum wires.

[0025] Figure 6 This is a front view of the product after the packaging structure of the present invention has been plastic-encapsulated.

[0026] Figure 7 This is a schematic diagram of the back of the product after the packaging structure of the present invention has been plastic-encapsulated.

[0027] Figure 8 This is a schematic diagram illustrating the circuit application principle of the packaging structure of the present invention.

[0028] The attached figures are labeled as follows: 1. Lead frame; 2. Package unit; 3. Unit base island; 4. Pin; 5. Dovetail groove; 6. Single V-groove; 7. Groove; 8. Double V-groove. Detailed Implementation

[0029] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Example

[0030] Refer to the instruction manual appendix Figures 1-8 The high-current half-bridge package structure using TOLL packaging includes a lead frame 1, on which two package units 2 are disposed. The two package units 2 include a base island 3 and pins 4. The two base islands 3 are centrally symmetrical about the center point of the lead frame 1. The pins 4 include drain (D), source (S), and gate (G). The source (S) and gate (G) pins within the same package unit 2 are located on the same side of the base island 3 to which the package unit 2 belongs. The drain (D) and gate (G) or source (S) pins within the same package unit 2 are located on opposite sides of the base island 3 to which the package unit 2 belongs, and the source (S) and gate (G) pins are spaced apart. The drain (D) pin of one package unit 2 is connected to the source (S) pin of the other package unit 2 through the lead frame 1 to form a D2&S1 or D1&S2 pin. The gate (G) pins of the two package units 2 are located at the lower left and upper right corners of the lead frame 1, respectively, and the drain (D) pins of the two package units 2 are located at the upper left and lower right corners of the lead frame 1, respectively.

[0031] It should be noted that the TOLL dual-base island half-bridge package has a current carrying capacity of 100A and a line resistance of 0.3mR based on 20mil aluminum wires * 2. The gate (G) terminals are located at the lower left and upper right corners of the package, and the drain (D) terminals are located at the upper left and lower right corners of the package, forming a centrally symmetrical layout.

[0032] It should be further explained that the half-bridge circuit of this invention consists of two power switching devices (MOSFETs) connected together in a totem pole configuration to output a square wave signal. The half-bridge circuit can be used to drive DC motors; by controlling the switching state of the half-bridge circuit, the motor speed and direction can be controlled, making it a widely used circuit configuration.

[0033] In this invention, a single TOLL package can realize a half-bridge circuit with a current carrying capacity of 100A, reducing the PCB board area by 50%, which is beneficial for the miniaturization and lightweighting of terminal devices, and energy saving and emission reduction meet the needs of social development. Furthermore, by directly integrating two chips into a single TOLL package, the electrodes that originally required PCB wiring are directly connected through the lead frame, resulting in the shortest path and reduced resistance and parasitic inductance.

[0034] In one embodiment of the present invention, the pins 4 of both packaging units 2 are exposed outside the lead frame 1, and the pins 4 below the lead frame 1 are G2, S2, S2, S2, D1, D1, D1, D1, and the pins 4 above the lead frame 1 are D2&S1, D2&S1, D2&S1, and G1, from left to right.

[0035] In one embodiment of the present invention, the entire high-current half-bridge package structure is encapsulated by a molding compound, the connection of D2&S1 or D1&S2 is located inside the lead frame 1, and the back side of the connection of D2&S1 or D1&S2 is exposed outside the molding compound.

[0036] It should be noted that the back of the connection between D2 & S1 or D1 & S2 is exposed outside the plastic package for connection and disassembly of conductive connections and heat dissipation.

[0037] In one embodiment of the present invention, the front of the unit base island 3 is provided with a dovetail groove 5 and a semi-enclosed single V groove 6, and the single V groove 6 corresponds to the dovetail groove 5 end to end.

[0038] It should be noted that dovetail grooves 5 and semi-enclosed single V grooves 6 are provided on the unit base island 3 to increase the bonding force between the unit base island 3 and the molding compound and prevent cracking of the bonding surface.

[0039] In one embodiment of the present invention, the circumferential side of the unit base island 3 is provided with interconnected grooves 7.

[0040] It should be noted that the grooves 7 set around the three sides of the unit base island 3 can effectively increase the bonding force between the unit base island 3 and the molding compound, and prevent the bonding surface from cracking.

[0041] In one embodiment of the present invention, a double V-groove 8 is formed on the upper surface of the pin G or pin S.

[0042] It should be noted that a double V-groove 8 is provided on pin 4 near the edge of the molding compound to increase the bonding force between pin 4 and the molding compound and prevent cracking of the bonding surface.

[0043] It should be further noted that there are no double V-grooves on the D-pin or the D&S-pin.

[0044] In one embodiment of the present invention, the pins D of the two packaging units 2 are named D1 and D2 respectively, and only one of the D1 and D2 pins is connected to the S pin, and the contact surface of the pin 4 connected to the S pin of the D1 and D2 pins is larger than the contact surface of the other pin 4 not connected to the S pin.

[0045] It should be noted that, as Figure 1 and Figure 3 As shown, D2 is connected to S to form a common electrode D2 & S1. However, in practice, D1 can also be connected to S to form a common electrode D1 & S1.

[0046] A method for manufacturing a high-current half-bridge package structure using TOLL packaging includes the following steps: Step 1: Prepare the lead frame 1. Integrate two centrally symmetrically arranged package units 2 on the lead frame 1. Each package unit 2 includes a unit base island 3 and D, S, and G pins 4. Machining dovetail grooves 5 and semi-enclosed single V grooves 6 on the front of the unit base island 3. Machining interconnected grooves 7 on the circumferential side of the unit base island 3. Machining double V grooves 8 on the upper surface of the G and S pins 4 (the D pin does not have double V grooves 8). Ensure that the D pin of one package unit 2 and the S pin of the other package unit 2 are electrically connected inside the lead frame 1 to form a shared pole for D2 & S1. Step 2: Mount the MOSFET chips. Mount the two MOSFET chips onto the two unit base islands 3 respectively, using eutectic bonding, silver sintering or conductive adhesive bonding processes. Step 3: Bonding with thick aluminum wire. Use high-purity thick aluminum wire (e.g., 20mil) for bonding to connect high-current paths (multiple parallel bonding of the drain (D1) of the upper MOSFET chip to the D1 pin array to reduce resistance and increase current carrying capacity; multi-point bonding of the source (S2) of the lower MOSFET chip to the S2 pin array; since the common electrode of D2 & S1 is already connected inside the lead frame, no additional bonding is required). Step 4: Bond fine aluminum wires. Use fine aluminum wires (e.g., 1mil~2mil) for signal stage connections (bond the gate (G1) of the upper MOSFET chip to the G1 pin, and bond the gate (G2) of the lower MOSFET chip to the G2 pin. Auxiliary signal line bonding can be performed on the source (S1) or drain (D2) as needed for driving feedback or detection). Step 5: Molding. Place the bonded lead frame 1 into the mold and use epoxy molding compound for overall injection molding. During the molding process, ensure that the back of the D2&S1 connection is not completely covered, so that part of it is exposed outside the molded body. Step 6: Post-curing, subjecting the molded body to high-temperature post-curing treatment; Step 7: Electroplating. Perform solderability electroplating on exposed pin 4 (such as silver or tin plating), and perform surface treatment on the D2 & S1 connection (such as OSP or nickel plating). Step 8: Cutting and shaping the lead wires. Cut off the process connecting ribs on the lead frame 1 to form the final shape of the lead 4. The lead wires at the bottom of the lead 4 are in the following order: G2, S2, S2, S2, D1, D1, D1, D1; the lead wires at the top are: D2&S1, D2&S1, D2&S1, G1. Step 9: Conduct electrical and reliability tests on the product after the lead wires are cut and formed (electrical performance tests, including on-resistance, breakdown voltage, gate capacitance, switching characteristics, etc.; reliability tests, including high-temperature storage, temperature cycling, high-pressure cooking (PCT), mechanical shock, etc.; X-ray inspection of internal bonding wires and chip mounting quality to ensure no defects such as cold solder joints, broken wires, or misalignment).

[0047] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-current half-bridge package structure using TOLL packaging, characterized in that: The package includes a lead frame (1), on which two packaging units (2) are disposed. The two packaging units (2) include a unit base island (3) and pins (4). The two unit base islands (3) are arranged symmetrically about the center point of the lead frame (1). The pins (4) include a drain (D), a source (S), and a gate (G). The S and G pins of the same packaging unit (2) are located on the same side of the unit base island (3) to which the packaging unit (2) belongs. The D and G pins of the same packaging unit (2) are located on the same side of the unit base island (3). The S-pole is located on the opposite side of the unit base island (3) to which the package unit (2) belongs, and the S-pole and the G-pole are spaced apart. The D-pole of one package unit (2) is connected to the S-pole of another package unit (2) through the lead frame (1) to form the D2&S1 pole or the D1&S2 pole. The G-pole of the two package units (2) is located at the lower left corner and the upper right corner of the lead frame (1), respectively. The D-pole of the two package units (2) is located at the upper left corner and the lower right corner of the lead frame (1), respectively.

2. The high-current half-bridge package structure using TOLL packaging according to claim 1, characterized in that: The pins (4) of both of the package units (2) are exposed outside the lead frame (1), and the pins (4) below the lead frame (1) from left to right are G2, S2, S2, S2, D1, D1, D1, D1, and the pins (4) above the lead frame (1) from left to right are D2&S1, D2&S1, D2&S1, and G1.

3. The high-current half-bridge package structure using TOLL packaging according to claim 2, characterized in that: The entire high-current half-bridge package structure is encapsulated in a plastic package. The connection of D2&S1 or D1&S2 is located inside the lead frame (1), and the back of the connection of D2&S1 or D1&S2 is exposed outside the plastic package.

4. The high-current half-bridge package structure using TOLL packaging according to claim 3, characterized in that: The front of the unit base island (3) is provided with a dovetail groove (5) and a semi-enclosed single V groove (6), and the single V groove (6) corresponds to the dovetail groove (5) end to end.

5. The high-current half-bridge package structure using TOLL packaging according to claim 4, characterized in that: The unit base island (3) has interconnected grooves (7) on its circumferential side.

6. The high-current half-bridge package structure using TOLL packaging according to claim 5, characterized in that: The upper surface of the pin G or pin S is provided with a double V-groove (8).

7. The high-current half-bridge package structure using TOLL packaging according to claim 6, characterized in that: The pins D of the two package units (2) are named D1 and D2 respectively, and only one of the D1 and D2 pins is connected to the S pin. The contact surface of the pin (4) connected to the S pin of the D1 and D2 pins is larger than the contact surface of the other pin (4) not connected to the S pin.

8. The manufacturing method of the high-current half-bridge package structure using TOLL packaging according to claim 7, characterized in that, Includes the following steps: Step 1: Prepare the lead frame (1). Integrate two centrally symmetrically arranged package units (2) on the lead frame (1). Each package unit (2) includes a unit base island (3) and D, S, and G pins (4). Process dovetail grooves (5) and semi-enclosed single V grooves (6) on the front of the unit base island (3). Process interconnected grooves (7) on the circumferential side of the unit base island (3). Process double V grooves (8) on the upper surface of the G and S pins (4) to ensure that the D pole of one package unit (2) and the S pole of the other package unit (2) are electrically connected inside the lead frame (1) to form a shared pole of D2 & S1. Step 2: Mount the MOSFET chips. Mount the two MOSFET chips onto the two unit base islands (3) respectively, using eutectic bonding, silver sintering or conductive adhesive bonding processes. Step 3: Bonding with thick aluminum wire. High-purity thick aluminum wire is used for bonding to connect high-current paths. Step 4: Bond fine aluminum wires and use fine aluminum wires for signal stage connections; Step 5: Molding. Place the bonded lead frame (1) into the mold and use epoxy molding compound for overall injection molding. During the molding process, ensure that the back of the D2 & S1 connection is not completely covered, so that part of it is exposed outside the molded body. Step 6: Post-curing, subjecting the molded body to high-temperature post-curing treatment; Step 7: Electroplating. Solderability electroplating is performed on the exposed pins (4), and surface treatment is performed on the D2&S1 connection. Step 8: Cutting and shaping the lead wires. Cut off the process connecting ribs on the lead frame (1) to form the final pin (4) shape. The pins below the pin (4) are in the following order: G2, S2, S2, S2, D1, D1, D1, D1; the pins above the pin are: D2&S1, D2&S1, D2&S1, G1. Step 9: Conduct electrical and reliability tests on the product after the reinforcement is cut and formed.

Images